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42 Commits

Author SHA1 Message Date
weiting2 acd0080929 sti_clk ratio should be system register 2020-11-13 18:30:41 +08:00
weiting2 1cde4cfe02 update sti_cali data 2020-10-26 17:03:38 +08:00
weiting2 764bd9364d amp_gain does not on change 2020-10-13 18:09:20 +08:00
weiting2 b5e0026f2e amp_gain does not on change 2020-10-13 18:09:09 +08:00
weiting2 823016d4b7 support fast settle now 2020-09-25 18:36:10 +08:00
weiting2 bee57486e0 support fast settle now 2020-09-25 18:35:55 +08:00
weiting2 214222cb1e TODO: support fast settle 2020-09-25 17:48:52 +08:00
weiting2 38572e128d increase data throughput by modify notify format 2020-09-25 16:37:27 +08:00
weiting2 9e19642081 increase data throughput by modify notify format 2020-09-25 15:57:41 +08:00
weiting2 5f2a258f49 increase data throughput by modify notify format 2020-09-25 11:56:25 +08:00
weiting2 d5158775b8 [semi-stable] TODO: increase data throughput by modify notify format 2020-09-25 11:46:16 +08:00
weiting2 282b8077a7 update central 2020-09-18 20:21:15 +08:00
weiting2 5b6430cec9 update central 2020-09-18 18:13:00 +08:00
weiting2 9484008d1e update central 2020-09-18 18:09:28 +08:00
weiting2 bd0c282d25 using central feature CIS 2020-09-16 15:26:26 +08:00
weiting2 acd590de44 sti on change is done; TODO: disable sti before every on change 2020-09-16 10:59:22 +08:00
weiting2 b8d96c32b0 sti on change is done; TODO: disable sti before every on change 2020-09-15 17:41:46 +08:00
weiting2 c3ab78e16a sti on change has some bug 2020-09-14 17:21:30 +08:00
weiting2 fde824ee34 sti on change has some bug 2020-09-14 12:54:23 +08:00
weiting2 fc3adb450c sti on change has some bug 2020-09-14 11:10:42 +08:00
weiting2 747752640a sti on change has some bug 2020-09-14 09:55:26 +08:00
weiting2 7a73097666 add sti, stop, ... etc function 2020-09-10 18:41:29 +08:00
weiting2 8a95874b0b "on change" can work; TODO: add sti, stop, ... etc function 2020-09-09 17:01:35 +08:00
weiting2 9db0984a92 attempt to support "on change" for every register 2020-09-09 10:26:13 +08:00
weiting2 b9c9cc0bbc attempt to support "on change" for every register 2020-09-08 18:06:17 +08:00
weiting2 cd44c2ecaa attempt to support "on change" for every register 2020-09-08 17:47:12 +08:00
weiting2 3bb5cee129 attempt to support "on change" for every register 2020-09-08 17:42:08 +08:00
weiting2 2480d7775f attempt to support "on change" for every register 2020-09-08 17:19:13 +08:00
weiting2 3b9e972397 attempt to support "on change" for every register 2020-09-04 16:28:34 +08:00
weiting2 36df3abed1 attempt to support "on change" for every register 2020-09-02 19:19:05 +08:00
weiting2 918584c915 attempt to support "on change" for every register 2020-09-02 17:16:00 +08:00
weiting2 cc0a21c364 attempt to support "on change" for every register 2020-09-02 11:56:12 +08:00
weiting2 388c06efe7 attempt to support "on change" for every register 2020-08-31 16:35:12 +08:00
weiting2 8bcb4cd27e attempt to support "on change" for every register 2020-08-31 11:34:45 +08:00
weiting2 5d88871e58 attempt to support "on change" for every register 2020-08-28 18:25:02 +08:00
weiting2 8635b1b878 attempt to support "on change" for every register 2020-08-28 18:24:56 +08:00
weiting2 6e9acfda78 [on sell] modify get_date script for linux version CCS 2020-07-20 17:48:14 +08:00
weiting2 81d5d86890 [on sell] TODO: modify get_date script for linux version CCS 2020-07-20 17:42:35 +08:00
weiting2 0c8c92dc83 [on sell] TODO: modify get_date script for linux version CCS 2020-07-20 17:17:50 +08:00
weiting2 308de54833 Merge remote-tracking branch 'origin/Neulive20_developement_linux' into Neulive20_developement_linux 2020-07-20 17:17:34 +08:00
weiting2 e4c999b8c7 [on sell] TODO: modify get_date script for linux version CCS 2020-07-20 17:17:22 +08:00
weiting2 5c0c2cc9a5 [WARNING] do NOT use linux version CCS on simple central.
DLE can not enable on linux CCS
2020-07-20 16:12:17 +08:00
15 changed files with 750 additions and 321 deletions
+1 -1
View File
@@ -8,7 +8,7 @@ no device y=ax+b MAC a+ b+ a- b- avg
7 c652 c652 18:04:ED:37:C6:52 2024 -7687 2086 -11283 4.88850143182858
8 c5ed c5ed 18:04:ED:37:C5:ED 2231 -1711 2353 -70845 4.45265043545859
9 9bef 9bef 0081F9E49BEF 2383 -8585 2415 -20347 4.2758539244186
10 8b50 8b50 00:81:F9:E4:8B:50 2369 -11005 2360 -11797 4.30475635707671
10 8b50 8b50 00:81:F9:E4:8B:50 2366 -5223 2402 -14971 4.35162291666667
11 c641 c641 18:04:ED:37:C6:41 2090 4616 1997 -40665 5.07591391714942
12 E8E6 E8E6 A4:DA:32:D4:E8:E6 2306 -88454 2418 -15140 4.2686494968089
13 E73B E73B A4:DA:32:D4:E7:3B 2262 -564 2298 44746 4.35551198222141
+1 -1
View File
@@ -4,7 +4,7 @@
#folder=$($path | awk -F"/" '{$NF}')
folder=$(basename "$(pwd)")
if [ "$folder" == "ti" ]; then
if [ "$folder" == "ti" ] ; then
year=$(date +%-y)
month=$(date +%-m)
day=$(date +%-d)
@@ -103,7 +103,7 @@ typedef enum {
READ_REG, // read DBS register value, used after a "read" SPI instruction (MISO)
READ_REG2, // read DBS register value, used after a "read" SPI instruction (MISO)
END_TRANSMIT, // read DBS register value, used after a "read" SPI instruction (MISO)
ONE_SHOT_SPI, // end spi instruction
CONTI_SPI_WITH_FLUSH, // end spi instruction
READ_MOSI
} SPI_CB_MODE;
@@ -214,7 +214,7 @@ extern ICall_Semaphore semaphore;
// command return characteristic
#define BLE_CDR_BUFF_CHAR SIMPLEPROFILE_CHAR2
#define BLE_CDR_BUFF_SIZE SIMPLEPROFILE_CHAR2_LEN
#define BLE_CDR_SAMLL_SIZE 10
#define BLE_CDR_SMALL_SIZE 10
// instruction input characteristic
#define BLE_INS_BUFF_CHAR SIMPLEPROFILE_CHAR3
@@ -356,7 +356,7 @@ static uint16_t CONNECT_HANDLE = 0;
/**
* command instruction buffer
*/
static uint8_t cdr_buf[BLE_CDR_SAMLL_SIZE] = {0};
static uint8_t cdr_buf[BLE_CDR_SMALL_SIZE] = {0};
/*====================
==== event table ====
@@ -27,14 +27,14 @@ static void SendCaliValue(uint8_t CaliNumber){
// ch = 2 * (CaliNumber % 4);
// uint8_t gain_level = CaliNumber / 4; // 0:gain, 1:offset
uint8_t channel_number = 8, index = 1;
uint8_t channel_number = 8, index = 2;
uint8_t gain_level = 0;
if(CaliNumber < 4){
gain_level = CaliNumber;
}
cali_buf[0] = CHIP_ID;
cali_buf[1] = CHIP_ID;
for(int i=0 ; i<channel_number ; i++){
cali_buf[index++] = (uint8_t) (CaliTable.Ch[i].Gain[gain_level] >> 8) & 0xFF;
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Gain[gain_level] & 0x00FF;
@@ -42,9 +42,8 @@ static void SendCaliValue(uint8_t CaliNumber){
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Offset[gain_level] & 0x00FF;
}
// for(int i=1 ; i<BLE_CDR_BUFF_SIZE ; i++){
// cali_buf[i] = i;
// }
cali_buf[0] = index - 1;
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, index, cali_buf);
}
@@ -27,7 +27,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
check_reg_counter = 0;
if(check_ins(instruction_to_fit)){
NEULIVE_STATE.state = next_state;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// update rec_sti_command
if(!(rec_sti_command & ENABLE_STI)){
@@ -70,7 +70,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
IsFirstData = true;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
}
headstage_spi_transaction(3);
@@ -167,7 +167,7 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
else{
NEULIVE_STATE.state = next_state;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(3);
}
@@ -0,0 +1,167 @@
#ifndef DBS_OBJECT_H
#define DBS_OBJECT_H
#include "neu/headstage_spi.h"
#define SYS_RESERVED_INDEX 0
#define SYS_GENERAL_ENABLE_INDEX 1
#define SYS_LNA_BIOS1_INDEX 2
#define SYS_LNA_BIOS2_INDEX 3
#define SYS_STI_CLK_RATIO_INDEX 4
#define REC_CHANNEL_INDEX 0
#define REC_GAIN_INDEX 1
#define REC_ADC_CLOCK_INDEX 2
#define STI_ENABLE_INDEX 0
#define STI_AMP_POS_INDEX 1
#define STI_AMP_NEG_INDEX 2
#define STI_POLARITY_INDEX 3
#define STI_CYCLE_CH01_INDEX 4
#define STI_CYCLE_CH23_INDEX 5
#define STI_CYCLE_CH45_INDEX 6
#define STI_CYCLE_CH67_INDEX 7
#define STI_CLK_RATIO_INDEX 8
#define STI_ARBITRARY_EN_INDEX 9
#define STI_MODE_INDEX 10
#define STI_DURATION0_INDEX 11
#define STI_DURATION1_INDEX 12
#define STI_DURATION2_INDEX 13
#define STI_DURATION3_INDEX 14
//#define DBS_REGISTER \
// uint8_t address; \
// void (*write_reg) (DBSRegister *self, uint32_t reg_value); \
// uint32_t (*read_reg) (DBSRegister *self)
typedef struct _DBSRegister{
uint8_t address;
bool WriteRegister, CheckRegister;
void (*write_reg) (struct _DBSRegister *self, uint16_t reg_value);
void (*read_reg) (struct _DBSRegister *self);
}DBSRegister;
void write_reg(DBSRegister *self, uint16_t reg_value){
spi_txbuf[0] = 0x80 | self->address;
spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
spi_txbuf[2] = reg_value & 0xFF;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
void read_reg(DBSRegister *self){
spi_txbuf[0] = 0x7F & self->address;
spi_txbuf[1] = 0x7F & self->address; // it's don't care actually
spi_txbuf[2] = 0x7F & self->address; // it's don't care actually
SPICallBack = READ_REG;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
static uint16_t sys_register_default_value[5] = {
0x0000,
0x40F2,
0x0210,
0x4210,
0x0002
};
static uint16_t rec_register_value[3];
static uint16_t sti_register_value[43];
static DBSRegister sys_register[5];
static DBSRegister rec_register[3];
static DBSRegister sti_register[43];
static void InitSysRegister(){
sys_register[SYS_RESERVED_INDEX].address = 0x00;
sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
sys_register[SYS_STI_CLK_RATIO_INDEX].address = 52;
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
sys_register[i].WriteRegister = false;
sys_register[i].CheckRegister = false;
sys_register[i].write_reg = &write_reg;
sys_register[i].read_reg = &read_reg;
}
}
static void InitRecRegister(){
rec_register[REC_CHANNEL_INDEX].address = 48;
rec_register[REC_GAIN_INDEX].address = 49;
rec_register[REC_ADC_CLOCK_INDEX].address = 51; // sampling rate
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
rec_register[i].WriteRegister = false;
rec_register[i].CheckRegister = false;
rec_register[i].write_reg = &write_reg;
rec_register[i].read_reg = &read_reg;
}
}
static void InitStiRegister(){
sti_register[STI_ENABLE_INDEX].address = 46;
sti_register[STI_AMP_POS_INDEX].address = 37;
sti_register[STI_AMP_NEG_INDEX].address = 38;
sti_register[STI_POLARITY_INDEX].address = 40;
sti_register[STI_CYCLE_CH01_INDEX].address = 42;
sti_register[STI_CYCLE_CH23_INDEX].address = 43;
sti_register[STI_CYCLE_CH45_INDEX].address = 44;
sti_register[STI_CYCLE_CH67_INDEX].address = 45;
sti_register[STI_CLK_RATIO_INDEX].address = 52;
sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
sti_register[STI_MODE_INDEX].address = 56;
for(int ch=0 ; ch<8 ; ch++){
sti_register[ch*4 + STI_DURATION0_INDEX].address = ch*4 + 1;
sti_register[ch*4 + STI_DURATION1_INDEX].address = ch*4 + 2;
sti_register[ch*4 + STI_DURATION2_INDEX].address = ch*4 + 3;
sti_register[ch*4 + STI_DURATION3_INDEX].address = ch*4 + 4;
}
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
sti_register[i].WriteRegister = false;
sti_register[i].CheckRegister = false;
sti_register[i].write_reg = &write_reg;
sti_register[i].read_reg = &read_reg;
}
}
static void InitDBSRegister(){
InitSysRegister();
InitRecRegister();
InitStiRegister();
// for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
for(int i=1 ; i<5 ; i++){
sys_register[i].WriteRegister = true;
}
flag_notify(EVT_NEU_SPI);
}
static void ResetDBSRegister(){
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
sys_register[i].WriteRegister = false;
sys_register[i].CheckRegister = false;
sys_register[i].write_reg = &write_reg;
sys_register[i].read_reg = &read_reg;
}
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
rec_register[i].WriteRegister = false;
rec_register[i].CheckRegister = false;
rec_register[i].write_reg = &write_reg;
rec_register[i].read_reg = &read_reg;
}
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
sti_register[i].WriteRegister = false;
sti_register[i].CheckRegister = false;
sti_register[i].write_reg = &write_reg;
sti_register[i].read_reg = &read_reg;
}
}
#endif
@@ -3,15 +3,15 @@
#define VERSION_DATE
#define VERSION_DATE_YEAR 20
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 3
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 42
#define VERSION_DATE_MONTH 11
#define VERSION_DATE_DAY 13
#define VERSION_DATE_HOUR 18
#define VERSION_DATE_MINUTE 30
// this is NOT the version hash !!
// it's the last version hash
#define VERSION_HASH f4861bb6cb427dcb36cb0cb6e8f1c962dbd89fa8
#define VERSION_GIT_BRANCH neulive20_linux_debug
#define VERSION_HASH 1cde4cfe026202aae24460eb1cf778477a9828e3
#define VERSION_GIT_BRANCH neulive_onchange_central_debug
static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
uint8 name_offset = 18;
@@ -8,12 +8,60 @@
#error "headstage/headstage_notify.h not included"
#endif
#include "headstage_dbs_object.h"
#define NOT_BUF_OFFSET_INIT 8
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
static uint32_t not_time_stamp = 0;
static uint32_t debug_counter = 0;
static void headstage_notify_set_timestamp();
static void headstage_notify_flip_buffer();
static uint8_t headstage_notify_append_data(uint8_t *data_value);
/**
* @fn headstage_neu_append_notify_data
*/
#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
static void headstage_neu_append_notify_data() {
uint8_t channel = spi_rxbuf[0];
// close-reopen SPI, if the first channel received is invalid
if(IsFirstData){
// start record
if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
IsFirstData = false;
}
// restart SPI
else{
SPI_close(headstage_spi_handle);
ReopenSPI();
IsFirstData = true;
return;
}
}
// discard illegal channel
uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
// illegal channel
return;
}
uint8_t not_buf[2];
not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
not_buf[1] = spi_rxbuf[2];
uint8_t data_size = headstage_notify_append_data(not_buf);
if (data_size >= BLE_NOT_BUFF_SIZE) {
headstage_notify_flip_buffer();
headstage_notify_send();
}
}
static void headstage_notify_set_timestamp() {
not_time_stamp = headstage_time_stamp_us();
@@ -21,18 +69,12 @@ static void headstage_notify_set_timestamp() {
headstage_notify_buffer[3] = (not_time_stamp >> 8) & 0xFF;
headstage_notify_buffer[4] = (not_time_stamp >> 16) & 0xFF;
headstage_notify_buffer[5] = (not_time_stamp >> 24) & 0xFF;
// headstage_notify_buffer[2] = (debug_counter >> 24) & 0xFF;
// headstage_notify_buffer[3] = (debug_counter >> 16) & 0xFF;
// headstage_notify_buffer[4] = (debug_counter >> 8) & 0xFF;
// headstage_notify_buffer[5] = debug_counter & 0xFF;
// debug_counter ++;
}
static void headstage_notify_flip_buffer() {
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 3;
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 2;
headstage_notify_buffer[0] = 4;
headstage_notify_buffer[0] = CHIP_ID;
headstage_notify_buffer[1] = data_count;
not_buf_offset = NOT_BUF_OFFSET_INIT;
@@ -47,11 +89,9 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
if (data_value == NULL) {
headstage_notify_buffer[not_buf_offset++] = 0x00;
headstage_notify_buffer[not_buf_offset++] = 0x00;
headstage_notify_buffer[not_buf_offset++] = 0x00;
} else {
headstage_notify_buffer[not_buf_offset++] = data_value[0];
headstage_notify_buffer[not_buf_offset++] = data_value[1];
headstage_notify_buffer[not_buf_offset++] = data_value[2];
}
if (not_buf_offset >= BLE_NOT_BUFF_SIZE - 1) {
@@ -25,7 +25,7 @@ static void MCUReset(){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
@@ -33,7 +33,7 @@ static void MCUReset(){
}
// CIS buffer reset
for(int i=0 ; i<BLE_CDR_SAMLL_SIZE ; i++){
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++){
cdr_buf[i] = 0;
}
@@ -120,4 +120,72 @@ static void AppendSPITX(uint8_t index, uint32_t value){
}
}
/**
* @fn headstage_spi_callback
*
* description: callback function to deal with data transmission between DBS and CC2650
*/
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
switch(SPICallBack){
case CONTINUOUS_TRANS:{
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
flag_notify(EVT_NEU_SPI);
break;
}
case FLUSH_BUFFER:{
SPICallBack = FLUSH_BUFFER2;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case FLUSH_BUFFER2:{
SPICallBack = CONTI_SPI_WITH_FLUSH;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
flag_notify(EVT_NEU_SPI);
// headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case CONTI_SPI_WITH_FLUSH:{
SPICallBack = FLUSH_BUFFER;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case READ_MOSI:{
flag_notify(EVT_NEU_SPI);
break;
}
case READ_REG:{
check_reg_counter ++;
flag_notify(EVT_NEU_SPI);
break;
}
case CLOSE_SPI:{
SPICallBack = CONTI_SPI_WITH_FLUSH;
SPI_close(headstage_spi_handle);
break;
}
case END_TRANSMIT:{
tx_put_u24(0, 0);
SPICallBack = CONTINUOUS_TRANS;
break;
}
default:{
break;
}
}
}
#endif
@@ -120,17 +120,17 @@
// Maximum connection interval (units of 1.25ms, 800=1000ms) if automatic
// parameter update request is enabled
//#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 6
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 40
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 30
#else //! FEATURE_OAD
// Minimum connection interval (units of 1.25ms, 8=10ms) if automatic
// parameter update request is enabled
#define DEFAULT_DESIRED_MIN_CONN_INTERVAL 8
#define DEFAULT_DESIRED_MIN_CONN_INTERVAL 80
//#define DEFAULT_DESIRED_MIN_CONN_INTERVAL 14
// Maximum connection interval (units of 1.25ms, 8=10ms) if automatic
// parameter update request is enabled
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 40
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 80
//#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 25
#endif // FEATURE_OAD
@@ -561,6 +561,7 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
headstage_init_device_info();
headstage_init();
InitDBSRegister();
for (;;) {
// Waits for a signal to the semaphore associated with the calling thread.
@@ -82,7 +82,8 @@ extern "C" {
// Length of Characteristic 5 in bytes
#define SIMPLEPROFILE_CHAR1_LEN 2
#define SIMPLEPROFILE_CHAR2_LEN 50
//#define SIMPLEPROFILE_CHAR2_LEN 50
#define SIMPLEPROFILE_CHAR2_LEN 34
#define SIMPLEPROFILE_CHAR3_LEN 20
#define SIMPLEPROFILE_CHAR4_LEN 200
//#define SIMPLEPROFILE_CHAR4_LEN 20