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weiting2 acd0080929 sti_clk ratio should be system register 2020-11-13 18:30:41 +08:00
12 changed files with 55 additions and 265 deletions
@@ -2,17 +2,17 @@
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@@ -146,7 +146,6 @@ extern const PIN_Config BoardGpioInitTable[];
#define Board_GLED PIN_UNASSIGNED /* Green LED */
#define Board_RLED PIN_UNASSIGNED /* Red LED */
/* UART Board */
#define Board_UART_TX Board_BP_UART_Rx /* RXD */
#define Board_UART_RX Board_BP_UART_Tx /* TXD */
@@ -103,7 +103,7 @@ typedef enum {
READ_REG, // read DBS register value, used after a "read" SPI instruction (MISO)
READ_REG2, // read DBS register value, used after a "read" SPI instruction (MISO)
END_TRANSMIT, // read DBS register value, used after a "read" SPI instruction (MISO)
ONE_SHOT_SPI, // end spi instruction
CONTI_SPI_WITH_FLUSH, // end spi instruction
READ_MOSI
} SPI_CB_MODE;
@@ -2,9 +2,7 @@
#ifndef NEU_CALI_TABLE
#define NEU_CALI_TABLE
// define Device_Name if "BOARD_TEST" as default
// else find headstage ID
#define BOARD_18_04_ED_37_C6_52
#define BOARD_TEST
typedef struct _SingleChannelCali{
uint16_t Gain[4];
@@ -27,7 +27,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
check_reg_counter = 0;
if(check_ins(instruction_to_fit)){
NEULIVE_STATE.state = next_state;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// update rec_sti_command
if(!(rec_sti_command & ENABLE_STI)){
@@ -70,7 +70,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
IsFirstData = true;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
}
headstage_spi_transaction(3);
@@ -167,7 +167,7 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
else{
NEULIVE_STATE.state = next_state;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(3);
}
@@ -8,6 +8,7 @@
#define SYS_GENERAL_ENABLE_INDEX 1
#define SYS_LNA_BIOS1_INDEX 2
#define SYS_LNA_BIOS2_INDEX 3
#define SYS_STI_CLK_RATIO_INDEX 4
#define REC_CHANNEL_INDEX 0
#define REC_GAIN_INDEX 1
@@ -45,7 +46,7 @@ void write_reg(DBSRegister *self, uint16_t reg_value){
spi_txbuf[0] = 0x80 | self->address;
spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
spi_txbuf[2] = reg_value & 0xFF;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -58,16 +59,17 @@ void read_reg(DBSRegister *self){
}
static uint16_t sys_register_default_value[4] = {
static uint16_t sys_register_default_value[5] = {
0x0000,
0x40F2,
0x0210,
0x4210
0x4210,
0x0002
};
static uint16_t rec_register_value[3];
static uint16_t sti_register_value[43];
static DBSRegister sys_register[4];
static DBSRegister sys_register[5];
static DBSRegister rec_register[3];
static DBSRegister sti_register[43];
@@ -76,6 +78,7 @@ static void InitSysRegister(){
sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
sys_register[SYS_STI_CLK_RATIO_INDEX].address = 52;
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
sys_register[i].WriteRegister = false;
@@ -132,7 +135,7 @@ static void InitDBSRegister(){
InitStiRegister();
// for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
for(int i=1 ; i<4 ; i++){
for(int i=1 ; i<5 ; i++){
sys_register[i].WriteRegister = true;
}
flag_notify(EVT_NEU_SPI);
@@ -644,7 +644,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
FlushNotify();
}
NEULIVE_STATE.state = NEU_RST;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
flag_notify(EVT_NEU_SPI);
/**< stop spi transaction */
break; /**< reset all the parameter */
@@ -726,7 +726,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
}
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -745,7 +745,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
INSTRUCTION.ins_opcode = BIAS_ONE;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -763,7 +763,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
rec_sti_command |= ENABLE_STI;
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = T_ZE;
// is neu wording now?
@@ -810,7 +810,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
rec_sti_command &= ~ENABLE_REC;
rec_sti_command &= ~ENABLE_STI;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_IDLE;
STI = false;
Neu2Reset();
@@ -973,7 +973,7 @@ static void headstage_neu_state_spi() {
/* recording */
case NEU_WRITE_REC_INS: {
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
nxt_ins = build_rec_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
NEULIVE_STATE.config_type = nxt_ins;
@@ -1027,7 +1027,7 @@ static void headstage_neu_state_spi() {
value = (0x01 << 23) | (0x33 << 16) | INSTRUCTION.adc_clock_ratio;
AppendSPITX(0, value);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_CHECK_SAMPLE_RATE;
headstage_spi_transaction(3);
break;
@@ -1041,7 +1041,7 @@ static void headstage_neu_state_spi() {
case NEU_PREPARE_READ:{
if(spi_state_counter < 6){
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_PREPARE_READ;
spi_state_counter ++;
AppendSPITX(0, 0);
@@ -1072,7 +1072,7 @@ static void headstage_neu_state_spi() {
// go to send sti instruction
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = T_ZE;
AppendSPITX(0, 0);
@@ -1082,7 +1082,7 @@ static void headstage_neu_state_spi() {
// disable stimulation
else if( !(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI) ){
NEULIVE_STATE.state = NEU_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1095,7 +1095,7 @@ static void headstage_neu_state_spi() {
if(rec_sti_command & STATUS_STI){
NEULIVE_STATE.state = NEU_STI;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1111,7 +1111,7 @@ static void headstage_neu_state_spi() {
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -1129,7 +1129,7 @@ static void headstage_neu_state_spi() {
/* stimulation */
case NEU_WRITE_STI_INS:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
nxt_ins = build_sti_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
NEULIVE_STATE.config_type = nxt_ins;
@@ -1181,7 +1181,7 @@ static void headstage_neu_state_spi() {
value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
AppendSPITX(0, value);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_STI_LED;
headstage_spi_transaction(3);
break;
@@ -1192,7 +1192,7 @@ static void headstage_neu_state_spi() {
// value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
// AppendSPITX(0, value);
//
// SPICallBack = ONE_SHOT_SPI;
// SPICallBack = CONTI_SPI_WITH_FLUSH;
// NEULIVE_STATE.state = NEU_CHECK_STI_CH;
// headstage_spi_transaction(3);
// break;
@@ -1209,7 +1209,7 @@ static void headstage_neu_state_spi() {
headstage_led_control();
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
@@ -1220,7 +1220,7 @@ static void headstage_neu_state_spi() {
// recv disable sti command
if(!(rec_sti_command & ENABLE_STI)){
NEULIVE_STATE.state = NEU_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1230,7 +1230,7 @@ static void headstage_neu_state_spi() {
else if(rec_sti_command & ENABLE_REC){
NEULIVE_STATE.state = NEU_WRITE_REC_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = BIAS_ONE;
AppendSPITX(0, 0);
@@ -1250,7 +1250,7 @@ static void headstage_neu_state_spi() {
// terminate stimulation
case NEU_STI_INT: {
NEULIVE_STATE.state = NEU_STI_INT_TWICE;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
value = (0x01 << 23) | (0x2E << 16) | 0;
AppendSPITX(0, value);
@@ -1260,7 +1260,7 @@ static void headstage_neu_state_spi() {
case NEU_STI_INT_TWICE: {
NEULIVE_STATE.state = NEU_CHECK_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
value = (0x01 << 23) | (0x2E << 16) | 0;
AppendSPITX(0, value);
@@ -1281,7 +1281,7 @@ static void headstage_neu_state_spi() {
case NEU_LED:{
NEULIVE_STATE.state = NEU_IDLE;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_led_control();
@@ -1446,7 +1446,7 @@ static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size,
}
else{
AppendSPITX(0, 0);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
}
@@ -1477,7 +1477,7 @@ static void recording_handle(){
headstage_led_control();
if(rec_sti_command & STATUS_STI){
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -1490,7 +1490,7 @@ static void recording_handle(){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -3,15 +3,15 @@
#define VERSION_DATE
#define VERSION_DATE_YEAR 20
#define VERSION_DATE_MONTH 10
#define VERSION_DATE_DAY 26
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 3
#define VERSION_DATE_MONTH 11
#define VERSION_DATE_DAY 13
#define VERSION_DATE_HOUR 18
#define VERSION_DATE_MINUTE 30
// this is NOT the version hash !!
// it's the last version hash
#define VERSION_HASH 764bd9364d7a99761ada31d35af557a39e1d65a4
#define VERSION_GIT_BRANCH neulive20_development_onchange_central
#define VERSION_HASH 1cde4cfe026202aae24460eb1cf778477a9828e3
#define VERSION_GIT_BRANCH neulive_onchange_central_debug
static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
uint8 name_offset = 18;
@@ -9,24 +9,9 @@
#endif
#include "headstage_dbs_object.h"
#define NOT_BUF_OFFSET_INIT 8
#include "headstage_cali_table.h"
static uint8_t numFFT = 16; // user define
static uint8_t step = 8; // which is numFFT/2
static uint8_t stageFFT = 4; // which is log2(numFFT)
static int twiddle_real[16] = {10000, 9238, 7071, 3826, 0, -3827, -7072, -9239, -10000, -9239, \
-7072, -3827, -1, 3826, 7071, 9238};
static int twiddle_imag[16] = { 0, -3827, -7072, -9239, -10000, -9239, -7072, -3827, -1, 3826, \
7071, 9238, 10000, 9238, 7071, 3826};
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT);
static void BitReverse(int* BR_Array, int numFFT);
static void CLP(uint16_t raw_data);
static int ADC_U2S( uint16_t unsigned_buff);
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
static uint32_t not_time_stamp = 0;
@@ -63,29 +48,11 @@ static void headstage_neu_append_notify_data() {
// illegal channel
return;
}
uint8_t not_buf[2];
not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
not_buf[1] = spi_rxbuf[2];
// Borshin closed-loop start here <<<<<<<<<<<<<<<<<<<<---->>>>>>>>>>>>>>>>>>>>----------------------
uint16_t borshin_raw;
uint8_t borshin_a;
uint8_t borshin_b;
uint8_t borshin_sample_rate;
uint16_t borshin_real;
borshin_raw = (spi_rxbuf[1]&0x0F)<<8 | spi_rxbuf[2];
borshin_a = CaliTable.Ch[channel].Gain[ rec_register_value[REC_CHANNEL_INDEX] ];
borshin_b = CaliTable.Ch[channel].Offset[ rec_register_value[REC_CHANNEL_INDEX] ];
borshin_real = borshin_raw * borshin_a + borshin_b; // range from [ FFF , 000 ]
borshin_sample_rate = 2000000/10/rec_register_value[REC_ADC_CLOCK_INDEX];
CLP(borshin_real); // This function input is 12-bit value
// the function will buffer 16-point then
// perform 16-point FFT.
// Afterwards, calculate sum of PSD then
// decided if HVS happened. (GPIO_4)
// Borshin closed-loop END here <<<<<<<<<<<<<<<<<<<<----------------------------->>>>>>>>>>>>>>>>>>>>
uint8_t data_size = headstage_notify_append_data(not_buf);
if (data_size >= BLE_NOT_BUFF_SIZE) {
@@ -141,178 +108,3 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
}
#endif // HEADSTAGE_NOTIFY_TDC4VAF2_H
/*********************************************************************
* @fn FFT
*
* @brief TI Cortex M3 doesn't have floating-point ALU, we have to do
* fixed-point FFT. And in-place FFT because lack of RAM.
*
* @param None.
*
* @return None.
*/
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT){
// testing_sig = !testing_sig;
// uint8_t stageFFT = 6; // static global log2(numFFT)
int l;
int product_real, product_imag;
int upfly_real, upfly_imag;
int downfly_real, downfly_imag;
for (int i=0; i<stageFFT; i++){
l = 1<<i;
for (int j=0; j<numFFT; j+=2*l){
for (int k=0; k<l; k++){
//printf("stage = %d , butterfly_top = %d , butterfly_down = %d , twiddle[%d] \n", i, j+k, j+k+l, NFFT*(k)/2/l);
product_real = pred_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l] \
- imag_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l];
product_imag = pred_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l] \
+ imag_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l];
product_real = product_real/10000; // left shift number =10 which is up to Int_twiddle-factor
product_imag = product_imag/10000;
upfly_real = pred_LFP[j+k] + product_real;
upfly_imag = imag_LFP[j+k] + product_imag;
downfly_real = pred_LFP[j+k] - product_real;
downfly_imag = imag_LFP[j+k] - product_imag;
pred_LFP[j+k] = upfly_real;
imag_LFP[j+k] = upfly_imag;
pred_LFP[j+k+l] = downfly_real;
imag_LFP[j+k+l] = downfly_imag;
}
}
}
return;
}
/*********************************************************************
* @fn ADC_U2S
*
* @brief ADC sample data in 12-bit which is FFF~000, but for FFT
* it needs to be pulled back to +7FF to -7FF. These is based
* on simulation result, which is like the function ADC_ISR()
* in Ramesh or Remy's code. [ ADC_unsigned_2_signed ]
*
* @param unsigned 16-bit input
*
* @return signed 16-bit output ----_0000_0000_0000 ~ ----_1000_0000_0000
*/
static int ADC_U2S( uint16_t unsigned_buff){
// 0x0FFF ~ 0x0000 (16-bit unsigned)
int output; // 0x07FF-0x0000 ~ 0x0FFF-0x0800
// int is 32-bit 0x0000_0000
if ( unsigned_buff >= 0x00000800)
output = unsigned_buff - 0x00000800;
else
output = unsigned_buff | 0xFFFFF800;
return output;
}
/*********************************************************************
* @fn BitReverse
*
* @brief Do array Bit-Reverse before perform FFT
*
* @param None.
*
* @return None.
*/
static void BitReverse(int* BR_Array, int numFFT){
// This BIR specify for 7-bit (0000_0000 ~ 0111_1111)
uint8_t n=0;
int tmp;
for (uint8_t i=0; i<numFFT; i++){
n = i; // printf ("%d %d\n",i,n);
n = (n&0x0f)<<4 | (n&0xf0)>>4; // 0123_4567 -> 4567_0123
n = (n&0x33)<<2 | (n&0xcc)>>2; // 4567_0123 -> 6745_2301
n = (n&0xaa)<<2 | (n&0x55)>>1; // 7856_3412 -> 7654_3210
n = n >> 1; // 7654_3210 -> 0765_4321
if (n>i){
tmp = BR_Array[n];
BR_Array[n] = BR_Array[i];
BR_Array[i] = tmp;
}
}
return;
} // END Bit Reverse Order Sort
/*********************************************************************
* @fn CLP ( Closed LooP )
*
* @brief
*
* @param None.
*
* @return None.
*/
static void CLP(uint16_t unsigned_real_data){
int signed_buff;
static int accumu_sum;
static int x_in[16];
static int real[16];
static int imag[16];
static int count_sample;
static int count_data;
int abs_tmp;
static int present, past1, past2, hvs;
static int w[6] = {1597,-1909,1856,-1190,630,23};
count_sample++; // count+1 every 1-ms
if (count_sample>=24){ // ensure sample LFP data every 24-ms(41.6667Hz)
signed_buff = ADC_U2S(unsigned_real_data); // FFF ~ 000 to +7FF ~ -7FF
x_in[count_data] = signed_buff;
real[count_data] = signed_buff;
imag[count_data] = 0;
count_sample = 0; // re-calculate count
count_data++;
if (count_data>=6){
accumu_sum = 0;
for (int i=6;i<numFFT;i++){
real[i] = ( w[0] * real[i-1] \
+ w[1] * real[i-2] \
+ w[2] * real[i-3] \
+ w[3] * real[i-4] \
+ w[4] * real[i-5] \
+ w[5] * real[i-6] )>>10;
imag[i] = 0;
}
BitReverse( real, numFFT);
FFT( real, imag, numFFT);
for (int i=1;i<6;i++){
if (i>=2&&i<=4){
accumu_sum += real[i]*real[i]+imag[i]*imag[i];
}
real[i-1] = x_in[i];
imag[i-1] = 0;
x_in[i-1] = x_in[i];
}
present = ( (accumu_sum>>12) > 45000 )?1:0;
if (present+past1+past2==3)
hvs = 1;
else
hvs = 0;
past2 = past1;
past1 = present;
if (hvs==1)
headstage_pin_output(PIN_CLP, 1);
else
headstage_pin_output(PIN_CLP, 0);
count_data--;
}
}
return;
}
@@ -29,8 +29,7 @@
#define PIN_LED_CLK IOID_1 // SPI1 clock
#define PIN_DC_DC IOID_2 // STI select need
#define PIN_EN_ADC_SPI_CLK IOID_3 //
//#define PIN_BATT_HALF IOID_4 //
#define PIN_CLP IOID_4 // cDBS detect HVS LED::also added in config table
#define PIN_BATT_HALF IOID_4 //
#define PIN_SPI_MISO IOID_7 //
#define PIN_SPI_MOSI IOID_8 //
#define PIN_SPI_CS IOID_9 //
@@ -78,8 +77,7 @@ static PIN_Config headstage_pin_configuration[] = { //
PIN_RESET | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_EN_ADC_SPI_CLK | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_DC_DC | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_CLP | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL, // cDBS detect HVS LED::added in config table
// PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_STI_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
// TODO : add PIN_IRQ for STI clock to detect STI status (update LED & resend STI command if failed before)
PIN_TERMINATE};
@@ -25,7 +25,7 @@ static void MCUReset(){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
@@ -143,7 +143,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
break;
}
case FLUSH_BUFFER2:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
@@ -151,7 +151,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
// headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case ONE_SHOT_SPI:{
case CONTI_SPI_WITH_FLUSH:{
SPICallBack = FLUSH_BUFFER;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
@@ -172,7 +172,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
}
case CLOSE_SPI:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
SPI_close(headstage_spi_handle);
break;
}