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23 Commits

Author SHA1 Message Date
weiting2 acd0080929 sti_clk ratio should be system register 2020-11-13 18:30:41 +08:00
weiting2 1cde4cfe02 update sti_cali data 2020-10-26 17:03:38 +08:00
weiting2 764bd9364d amp_gain does not on change 2020-10-13 18:09:20 +08:00
weiting2 b5e0026f2e amp_gain does not on change 2020-10-13 18:09:09 +08:00
weiting2 823016d4b7 support fast settle now 2020-09-25 18:36:10 +08:00
weiting2 bee57486e0 support fast settle now 2020-09-25 18:35:55 +08:00
weiting2 214222cb1e TODO: support fast settle 2020-09-25 17:48:52 +08:00
weiting2 38572e128d increase data throughput by modify notify format 2020-09-25 16:37:27 +08:00
weiting2 9e19642081 increase data throughput by modify notify format 2020-09-25 15:57:41 +08:00
weiting2 5f2a258f49 increase data throughput by modify notify format 2020-09-25 11:56:25 +08:00
weiting2 d5158775b8 [semi-stable] TODO: increase data throughput by modify notify format 2020-09-25 11:46:16 +08:00
weiting2 282b8077a7 update central 2020-09-18 20:21:15 +08:00
weiting2 5b6430cec9 update central 2020-09-18 18:13:00 +08:00
weiting2 9484008d1e update central 2020-09-18 18:09:28 +08:00
weiting2 bd0c282d25 using central feature CIS 2020-09-16 15:26:26 +08:00
weiting2 acd590de44 sti on change is done; TODO: disable sti before every on change 2020-09-16 10:59:22 +08:00
weiting2 b8d96c32b0 sti on change is done; TODO: disable sti before every on change 2020-09-15 17:41:46 +08:00
weiting2 c3ab78e16a sti on change has some bug 2020-09-14 17:21:30 +08:00
weiting2 fde824ee34 sti on change has some bug 2020-09-14 12:54:23 +08:00
weiting2 fc3adb450c sti on change has some bug 2020-09-14 11:10:42 +08:00
weiting2 747752640a sti on change has some bug 2020-09-14 09:55:26 +08:00
weiting2 7a73097666 add sti, stop, ... etc function 2020-09-10 18:41:29 +08:00
weiting2 8a95874b0b "on change" can work; TODO: add sti, stop, ... etc function 2020-09-09 17:01:35 +08:00
13 changed files with 370 additions and 160 deletions
+1 -1
View File
@@ -8,7 +8,7 @@ no device y=ax+b MAC a+ b+ a- b- avg
7 c652 c652 18:04:ED:37:C6:52 2024 -7687 2086 -11283 4.88850143182858
8 c5ed c5ed 18:04:ED:37:C5:ED 2231 -1711 2353 -70845 4.45265043545859
9 9bef 9bef 0081F9E49BEF 2383 -8585 2415 -20347 4.2758539244186
10 8b50 8b50 00:81:F9:E4:8B:50 2369 -11005 2360 -11797 4.30475635707671
10 8b50 8b50 00:81:F9:E4:8B:50 2366 -5223 2402 -14971 4.35162291666667
11 c641 c641 18:04:ED:37:C6:41 2090 4616 1997 -40665 5.07591391714942
12 E8E6 E8E6 A4:DA:32:D4:E8:E6 2306 -88454 2418 -15140 4.2686494968089
13 E73B E73B A4:DA:32:D4:E7:3B 2262 -564 2298 44746 4.35551198222141
@@ -103,7 +103,7 @@ typedef enum {
READ_REG, // read DBS register value, used after a "read" SPI instruction (MISO)
READ_REG2, // read DBS register value, used after a "read" SPI instruction (MISO)
END_TRANSMIT, // read DBS register value, used after a "read" SPI instruction (MISO)
ONE_SHOT_SPI, // end spi instruction
CONTI_SPI_WITH_FLUSH, // end spi instruction
READ_MOSI
} SPI_CB_MODE;
@@ -214,7 +214,7 @@ extern ICall_Semaphore semaphore;
// command return characteristic
#define BLE_CDR_BUFF_CHAR SIMPLEPROFILE_CHAR2
#define BLE_CDR_BUFF_SIZE SIMPLEPROFILE_CHAR2_LEN
#define BLE_CDR_SAMLL_SIZE 10
#define BLE_CDR_SMALL_SIZE 10
// instruction input characteristic
#define BLE_INS_BUFF_CHAR SIMPLEPROFILE_CHAR3
@@ -356,7 +356,7 @@ static uint16_t CONNECT_HANDLE = 0;
/**
* command instruction buffer
*/
static uint8_t cdr_buf[BLE_CDR_SAMLL_SIZE] = {0};
static uint8_t cdr_buf[BLE_CDR_SMALL_SIZE] = {0};
/*====================
==== event table ====
@@ -27,14 +27,14 @@ static void SendCaliValue(uint8_t CaliNumber){
// ch = 2 * (CaliNumber % 4);
// uint8_t gain_level = CaliNumber / 4; // 0:gain, 1:offset
uint8_t channel_number = 8, index = 1;
uint8_t channel_number = 8, index = 2;
uint8_t gain_level = 0;
if(CaliNumber < 4){
gain_level = CaliNumber;
}
cali_buf[0] = CHIP_ID;
cali_buf[1] = CHIP_ID;
for(int i=0 ; i<channel_number ; i++){
cali_buf[index++] = (uint8_t) (CaliTable.Ch[i].Gain[gain_level] >> 8) & 0xFF;
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Gain[gain_level] & 0x00FF;
@@ -42,9 +42,8 @@ static void SendCaliValue(uint8_t CaliNumber){
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Offset[gain_level] & 0x00FF;
}
// for(int i=1 ; i<BLE_CDR_BUFF_SIZE ; i++){
// cali_buf[i] = i;
// }
cali_buf[0] = index - 1;
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, index, cali_buf);
}
@@ -27,7 +27,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
check_reg_counter = 0;
if(check_ins(instruction_to_fit)){
NEULIVE_STATE.state = next_state;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// update rec_sti_command
if(!(rec_sti_command & ENABLE_STI)){
@@ -70,7 +70,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
IsFirstData = true;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
}
headstage_spi_transaction(3);
@@ -167,7 +167,7 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
else{
NEULIVE_STATE.state = next_state;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(3);
}
@@ -8,26 +8,27 @@
#define SYS_GENERAL_ENABLE_INDEX 1
#define SYS_LNA_BIOS1_INDEX 2
#define SYS_LNA_BIOS2_INDEX 3
#define SYS_STI_CLK_RATIO_INDEX 4
#define REC_CHANNEL_INDEX 0
#define REC_GAIN_INDEX 1
#define REC_ADC_CLOCK_INDEX 2
#define STI_ENABLE_INDEX 0
#define STI_DURATION0_INDEX 1
#define STI_DURATION1_INDEX 2
#define STI_DURATION2_INDEX 3
#define STI_DURATION3_INDEX 4
#define STI_AMP_POS_INDEX 5
#define STI_AMP_NEG_INDEX 6
#define STI_POLARITY_INDEX 7
#define STI_CYCLE_CH01_INDEX 8
#define STI_CYCLE_CH23_INDEX 9
#define STI_CYCLE_CH45_INDEX 10
#define STI_CYCLE_CH67_INDEX 11
#define STI_CLK_RATIO_INDEX 12
#define STI_ARBITRARY_EN_INDEX 13
#define STI_MODE_INDEX 14
#define STI_AMP_POS_INDEX 1
#define STI_AMP_NEG_INDEX 2
#define STI_POLARITY_INDEX 3
#define STI_CYCLE_CH01_INDEX 4
#define STI_CYCLE_CH23_INDEX 5
#define STI_CYCLE_CH45_INDEX 6
#define STI_CYCLE_CH67_INDEX 7
#define STI_CLK_RATIO_INDEX 8
#define STI_ARBITRARY_EN_INDEX 9
#define STI_MODE_INDEX 10
#define STI_DURATION0_INDEX 11
#define STI_DURATION1_INDEX 12
#define STI_DURATION2_INDEX 13
#define STI_DURATION3_INDEX 14
//#define DBS_REGISTER \
// uint8_t address; \
@@ -45,7 +46,7 @@ void write_reg(DBSRegister *self, uint16_t reg_value){
spi_txbuf[0] = 0x80 | self->address;
spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
spi_txbuf[2] = reg_value & 0xFF;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -58,24 +59,26 @@ void read_reg(DBSRegister *self){
}
static uint16_t sys_register_default_value[4] = {
static uint16_t sys_register_default_value[5] = {
0x0000,
0x40F2,
0x0210,
0x4210
0x4210,
0x0002
};
static uint16_t rec_register_value[3];
static uint16_t sti_register_value[15];
static uint16_t sti_register_value[43];
static DBSRegister sys_register[4];
static DBSRegister sys_register[5];
static DBSRegister rec_register[3];
static DBSRegister sti_register[15];
static DBSRegister sti_register[43];
static void InitSysRegister(){
sys_register[SYS_RESERVED_INDEX].address = 0x00;
sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
sys_register[SYS_STI_CLK_RATIO_INDEX].address = 52;
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
sys_register[i].WriteRegister = false;
@@ -100,10 +103,6 @@ static void InitRecRegister(){
static void InitStiRegister(){
sti_register[STI_ENABLE_INDEX].address = 46;
sti_register[STI_DURATION0_INDEX].address = 1;
sti_register[STI_DURATION1_INDEX].address = 2;
sti_register[STI_DURATION2_INDEX].address = 3;
sti_register[STI_DURATION3_INDEX].address = 4;
sti_register[STI_AMP_POS_INDEX].address = 37;
sti_register[STI_AMP_NEG_INDEX].address = 38;
sti_register[STI_POLARITY_INDEX].address = 40;
@@ -115,6 +114,13 @@ static void InitStiRegister(){
sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
sti_register[STI_MODE_INDEX].address = 56;
for(int ch=0 ; ch<8 ; ch++){
sti_register[ch*4 + STI_DURATION0_INDEX].address = ch*4 + 1;
sti_register[ch*4 + STI_DURATION1_INDEX].address = ch*4 + 2;
sti_register[ch*4 + STI_DURATION2_INDEX].address = ch*4 + 3;
sti_register[ch*4 + STI_DURATION3_INDEX].address = ch*4 + 4;
}
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
sti_register[i].WriteRegister = false;
sti_register[i].CheckRegister = false;
@@ -129,10 +135,33 @@ static void InitDBSRegister(){
InitStiRegister();
// for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
for(int i=1 ; i<4 ; i++){
for(int i=1 ; i<5 ; i++){
sys_register[i].WriteRegister = true;
}
flag_notify(EVT_NEU_SPI);
}
static void ResetDBSRegister(){
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
sys_register[i].WriteRegister = false;
sys_register[i].CheckRegister = false;
sys_register[i].write_reg = &write_reg;
sys_register[i].read_reg = &read_reg;
}
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
rec_register[i].WriteRegister = false;
rec_register[i].CheckRegister = false;
rec_register[i].write_reg = &write_reg;
rec_register[i].read_reg = &read_reg;
}
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
sti_register[i].WriteRegister = false;
sti_register[i].CheckRegister = false;
sti_register[i].write_reg = &write_reg;
sti_register[i].read_reg = &read_reg;
}
}
#endif
@@ -513,6 +513,7 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
case REC_CHANNEL_INDEX:{
rec_register[REC_CHANNEL_INDEX].WriteRegister = true;
rec_register_value[REC_CHANNEL_INDEX] = reg_value;
INSTRUCTION.recording_channel = reg_value;
flag_notify(EVT_NEU_SPI);
break;
}
@@ -520,7 +521,7 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
case REC_GAIN_INDEX:{
rec_register[REC_GAIN_INDEX].WriteRegister = true;
rec_register_value[REC_GAIN_INDEX] = reg_value;
flag_notify(EVT_NEU_SPI);
// flag_notify(EVT_NEU_SPI);
break;
}
@@ -538,6 +539,91 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
break;
}
case RIS_STI_ON_CHANGE:{
uint16_t sti_reg_value = instruction[2] << 8 | instruction[3];
switch(instruction[1]){
case STI_ENABLE_INDEX:{
sti_register_value[STI_ENABLE_INDEX] = sti_reg_value;
INSTRUCTION.sti_channel = sti_reg_value;
break;
}
case STI_AMP_POS_INDEX:{
sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
sti_register_value[STI_AMP_POS_INDEX] = sti_reg_value;
// pos, neg amplitude should be same at this DBS version
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
flag_notify(EVT_NEU_SPI);
break;
}
case STI_AMP_NEG_INDEX:{
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
flag_notify(EVT_NEU_SPI);
break;
}
case STI_POLARITY_INDEX:{
sti_register[STI_POLARITY_INDEX].WriteRegister = true;
sti_register_value[STI_POLARITY_INDEX] = sti_reg_value;
flag_notify(EVT_NEU_SPI);
break;
}
case STI_MODE_INDEX:{
sti_register[STI_MODE_INDEX].WriteRegister = true;
sti_register_value[STI_MODE_INDEX] = instruction[2];
flag_notify(EVT_NEU_SPI);
break;
}
case STI_CYCLE_CH01_INDEX:{
sti_register[STI_CYCLE_CH01_INDEX].WriteRegister = true;
sti_register_value[STI_CYCLE_CH01_INDEX] = sti_reg_value;
sti_register[STI_CYCLE_CH23_INDEX].WriteRegister = true;
sti_register_value[STI_CYCLE_CH23_INDEX] = sti_reg_value;
sti_register[STI_CYCLE_CH45_INDEX].WriteRegister = true;
sti_register_value[STI_CYCLE_CH45_INDEX] = sti_reg_value;
sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
sti_register_value[STI_CYCLE_CH67_INDEX] = sti_reg_value;
flag_notify(EVT_NEU_SPI);
break;
}
case STI_DURATION0_INDEX:{
uint16_t t1 = instruction[2] << 8 | instruction[3]; // t1 is 10 bits
uint16_t t2 = instruction[4] << 8 | instruction[5]; // t2 is 10 bits
uint16_t t3 = instruction[6] << 8 | instruction[7]; // t3 is 10 bits
uint32_t t4 = instruction[8] << 16 | instruction[9] << 8 | instruction[10]; // t4 is 17 bits
uint16_t t5 = instruction[11] << 8 | instruction[12]; // t5 is 10 bits
for(int ch=0 ; ch<8 ; ch++){
sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF) << 4 | (t2 & 0x03C0) >> 6;
sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
}
flag_notify(EVT_NEU_SPI);
break;
}
default:{
break;
}
}
}
default: {
break;
}
@@ -558,50 +644,53 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
FlushNotify();
}
NEULIVE_STATE.state = NEU_RST;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
flag_notify(EVT_NEU_SPI);
/**< stop spi transaction */
break; /**< reset all the parameter */
}
case VIS_FAST_SET:{
INSTRUCTION.sti_t1[7] = 25;
INSTRUCTION.sti_t2[7] = 0;
INSTRUCTION.sti_t3[7] = 25;
INSTRUCTION.sti_t4[7] = 0;
INSTRUCTION.sti_t5[7] = 0;
uint8_t ch = 7;
uint8_t t1=25, t2=0, t3=25 , t4=0, t5=0;
INSTRUCTION.sti_t1[7] = 25;
INSTRUCTION.sti_t2[7] = 0;
INSTRUCTION.sti_t3[7] = 25;
INSTRUCTION.sti_t4[7] = 0;
INSTRUCTION.sti_t5[7] = 0;
// using ch8 to fast settle
INSTRUCTION.sti_channel = 0b0000000010000000;
sti_register_value[STI_ENABLE_INDEX] = 0b0000000010000000; // 0bxxxx_xxxv_cccc_cccc, c = current; v = volt, x = don't care
sti_register[STI_ENABLE_INDEX].WriteRegister = true;
INSTRUCTION.current_sti_cycle[7] = 0;
INSTRUCTION.current_sti_cycle[8] = 10; // ch8 is volt ch
INSTRUCTION.sti_channel = 0b0000000010000000; // 0bxxxx_xxxv_cccc_cccc, c = current; v = volt, x = don't care
INSTRUCTION.arbitrary_en = 0;
INSTRUCTION.arbitrary_index = 0;
INSTRUCTION.sti_mode = 0; // 1 = continuous mode; 0 = limit mode
INSTRUCTION.sti_h_bridge = 0; // voltage sti must use H-bridge
INSTRUCTION.sti_ref = 0; // 1 = GND; 0 = Vref
// setting t1~t5
sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF) << 4 | (t2 & 0x03C0) >> 6;
sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
/* the first byte decide current sti polarity */
// e.g. 0b0000_0101 => ch0, ch2 positive, others negative
// cycle number
sti_register_value[STI_CYCLE_CH67_INDEX] = 10 << 8 | 0;
sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
/* the second byte decide voltage sti polarity */
// for the second byte, 0bxxxx_XXXX, decide voltage sti p & n channel;
// xxxx is p-channel (16 choose 1), XXXX is n-channel
INSTRUCTION.current_sti_polarity = 0b1000000000000000;
INSTRUCTION.sti_amplitude_h = 0x0000; // it's t1 amplitude
INSTRUCTION.sti_amplitude_l = 0x0000; // it's t3 amplitude
INSTRUCTION.voltage_sti_amplitude = 0x0F;
// set polarity, it's don't care in fast settle
sti_register_value[STI_POLARITY_INDEX] = 0;
sti_register[STI_POLARITY_INDEX].WriteRegister = true;
// set stimulate mode
sti_register_value[STI_MODE_INDEX] = 0;
sti_register[STI_MODE_INDEX].WriteRegister = true;
// INSTRUCTION.sti_mode = 0; // 1 = continuous mode; 0 = limit mode
// INSTRUCTION.sti_h_bridge = 0; // voltage sti must use H-bridge
// INSTRUCTION.sti_ref = 0; // 1 = GND; 0 = Vref
// using minimum amplitude
sti_register_value[STI_AMP_POS_INDEX] = 0;
sti_register_value[STI_AMP_NEG_INDEX] = 0;
sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
rec_sti_command |= ENABLE_STI;
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
INSTRUCTION.ins_opcode = T_ZE;
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -637,7 +726,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
}
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -650,14 +739,13 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
}
case VIS_REC: {
if(INSTRUCTION.recording_channel){
rec_sti_command |= ENABLE_REC;
NEULIVE_STATE.state = NEU_WRITE_REC_INS;
INSTRUCTION.ins_opcode = BIAS_ONE;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -675,7 +763,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
rec_sti_command |= ENABLE_STI;
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = T_ZE;
// is neu wording now?
@@ -692,6 +780,8 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
case VIS_STOP_REC:{
rec_sti_command &= ~ENABLE_REC;
ResetDBSRegister();
// is neu wording now?
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
// nothing to do
@@ -720,7 +810,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
rec_sti_command &= ~ENABLE_REC;
rec_sti_command &= ~ENABLE_STI;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_IDLE;
STI = false;
Neu2Reset();
@@ -744,6 +834,10 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
switch (cis_oper) {
case CIS_NOP: {
// nothing
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
cdr_buf[i] = 0;
}
cdr_buf[0] = _B_4b4b(CIS_NOP, CHIP_ID);
cdr_buf[1] = _B_4b4b(CDR_SUCCESS, 0);
@@ -752,11 +846,16 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
}
//#ifdef HEADSTAGE_CIS_VOLT_H
case CIS_VOLT: {
cdr_buf[0] = CIS_VOLT | CHIP_ID;
cdr_buf[1] = headstage_battery_volt1();
cdr_buf[2] = headstage_battery_volt2();
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
cdr_buf[i] = 0;
}
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
cdr_buf[0] = BLE_CDR_SMALL_SIZE; // data length
cdr_buf[1] = CIS_VOLT | CHIP_ID;
cdr_buf[2] = headstage_battery_volt1();
cdr_buf[3] = headstage_battery_volt2();
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
#define THREE_POINT_THREE_VOLT 845
if (AONBatMonBatteryVoltageGet() < THREE_POINT_THREE_VOLT){
@@ -786,35 +885,44 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
//#endif
case CIS_VERSION:{
cdr_buf[0] = VERSION_DATE_YEAR;
cdr_buf[1] = VERSION_DATE_MONTH;
cdr_buf[2] = VERSION_DATE_DAY;
cdr_buf[3] = VERSION_DATE_HOUR;
cdr_buf[4] = VERSION_DATE_MINUTE;
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
cdr_buf[i] = 0;
}
cdr_buf[0] = BLE_CDR_SMALL_SIZE;
cdr_buf[1] = VERSION_DATE_YEAR;
cdr_buf[2] = VERSION_DATE_MONTH;
cdr_buf[3] = VERSION_DATE_DAY;
cdr_buf[4] = VERSION_DATE_HOUR;
cdr_buf[5] = VERSION_DATE_MINUTE;
uint8_t mac_int[4];
if( strncmp(CaliTable.DeviceName, "BOARD_TEST", 25)){
// has a specific cali data
get_board_name(CaliTable.DeviceName, mac_int, 4);
cdr_buf[5] = mac_int[0];
cdr_buf[6] = mac_int[1];
cdr_buf[6] = mac_int[0];
cdr_buf[7] = mac_int[1];
}
else{
// this board use default cali setting
cdr_buf[5] = 0xAB;
cdr_buf[6] = 0xCD;
cdr_buf[6] = 0xAB;
cdr_buf[7] = 0xCD;
}
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
break;
}
default: {
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
cdr_buf[i] = 0;
}
cdr_buf[0] = _B_4b4b(cis_oper, CHIP_ID);
cdr_buf[1] = _B_4b4b(CDR_FAILURE, 0);
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
break;
}
}
@@ -865,7 +973,7 @@ static void headstage_neu_state_spi() {
/* recording */
case NEU_WRITE_REC_INS: {
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
nxt_ins = build_rec_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
NEULIVE_STATE.config_type = nxt_ins;
@@ -919,7 +1027,7 @@ static void headstage_neu_state_spi() {
value = (0x01 << 23) | (0x33 << 16) | INSTRUCTION.adc_clock_ratio;
AppendSPITX(0, value);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_CHECK_SAMPLE_RATE;
headstage_spi_transaction(3);
break;
@@ -933,7 +1041,7 @@ static void headstage_neu_state_spi() {
case NEU_PREPARE_READ:{
if(spi_state_counter < 6){
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_PREPARE_READ;
spi_state_counter ++;
AppendSPITX(0, 0);
@@ -964,7 +1072,7 @@ static void headstage_neu_state_spi() {
// go to send sti instruction
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = T_ZE;
AppendSPITX(0, 0);
@@ -974,7 +1082,7 @@ static void headstage_neu_state_spi() {
// disable stimulation
else if( !(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI) ){
NEULIVE_STATE.state = NEU_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -987,7 +1095,7 @@ static void headstage_neu_state_spi() {
if(rec_sti_command & STATUS_STI){
NEULIVE_STATE.state = NEU_STI;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1003,7 +1111,7 @@ static void headstage_neu_state_spi() {
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
@@ -1021,7 +1129,7 @@ static void headstage_neu_state_spi() {
/* stimulation */
case NEU_WRITE_STI_INS:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
nxt_ins = build_sti_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
NEULIVE_STATE.config_type = nxt_ins;
@@ -1073,7 +1181,7 @@ static void headstage_neu_state_spi() {
value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
AppendSPITX(0, value);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
NEULIVE_STATE.state = NEU_STI_LED;
headstage_spi_transaction(3);
break;
@@ -1084,7 +1192,7 @@ static void headstage_neu_state_spi() {
// value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
// AppendSPITX(0, value);
//
// SPICallBack = ONE_SHOT_SPI;
// SPICallBack = CONTI_SPI_WITH_FLUSH;
// NEULIVE_STATE.state = NEU_CHECK_STI_CH;
// headstage_spi_transaction(3);
// break;
@@ -1101,7 +1209,7 @@ static void headstage_neu_state_spi() {
headstage_led_control();
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
@@ -1112,7 +1220,7 @@ static void headstage_neu_state_spi() {
// recv disable sti command
if(!(rec_sti_command & ENABLE_STI)){
NEULIVE_STATE.state = NEU_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1122,7 +1230,7 @@ static void headstage_neu_state_spi() {
else if(rec_sti_command & ENABLE_REC){
NEULIVE_STATE.state = NEU_WRITE_REC_INS;
NEULIVE_STATE.config_type = NEU_WARM_UP;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
INSTRUCTION.ins_opcode = BIAS_ONE;
AppendSPITX(0, 0);
@@ -1142,7 +1250,7 @@ static void headstage_neu_state_spi() {
// terminate stimulation
case NEU_STI_INT: {
NEULIVE_STATE.state = NEU_STI_INT_TWICE;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
value = (0x01 << 23) | (0x2E << 16) | 0;
AppendSPITX(0, value);
@@ -1152,7 +1260,7 @@ static void headstage_neu_state_spi() {
case NEU_STI_INT_TWICE: {
NEULIVE_STATE.state = NEU_CHECK_STI_INT;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
value = (0x01 << 23) | (0x2E << 16) | 0;
AppendSPITX(0, value);
@@ -1173,7 +1281,7 @@ static void headstage_neu_state_spi() {
case NEU_LED:{
NEULIVE_STATE.state = NEU_IDLE;
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_led_control();
@@ -1199,16 +1307,9 @@ static void headstage_neu_state_spi() {
static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit);
static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write);
typedef enum{
dbs_idle = 0x00,
dbs_prepare = 0x01,
dbs_recording = 0x02,
dbs_stimulate = 0x04
}dbs_status;
static void stimulation_handle();
static void headstage_neu_spi(){
static dbs_status status;
// check system register if we have written it before
if( check_register_value(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value) ){
@@ -1235,18 +1336,55 @@ static void headstage_neu_spi(){
// enable recording channel
if(rec_register[REC_CHANNEL_INDEX].WriteRegister){
status |= dbs_prepare;
rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, rec_register_value[REC_CHANNEL_INDEX]);
return;
}
if(status & dbs_prepare){
status &= ~dbs_prepare;
// enable stimulation
// WriteRegister will only be enable at check_register_value()
if(sti_register[STI_ENABLE_INDEX].WriteRegister){
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
return;
}
// enable/disable stimulation
if (((rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ) ||
(!(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI))){
if(rec_sti_command & ENABLE_STI){
if(sti_register_value[STI_ENABLE_INDEX]){
rec_sti_command |= STATUS_STI;
}
// change LED base on working status
headstage_led_control();
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
return;
}
else{
rec_sti_command &= ~STATUS_STI;
headstage_led_control();
// enable stimulation and check register
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
sti_register_value[STI_ENABLE_INDEX] = 0;
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
return;
}
}
// start recording
if(!(rec_sti_command & STATUS_REC) && (rec_sti_command & ENABLE_REC)){
IsFirstData = true;
if(rec_sti_command & ENABLE_REC){
status |= dbs_recording;
rec_sti_command |= STATUS_REC; // neu is recording now
}
@@ -1254,38 +1392,35 @@ static void headstage_neu_spi(){
headstage_led_control();
AppendSPITX(0, 0);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = READ_MOSI;
headstage_spi_transaction(SPI_BUFFER_SIZE);
return;
}
if(rec_sti_command & STATUS_REC){
if(!(rec_sti_command & ENABLE_REC)){
// terminate record
// terminate record
rec_sti_command &= ~STATUS_REC;
headstage_led_control();
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
else{
if(SPICallBack != READ_MOSI){
SPICallBack = READ_MOSI;
}
headstage_neu_append_notify_data();
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
return;
}
//
// // it's recording
// if(rec_sti_command & STATUS_REC){
// if(!(rec_sti_command & ENABLE_REC)){
// // stop recording
// rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
// rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
// rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, value_to_write[REC_CHANNEL_INDEX]);
// }
// else{
// // keep recording
// headstage_neu_append_notify_data();
// AppendSPITX(0, 0);
// headstage_spi_transaction(SPI_BUFFER_SIZE);
// }
// }
if(rec_sti_command & STATUS_STI){
stimulation_handle();
return;
}
}
#define RESEND_SPI_READ_NUMBER 3
@@ -1311,7 +1446,7 @@ static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size,
}
else{
AppendSPITX(0, 0);
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
}
@@ -1335,4 +1470,54 @@ static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint1
return 0;
}
static void recording_handle(){
if(!(rec_sti_command & ENABLE_REC)){
// terminate record
rec_sti_command &= ~STATUS_REC;
headstage_led_control();
if(rec_sti_command & STATUS_STI){
SPICallBack = CONTI_SPI_WITH_FLUSH;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
else{
AppendSPITX(0, 0);
ResetINSTRUCTION();
SPI_close(headstage_spi_handle);
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
}
else{
headstage_neu_append_notify_data();
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
}
static void stimulation_handle(){
if(!(rec_sti_command & ENABLE_STI)){
rec_sti_command &= ~STATUS_STI;
headstage_led_control();
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
sti_register_value[STI_ENABLE_INDEX] = 0;
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
}
// nothing to do
else{
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
}
#endif
@@ -3,15 +3,15 @@
#define VERSION_DATE
#define VERSION_DATE_YEAR 20
#define VERSION_DATE_MONTH 9
#define VERSION_DATE_DAY 9
#define VERSION_DATE_HOUR 10
#define VERSION_DATE_MINUTE 26
#define VERSION_DATE_MONTH 11
#define VERSION_DATE_DAY 13
#define VERSION_DATE_HOUR 18
#define VERSION_DATE_MINUTE 30
// this is NOT the version hash !!
// it's the last version hash
#define VERSION_HASH b9c9cc0bbcdb1ad375f9f5966577ca34ef3fd6d1
#define VERSION_GIT_BRANCH neulive20_development_without_central
#define VERSION_HASH 1cde4cfe026202aae24460eb1cf778477a9828e3
#define VERSION_GIT_BRANCH neulive_onchange_central_debug
static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
uint8 name_offset = 18;
@@ -8,6 +8,8 @@
#error "headstage/headstage_notify.h not included"
#endif
#include "headstage_dbs_object.h"
#define NOT_BUF_OFFSET_INIT 8
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
@@ -41,19 +43,15 @@ static void headstage_neu_append_notify_data() {
}
// discard illegal channel
// uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
// illegal channel
return;
}
uint8_t not_buf[3];
not_buf[0] = channel; // ch
not_buf[1] = spi_rxbuf[1];
not_buf[2] = spi_rxbuf[2];
// not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
// not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
uint8_t not_buf[2];
not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
not_buf[1] = spi_rxbuf[2];
uint8_t data_size = headstage_notify_append_data(not_buf);
@@ -74,7 +72,7 @@ static void headstage_notify_set_timestamp() {
}
static void headstage_notify_flip_buffer() {
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 3;
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 2;
headstage_notify_buffer[0] = CHIP_ID;
headstage_notify_buffer[1] = data_count;
@@ -91,11 +89,9 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
if (data_value == NULL) {
headstage_notify_buffer[not_buf_offset++] = 0x00;
headstage_notify_buffer[not_buf_offset++] = 0x00;
headstage_notify_buffer[not_buf_offset++] = 0x00;
} else {
headstage_notify_buffer[not_buf_offset++] = data_value[0];
headstage_notify_buffer[not_buf_offset++] = data_value[1];
headstage_notify_buffer[not_buf_offset++] = data_value[2];
}
if (not_buf_offset >= BLE_NOT_BUFF_SIZE - 1) {
@@ -25,7 +25,7 @@ static void MCUReset(){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
ReopenSPI();
for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
@@ -33,7 +33,7 @@ static void MCUReset(){
}
// CIS buffer reset
for(int i=0 ; i<BLE_CDR_SAMLL_SIZE ; i++){
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++){
cdr_buf[i] = 0;
}
@@ -143,7 +143,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
break;
}
case FLUSH_BUFFER2:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
}
@@ -151,7 +151,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
// headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case ONE_SHOT_SPI:{
case CONTI_SPI_WITH_FLUSH:{
SPICallBack = FLUSH_BUFFER;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x00;
@@ -172,7 +172,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
}
case CLOSE_SPI:{
SPICallBack = ONE_SHOT_SPI;
SPICallBack = CONTI_SPI_WITH_FLUSH;
SPI_close(headstage_spi_handle);
break;
}
@@ -82,7 +82,8 @@ extern "C" {
// Length of Characteristic 5 in bytes
#define SIMPLEPROFILE_CHAR1_LEN 2
#define SIMPLEPROFILE_CHAR2_LEN 50
//#define SIMPLEPROFILE_CHAR2_LEN 50
#define SIMPLEPROFILE_CHAR2_LEN 34
#define SIMPLEPROFILE_CHAR3_LEN 20
#define SIMPLEPROFILE_CHAR4_LEN 200
//#define SIMPLEPROFILE_CHAR4_LEN 20