sti_clk ratio should be system register

DLE can not enable on linux CCS

Neulive_sti_cali.txt

@@ -8,7 +8,7 @@ no	device	y=ax+b	MAC	a+	b+	a-	b-	avg
 7	c652	c652	18:04:ED:37:C6:52	2024	-7687	2086	-11283	4.88850143182858
 8	c5ed	c5ed	18:04:ED:37:C5:ED	2231	-1711	2353	-70845	4.45265043545859
 9	9bef	9bef	0081F9E49BEF	2383	-8585	2415	-20347	4.2758539244186
-10	8b50	8b50	00:81:F9:E4:8B:50	2369	-11005	2360	-11797	4.30475635707671
+10	8b50	8b50	00:81:F9:E4:8B:50	2366	-5223	2402	-14971	4.35162291666667
 11	c641	c641	18:04:ED:37:C6:41	2090	4616	1997	-40665	5.07591391714942
 12	E8E6	E8E6	A4:DA:32:D4:E8:E6	2306	-88454	2418	-15140	4.2686494968089
 13	E73B	E73B	A4:DA:32:D4:E7:3B	2262	-564	2298	44746	4.35551198222141

get_date.sh

@@ -4,7 +4,7 @@
 #folder=$($path | awk -F"/" '{$NF}')
 folder=$(basename "$(pwd)")
 
-if [ "$folder" == "bioprocc2650" ]; then
+if [ "$folder" == "ti" ] ; then
     year=$(date +%-y)
     month=$(date +%-m)
     day=$(date +%-d)

simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/lib_linker.cmd

@@ -3,6 +3,6 @@
  *                step by the lib_search utility
  */
 
-"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\host\host_pxxx.a"
-"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\ctrl\cc2640\cc2640_ctrl_pxxx_ext.a"
-"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\hci_tl\cc26xx\cc26xx_hci_tl_none_v41_v42.a"
+"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/host/host_pxxx.a"
+"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/ctrl/cc2640/cc2640_ctrl_pxxx_ext.a"
+"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/hci_tl/cc26xx/cc26xx_hci_tl_none_v41_v42.a"

simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/makefile.libs

@@ -1,6 +1,6 @@
 #
 # This file was generated based on the configuration script:
-#     C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\app_ble.cfg
+#     /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/app_ble.cfg
 #
 # This makefile may be included in other makefiles that need to build
 # the libraries containing the compiled source files generated as
@@ -14,9 +14,9 @@
 #
 # The absolute path to the generated source directory (at the time the
 # sources were generated) is:
-#    C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\src
+#    /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
 #
-GEN_SRC_DIR ?= ../../config/src
+GEN_SRC_DIR ?= ../../../ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
 
 ifeq (,$(wildcard $(GEN_SRC_DIR)))
 $(error "ERROR: GEN_SRC_DIR must be set to the directory containing the generated sources")

simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/makefile

@@ -1,29 +1,29 @@
 
-XOPTS = -I"C:/ti/xdctools_3_32_02_25_core/packages/" -Dxdc_target_types__=C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
+XOPTS = -I"/home/alan/ti/xdctools_3_32_01_22_core/packages/" -Dxdc_target_types__=/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
 
-vpath % C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
-vpath %.c C:/ti/xdctools_3_32_02_25_core/packages/
+vpath % /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
+vpath %.c /home/alan/ti/xdctools_3_32_01_22_core/packages/
 
 CCOPTS    = --endian=little -mv7M3 --abi=eabi -q -ms --opt_for_speed=0  --program_level_compile -o3 -g --optimize_with_debug  -Dti_sysbios_knl_Task_minimizeLatency__D=FALSE -Dti_sysbios_family_arm_cc26xx_Boot_driverlibVersion=2 -Dti_sysbios_knl_Clock_stopCheckNext__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_enableException__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_disablePriority__D=32U -Dti_sysbios_family_arm_m3_Hwi_numSparseInterrupts__D=0U
 
-XDC_ROOT  = C:/ti/xdctools_3_32_02_25_core/packages/
+XDC_ROOT  = /home/alan/ti/xdctools_3_32_01_22_core/packages/
 
-BIOS_ROOT = C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
+BIOS_ROOT = /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
 
 BIOS_DEFS =  -Dti_sysbios_BIOS_swiEnabled__D=TRUE -Dti_sysbios_BIOS_taskEnabled__D=TRUE -Dti_sysbios_BIOS_clockEnabled__D=TRUE -Dti_sysbios_BIOS_runtimeCreatesEnabled__D=TRUE -Dti_sysbios_knl_Task_moduleStateCheckFlag__D=FALSE -Dti_sysbios_knl_Task_objectCheckFlag__D=FALSE -Dti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Swi_DISABLE_ALL_HOOKS -Dti_sysbios_BIOS_smpEnabled__D=FALSE -Dti_sysbios_Build_useHwiMacros -Dti_sysbios_knl_Swi_numPriorities__D=6 -Dti_sysbios_knl_Task_deleteTerminatedTasks__D=FALSE -Dti_sysbios_knl_Task_numPriorities__D=6 -Dti_sysbios_knl_Task_checkStackFlag__D=FALSE -Dti_sysbios_knl_Task_initStackFlag__D=TRUE -Dti_sysbios_knl_Task_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Clock_TICK_SOURCE=ti_sysbios_knl_Clock_TickSource_TIMER -Dti_sysbios_knl_Clock_TICK_MODE=ti_sysbios_knl_Clock_TickMode_DYNAMIC -Dti_sysbios_hal_Core_delegate_getId=ti_sysbios_hal_CoreNull_getId__E -Dti_sysbios_hal_Core_delegate_interruptCore=ti_sysbios_hal_CoreNull_interruptCore__E -Dti_sysbios_hal_Core_delegate_lock=ti_sysbios_hal_CoreNull_lock__E -Dti_sysbios_hal_Core_delegate_unlock=ti_sysbios_hal_CoreNull_unlock__E -Dti_sysbios_hal_Core_numCores__D=1 -Dti_sysbios_hal_CoreNull_numCores__D=1 -Dti_sysbios_utils_Load_taskEnabled__D=TRUE -Dti_sysbios_utils_Load_swiEnabled__D=FALSE -Dti_sysbios_utils_Load_hwiEnabled__D=FALSE -Dti_sysbios_family_arm_m3_Hwi_dispatcherSwiSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherTaskSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherAutoNestingSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherIrpTrackingSupport__D=TRUE -Dti_sysbios_knl_Semaphore_supportsEvents__D=FALSE -Dti_sysbios_knl_Semaphore_supportsPriority__D=FALSE -Dxdc_runtime_Assert_DISABLE_ALL -Dxdc_runtime_Log_DISABLE_ALL
 
-BIOS_INC  = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
+BIOS_INC  = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
 
-TARGET_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
+TARGET_INC = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
 
-INCS = $(BIOS_INC) $(TARGET_INC)  --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272"  -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ 
+INCS = $(BIOS_INC) $(TARGET_INC)  --include_path="/home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272"  -I/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ 
 
-CC = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
-ASM = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
-AR = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armar rq
+CC = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
+ASM = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
+AR = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armar rq
 
-DEL = C:/ti/xdctools_3_32_02_25_core/packages/../bin/rm -f
-CP = C:/ti/xdctools_3_32_02_25_core/packages/../bin/cp -f
+DEL = rm -f
+CP = cp -f
 
 define RM
 	$(if $(wildcard $1),$(DEL) $1,:)
@@ -100,8 +100,8 @@ rom_sysbios.obj: BIOS.c knl/Clock.c knl/Idle.c knl/Intrinsics.c knl/Event.c knl/
 rom_sysbios.aem3: rom_sysbios.obj m3_Hwi_asm.obj m3_Hwi_asm_switch.obj m3_IntrinsicsSupport_asm.obj m3_TaskSupport_asm.obj
 	@-$(call RM, $@)
 	@echo arem3 $^ ...
-	@$(AR) $@ $^ C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
+	@$(AR) $@ $^ /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
 
 clean:
-	@$(DEL) ..\makefile.libs
+	@$(DEL) ../makefile.libs
 	@-$(call RM, *)

simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/hal_mcu.h

@@ -106,7 +106,7 @@
  */
 
 #ifdef USE_ICALL
-#include <ICall.h>
+#include <icall.h>
 
 typedef ICall_CSState halIntState_t;
 

simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/hal_rtc_wrapper.c

@@ -55,7 +55,7 @@
 #include <inc/hw_aon_rtc.h>
 #include <driverlib/aon_rtc.h>
 #include <driverlib/aon_event.h>
-#include "ICall.h"
+#include "icall.h"
 
 /*******************************************************************************
  * MACROS

simplelink/ble_sdk_2_02_02_25/src/components/icall/src/icall_platform.h

@@ -48,7 +48,7 @@
 
 #include <stdint.h>
 
-#include "ICall.h"
+#include "icall.h"
 
 #ifdef __cplusplus
 extern "C" {

simplelink/ble_sdk_2_02_02_25/src/components/npi/src/inc/npi_ble.h

@@ -55,7 +55,7 @@ extern "C"
 // includes
 // ****************************************************************************
 #include "hal_types.h"
-#include "OSAL.h"
+#include "osal.h"
 
 // ****************************************************************************
 // defines

simplelink/ble_sdk_2_02_02_25/src/components/osal/src/common/osal.c

@@ -75,7 +75,7 @@
 #ifdef ICALL_JT
   #include "icall_JT.h"
 #else
-  #include <ICall.h>
+  #include <icall.h>
 #endif /* ICALL_JT */   
 #endif /* USE_ICALL */
 
@@ -405,7 +405,7 @@ uint32 osal_build_uint32( uint8 *swapped, uint8 len )
 unsigned char * _ltoa(unsigned long l, unsigned char *buf, unsigned char radix)
 {
 #if defined (__TI_COMPILER_VERSION) || defined (__TI_COMPILER_VERSION__)
-  return ( (unsigned char*)ltoa( l, (char *)buf ) );
+  return ( (unsigned char*)ltoa( l, (char *)buf, radix ) );
 #elif defined( __GNUC__ )
   return ( (char*)ltoa( l, buf, radix ) );
 #else

simplelink/ble_sdk_2_02_02_25/src/components/osal/src/common/osal_cbtimer.c

@@ -47,8 +47,8 @@
  Release Date: 2018-04-02 18:03:35
  *****************************************************************************/
 
-#include "OSAL.h"
-#include "OSAL_Tasks.h"
+#include "osal.h"
+#include "osal_tasks.h"
 
 #include "hal_mcu.h"
 #include "osal_cbtimer.h"

simplelink/ble_sdk_2_02_02_25/src/components/osal/src/common/osal_memory_icall.c

@@ -51,13 +51,13 @@
  */
 
 #include "comdef.h"
-#include "OSAL.h"
-#include "OSAL_Memory.h"
+#include "osal.h"
+#include "osal_memory.h"
 
 #ifdef ICALL_JT
 #include "icall_JT.h"
 #else
-#include <ICall.h>
+#include <icall.h>
 #endif /* ICALL_JT */   
 
 /**************************************************************************************************

simplelink/ble_sdk_2_02_02_25/src/components/osal/src/common/osal_pwrmgr.c

@@ -59,7 +59,7 @@
 #ifdef ICALL_JT
   #include "icall_JT.h"
 #else
-  #include <ICall.h>
+  #include <icall.h>
 #endif /* ICALL_JT */   
 #endif /* USE_ICALL */
 

simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc/osal.h

@@ -62,11 +62,11 @@ extern "C"
 #include <limits.h>
 
 #include "comdef.h"
-#include "OSAL_Memory.h"
-#include "OSAL_Timers.h"
+#include "osal_memory.h"
+#include "osal_timers.h"
 
 #ifdef USE_ICALL
-#include <ICall.h>
+#include <icall.h>
 #endif /* USE_ICALL */
 
 /*********************************************************************

simplelink/ble_sdk_2_02_02_25/src/components/services/src/nv/cc26xx/nvocop.c

@@ -80,7 +80,7 @@ the last entry in the page (higher memory address).
 #include "hal_flash.h"
 #include "hal_types.h"
 #include "pwrmon.h"
-#include "OSAL.h"
+#include "osal.h"
 #include "osal_snv.h"
 #include "hal_assert.h"
 #include <driverlib/vims.h>

simplelink/ble_sdk_2_02_02_25/src/examples/beacon_rfdriver/main_tirtos.c

@@ -52,7 +52,7 @@
 
 #include <inc/hw_fcfg1.h>
 
-#include "Board.h"
+#include "board.h"
 
 // RF Driver
 #include <ti/drivers/rf/RF.h>

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h

@@ -103,7 +103,7 @@ typedef enum {
     READ_REG,           // read DBS register value, used after a "read" SPI instruction (MISO)
     READ_REG2,          // read DBS register value, used after a "read" SPI instruction (MISO)
     END_TRANSMIT,       // read DBS register value, used after a "read" SPI instruction (MISO)
-    ONE_SHOT_SPI,       // end spi instruction
+    CONTI_SPI_WITH_FLUSH,       // end spi instruction
     READ_MOSI
 } SPI_CB_MODE;
 
@@ -114,9 +114,11 @@ typedef enum {
 static bool STI = false;
 static bool IsFirstData = true;
 static uint8_t spi_state_counter = 0;
+static uint8_t check_reg_counter = 0;
 static bool ConnectState = false;
 static bool ErrorRestart = false;
 static SPI_CB_MODE SPICallBack;
+static uint8 adc_spi_en_switch = 1;
 
 /*
 *  Let C = command, S = status;
@@ -212,7 +214,7 @@ extern ICall_Semaphore semaphore;
 // command return characteristic
 #define BLE_CDR_BUFF_CHAR SIMPLEPROFILE_CHAR2
 #define BLE_CDR_BUFF_SIZE SIMPLEPROFILE_CHAR2_LEN
-#define BLE_CDR_SAMLL_SIZE 10
+#define BLE_CDR_SMALL_SIZE 10
 
 // instruction input characteristic
 #define BLE_INS_BUFF_CHAR SIMPLEPROFILE_CHAR3
@@ -238,15 +240,17 @@ extern ICall_Semaphore semaphore;
 #define INS_TYPE_CIS 0x70
 
 // VIS operator
-#define VIS_INT      0x60
-#define VIS_RST      0xF0
-#define VIS_START    0xC0
 #define VIS_REC      0x10
 #define VIS_STI      0x20
 #define VIS_STOP_REC 0x30
 #define VIS_STOP_STI 0x40
-#define VIS_CAL      0xA0
 #define VIS_ASK      0x50
+#define VIS_INT      0x60
+#define VIS_FAST_SET 0x70
+#define VIS_EN_ADC_CLK 0x80
+#define VIS_CAL      0xA0
+#define VIS_START    0xC0
+#define VIS_RST      0xF0
 
 
 // CIS operator
@@ -352,7 +356,7 @@ static uint16_t CONNECT_HANDLE = 0;
 /**
  * command instruction buffer
  */
-static uint8_t cdr_buf[BLE_CDR_SAMLL_SIZE] = {0};
+static uint8_t cdr_buf[BLE_CDR_SMALL_SIZE] = {0};
 
 /*====================
  ==== event table ====

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_cali_CIS.h

@@ -27,14 +27,14 @@ static void SendCaliValue(uint8_t CaliNumber){
 
 //    ch = 2 * (CaliNumber % 4);
 //    uint8_t gain_level = CaliNumber / 4;   // 0:gain, 1:offset
-    uint8_t channel_number = 8, index = 1;
+    uint8_t channel_number = 8, index = 2;
     uint8_t gain_level = 0;
 
     if(CaliNumber < 4){
         gain_level = CaliNumber;
     }
 
-    cali_buf[0] = CHIP_ID;
+    cali_buf[1] = CHIP_ID;
     for(int i=0 ; i<channel_number ; i++){
         cali_buf[index++] = (uint8_t) (CaliTable.Ch[i].Gain[gain_level] >> 8) & 0xFF;
         cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Gain[gain_level] & 0x00FF;
@@ -42,9 +42,8 @@ static void SendCaliValue(uint8_t CaliNumber){
         cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Offset[gain_level] & 0x00FF;
     }
 
-//    for(int i=1 ; i<BLE_CDR_BUFF_SIZE ; i++){
-//        cali_buf[i] = i;
-//    }
+    cali_buf[0] = index - 1;
+
     SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, index, cali_buf);
 }
 

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_check_ins.h

@@ -14,20 +14,29 @@ static uint8_t check_ins(uint16_t trans_ins){
 }
 
 static void check_register(uint8_t register_to_check, uint16_t instruction_to_fit, NEU_WORK_STATE next_state){
-    if(spi_state_counter < 6){
+    if(check_reg_counter < 6){
         SPICallBack = CONTINUOUS_TRANS;
         spi_txbuf[0] = register_to_check & 0x7F;
-        spi_txbuf[1] = register_to_check;
-        spi_txbuf[2] = register_to_check;
+        spi_txbuf[1] = rec_sti_command;
+        spi_txbuf[2] = check_reg_counter;
 
-        spi_state_counter ++;
+        check_reg_counter ++;
         headstage_spi_transaction(3);
     }
     else{
-        spi_state_counter = 0;
+        check_reg_counter = 0;
         if(check_ins(instruction_to_fit)){
             NEULIVE_STATE.state = next_state;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
+
+            // update rec_sti_command
+            if(!(rec_sti_command & ENABLE_STI)){
+               // close STI success
+               rec_sti_command &= ~STATUS_STI;
+            }
+//            if(rec_sti_command & ENABLE_STI){
+//                rec_sti_command |= STATUS_STI;
+//            }
         }
         else{
             // resend instruction
@@ -61,7 +70,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
                 IsFirstData = true;
             }
 
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             ReopenSPI();
         }
         headstage_spi_transaction(3);
@@ -158,22 +167,22 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
     else{
         NEULIVE_STATE.state       = next_state;
     }
-    SPICallBack = ONE_SHOT_SPI;
+    SPICallBack = CONTI_SPI_WITH_FLUSH;
     headstage_spi_transaction(3);
 }
 
 static uint8_t check_sti_register(uint8_t address, uint16_t instruction_to_fit){
-    spi_state_counter = 0;
-    while(spi_state_counter < 6){
+    check_reg_counter = 0;
+    while(check_reg_counter < 6){
         SPICallBack = READ_REG;
         spi_txbuf[0] = address & 0x7F;
         spi_txbuf[1] = address;
         spi_txbuf[2] = address;
 
-        headstage_spi_transaction(3);   // spi_state_counter++ would be executed in SPI callback
+        headstage_spi_transaction(3);   // check_reg_counter++ would be executed in SPI callback
     }
 
-    spi_state_counter = 0;
+    check_reg_counter = 0;
 
     // success = 1; failed = 0
     return check_ins(instruction_to_fit);

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_dbs_object.h

@@ -0,0 +1,167 @@
+
+#ifndef DBS_OBJECT_H
+#define DBS_OBJECT_H
+
+#include "neu/headstage_spi.h"
+
+#define SYS_RESERVED_INDEX       0
+#define SYS_GENERAL_ENABLE_INDEX 1
+#define SYS_LNA_BIOS1_INDEX      2
+#define SYS_LNA_BIOS2_INDEX      3
+#define SYS_STI_CLK_RATIO_INDEX  4
+
+#define REC_CHANNEL_INDEX      0
+#define REC_GAIN_INDEX         1
+#define REC_ADC_CLOCK_INDEX    2
+
+#define STI_ENABLE_INDEX        0
+#define STI_AMP_POS_INDEX       1
+#define STI_AMP_NEG_INDEX       2
+#define STI_POLARITY_INDEX      3
+#define STI_CYCLE_CH01_INDEX    4
+#define STI_CYCLE_CH23_INDEX    5
+#define STI_CYCLE_CH45_INDEX    6
+#define STI_CYCLE_CH67_INDEX    7
+#define STI_CLK_RATIO_INDEX     8
+#define STI_ARBITRARY_EN_INDEX  9
+#define STI_MODE_INDEX         10
+#define STI_DURATION0_INDEX    11
+#define STI_DURATION1_INDEX    12
+#define STI_DURATION2_INDEX    13
+#define STI_DURATION3_INDEX    14
+
+//#define DBS_REGISTER                                            \
+//    uint8_t address;                                            \
+//    void (*write_reg) (DBSRegister *self, uint32_t reg_value);  \
+//    uint32_t (*read_reg) (DBSRegister *self)
+
+typedef struct _DBSRegister{
+    uint8_t address;
+    bool WriteRegister, CheckRegister;
+    void (*write_reg) (struct _DBSRegister *self, uint16_t reg_value);
+    void (*read_reg) (struct  _DBSRegister *self);
+}DBSRegister;
+
+void write_reg(DBSRegister *self, uint16_t reg_value){
+    spi_txbuf[0] = 0x80 | self->address;
+    spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
+    spi_txbuf[2] = reg_value & 0xFF;
+    SPICallBack = CONTI_SPI_WITH_FLUSH;
+    headstage_spi_transaction(SPI_BUFFER_SIZE);
+}
+
+void read_reg(DBSRegister *self){
+    spi_txbuf[0] = 0x7F & self->address;
+    spi_txbuf[1] = 0x7F & self->address; // it's don't care actually
+    spi_txbuf[2] = 0x7F & self->address; // it's don't care actually
+    SPICallBack = READ_REG;
+    headstage_spi_transaction(SPI_BUFFER_SIZE);
+}
+
+
+static uint16_t sys_register_default_value[5] = {
+    0x0000,
+    0x40F2,
+    0x0210,
+    0x4210,
+    0x0002
+};
+static uint16_t rec_register_value[3];
+static uint16_t sti_register_value[43];
+
+static DBSRegister sys_register[5];
+static DBSRegister rec_register[3];
+static DBSRegister sti_register[43];
+
+static void InitSysRegister(){
+    sys_register[SYS_RESERVED_INDEX].address = 0x00;
+    sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
+    sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
+    sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
+    sys_register[SYS_STI_CLK_RATIO_INDEX].address = 52;
+
+    for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
+        sys_register[i].WriteRegister = false;
+        sys_register[i].CheckRegister = false;
+        sys_register[i].write_reg = &write_reg;
+        sys_register[i].read_reg = &read_reg;
+    }
+}
+
+static void InitRecRegister(){
+    rec_register[REC_CHANNEL_INDEX].address = 48;
+    rec_register[REC_GAIN_INDEX].address = 49;
+    rec_register[REC_ADC_CLOCK_INDEX].address = 51;     // sampling rate
+
+    for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
+        rec_register[i].WriteRegister = false;
+        rec_register[i].CheckRegister = false;
+        rec_register[i].write_reg = &write_reg;
+        rec_register[i].read_reg = &read_reg;
+    }
+}
+
+static void InitStiRegister(){
+    sti_register[STI_ENABLE_INDEX].address = 46;
+    sti_register[STI_AMP_POS_INDEX].address = 37;
+    sti_register[STI_AMP_NEG_INDEX].address = 38;
+    sti_register[STI_POLARITY_INDEX].address = 40;
+    sti_register[STI_CYCLE_CH01_INDEX].address = 42;
+    sti_register[STI_CYCLE_CH23_INDEX].address = 43;
+    sti_register[STI_CYCLE_CH45_INDEX].address = 44;
+    sti_register[STI_CYCLE_CH67_INDEX].address = 45;
+    sti_register[STI_CLK_RATIO_INDEX].address = 52;
+    sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
+    sti_register[STI_MODE_INDEX].address = 56;
+
+    for(int ch=0 ; ch<8 ; ch++){
+        sti_register[ch*4 + STI_DURATION0_INDEX].address = ch*4 + 1;
+        sti_register[ch*4 + STI_DURATION1_INDEX].address = ch*4 + 2;
+        sti_register[ch*4 + STI_DURATION2_INDEX].address = ch*4 + 3;
+        sti_register[ch*4 + STI_DURATION3_INDEX].address = ch*4 + 4;
+    }
+
+    for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
+        sti_register[i].WriteRegister = false;
+        sti_register[i].CheckRegister = false;
+        sti_register[i].write_reg = &write_reg;
+        sti_register[i].read_reg = &read_reg;
+    }
+}
+
+static void InitDBSRegister(){
+    InitSysRegister();
+    InitRecRegister();
+    InitStiRegister();
+
+//    for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
+    for(int i=1 ; i<5 ; i++){
+        sys_register[i].WriteRegister = true;
+    }
+    flag_notify(EVT_NEU_SPI);
+}
+
+static void ResetDBSRegister(){
+    for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
+        sys_register[i].WriteRegister = false;
+        sys_register[i].CheckRegister = false;
+        sys_register[i].write_reg = &write_reg;
+        sys_register[i].read_reg = &read_reg;
+    }
+
+    for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
+        rec_register[i].WriteRegister = false;
+        rec_register[i].CheckRegister = false;
+        rec_register[i].write_reg = &write_reg;
+        rec_register[i].read_reg = &read_reg;
+    }
+
+    for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
+        sti_register[i].WriteRegister = false;
+        sti_register[i].CheckRegister = false;
+        sti_register[i].write_reg = &write_reg;
+        sti_register[i].read_reg = &read_reg;
+    }
+}
+
+#endif

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_led.h

@@ -133,7 +133,7 @@ static uint8_t headstage_led_set_color(uint16_t *ins_buf, uint8_t repeat, uint8_
 
 #ifdef HEADSTAGE_LED_USE_SPI
 
-#include <Board.h>
+#include <board.h>
 #include <ti/drivers/SPI.h>
 #include <ti/drivers/dma/UDMACC26XX.h>
 #include <ti/drivers/spi/SPICC26XXDMA.h>

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h

@@ -160,13 +160,17 @@ static void FlushNotify();
 #define NEU_REC_PARAM  0x20
 #define NEU_MULTI_STI  0x40
 #define NEU_TEST_INS   0x60
-#define RIS_STOP_STI   0x80
+#define RIS_REC_ON_CHANGE 0x80
+#define RIS_STI_ON_CHANGE 0xA0
 
 /** event */
 #define EVT_NEU_SPI             0x0001  /**< spi transaction event */
 #define EVT_NEU_LED             0x0002  /**< set led event */
 #define EVT_NEU_CHECK           0x0004  /**< check neulive single instruction */
 #define EVT_NEU_REG_SPI         0x0008  /** register spi event  */
+#define EVT_NEU_PREPARE         0x0010  /** prepare to record or stimulate **/
+#define EVT_NEU_REC             0x0020
+#define EVT_NEU_STI             0x0040
 
 /** clock setting */
 #define NEU_SYS_CLK             2000000              /**< 10Mhz */
@@ -298,7 +302,7 @@ typedef enum{
 #include "string.h"
 #include "headstage_rec_ins.h"
 #include "headstage_sti_ins.h"
-
+#include "headstage_dbs_object.h"
 
 /*
  * todo: need to define some procedure to detect this device status
@@ -338,53 +342,8 @@ static void headstage_init() {
     #undef THREE_POINT_THREE_VOLT
 }
 
-/**
- *   @fn headstage_neu_append_notify_data
- */
-#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
-static void headstage_neu_append_notify_data() {
-
-    uint8_t channel = spi_rxbuf[0];
-
-    // close-reopen SPI, if the first channel received is invalid
-    if(IsFirstData){
-        // start record
-        if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
-            IsFirstData = false;
-        }
-        // restart SPI
-        else{
-            SPI_close(headstage_spi_handle);
-            ReopenSPI();
-            IsFirstData = true;
-            return;
-        }
-    }
-
-    // discard illegal channel
-//    uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
-    if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
-        // illegal channel
-        return;
-    }
-
-    uint8_t not_buf[3];
-    not_buf[0] = channel; // ch
-    not_buf[1] = spi_rxbuf[1];
-    not_buf[2] = spi_rxbuf[2];
-
-//    not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
-//    not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
-
-    uint8_t data_size = headstage_notify_append_data(not_buf);
-
-    if (data_size >= BLE_NOT_BUFF_SIZE) {
-        headstage_notify_flip_buffer();
-        headstage_notify_send();
-    }
-}
-
 static void headstage_neu_state_spi();
+static void headstage_neu_spi();
 
 /**
  *  @fn headstage_neu_event
@@ -393,93 +352,27 @@ static void headstage_neu_state_spi();
  */
 
 static void headstage_neu_event() {
+    if (EVENT_MASK == 0) {
+        // fast return
+        return;
+    }
+
     if (flag_mask(EVT_NEU_SPI)) {
         flag_disable(EVT_NEU_SPI);
-        headstage_neu_state_spi();
+//        headstage_neu_state_spi();
+        headstage_neu_spi();
     }
 
     if (flag_mask(EVT_NEU_LED)) {
         flag_disable(EVT_NEU_LED); /** reserved to set led power and set color manually */
     }
 
-    if (EVENT_MASK == 0) {
-        // fast return
-    }
-
     if (flag_mask(EVT_DISCONNECTED)) {
         ConnectState = false;
         headstage_update_vis_instruction(VIS_INT);
     }
 }
 
-/**
- *  @fn headstage_spi_callback
- *
- *  description: callback function to deal with data transmission between DBS and CC2650
- */
-
-static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
-    switch(SPICallBack){
-        case CONTINUOUS_TRANS:{
-            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
-               spi_txbuf[i] = 0x00;
-            }
-            flag_notify(EVT_NEU_SPI);
-            break;
-        }
-        case FLUSH_BUFFER:{
-            SPICallBack = FLUSH_BUFFER2;
-            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
-                spi_txbuf[i] = 0x00;
-            }
-            headstage_spi_transaction(SPI_BUFFER_SIZE);
-            break;
-        }
-        case FLUSH_BUFFER2:{
-           SPICallBack = ONE_SHOT_SPI;
-           for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
-               spi_txbuf[i] = 0x00;
-           }
-           flag_notify(EVT_NEU_SPI);
-//           headstage_spi_transaction(SPI_BUFFER_SIZE);
-           break;
-       }
-        case ONE_SHOT_SPI:{
-            SPICallBack = FLUSH_BUFFER;
-            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
-                spi_txbuf[i] = 0x00;
-            }
-            headstage_spi_transaction(SPI_BUFFER_SIZE);
-            break;
-        }
-
-        case READ_MOSI:{
-            flag_notify(EVT_NEU_SPI);
-            break;
-        }
-
-        case READ_REG:{
-            spi_state_counter ++;
-            break;
-        }
-
-        case CLOSE_SPI:{
-            SPICallBack = ONE_SHOT_SPI;
-            SPI_close(headstage_spi_handle);
-            break;
-        }
-
-        case END_TRANSMIT:{
-            tx_put_u24(0, 0);
-            SPICallBack = CONTINUOUS_TRANS;
-            break;
-        }
-        default:{
-            break;
-        }
-    }
-}
-
 /**
  *   @fn headstage_update_ris_instruction
  *
@@ -515,20 +408,24 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
 
         case NEU_MULTI_STI: {
             uint8_t  ch                = instruction[1];
-            uint8_t  sti_cycles        = instruction[2];
-            INSTRUCTION.sti_t1[ch]            = (instruction[3] << 8) | instruction[4];
-            INSTRUCTION.sti_t2[ch]            = (instruction[5] << 8) | instruction[6];
-            INSTRUCTION.sti_t3[ch]            = (instruction[7] << 8) | instruction[8];
-            INSTRUCTION.sti_t4[ch]            = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
-            INSTRUCTION.sti_t5[ch]            = (instruction[12] << 8) | instruction[13];
-            INSTRUCTION.current_sti_cycle[ch] = sti_cycles;
+//            uint8_t  sti_cycles        = instruction[2];
+//            INSTRUCTION.sti_t1[ch]            = (instruction[3] << 8) | instruction[4];
+//            INSTRUCTION.sti_t2[ch]            = (instruction[5] << 8) | instruction[6];
+//            INSTRUCTION.sti_t3[ch]            = (instruction[7] << 8) | instruction[8];
+//            INSTRUCTION.sti_t4[ch]            = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
+//            INSTRUCTION.sti_t5[ch]            = (instruction[12] << 8) | instruction[13];
+//            INSTRUCTION.current_sti_cycle[ch] = sti_cycles;
+
+            for(int i=0 ; i<8 ; i++){
+                uint8_t  sti_cycles        = instruction[2];
+                INSTRUCTION.sti_t1[i]            = (instruction[3] << 8) | instruction[4];
+                INSTRUCTION.sti_t2[i]            = (instruction[5] << 8) | instruction[6];
+                INSTRUCTION.sti_t3[i]            = (instruction[7] << 8) | instruction[8];
+                INSTRUCTION.sti_t4[i]            = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
+                INSTRUCTION.sti_t5[i]            = (instruction[12] << 8) | instruction[13];
+                INSTRUCTION.current_sti_cycle[i] = sti_cycles;
+            }
 
-//            INSTRUCTION.sti_t1[n_ch]            = (instruction[3] << 8) | instruction[4];
-//            INSTRUCTION.sti_t2[n_ch]            = (instruction[5] << 8) | instruction[6];
-//            INSTRUCTION.sti_t3[n_ch]            = (instruction[7] << 8) | instruction[8];
-//            INSTRUCTION.sti_t4[n_ch]            = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
-//            INSTRUCTION.sti_t5[n_ch]            = (instruction[12] << 8) | instruction[13];
-//            INSTRUCTION.current_sti_cycle[n_ch] = sti_cycles;
             break;
         }
 
@@ -610,6 +507,123 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
             break;
         }
 
+        case RIS_REC_ON_CHANGE:{
+            uint16_t reg_value = instruction[2] << 8 | instruction[3];
+            switch(instruction[1]){
+                case REC_CHANNEL_INDEX:{
+                    rec_register[REC_CHANNEL_INDEX].WriteRegister = true;
+                    rec_register_value[REC_CHANNEL_INDEX] = reg_value;
+                    INSTRUCTION.recording_channel = reg_value;
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case REC_GAIN_INDEX:{
+                    rec_register[REC_GAIN_INDEX].WriteRegister = true;
+                    rec_register_value[REC_GAIN_INDEX] = reg_value;
+//                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case REC_ADC_CLOCK_INDEX:{
+                    rec_register[REC_ADC_CLOCK_INDEX].WriteRegister = true;
+                    rec_register_value[REC_ADC_CLOCK_INDEX] = reg_value;
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                default:{
+                    break;
+                }
+            }
+            break;
+        }
+
+        case RIS_STI_ON_CHANGE:{
+            uint16_t sti_reg_value = instruction[2] << 8 | instruction[3];
+            switch(instruction[1]){
+                case STI_ENABLE_INDEX:{
+                    sti_register_value[STI_ENABLE_INDEX] = sti_reg_value;
+                    INSTRUCTION.sti_channel = sti_reg_value;
+                    break;
+                }
+
+                case STI_AMP_POS_INDEX:{
+                    sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
+                    sti_register_value[STI_AMP_POS_INDEX] = sti_reg_value;
+
+                    // pos, neg amplitude should be same at this DBS version
+                    sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
+                    sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
+
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case STI_AMP_NEG_INDEX:{
+                    sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
+                    sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case STI_POLARITY_INDEX:{
+                    sti_register[STI_POLARITY_INDEX].WriteRegister = true;
+                    sti_register_value[STI_POLARITY_INDEX] = sti_reg_value;
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case STI_MODE_INDEX:{
+                    sti_register[STI_MODE_INDEX].WriteRegister = true;
+                    sti_register_value[STI_MODE_INDEX] = instruction[2];
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case STI_CYCLE_CH01_INDEX:{
+                    sti_register[STI_CYCLE_CH01_INDEX].WriteRegister = true;
+                    sti_register_value[STI_CYCLE_CH01_INDEX] = sti_reg_value;
+                    sti_register[STI_CYCLE_CH23_INDEX].WriteRegister = true;
+                    sti_register_value[STI_CYCLE_CH23_INDEX] = sti_reg_value;
+                    sti_register[STI_CYCLE_CH45_INDEX].WriteRegister = true;
+                    sti_register_value[STI_CYCLE_CH45_INDEX] = sti_reg_value;
+                    sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
+                    sti_register_value[STI_CYCLE_CH67_INDEX] = sti_reg_value;
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                case STI_DURATION0_INDEX:{
+                    uint16_t t1 = instruction[2] << 8 | instruction[3];     // t1 is 10 bits
+                    uint16_t t2 = instruction[4] << 8 | instruction[5];     // t2 is 10 bits
+                    uint16_t t3 = instruction[6] << 8 | instruction[7];     // t3 is 10 bits
+                    uint32_t t4 = instruction[8] << 16 | instruction[9] << 8 | instruction[10]; // t4 is 17 bits
+                    uint16_t t5 = instruction[11] << 8 | instruction[12];   // t5 is 10 bits
+
+                    for(int ch=0 ; ch<8 ; ch++){
+                        sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
+                        sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
+
+                        sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
+                        sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF)  << 4 | (t2 & 0x03C0) >> 6;
+
+                        sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
+                        sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
+
+                        sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
+                        sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
+                    }
+                    flag_notify(EVT_NEU_SPI);
+                    break;
+                }
+
+                default:{
+                    break;
+                }
+            }
+        }
+
         default: {
             break;
         }
@@ -630,11 +644,70 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
                 FlushNotify();
             }
             NEULIVE_STATE.state = NEU_RST;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             flag_notify(EVT_NEU_SPI);
             /**< stop spi transaction */
             break; /**< reset all the parameter */
         }
+
+        case VIS_FAST_SET:{
+            uint8_t ch = 7;
+            uint8_t t1=25, t2=0, t3=25 , t4=0, t5=0;
+
+            // using ch8 to fast settle
+            INSTRUCTION.sti_channel = 0b0000000010000000;
+            sti_register_value[STI_ENABLE_INDEX] = 0b0000000010000000;  // 0bxxxx_xxxv_cccc_cccc, c = current; v = volt, x = don't care
+            sti_register[STI_ENABLE_INDEX].WriteRegister = true;
+
+            // setting t1~t5
+            sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
+            sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF)  << 4 | (t2 & 0x03C0) >> 6;
+            sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
+            sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
+            sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
+            sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
+            sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
+            sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
+
+            // cycle number
+            sti_register_value[STI_CYCLE_CH67_INDEX] = 10 << 8 | 0;
+            sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
+
+            // set polarity, it's don't care in fast settle
+            sti_register_value[STI_POLARITY_INDEX] = 0;
+            sti_register[STI_POLARITY_INDEX].WriteRegister = true;
+
+            // set stimulate mode
+            sti_register_value[STI_MODE_INDEX] = 0;
+            sti_register[STI_MODE_INDEX].WriteRegister = true;
+//            INSTRUCTION.sti_mode             = 0;   // 1 = continuous mode; 0 = limit mode
+//            INSTRUCTION.sti_h_bridge         = 0;   // voltage sti must use H-bridge
+//            INSTRUCTION.sti_ref              = 0;   // 1 = GND; 0 = Vref
+
+            // using minimum amplitude
+            sti_register_value[STI_AMP_POS_INDEX] = 0;
+            sti_register_value[STI_AMP_NEG_INDEX] = 0;
+            sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
+            sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
+
+            rec_sti_command |= ENABLE_STI;
+
+            // is neu wording now?
+            if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
+                // nothing to do
+            }
+            else{
+                flag_notify(EVT_NEU_SPI);
+            }
+            break;
+        }
+
+        case VIS_EN_ADC_CLK:{
+            adc_spi_en_switch ^= 1;
+            headstage_pin_output(PIN_EN_ADC_SPI_CLK, adc_spi_en_switch);
+            break;
+        }
+
         case VIS_START: {
 //            for(int i=0 ; i<12 ; i++){
 //                FlushNotify();
@@ -653,7 +726,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
             }
 
             NEULIVE_STATE.config_type = NEU_WARM_UP;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             // is neu wording now?
             if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -666,14 +739,13 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
         }
 
         case VIS_REC: {
-
             if(INSTRUCTION.recording_channel){
                 rec_sti_command |= ENABLE_REC;
                 NEULIVE_STATE.state = NEU_WRITE_REC_INS;
                 INSTRUCTION.ins_opcode = BIAS_ONE;
 
                 NEULIVE_STATE.config_type = NEU_WARM_UP;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
 
                 // is neu wording now?
                 if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
@@ -691,7 +763,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
                 rec_sti_command |= ENABLE_STI;
                 NEULIVE_STATE.state = NEU_WRITE_STI_INS;
                 NEULIVE_STATE.config_type = NEU_WARM_UP;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
                 INSTRUCTION.ins_opcode = T_ZE;
 
                 // is neu wording now?
@@ -708,6 +780,8 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
         case VIS_STOP_REC:{
             rec_sti_command &= ~ENABLE_REC;
 
+            ResetDBSRegister();
+
             // is neu wording now?
             if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
                 // nothing to do
@@ -736,7 +810,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
             rec_sti_command &= ~ENABLE_REC;
             rec_sti_command &= ~ENABLE_STI;
 
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             NEULIVE_STATE.state = NEU_IDLE;
             STI = false;
             Neu2Reset();
@@ -760,6 +834,10 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
     switch (cis_oper) {
         case CIS_NOP: {
             // nothing
+            for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
+                cdr_buf[i] = 0;
+            }
+
             cdr_buf[0] = _B_4b4b(CIS_NOP, CHIP_ID);
             cdr_buf[1] = _B_4b4b(CDR_SUCCESS, 0);
 
@@ -768,11 +846,16 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
         }
 //#ifdef HEADSTAGE_CIS_VOLT_H
         case CIS_VOLT: {
-            cdr_buf[0] = CIS_VOLT | CHIP_ID;
-            cdr_buf[1] = headstage_battery_volt1();
-            cdr_buf[2] = headstage_battery_volt2();
+            for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
+                cdr_buf[i] = 0;
+            }
 
-            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
+            cdr_buf[0] = BLE_CDR_SMALL_SIZE; // data length
+            cdr_buf[1] = CIS_VOLT | CHIP_ID;
+            cdr_buf[2] = headstage_battery_volt1();
+            cdr_buf[3] = headstage_battery_volt2();
+
+            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
 
             #define THREE_POINT_THREE_VOLT 845
             if (AONBatMonBatteryVoltageGet() < THREE_POINT_THREE_VOLT){
@@ -802,35 +885,44 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
 //#endif
 
         case CIS_VERSION:{
-            cdr_buf[0] = VERSION_DATE_YEAR;
-            cdr_buf[1] = VERSION_DATE_MONTH;
-            cdr_buf[2] = VERSION_DATE_DAY;
-            cdr_buf[3] = VERSION_DATE_HOUR;
-            cdr_buf[4] = VERSION_DATE_MINUTE;
+            for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
+                cdr_buf[i] = 0;
+            }
+
+            cdr_buf[0] = BLE_CDR_SMALL_SIZE;
+            cdr_buf[1] = VERSION_DATE_YEAR;
+            cdr_buf[2] = VERSION_DATE_MONTH;
+            cdr_buf[3] = VERSION_DATE_DAY;
+            cdr_buf[4] = VERSION_DATE_HOUR;
+            cdr_buf[5] = VERSION_DATE_MINUTE;
 
             uint8_t mac_int[4];
             if( strncmp(CaliTable.DeviceName, "BOARD_TEST", 25)){
                 // has a specific cali data
                 get_board_name(CaliTable.DeviceName, mac_int, 4);
-                cdr_buf[5] = mac_int[0];
-                cdr_buf[6] = mac_int[1];
+                cdr_buf[6] = mac_int[0];
+                cdr_buf[7] = mac_int[1];
             }
             else{
                 // this board use default cali setting
-                cdr_buf[5] = 0xAB;
-                cdr_buf[6] = 0xCD;
+                cdr_buf[6] = 0xAB;
+                cdr_buf[7] = 0xCD;
             }
 
 
-            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
+            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
             break;
         }
 
         default: {
+            for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
+                cdr_buf[i] = 0;
+            }
+
             cdr_buf[0] = _B_4b4b(cis_oper, CHIP_ID);
             cdr_buf[1] = _B_4b4b(CDR_FAILURE, 0);
 
-            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
+            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
             break;
         }
     }
@@ -881,7 +973,7 @@ static void headstage_neu_state_spi() {
 
         /* recording */
         case NEU_WRITE_REC_INS: {
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             nxt_ins                   = build_rec_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
             NEULIVE_STATE.config_type = nxt_ins;
@@ -935,7 +1027,7 @@ static void headstage_neu_state_spi() {
             value = (0x01 << 23) | (0x33 << 16) | INSTRUCTION.adc_clock_ratio;
             AppendSPITX(0, value);
 
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             NEULIVE_STATE.state = NEU_CHECK_SAMPLE_RATE;
             headstage_spi_transaction(3);
             break;
@@ -949,7 +1041,7 @@ static void headstage_neu_state_spi() {
 
         case NEU_PREPARE_READ:{
             if(spi_state_counter < 6){
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
                 NEULIVE_STATE.state = NEU_PREPARE_READ;
                 spi_state_counter ++;
                 AppendSPITX(0, 0);
@@ -975,22 +1067,22 @@ static void headstage_neu_state_spi() {
         }
         case NEU_READ_DATA: {
 
-            // recv sti enable command
+            // sti enable command
             if( (rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ){
                 // go to send sti instruction
                 NEULIVE_STATE.state = NEU_WRITE_STI_INS;
                 NEULIVE_STATE.config_type = NEU_WARM_UP;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
                 INSTRUCTION.ins_opcode = T_ZE;
 
                 AppendSPITX(0, 0);
                 headstage_spi_transaction(SPI_BUFFER_SIZE);
             }
 
-            // recv disable stimulation
+            // disable stimulation
             else if( !(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI) ){
                 NEULIVE_STATE.state = NEU_STI_INT;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
 
                 AppendSPITX(0, 0);
                 headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -999,12 +1091,11 @@ static void headstage_neu_state_spi() {
             // recv disable recording
             else if( !(rec_sti_command & ENABLE_REC) ){
                 rec_sti_command &= ~STATUS_REC;
-                headstage_led_color(COLOR_WHITE);
                 headstage_led_control();
 
                 if(rec_sti_command & STATUS_STI){
                     NEULIVE_STATE.state = NEU_STI;
-                    SPICallBack = ONE_SHOT_SPI;
+                    SPICallBack = CONTI_SPI_WITH_FLUSH;
 
                     AppendSPITX(0, 0);
                     headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1020,7 +1111,7 @@ static void headstage_neu_state_spi() {
                         spi_txbuf[i] = 0;
                         spi_rxbuf[i] = 0;
                     }
-                    SPICallBack  =   ONE_SHOT_SPI;
+                    SPICallBack  =   CONTI_SPI_WITH_FLUSH;
                     ReopenSPI();
                     headstage_spi_transaction(SPI_BUFFER_SIZE);
                 }
@@ -1038,7 +1129,7 @@ static void headstage_neu_state_spi() {
 
         /* stimulation */
         case NEU_WRITE_STI_INS:{
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             nxt_ins                   = build_sti_ins(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
             NEULIVE_STATE.config_type = nxt_ins;
@@ -1090,7 +1181,7 @@ static void headstage_neu_state_spi() {
             value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
             AppendSPITX(0, value);
 
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             NEULIVE_STATE.state = NEU_STI_LED;
             headstage_spi_transaction(3);
             break;
@@ -1101,7 +1192,7 @@ static void headstage_neu_state_spi() {
 //            value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
 //            AppendSPITX(0, value);
 //
-//            SPICallBack = ONE_SHOT_SPI;
+//            SPICallBack = CONTI_SPI_WITH_FLUSH;
 //            NEULIVE_STATE.state = NEU_CHECK_STI_CH;
 //            headstage_spi_transaction(3);
 //            break;
@@ -1118,7 +1209,7 @@ static void headstage_neu_state_spi() {
 
             headstage_led_control();
 
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
             AppendSPITX(0, 0);
             headstage_spi_transaction(SPI_BUFFER_SIZE);
             break;
@@ -1129,7 +1220,7 @@ static void headstage_neu_state_spi() {
             // recv disable sti command
             if(!(rec_sti_command & ENABLE_STI)){
                 NEULIVE_STATE.state = NEU_STI_INT;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
 
                 AppendSPITX(0, 0);
                 headstage_spi_transaction(SPI_BUFFER_SIZE);
@@ -1139,7 +1230,7 @@ static void headstage_neu_state_spi() {
             else if(rec_sti_command & ENABLE_REC){
                 NEULIVE_STATE.state = NEU_WRITE_REC_INS;
                 NEULIVE_STATE.config_type = NEU_WARM_UP;
-                SPICallBack = ONE_SHOT_SPI;
+                SPICallBack = CONTI_SPI_WITH_FLUSH;
                 INSTRUCTION.ins_opcode = BIAS_ONE;
 
                 AppendSPITX(0, 0);
@@ -1159,7 +1250,7 @@ static void headstage_neu_state_spi() {
         // terminate stimulation
         case NEU_STI_INT: {
             NEULIVE_STATE.state = NEU_STI_INT_TWICE;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             value = (0x01 << 23) | (0x2E << 16) | 0;
             AppendSPITX(0, value);
@@ -1169,7 +1260,7 @@ static void headstage_neu_state_spi() {
 
         case NEU_STI_INT_TWICE: {
             NEULIVE_STATE.state = NEU_CHECK_STI_INT;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             value = (0x01 << 23) | (0x2E << 16) | 0;
             AppendSPITX(0, value);
@@ -1178,7 +1269,6 @@ static void headstage_neu_state_spi() {
         }
 
         case NEU_CHECK_STI_INT: {
-            rec_sti_command &= ~STATUS_STI;
 
             if(rec_sti_command & STATUS_REC){
                 check_register(STI_CHANNEL_REG, 0, NEU_PREPARE_READ);
@@ -1191,7 +1281,7 @@ static void headstage_neu_state_spi() {
 
         case NEU_LED:{
             NEULIVE_STATE.state = NEU_IDLE;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
 
             AppendSPITX(0, 0);
             headstage_led_control();
@@ -1215,4 +1305,219 @@ static void headstage_neu_state_spi() {
     }
 }
 
+static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit);
+static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write);
+static void stimulation_handle();
+
+static void headstage_neu_spi(){
+
+    // check system register if we have written it before
+    if( check_register_value(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value) ){
+        return;
+    }
+    // write system register
+    if (write_register(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value)){
+        return;
+    }
+
+    if(check_register_value(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
+        return;
+    }
+    if(write_register(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
+        return;
+    }
+
+    if(check_register_value(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
+        return;
+    }
+    if(write_register(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
+        return;
+    }
+
+    // enable recording channel
+    if(rec_register[REC_CHANNEL_INDEX].WriteRegister){
+        rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
+        rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
+        rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, rec_register_value[REC_CHANNEL_INDEX]);
+        return;
+    }
+
+    // enable stimulation
+    // WriteRegister will only be enable at check_register_value()
+    if(sti_register[STI_ENABLE_INDEX].WriteRegister){
+        sti_register[STI_ENABLE_INDEX].WriteRegister = false;
+        sti_register[STI_ENABLE_INDEX].CheckRegister = true;
+        sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
+        return;
+    }
+
+    // enable/disable stimulation
+    if (((rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ) ||
+            (!(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI))){
+
+        if(rec_sti_command & ENABLE_STI){
+            if(sti_register_value[STI_ENABLE_INDEX]){
+                rec_sti_command |= STATUS_STI;
+            }
+            // change LED base on working status
+            headstage_led_control();
+
+            sti_register[STI_ENABLE_INDEX].WriteRegister = false;
+            sti_register[STI_ENABLE_INDEX].CheckRegister = true;
+            sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
+            return;
+        }
+        else{
+            rec_sti_command &= ~STATUS_STI;
+            headstage_led_control();
+
+            // enable stimulation and check register
+            sti_register[STI_ENABLE_INDEX].WriteRegister = false;
+            sti_register[STI_ENABLE_INDEX].CheckRegister = true;
+            sti_register_value[STI_ENABLE_INDEX] = 0;
+            sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
+            return;
+        }
+    }
+
+    // start recording
+    if(!(rec_sti_command & STATUS_REC) && (rec_sti_command & ENABLE_REC)){
+       IsFirstData = true;
+
+        if(rec_sti_command & ENABLE_REC){
+            rec_sti_command |= STATUS_REC;          // neu is recording now
+        }
+
+        // change LED base on working status
+        headstage_led_control();
+
+        AppendSPITX(0, 0);
+        SPICallBack = READ_MOSI;
+        headstage_spi_transaction(SPI_BUFFER_SIZE);
+        return;
+    }
+
+    if(rec_sti_command & STATUS_REC){
+        if(!(rec_sti_command & ENABLE_REC)){
+            // terminate record
+            rec_sti_command &= ~STATUS_REC;
+            headstage_led_control();
+            AppendSPITX(0, 0);
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+        }
+        else{
+            if(SPICallBack != READ_MOSI){
+                SPICallBack = READ_MOSI;
+            }
+
+            headstage_neu_append_notify_data();
+            AppendSPITX(0, 0);
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+        }
+        return;
+    }
+
+    if(rec_sti_command & STATUS_STI){
+        stimulation_handle();
+        return;
+    }
+}
+
+#define RESEND_SPI_READ_NUMBER 3
+static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit){
+    for(int i=0 ; i<reg_size ; i++){
+        if(dbs_register[i].CheckRegister){
+            if(check_reg_counter < RESEND_SPI_READ_NUMBER){
+                dbs_register[i].read_reg(dbs_register+i);
+            }
+            else{
+                // check register value
+                check_reg_counter = 0;
+                dbs_register[i].CheckRegister = false;
+
+                uint16_t ins_to_fit = value_to_fit[i];
+                uint16_t ins_recv = spi_rxbuf[1] << 8 | spi_rxbuf[2];
+
+                if(ins_recv != ins_to_fit){
+                    SPI_close(headstage_spi_handle);
+                    dbs_register[i].WriteRegister = true;
+                    ReopenSPI();
+                    dbs_register[i].write_reg(dbs_register+i, value_to_fit[i]);
+                }
+                else{
+                    AppendSPITX(0, 0);
+                    SPICallBack = CONTI_SPI_WITH_FLUSH;
+                    headstage_spi_transaction(SPI_BUFFER_SIZE);
+                }
+            }
+            return 1;
+        }
+    }
+    return 0;
+}
+
+static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write){
+
+    // start from index 1, since 0 is rec/sti enable
+    for(int i=1 ; i<reg_size ; i++){
+        if(dbs_register[i].WriteRegister){
+            dbs_register[i].WriteRegister = false;
+            dbs_register[i].CheckRegister = true;
+            dbs_register[i].write_reg(dbs_register+i, value_to_write[i]);
+            return 1;
+        }
+    }
+    return 0;
+}
+
+static void recording_handle(){
+    if(!(rec_sti_command & ENABLE_REC)){
+        // terminate record
+        rec_sti_command &= ~STATUS_REC;
+        headstage_led_control();
+
+        if(rec_sti_command & STATUS_STI){
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
+            AppendSPITX(0, 0);
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+        }
+        else{
+            AppendSPITX(0, 0);
+            ResetINSTRUCTION();
+
+            SPI_close(headstage_spi_handle);
+            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
+                spi_txbuf[i] = 0;
+                spi_rxbuf[i] = 0;
+            }
+            SPICallBack  =   CONTI_SPI_WITH_FLUSH;
+            ReopenSPI();
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+        }
+    }
+
+    else{
+        headstage_neu_append_notify_data();
+        AppendSPITX(0, 0);
+        headstage_spi_transaction(SPI_BUFFER_SIZE);
+    }
+}
+
+static void stimulation_handle(){
+    if(!(rec_sti_command & ENABLE_STI)){
+        rec_sti_command &= ~STATUS_STI;
+        headstage_led_control();
+        sti_register[STI_ENABLE_INDEX].WriteRegister = false;
+        sti_register[STI_ENABLE_INDEX].CheckRegister = true;
+        sti_register_value[STI_ENABLE_INDEX] = 0;
+        sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
+    }
+
+    // nothing to do
+    else{
+        AppendSPITX(0, 0);
+        headstage_spi_transaction(SPI_BUFFER_SIZE);
+    }
+}
+
 #endif

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_pin.h

@@ -3,7 +3,7 @@
 #ifndef HEADSTAGE_PIN_H
 #define HEADSTAGE_PIN_H
 
-#include <Board.h>
+#include <board.h>
 #include <ti/drivers/PIN.h>
 
 #if defined(HEADSTAGE_TNI_H)

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_version.h

@@ -3,15 +3,15 @@
 #define VERSION_DATE
 
 #define VERSION_DATE_YEAR      20
-#define VERSION_DATE_MONTH     6
-#define VERSION_DATE_DAY       16
-#define VERSION_DATE_HOUR      15
-#define VERSION_DATE_MINUTE    21
+#define VERSION_DATE_MONTH     11
+#define VERSION_DATE_DAY       13
+#define VERSION_DATE_HOUR      18
+#define VERSION_DATE_MINUTE    30
 
 // this is NOT the version hash !!
 // it's the last version hash
-#define VERSION_HASH           fce3f53b404738630e7f598238b1936d9bf0a72e
-#define VERSION_GIT_BRANCH     Neulive2.0_developement
+#define VERSION_HASH           1cde4cfe026202aae24460eb1cf778477a9828e3
+#define VERSION_GIT_BRANCH     neulive_onchange_central_debug
 
 static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
     uint8 name_offset = 18;

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_watchdog.h

@@ -3,7 +3,7 @@
 #ifndef HEADSTAGE_WATCHDOG
 #define HEADSTAGE_WATCHDOG
 
-#include <Board.h>
+#include <board.h>
 #include <ti/drivers/Watchdog.h>
 #include <ti/drivers/watchdog/WatchdogCC26XX.h>
 

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_notify.h

@@ -8,11 +8,60 @@
 #error "headstage/headstage_notify.h not included"
 #endif
 
+#include "headstage_dbs_object.h"
+
 #define NOT_BUF_OFFSET_INIT 8
 
 static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
 static uint32_t not_time_stamp = 0;
 
+static void headstage_notify_set_timestamp();
+static void headstage_notify_flip_buffer();
+static uint8_t headstage_notify_append_data(uint8_t *data_value);
+
+/**
+ *   @fn headstage_neu_append_notify_data
+ */
+#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
+static void headstage_neu_append_notify_data() {
+
+    uint8_t channel = spi_rxbuf[0];
+
+    // close-reopen SPI, if the first channel received is invalid
+    if(IsFirstData){
+        // start record
+        if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
+            IsFirstData = false;
+        }
+        // restart SPI
+        else{
+            SPI_close(headstage_spi_handle);
+            ReopenSPI();
+            IsFirstData = true;
+            return;
+        }
+    }
+
+    // discard illegal channel
+    uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
+    if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
+        // illegal channel
+        return;
+    }
+
+    uint8_t not_buf[2];
+    not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
+    not_buf[1] = spi_rxbuf[2];
+
+    uint8_t data_size = headstage_notify_append_data(not_buf);
+
+    if (data_size >= BLE_NOT_BUFF_SIZE) {
+        headstage_notify_flip_buffer();
+        headstage_notify_send();
+    }
+}
+
+
 static void headstage_notify_set_timestamp() {
     not_time_stamp = headstage_time_stamp_us();
 
@@ -23,7 +72,7 @@ static void headstage_notify_set_timestamp() {
 }
 
 static void headstage_notify_flip_buffer() {
-    uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 3;
+    uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 2;
 
     headstage_notify_buffer[0] = CHIP_ID;
     headstage_notify_buffer[1] = data_count;
@@ -40,11 +89,9 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
     if (data_value == NULL) {
         headstage_notify_buffer[not_buf_offset++] = 0x00;
         headstage_notify_buffer[not_buf_offset++] = 0x00;
-        headstage_notify_buffer[not_buf_offset++] = 0x00;
     } else {
         headstage_notify_buffer[not_buf_offset++] = data_value[0];
         headstage_notify_buffer[not_buf_offset++] = data_value[1];
-        headstage_notify_buffer[not_buf_offset++] = data_value[2];
     }
 
     if (not_buf_offset >= BLE_NOT_BUFF_SIZE - 1) {

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_pin.h

@@ -79,7 +79,7 @@ static PIN_Config headstage_pin_configuration[] = {  //
     PIN_DC_DC | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
     PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
     PIN_STI_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
-    //
+    // TODO : add PIN_IRQ for STI clock to detect STI status (update LED & resend STI command if failed before)
     PIN_TERMINATE};
 
 #endif  // HEADSTAGE_PIN_UNI_H

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_pwm.h

@@ -3,7 +3,7 @@
 #ifndef HEADSTAGE_PWM_H
 #define HEADSTAGE_PWM_H
 
-#include <Board.h>
+#include <board.h>
 #include <ti/drivers/PWM.h>
 
 static PWM_Handle headstage_system_pwm_handle = NULL;

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_reset.h

@@ -19,11 +19,13 @@ static void MCUReset(){
     // SPI reset
     SPI_close(headstage_spi_handle);
     spi_state_counter = 0;
+    check_reg_counter = 0;
+
     for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
         spi_txbuf[i] = 0;
         spi_rxbuf[i] = 0;
     }
-    SPICallBack  =   ONE_SHOT_SPI;
+    SPICallBack  =   CONTI_SPI_WITH_FLUSH;
     ReopenSPI();
 
     for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
@@ -31,7 +33,7 @@ static void MCUReset(){
     }
 
     // CIS buffer reset
-    for(int i=0 ; i<BLE_CDR_SAMLL_SIZE ; i++){
+    for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++){
         cdr_buf[i] = 0;
     }
 

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_spi.h

@@ -7,7 +7,7 @@
 #error "put HEADSTAGE_MA_USE_SPI2 in predefined"
 #endif
 
-#include <Board.h>
+#include <board.h>
 #include <ti/drivers/SPI.h>
 #include <ti/drivers/dma/UDMACC26XX.h>
 #include <ti/drivers/spi/SPICC26XXDMA.h>
@@ -120,4 +120,72 @@ static void AppendSPITX(uint8_t index, uint32_t value){
     }
 }
 
+/**
+ *  @fn headstage_spi_callback
+ *
+ *  description: callback function to deal with data transmission between DBS and CC2650
+ */
+static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
+    switch(SPICallBack){
+        case CONTINUOUS_TRANS:{
+            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
+               spi_txbuf[i] = 0x00;
+            }
+            flag_notify(EVT_NEU_SPI);
+            break;
+        }
+        case FLUSH_BUFFER:{
+            SPICallBack = FLUSH_BUFFER2;
+            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
+                spi_txbuf[i] = 0x00;
+            }
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+            break;
+        }
+        case FLUSH_BUFFER2:{
+           SPICallBack = CONTI_SPI_WITH_FLUSH;
+           for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
+               spi_txbuf[i] = 0x00;
+           }
+           flag_notify(EVT_NEU_SPI);
+//           headstage_spi_transaction(SPI_BUFFER_SIZE);
+           break;
+       }
+        case CONTI_SPI_WITH_FLUSH:{
+            SPICallBack = FLUSH_BUFFER;
+            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
+                spi_txbuf[i] = 0x00;
+            }
+            headstage_spi_transaction(SPI_BUFFER_SIZE);
+            break;
+        }
+
+        case READ_MOSI:{
+            flag_notify(EVT_NEU_SPI);
+            break;
+        }
+
+        case READ_REG:{
+            check_reg_counter ++;
+            flag_notify(EVT_NEU_SPI);
+            break;
+        }
+
+        case CLOSE_SPI:{
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
+            SPI_close(headstage_spi_handle);
+            break;
+        }
+
+        case END_TRANSMIT:{
+            tx_put_u24(0, 0);
+            SPICallBack = CONTINUOUS_TRANS;
+            break;
+        }
+        default:{
+            break;
+        }
+    }
+}
+
 #endif

simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c

@@ -561,6 +561,7 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
     headstage_init_device_info();
 
     headstage_init();
+    InitDBSRegister();
 
     for (;;) {
         // Waits for a signal to the semaphore associated with the calling thread.

simplelink/ble_sdk_2_02_02_25/src/icall/app/ble_user_config.c

@@ -51,7 +51,7 @@
 
 #include "hal_types.h"
 #include "ble_user_config.h"
-#include <ti/drivers/rf/rf.h>
+#include <ti/drivers/rf/RF.h>
 
 #if defined(BLE_V42_FEATURES) && (BLE_V42_FEATURES & SECURE_CONNS_CFG)
 #include "ecc/ECCROMCC26XX.h"

simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/simple_gatt_profile.h

@@ -82,7 +82,8 @@ extern "C" {
 
 // Length of Characteristic 5 in bytes
 #define SIMPLEPROFILE_CHAR1_LEN 2
-#define SIMPLEPROFILE_CHAR2_LEN 50
+//#define SIMPLEPROFILE_CHAR2_LEN 50
+#define SIMPLEPROFILE_CHAR2_LEN 34
 #define SIMPLEPROFILE_CHAR3_LEN 20
 #define SIMPLEPROFILE_CHAR4_LEN 200
 //#define SIMPLEPROFILE_CHAR4_LEN 20