Compare commits
60 Commits
| Author | SHA1 | Date | |
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| 1d3068ac7c |
@@ -8,7 +8,7 @@ no device y=ax+b MAC a+ b+ a- b- avg
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7 c652 c652 18:04:ED:37:C6:52 2024 -7687 2086 -11283 4.88850143182858
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8 c5ed c5ed 18:04:ED:37:C5:ED 2231 -1711 2353 -70845 4.45265043545859
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9 9bef 9bef 0081F9E49BEF 2383 -8585 2415 -20347 4.2758539244186
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10 8b50 8b50 00:81:F9:E4:8B:50 2369 -11005 2360 -11797 4.30475635707671
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10 8b50 8b50 00:81:F9:E4:8B:50 2366 -5223 2402 -14971 4.35162291666667
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11 c641 c641 18:04:ED:37:C6:41 2090 4616 1997 -40665 5.07591391714942
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12 E8E6 E8E6 A4:DA:32:D4:E8:E6 2306 -88454 2418 -15140 4.2686494968089
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13 E73B E73B A4:DA:32:D4:E7:3B 2262 -564 2298 44746 4.35551198222141
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+1
-1
@@ -4,7 +4,7 @@
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#folder=$($path | awk -F"/" '{$NF}')
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folder=$(basename "$(pwd)")
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if [ "$folder" == "bioprocc2650" ]; then
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if [ "$folder" == "ti" ] ; then
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year=$(date +%-y)
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month=$(date +%-m)
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day=$(date +%-d)
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+4
-4
@@ -2,17 +2,17 @@
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<launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging">
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
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<listEntry value="/simple_peripheral_cc2650em_app"/>
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</listAttribute>
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+1
-1
@@ -19,7 +19,7 @@
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</property>
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<property Type="choicelist" Value="1" id="Debug Probe Selection">
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<choice Name="Select by serial number" value="0">
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<property Type="stringfield" Value="L1000537" id="-- Enter the serial number"/>
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<property Type="stringfield" Value="L1000628" id="-- Enter the serial number"/>
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</choice>
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</property>
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<platform XML_version="1.2" id="platform_0">
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+3
-3
@@ -3,6 +3,6 @@
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* step by the lib_search utility
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*/
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"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\host\host_pxxx.a"
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"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\ctrl\cc2640\cc2640_ctrl_pxxx_ext.a"
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"C:\ti\simplelink\ble_sdk_2_02_02_25\blelib\hci_tl\cc26xx\cc26xx_hci_tl_none_v41_v42.a"
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"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/host/host_pxxx.a"
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"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/ctrl/cc2640/cc2640_ctrl_pxxx_ext.a"
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"/home/alan/ti/simplelink/ble_sdk_2_02_02_25/blelib/hci_tl/cc26xx/cc26xx_hci_tl_none_v41_v42.a"
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+3
-3
@@ -1,6 +1,6 @@
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#
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# This file was generated based on the configuration script:
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# C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\app_ble.cfg
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# /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/app_ble.cfg
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#
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# This makefile may be included in other makefiles that need to build
|
||||
# the libraries containing the compiled source files generated as
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||||
@@ -14,9 +14,9 @@
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#
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# The absolute path to the generated source directory (at the time the
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||||
# sources were generated) is:
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# C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\src
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# /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
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#
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GEN_SRC_DIR ?= ../../config/src
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GEN_SRC_DIR ?= ../../../ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
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ifeq (,$(wildcard $(GEN_SRC_DIR)))
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$(error "ERROR: GEN_SRC_DIR must be set to the directory containing the generated sources")
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Executable → Regular
BIN
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Executable → Regular
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Executable → Regular
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Executable → Regular
+15
-15
@@ -1,29 +1,29 @@
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XOPTS = -I"C:/ti/xdctools_3_32_02_25_core/packages/" -Dxdc_target_types__=C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
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XOPTS = -I"/home/alan/ti/xdctools_3_32_01_22_core/packages/" -Dxdc_target_types__=/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
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vpath % C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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vpath %.c C:/ti/xdctools_3_32_02_25_core/packages/
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vpath % /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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vpath %.c /home/alan/ti/xdctools_3_32_01_22_core/packages/
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CCOPTS = --endian=little -mv7M3 --abi=eabi -q -ms --opt_for_speed=0 --program_level_compile -o3 -g --optimize_with_debug -Dti_sysbios_knl_Task_minimizeLatency__D=FALSE -Dti_sysbios_family_arm_cc26xx_Boot_driverlibVersion=2 -Dti_sysbios_knl_Clock_stopCheckNext__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_enableException__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_disablePriority__D=32U -Dti_sysbios_family_arm_m3_Hwi_numSparseInterrupts__D=0U
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XDC_ROOT = C:/ti/xdctools_3_32_02_25_core/packages/
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XDC_ROOT = /home/alan/ti/xdctools_3_32_01_22_core/packages/
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BIOS_ROOT = C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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BIOS_ROOT = /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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BIOS_DEFS = -Dti_sysbios_BIOS_swiEnabled__D=TRUE -Dti_sysbios_BIOS_taskEnabled__D=TRUE -Dti_sysbios_BIOS_clockEnabled__D=TRUE -Dti_sysbios_BIOS_runtimeCreatesEnabled__D=TRUE -Dti_sysbios_knl_Task_moduleStateCheckFlag__D=FALSE -Dti_sysbios_knl_Task_objectCheckFlag__D=FALSE -Dti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Swi_DISABLE_ALL_HOOKS -Dti_sysbios_BIOS_smpEnabled__D=FALSE -Dti_sysbios_Build_useHwiMacros -Dti_sysbios_knl_Swi_numPriorities__D=6 -Dti_sysbios_knl_Task_deleteTerminatedTasks__D=FALSE -Dti_sysbios_knl_Task_numPriorities__D=6 -Dti_sysbios_knl_Task_checkStackFlag__D=FALSE -Dti_sysbios_knl_Task_initStackFlag__D=TRUE -Dti_sysbios_knl_Task_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Clock_TICK_SOURCE=ti_sysbios_knl_Clock_TickSource_TIMER -Dti_sysbios_knl_Clock_TICK_MODE=ti_sysbios_knl_Clock_TickMode_DYNAMIC -Dti_sysbios_hal_Core_delegate_getId=ti_sysbios_hal_CoreNull_getId__E -Dti_sysbios_hal_Core_delegate_interruptCore=ti_sysbios_hal_CoreNull_interruptCore__E -Dti_sysbios_hal_Core_delegate_lock=ti_sysbios_hal_CoreNull_lock__E -Dti_sysbios_hal_Core_delegate_unlock=ti_sysbios_hal_CoreNull_unlock__E -Dti_sysbios_hal_Core_numCores__D=1 -Dti_sysbios_hal_CoreNull_numCores__D=1 -Dti_sysbios_utils_Load_taskEnabled__D=TRUE -Dti_sysbios_utils_Load_swiEnabled__D=FALSE -Dti_sysbios_utils_Load_hwiEnabled__D=FALSE -Dti_sysbios_family_arm_m3_Hwi_dispatcherSwiSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherTaskSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherAutoNestingSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherIrpTrackingSupport__D=TRUE -Dti_sysbios_knl_Semaphore_supportsEvents__D=FALSE -Dti_sysbios_knl_Semaphore_supportsPriority__D=FALSE -Dxdc_runtime_Assert_DISABLE_ALL -Dxdc_runtime_Log_DISABLE_ALL
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BIOS_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
|
||||
BIOS_INC = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
|
||||
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TARGET_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
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TARGET_INC = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
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||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="/home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -I/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
|
||||
CC = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
|
||||
ASM = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
|
||||
AR = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armar rq
|
||||
CC = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
ASM = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
AR = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armar rq
|
||||
|
||||
DEL = C:/ti/xdctools_3_32_02_25_core/packages/../bin/rm -f
|
||||
CP = C:/ti/xdctools_3_32_02_25_core/packages/../bin/cp -f
|
||||
DEL = rm -f
|
||||
CP = cp -f
|
||||
|
||||
define RM
|
||||
$(if $(wildcard $1),$(DEL) $1,:)
|
||||
@@ -100,8 +100,8 @@ rom_sysbios.obj: BIOS.c knl/Clock.c knl/Idle.c knl/Intrinsics.c knl/Event.c knl/
|
||||
rom_sysbios.aem3: rom_sysbios.obj m3_Hwi_asm.obj m3_Hwi_asm_switch.obj m3_IntrinsicsSupport_asm.obj m3_TaskSupport_asm.obj
|
||||
@-$(call RM, $@)
|
||||
@echo arem3 $^ ...
|
||||
@$(AR) $@ $^ C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
|
||||
@$(AR) $@ $^ /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
|
||||
|
||||
clean:
|
||||
@$(DEL) ..\makefile.libs
|
||||
@$(DEL) ../makefile.libs
|
||||
@-$(call RM, *)
|
||||
|
||||
Executable → Regular
BIN
Binary file not shown.
Executable → Regular
BIN
Binary file not shown.
@@ -146,6 +146,7 @@ extern const PIN_Config BoardGpioInitTable[];
|
||||
#define Board_GLED PIN_UNASSIGNED /* Green LED */
|
||||
#define Board_RLED PIN_UNASSIGNED /* Red LED */
|
||||
|
||||
|
||||
/* UART Board */
|
||||
#define Board_UART_TX Board_BP_UART_Rx /* RXD */
|
||||
#define Board_UART_RX Board_BP_UART_Tx /* TXD */
|
||||
|
||||
@@ -106,7 +106,7 @@
|
||||
*/
|
||||
|
||||
#ifdef USE_ICALL
|
||||
#include <ICall.h>
|
||||
#include <icall.h>
|
||||
|
||||
typedef ICall_CSState halIntState_t;
|
||||
|
||||
|
||||
+1
-1
@@ -55,7 +55,7 @@
|
||||
#include <inc/hw_aon_rtc.h>
|
||||
#include <driverlib/aon_rtc.h>
|
||||
#include <driverlib/aon_event.h>
|
||||
#include "ICall.h"
|
||||
#include "icall.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* MACROS
|
||||
|
||||
@@ -48,7 +48,7 @@
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "ICall.h"
|
||||
#include "icall.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@@ -55,7 +55,7 @@ extern "C"
|
||||
// includes
|
||||
// ****************************************************************************
|
||||
#include "hal_types.h"
|
||||
#include "OSAL.h"
|
||||
#include "osal.h"
|
||||
|
||||
// ****************************************************************************
|
||||
// defines
|
||||
|
||||
@@ -75,7 +75,7 @@
|
||||
#ifdef ICALL_JT
|
||||
#include "icall_JT.h"
|
||||
#else
|
||||
#include <ICall.h>
|
||||
#include <icall.h>
|
||||
#endif /* ICALL_JT */
|
||||
#endif /* USE_ICALL */
|
||||
|
||||
@@ -405,7 +405,7 @@ uint32 osal_build_uint32( uint8 *swapped, uint8 len )
|
||||
unsigned char * _ltoa(unsigned long l, unsigned char *buf, unsigned char radix)
|
||||
{
|
||||
#if defined (__TI_COMPILER_VERSION) || defined (__TI_COMPILER_VERSION__)
|
||||
return ( (unsigned char*)ltoa( l, (char *)buf ) );
|
||||
return ( (unsigned char*)ltoa( l, (char *)buf, radix ) );
|
||||
#elif defined( __GNUC__ )
|
||||
return ( (char*)ltoa( l, buf, radix ) );
|
||||
#else
|
||||
|
||||
@@ -47,8 +47,8 @@
|
||||
Release Date: 2018-04-02 18:03:35
|
||||
*****************************************************************************/
|
||||
|
||||
#include "OSAL.h"
|
||||
#include "OSAL_Tasks.h"
|
||||
#include "osal.h"
|
||||
#include "osal_tasks.h"
|
||||
|
||||
#include "hal_mcu.h"
|
||||
#include "osal_cbtimer.h"
|
||||
|
||||
@@ -51,13 +51,13 @@
|
||||
*/
|
||||
|
||||
#include "comdef.h"
|
||||
#include "OSAL.h"
|
||||
#include "OSAL_Memory.h"
|
||||
#include "osal.h"
|
||||
#include "osal_memory.h"
|
||||
|
||||
#ifdef ICALL_JT
|
||||
#include "icall_JT.h"
|
||||
#else
|
||||
#include <ICall.h>
|
||||
#include <icall.h>
|
||||
#endif /* ICALL_JT */
|
||||
|
||||
/**************************************************************************************************
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#ifdef ICALL_JT
|
||||
#include "icall_JT.h"
|
||||
#else
|
||||
#include <ICall.h>
|
||||
#include <icall.h>
|
||||
#endif /* ICALL_JT */
|
||||
#endif /* USE_ICALL */
|
||||
|
||||
|
||||
@@ -62,11 +62,11 @@ extern "C"
|
||||
#include <limits.h>
|
||||
|
||||
#include "comdef.h"
|
||||
#include "OSAL_Memory.h"
|
||||
#include "OSAL_Timers.h"
|
||||
#include "osal_memory.h"
|
||||
#include "osal_timers.h"
|
||||
|
||||
#ifdef USE_ICALL
|
||||
#include <ICall.h>
|
||||
#include <icall.h>
|
||||
#endif /* USE_ICALL */
|
||||
|
||||
/*********************************************************************
|
||||
|
||||
@@ -80,7 +80,7 @@ the last entry in the page (higher memory address).
|
||||
#include "hal_flash.h"
|
||||
#include "hal_types.h"
|
||||
#include "pwrmon.h"
|
||||
#include "OSAL.h"
|
||||
#include "osal.h"
|
||||
#include "osal_snv.h"
|
||||
#include "hal_assert.h"
|
||||
#include <driverlib/vims.h>
|
||||
|
||||
@@ -52,7 +52,7 @@
|
||||
|
||||
#include <inc/hw_fcfg1.h>
|
||||
|
||||
#include "Board.h"
|
||||
#include "board.h"
|
||||
|
||||
// RF Driver
|
||||
#include <ti/drivers/rf/RF.h>
|
||||
|
||||
+10
-6
@@ -114,9 +114,11 @@ typedef enum {
|
||||
static bool STI = false;
|
||||
static bool IsFirstData = true;
|
||||
static uint8_t spi_state_counter = 0;
|
||||
static uint8_t check_reg_counter = 0;
|
||||
static bool ConnectState = false;
|
||||
static bool ErrorRestart = false;
|
||||
static SPI_CB_MODE SPICallBack;
|
||||
static uint8 adc_spi_en_switch = 1;
|
||||
|
||||
/*
|
||||
* Let C = command, S = status;
|
||||
@@ -212,7 +214,7 @@ extern ICall_Semaphore semaphore;
|
||||
// command return characteristic
|
||||
#define BLE_CDR_BUFF_CHAR SIMPLEPROFILE_CHAR2
|
||||
#define BLE_CDR_BUFF_SIZE SIMPLEPROFILE_CHAR2_LEN
|
||||
#define BLE_CDR_SAMLL_SIZE 10
|
||||
#define BLE_CDR_SMALL_SIZE 10
|
||||
|
||||
// instruction input characteristic
|
||||
#define BLE_INS_BUFF_CHAR SIMPLEPROFILE_CHAR3
|
||||
@@ -238,15 +240,17 @@ extern ICall_Semaphore semaphore;
|
||||
#define INS_TYPE_CIS 0x70
|
||||
|
||||
// VIS operator
|
||||
#define VIS_INT 0x60
|
||||
#define VIS_RST 0xF0
|
||||
#define VIS_START 0xC0
|
||||
#define VIS_REC 0x10
|
||||
#define VIS_STI 0x20
|
||||
#define VIS_STOP_REC 0x30
|
||||
#define VIS_STOP_STI 0x40
|
||||
#define VIS_CAL 0xA0
|
||||
#define VIS_ASK 0x50
|
||||
#define VIS_INT 0x60
|
||||
#define VIS_FAST_SET 0x70
|
||||
#define VIS_EN_ADC_CLK 0x80
|
||||
#define VIS_CAL 0xA0
|
||||
#define VIS_START 0xC0
|
||||
#define VIS_RST 0xF0
|
||||
|
||||
|
||||
// CIS operator
|
||||
@@ -352,7 +356,7 @@ static uint16_t CONNECT_HANDLE = 0;
|
||||
/**
|
||||
* command instruction buffer
|
||||
*/
|
||||
static uint8_t cdr_buf[BLE_CDR_SAMLL_SIZE] = {0};
|
||||
static uint8_t cdr_buf[BLE_CDR_SMALL_SIZE] = {0};
|
||||
|
||||
/*====================
|
||||
==== event table ====
|
||||
|
||||
+4
-5
@@ -27,14 +27,14 @@ static void SendCaliValue(uint8_t CaliNumber){
|
||||
|
||||
// ch = 2 * (CaliNumber % 4);
|
||||
// uint8_t gain_level = CaliNumber / 4; // 0:gain, 1:offset
|
||||
uint8_t channel_number = 8, index = 1;
|
||||
uint8_t channel_number = 8, index = 2;
|
||||
uint8_t gain_level = 0;
|
||||
|
||||
if(CaliNumber < 4){
|
||||
gain_level = CaliNumber;
|
||||
}
|
||||
|
||||
cali_buf[0] = CHIP_ID;
|
||||
cali_buf[1] = CHIP_ID;
|
||||
for(int i=0 ; i<channel_number ; i++){
|
||||
cali_buf[index++] = (uint8_t) (CaliTable.Ch[i].Gain[gain_level] >> 8) & 0xFF;
|
||||
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Gain[gain_level] & 0x00FF;
|
||||
@@ -42,9 +42,8 @@ static void SendCaliValue(uint8_t CaliNumber){
|
||||
cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Offset[gain_level] & 0x00FF;
|
||||
}
|
||||
|
||||
// for(int i=1 ; i<BLE_CDR_BUFF_SIZE ; i++){
|
||||
// cali_buf[i] = i;
|
||||
// }
|
||||
cali_buf[0] = index - 1;
|
||||
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, index, cali_buf);
|
||||
}
|
||||
|
||||
|
||||
+3
-1
@@ -2,7 +2,9 @@
|
||||
#ifndef NEU_CALI_TABLE
|
||||
#define NEU_CALI_TABLE
|
||||
|
||||
#define BOARD_TEST
|
||||
// define Device_Name if "BOARD_TEST" as default
|
||||
// else find headstage ID
|
||||
#define BOARD_18_04_ED_37_C6_52
|
||||
|
||||
typedef struct _SingleChannelCali{
|
||||
uint16_t Gain[4];
|
||||
|
||||
+18
-9
@@ -14,20 +14,29 @@ static uint8_t check_ins(uint16_t trans_ins){
|
||||
}
|
||||
|
||||
static void check_register(uint8_t register_to_check, uint16_t instruction_to_fit, NEU_WORK_STATE next_state){
|
||||
if(spi_state_counter < 6){
|
||||
if(check_reg_counter < 6){
|
||||
SPICallBack = CONTINUOUS_TRANS;
|
||||
spi_txbuf[0] = register_to_check & 0x7F;
|
||||
spi_txbuf[1] = register_to_check;
|
||||
spi_txbuf[2] = register_to_check;
|
||||
spi_txbuf[1] = rec_sti_command;
|
||||
spi_txbuf[2] = check_reg_counter;
|
||||
|
||||
spi_state_counter ++;
|
||||
check_reg_counter ++;
|
||||
headstage_spi_transaction(3);
|
||||
}
|
||||
else{
|
||||
spi_state_counter = 0;
|
||||
check_reg_counter = 0;
|
||||
if(check_ins(instruction_to_fit)){
|
||||
NEULIVE_STATE.state = next_state;
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
|
||||
// update rec_sti_command
|
||||
if(!(rec_sti_command & ENABLE_STI)){
|
||||
// close STI success
|
||||
rec_sti_command &= ~STATUS_STI;
|
||||
}
|
||||
// if(rec_sti_command & ENABLE_STI){
|
||||
// rec_sti_command |= STATUS_STI;
|
||||
// }
|
||||
}
|
||||
else{
|
||||
// resend instruction
|
||||
@@ -163,17 +172,17 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
|
||||
}
|
||||
|
||||
static uint8_t check_sti_register(uint8_t address, uint16_t instruction_to_fit){
|
||||
spi_state_counter = 0;
|
||||
while(spi_state_counter < 6){
|
||||
check_reg_counter = 0;
|
||||
while(check_reg_counter < 6){
|
||||
SPICallBack = READ_REG;
|
||||
spi_txbuf[0] = address & 0x7F;
|
||||
spi_txbuf[1] = address;
|
||||
spi_txbuf[2] = address;
|
||||
|
||||
headstage_spi_transaction(3); // spi_state_counter++ would be executed in SPI callback
|
||||
headstage_spi_transaction(3); // check_reg_counter++ would be executed in SPI callback
|
||||
}
|
||||
|
||||
spi_state_counter = 0;
|
||||
check_reg_counter = 0;
|
||||
|
||||
// success = 1; failed = 0
|
||||
return check_ins(instruction_to_fit);
|
||||
|
||||
+164
@@ -0,0 +1,164 @@
|
||||
|
||||
#ifndef DBS_OBJECT_H
|
||||
#define DBS_OBJECT_H
|
||||
|
||||
#include "neu/headstage_spi.h"
|
||||
|
||||
#define SYS_RESERVED_INDEX 0
|
||||
#define SYS_GENERAL_ENABLE_INDEX 1
|
||||
#define SYS_LNA_BIOS1_INDEX 2
|
||||
#define SYS_LNA_BIOS2_INDEX 3
|
||||
|
||||
#define REC_CHANNEL_INDEX 0
|
||||
#define REC_GAIN_INDEX 1
|
||||
#define REC_ADC_CLOCK_INDEX 2
|
||||
|
||||
#define STI_ENABLE_INDEX 0
|
||||
#define STI_AMP_POS_INDEX 1
|
||||
#define STI_AMP_NEG_INDEX 2
|
||||
#define STI_POLARITY_INDEX 3
|
||||
#define STI_CYCLE_CH01_INDEX 4
|
||||
#define STI_CYCLE_CH23_INDEX 5
|
||||
#define STI_CYCLE_CH45_INDEX 6
|
||||
#define STI_CYCLE_CH67_INDEX 7
|
||||
#define STI_CLK_RATIO_INDEX 8
|
||||
#define STI_ARBITRARY_EN_INDEX 9
|
||||
#define STI_MODE_INDEX 10
|
||||
#define STI_DURATION0_INDEX 11
|
||||
#define STI_DURATION1_INDEX 12
|
||||
#define STI_DURATION2_INDEX 13
|
||||
#define STI_DURATION3_INDEX 14
|
||||
|
||||
//#define DBS_REGISTER \
|
||||
// uint8_t address; \
|
||||
// void (*write_reg) (DBSRegister *self, uint32_t reg_value); \
|
||||
// uint32_t (*read_reg) (DBSRegister *self)
|
||||
|
||||
typedef struct _DBSRegister{
|
||||
uint8_t address;
|
||||
bool WriteRegister, CheckRegister;
|
||||
void (*write_reg) (struct _DBSRegister *self, uint16_t reg_value);
|
||||
void (*read_reg) (struct _DBSRegister *self);
|
||||
}DBSRegister;
|
||||
|
||||
void write_reg(DBSRegister *self, uint16_t reg_value){
|
||||
spi_txbuf[0] = 0x80 | self->address;
|
||||
spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
|
||||
spi_txbuf[2] = reg_value & 0xFF;
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
void read_reg(DBSRegister *self){
|
||||
spi_txbuf[0] = 0x7F & self->address;
|
||||
spi_txbuf[1] = 0x7F & self->address; // it's don't care actually
|
||||
spi_txbuf[2] = 0x7F & self->address; // it's don't care actually
|
||||
SPICallBack = READ_REG;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
|
||||
static uint16_t sys_register_default_value[4] = {
|
||||
0x0000,
|
||||
0x40F2,
|
||||
0x0210,
|
||||
0x4210
|
||||
};
|
||||
static uint16_t rec_register_value[3];
|
||||
static uint16_t sti_register_value[43];
|
||||
|
||||
static DBSRegister sys_register[4];
|
||||
static DBSRegister rec_register[3];
|
||||
static DBSRegister sti_register[43];
|
||||
|
||||
static void InitSysRegister(){
|
||||
sys_register[SYS_RESERVED_INDEX].address = 0x00;
|
||||
sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
|
||||
sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
|
||||
sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
|
||||
|
||||
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
|
||||
sys_register[i].WriteRegister = false;
|
||||
sys_register[i].CheckRegister = false;
|
||||
sys_register[i].write_reg = &write_reg;
|
||||
sys_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitRecRegister(){
|
||||
rec_register[REC_CHANNEL_INDEX].address = 48;
|
||||
rec_register[REC_GAIN_INDEX].address = 49;
|
||||
rec_register[REC_ADC_CLOCK_INDEX].address = 51; // sampling rate
|
||||
|
||||
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
|
||||
rec_register[i].WriteRegister = false;
|
||||
rec_register[i].CheckRegister = false;
|
||||
rec_register[i].write_reg = &write_reg;
|
||||
rec_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitStiRegister(){
|
||||
sti_register[STI_ENABLE_INDEX].address = 46;
|
||||
sti_register[STI_AMP_POS_INDEX].address = 37;
|
||||
sti_register[STI_AMP_NEG_INDEX].address = 38;
|
||||
sti_register[STI_POLARITY_INDEX].address = 40;
|
||||
sti_register[STI_CYCLE_CH01_INDEX].address = 42;
|
||||
sti_register[STI_CYCLE_CH23_INDEX].address = 43;
|
||||
sti_register[STI_CYCLE_CH45_INDEX].address = 44;
|
||||
sti_register[STI_CYCLE_CH67_INDEX].address = 45;
|
||||
sti_register[STI_CLK_RATIO_INDEX].address = 52;
|
||||
sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
|
||||
sti_register[STI_MODE_INDEX].address = 56;
|
||||
|
||||
for(int ch=0 ; ch<8 ; ch++){
|
||||
sti_register[ch*4 + STI_DURATION0_INDEX].address = ch*4 + 1;
|
||||
sti_register[ch*4 + STI_DURATION1_INDEX].address = ch*4 + 2;
|
||||
sti_register[ch*4 + STI_DURATION2_INDEX].address = ch*4 + 3;
|
||||
sti_register[ch*4 + STI_DURATION3_INDEX].address = ch*4 + 4;
|
||||
}
|
||||
|
||||
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
|
||||
sti_register[i].WriteRegister = false;
|
||||
sti_register[i].CheckRegister = false;
|
||||
sti_register[i].write_reg = &write_reg;
|
||||
sti_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitDBSRegister(){
|
||||
InitSysRegister();
|
||||
InitRecRegister();
|
||||
InitStiRegister();
|
||||
|
||||
// for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
|
||||
for(int i=1 ; i<4 ; i++){
|
||||
sys_register[i].WriteRegister = true;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
}
|
||||
|
||||
static void ResetDBSRegister(){
|
||||
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
|
||||
sys_register[i].WriteRegister = false;
|
||||
sys_register[i].CheckRegister = false;
|
||||
sys_register[i].write_reg = &write_reg;
|
||||
sys_register[i].read_reg = &read_reg;
|
||||
}
|
||||
|
||||
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
|
||||
rec_register[i].WriteRegister = false;
|
||||
rec_register[i].CheckRegister = false;
|
||||
rec_register[i].write_reg = &write_reg;
|
||||
rec_register[i].read_reg = &read_reg;
|
||||
}
|
||||
|
||||
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
|
||||
sti_register[i].WriteRegister = false;
|
||||
sti_register[i].CheckRegister = false;
|
||||
sti_register[i].write_reg = &write_reg;
|
||||
sti_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
+1
-1
@@ -133,7 +133,7 @@ static uint8_t headstage_led_set_color(uint16_t *ins_buf, uint8_t repeat, uint8_
|
||||
|
||||
#ifdef HEADSTAGE_LED_USE_SPI
|
||||
|
||||
#include <Board.h>
|
||||
#include <board.h>
|
||||
#include <ti/drivers/SPI.h>
|
||||
#include <ti/drivers/dma/UDMACC26XX.h>
|
||||
#include <ti/drivers/spi/SPICC26XXDMA.h>
|
||||
|
||||
+459
-154
@@ -160,13 +160,17 @@ static void FlushNotify();
|
||||
#define NEU_REC_PARAM 0x20
|
||||
#define NEU_MULTI_STI 0x40
|
||||
#define NEU_TEST_INS 0x60
|
||||
#define RIS_STOP_STI 0x80
|
||||
#define RIS_REC_ON_CHANGE 0x80
|
||||
#define RIS_STI_ON_CHANGE 0xA0
|
||||
|
||||
/** event */
|
||||
#define EVT_NEU_SPI 0x0001 /**< spi transaction event */
|
||||
#define EVT_NEU_LED 0x0002 /**< set led event */
|
||||
#define EVT_NEU_CHECK 0x0004 /**< check neulive single instruction */
|
||||
#define EVT_NEU_REG_SPI 0x0008 /** register spi event */
|
||||
#define EVT_NEU_PREPARE 0x0010 /** prepare to record or stimulate **/
|
||||
#define EVT_NEU_REC 0x0020
|
||||
#define EVT_NEU_STI 0x0040
|
||||
|
||||
/** clock setting */
|
||||
#define NEU_SYS_CLK 2000000 /**< 10Mhz */
|
||||
@@ -298,7 +302,7 @@ typedef enum{
|
||||
#include "string.h"
|
||||
#include "headstage_rec_ins.h"
|
||||
#include "headstage_sti_ins.h"
|
||||
|
||||
#include "headstage_dbs_object.h"
|
||||
|
||||
/*
|
||||
* todo: need to define some procedure to detect this device status
|
||||
@@ -338,53 +342,8 @@ static void headstage_init() {
|
||||
#undef THREE_POINT_THREE_VOLT
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_append_notify_data
|
||||
*/
|
||||
#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
|
||||
static void headstage_neu_append_notify_data() {
|
||||
|
||||
uint8_t channel = spi_rxbuf[0];
|
||||
|
||||
// close-reopen SPI, if the first channel received is invalid
|
||||
if(IsFirstData){
|
||||
// start record
|
||||
if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
|
||||
IsFirstData = false;
|
||||
}
|
||||
// restart SPI
|
||||
else{
|
||||
SPI_close(headstage_spi_handle);
|
||||
ReopenSPI();
|
||||
IsFirstData = true;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// discard illegal channel
|
||||
// uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
|
||||
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
|
||||
// illegal channel
|
||||
return;
|
||||
}
|
||||
|
||||
uint8_t not_buf[3];
|
||||
not_buf[0] = channel; // ch
|
||||
not_buf[1] = spi_rxbuf[1];
|
||||
not_buf[2] = spi_rxbuf[2];
|
||||
|
||||
// not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
|
||||
// not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
|
||||
|
||||
uint8_t data_size = headstage_notify_append_data(not_buf);
|
||||
|
||||
if (data_size >= BLE_NOT_BUFF_SIZE) {
|
||||
headstage_notify_flip_buffer();
|
||||
headstage_notify_send();
|
||||
}
|
||||
}
|
||||
|
||||
static void headstage_neu_state_spi();
|
||||
static void headstage_neu_spi();
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_event
|
||||
@@ -393,93 +352,27 @@ static void headstage_neu_state_spi();
|
||||
*/
|
||||
|
||||
static void headstage_neu_event() {
|
||||
if (EVENT_MASK == 0) {
|
||||
// fast return
|
||||
return;
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_NEU_SPI)) {
|
||||
flag_disable(EVT_NEU_SPI);
|
||||
headstage_neu_state_spi();
|
||||
// headstage_neu_state_spi();
|
||||
headstage_neu_spi();
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_NEU_LED)) {
|
||||
flag_disable(EVT_NEU_LED); /** reserved to set led power and set color manually */
|
||||
}
|
||||
|
||||
if (EVENT_MASK == 0) {
|
||||
// fast return
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_DISCONNECTED)) {
|
||||
ConnectState = false;
|
||||
headstage_update_vis_instruction(VIS_INT);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_spi_callback
|
||||
*
|
||||
* description: callback function to deal with data transmission between DBS and CC2650
|
||||
*/
|
||||
|
||||
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
|
||||
switch(SPICallBack){
|
||||
case CONTINUOUS_TRANS:{
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER:{
|
||||
SPICallBack = FLUSH_BUFFER2;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER2:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
// headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case ONE_SHOT_SPI:{
|
||||
SPICallBack = FLUSH_BUFFER;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_MOSI:{
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_REG:{
|
||||
spi_state_counter ++;
|
||||
break;
|
||||
}
|
||||
|
||||
case CLOSE_SPI:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
SPI_close(headstage_spi_handle);
|
||||
break;
|
||||
}
|
||||
|
||||
case END_TRANSMIT:{
|
||||
tx_put_u24(0, 0);
|
||||
SPICallBack = CONTINUOUS_TRANS;
|
||||
break;
|
||||
}
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_update_ris_instruction
|
||||
*
|
||||
@@ -515,20 +408,24 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
|
||||
|
||||
case NEU_MULTI_STI: {
|
||||
uint8_t ch = instruction[1];
|
||||
uint8_t sti_cycles = instruction[2];
|
||||
INSTRUCTION.sti_t1[ch] = (instruction[3] << 8) | instruction[4];
|
||||
INSTRUCTION.sti_t2[ch] = (instruction[5] << 8) | instruction[6];
|
||||
INSTRUCTION.sti_t3[ch] = (instruction[7] << 8) | instruction[8];
|
||||
INSTRUCTION.sti_t4[ch] = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
|
||||
INSTRUCTION.sti_t5[ch] = (instruction[12] << 8) | instruction[13];
|
||||
INSTRUCTION.current_sti_cycle[ch] = sti_cycles;
|
||||
// uint8_t sti_cycles = instruction[2];
|
||||
// INSTRUCTION.sti_t1[ch] = (instruction[3] << 8) | instruction[4];
|
||||
// INSTRUCTION.sti_t2[ch] = (instruction[5] << 8) | instruction[6];
|
||||
// INSTRUCTION.sti_t3[ch] = (instruction[7] << 8) | instruction[8];
|
||||
// INSTRUCTION.sti_t4[ch] = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
|
||||
// INSTRUCTION.sti_t5[ch] = (instruction[12] << 8) | instruction[13];
|
||||
// INSTRUCTION.current_sti_cycle[ch] = sti_cycles;
|
||||
|
||||
for(int i=0 ; i<8 ; i++){
|
||||
uint8_t sti_cycles = instruction[2];
|
||||
INSTRUCTION.sti_t1[i] = (instruction[3] << 8) | instruction[4];
|
||||
INSTRUCTION.sti_t2[i] = (instruction[5] << 8) | instruction[6];
|
||||
INSTRUCTION.sti_t3[i] = (instruction[7] << 8) | instruction[8];
|
||||
INSTRUCTION.sti_t4[i] = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
|
||||
INSTRUCTION.sti_t5[i] = (instruction[12] << 8) | instruction[13];
|
||||
INSTRUCTION.current_sti_cycle[i] = sti_cycles;
|
||||
}
|
||||
|
||||
// INSTRUCTION.sti_t1[n_ch] = (instruction[3] << 8) | instruction[4];
|
||||
// INSTRUCTION.sti_t2[n_ch] = (instruction[5] << 8) | instruction[6];
|
||||
// INSTRUCTION.sti_t3[n_ch] = (instruction[7] << 8) | instruction[8];
|
||||
// INSTRUCTION.sti_t4[n_ch] = (0x00 << 24) | (instruction[9] << 16) | (instruction[10] << 8) | instruction[11];
|
||||
// INSTRUCTION.sti_t5[n_ch] = (instruction[12] << 8) | instruction[13];
|
||||
// INSTRUCTION.current_sti_cycle[n_ch] = sti_cycles;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -610,6 +507,123 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
|
||||
break;
|
||||
}
|
||||
|
||||
case RIS_REC_ON_CHANGE:{
|
||||
uint16_t reg_value = instruction[2] << 8 | instruction[3];
|
||||
switch(instruction[1]){
|
||||
case REC_CHANNEL_INDEX:{
|
||||
rec_register[REC_CHANNEL_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_CHANNEL_INDEX] = reg_value;
|
||||
INSTRUCTION.recording_channel = reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case REC_GAIN_INDEX:{
|
||||
rec_register[REC_GAIN_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_GAIN_INDEX] = reg_value;
|
||||
// flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case REC_ADC_CLOCK_INDEX:{
|
||||
rec_register[REC_ADC_CLOCK_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_ADC_CLOCK_INDEX] = reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case RIS_STI_ON_CHANGE:{
|
||||
uint16_t sti_reg_value = instruction[2] << 8 | instruction[3];
|
||||
switch(instruction[1]){
|
||||
case STI_ENABLE_INDEX:{
|
||||
sti_register_value[STI_ENABLE_INDEX] = sti_reg_value;
|
||||
INSTRUCTION.sti_channel = sti_reg_value;
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_AMP_POS_INDEX:{
|
||||
sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_AMP_POS_INDEX] = sti_reg_value;
|
||||
|
||||
// pos, neg amplitude should be same at this DBS version
|
||||
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
|
||||
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_AMP_NEG_INDEX:{
|
||||
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_AMP_NEG_INDEX] = sti_reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_POLARITY_INDEX:{
|
||||
sti_register[STI_POLARITY_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_POLARITY_INDEX] = sti_reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_MODE_INDEX:{
|
||||
sti_register[STI_MODE_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_MODE_INDEX] = instruction[2];
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_CYCLE_CH01_INDEX:{
|
||||
sti_register[STI_CYCLE_CH01_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_CYCLE_CH01_INDEX] = sti_reg_value;
|
||||
sti_register[STI_CYCLE_CH23_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_CYCLE_CH23_INDEX] = sti_reg_value;
|
||||
sti_register[STI_CYCLE_CH45_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_CYCLE_CH45_INDEX] = sti_reg_value;
|
||||
sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
|
||||
sti_register_value[STI_CYCLE_CH67_INDEX] = sti_reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case STI_DURATION0_INDEX:{
|
||||
uint16_t t1 = instruction[2] << 8 | instruction[3]; // t1 is 10 bits
|
||||
uint16_t t2 = instruction[4] << 8 | instruction[5]; // t2 is 10 bits
|
||||
uint16_t t3 = instruction[6] << 8 | instruction[7]; // t3 is 10 bits
|
||||
uint32_t t4 = instruction[8] << 16 | instruction[9] << 8 | instruction[10]; // t4 is 17 bits
|
||||
uint16_t t5 = instruction[11] << 8 | instruction[12]; // t5 is 10 bits
|
||||
|
||||
for(int ch=0 ; ch<8 ; ch++){
|
||||
sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
|
||||
sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
|
||||
|
||||
sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
|
||||
sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF) << 4 | (t2 & 0x03C0) >> 6;
|
||||
|
||||
sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
|
||||
sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
|
||||
|
||||
sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
|
||||
sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
default: {
|
||||
break;
|
||||
}
|
||||
@@ -635,6 +649,65 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
|
||||
/**< stop spi transaction */
|
||||
break; /**< reset all the parameter */
|
||||
}
|
||||
|
||||
case VIS_FAST_SET:{
|
||||
uint8_t ch = 7;
|
||||
uint8_t t1=25, t2=0, t3=25 , t4=0, t5=0;
|
||||
|
||||
// using ch8 to fast settle
|
||||
INSTRUCTION.sti_channel = 0b0000000010000000;
|
||||
sti_register_value[STI_ENABLE_INDEX] = 0b0000000010000000; // 0bxxxx_xxxv_cccc_cccc, c = current; v = volt, x = don't care
|
||||
sti_register[STI_ENABLE_INDEX].WriteRegister = true;
|
||||
|
||||
// setting t1~t5
|
||||
sti_register_value[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
|
||||
sti_register_value[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF) << 4 | (t2 & 0x03C0) >> 6;
|
||||
sti_register_value[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
|
||||
sti_register_value[ch*4 + STI_DURATION3_INDEX] = t5;
|
||||
sti_register[ch*4 + STI_DURATION0_INDEX].WriteRegister = true;
|
||||
sti_register[ch*4 + STI_DURATION1_INDEX].WriteRegister = true;
|
||||
sti_register[ch*4 + STI_DURATION2_INDEX].WriteRegister = true;
|
||||
sti_register[ch*4 + STI_DURATION3_INDEX].WriteRegister = true;
|
||||
|
||||
// cycle number
|
||||
sti_register_value[STI_CYCLE_CH67_INDEX] = 10 << 8 | 0;
|
||||
sti_register[STI_CYCLE_CH67_INDEX].WriteRegister = true;
|
||||
|
||||
// set polarity, it's don't care in fast settle
|
||||
sti_register_value[STI_POLARITY_INDEX] = 0;
|
||||
sti_register[STI_POLARITY_INDEX].WriteRegister = true;
|
||||
|
||||
// set stimulate mode
|
||||
sti_register_value[STI_MODE_INDEX] = 0;
|
||||
sti_register[STI_MODE_INDEX].WriteRegister = true;
|
||||
// INSTRUCTION.sti_mode = 0; // 1 = continuous mode; 0 = limit mode
|
||||
// INSTRUCTION.sti_h_bridge = 0; // voltage sti must use H-bridge
|
||||
// INSTRUCTION.sti_ref = 0; // 1 = GND; 0 = Vref
|
||||
|
||||
// using minimum amplitude
|
||||
sti_register_value[STI_AMP_POS_INDEX] = 0;
|
||||
sti_register_value[STI_AMP_NEG_INDEX] = 0;
|
||||
sti_register[STI_AMP_POS_INDEX].WriteRegister = true;
|
||||
sti_register[STI_AMP_NEG_INDEX].WriteRegister = true;
|
||||
|
||||
rec_sti_command |= ENABLE_STI;
|
||||
|
||||
// is neu wording now?
|
||||
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
|
||||
// nothing to do
|
||||
}
|
||||
else{
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case VIS_EN_ADC_CLK:{
|
||||
adc_spi_en_switch ^= 1;
|
||||
headstage_pin_output(PIN_EN_ADC_SPI_CLK, adc_spi_en_switch);
|
||||
break;
|
||||
}
|
||||
|
||||
case VIS_START: {
|
||||
// for(int i=0 ; i<12 ; i++){
|
||||
// FlushNotify();
|
||||
@@ -666,7 +739,6 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
|
||||
}
|
||||
|
||||
case VIS_REC: {
|
||||
|
||||
if(INSTRUCTION.recording_channel){
|
||||
rec_sti_command |= ENABLE_REC;
|
||||
NEULIVE_STATE.state = NEU_WRITE_REC_INS;
|
||||
@@ -708,6 +780,8 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
|
||||
case VIS_STOP_REC:{
|
||||
rec_sti_command &= ~ENABLE_REC;
|
||||
|
||||
ResetDBSRegister();
|
||||
|
||||
// is neu wording now?
|
||||
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
|
||||
// nothing to do
|
||||
@@ -760,6 +834,10 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
|
||||
switch (cis_oper) {
|
||||
case CIS_NOP: {
|
||||
// nothing
|
||||
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
|
||||
cdr_buf[i] = 0;
|
||||
}
|
||||
|
||||
cdr_buf[0] = _B_4b4b(CIS_NOP, CHIP_ID);
|
||||
cdr_buf[1] = _B_4b4b(CDR_SUCCESS, 0);
|
||||
|
||||
@@ -768,11 +846,16 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
|
||||
}
|
||||
//#ifdef HEADSTAGE_CIS_VOLT_H
|
||||
case CIS_VOLT: {
|
||||
cdr_buf[0] = CIS_VOLT | CHIP_ID;
|
||||
cdr_buf[1] = headstage_battery_volt1();
|
||||
cdr_buf[2] = headstage_battery_volt2();
|
||||
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
|
||||
cdr_buf[i] = 0;
|
||||
}
|
||||
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
|
||||
cdr_buf[0] = BLE_CDR_SMALL_SIZE; // data length
|
||||
cdr_buf[1] = CIS_VOLT | CHIP_ID;
|
||||
cdr_buf[2] = headstage_battery_volt1();
|
||||
cdr_buf[3] = headstage_battery_volt2();
|
||||
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
|
||||
|
||||
#define THREE_POINT_THREE_VOLT 845
|
||||
if (AONBatMonBatteryVoltageGet() < THREE_POINT_THREE_VOLT){
|
||||
@@ -802,35 +885,44 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
|
||||
//#endif
|
||||
|
||||
case CIS_VERSION:{
|
||||
cdr_buf[0] = VERSION_DATE_YEAR;
|
||||
cdr_buf[1] = VERSION_DATE_MONTH;
|
||||
cdr_buf[2] = VERSION_DATE_DAY;
|
||||
cdr_buf[3] = VERSION_DATE_HOUR;
|
||||
cdr_buf[4] = VERSION_DATE_MINUTE;
|
||||
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
|
||||
cdr_buf[i] = 0;
|
||||
}
|
||||
|
||||
cdr_buf[0] = BLE_CDR_SMALL_SIZE;
|
||||
cdr_buf[1] = VERSION_DATE_YEAR;
|
||||
cdr_buf[2] = VERSION_DATE_MONTH;
|
||||
cdr_buf[3] = VERSION_DATE_DAY;
|
||||
cdr_buf[4] = VERSION_DATE_HOUR;
|
||||
cdr_buf[5] = VERSION_DATE_MINUTE;
|
||||
|
||||
uint8_t mac_int[4];
|
||||
if( strncmp(CaliTable.DeviceName, "BOARD_TEST", 25)){
|
||||
// has a specific cali data
|
||||
get_board_name(CaliTable.DeviceName, mac_int, 4);
|
||||
cdr_buf[5] = mac_int[0];
|
||||
cdr_buf[6] = mac_int[1];
|
||||
cdr_buf[6] = mac_int[0];
|
||||
cdr_buf[7] = mac_int[1];
|
||||
}
|
||||
else{
|
||||
// this board use default cali setting
|
||||
cdr_buf[5] = 0xAB;
|
||||
cdr_buf[6] = 0xCD;
|
||||
cdr_buf[6] = 0xAB;
|
||||
cdr_buf[7] = 0xCD;
|
||||
}
|
||||
|
||||
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
|
||||
break;
|
||||
}
|
||||
|
||||
default: {
|
||||
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++ ){
|
||||
cdr_buf[i] = 0;
|
||||
}
|
||||
|
||||
cdr_buf[0] = _B_4b4b(cis_oper, CHIP_ID);
|
||||
cdr_buf[1] = _B_4b4b(CDR_FAILURE, 0);
|
||||
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SAMLL_SIZE, cdr_buf);
|
||||
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_SMALL_SIZE, cdr_buf);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -975,7 +1067,7 @@ static void headstage_neu_state_spi() {
|
||||
}
|
||||
case NEU_READ_DATA: {
|
||||
|
||||
// recv sti enable command
|
||||
// sti enable command
|
||||
if( (rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ){
|
||||
// go to send sti instruction
|
||||
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
|
||||
@@ -987,7 +1079,7 @@ static void headstage_neu_state_spi() {
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
// recv disable stimulation
|
||||
// disable stimulation
|
||||
else if( !(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI) ){
|
||||
NEULIVE_STATE.state = NEU_STI_INT;
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
@@ -999,7 +1091,6 @@ static void headstage_neu_state_spi() {
|
||||
// recv disable recording
|
||||
else if( !(rec_sti_command & ENABLE_REC) ){
|
||||
rec_sti_command &= ~STATUS_REC;
|
||||
headstage_led_color(COLOR_WHITE);
|
||||
headstage_led_control();
|
||||
|
||||
if(rec_sti_command & STATUS_STI){
|
||||
@@ -1178,7 +1269,6 @@ static void headstage_neu_state_spi() {
|
||||
}
|
||||
|
||||
case NEU_CHECK_STI_INT: {
|
||||
rec_sti_command &= ~STATUS_STI;
|
||||
|
||||
if(rec_sti_command & STATUS_REC){
|
||||
check_register(STI_CHANNEL_REG, 0, NEU_PREPARE_READ);
|
||||
@@ -1215,4 +1305,219 @@ static void headstage_neu_state_spi() {
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit);
|
||||
static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write);
|
||||
static void stimulation_handle();
|
||||
|
||||
static void headstage_neu_spi(){
|
||||
|
||||
// check system register if we have written it before
|
||||
if( check_register_value(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value) ){
|
||||
return;
|
||||
}
|
||||
// write system register
|
||||
if (write_register(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
if(check_register_value(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
|
||||
return;
|
||||
}
|
||||
if(write_register(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
if(check_register_value(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
|
||||
return;
|
||||
}
|
||||
if(write_register(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
// enable recording channel
|
||||
if(rec_register[REC_CHANNEL_INDEX].WriteRegister){
|
||||
rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
|
||||
rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
|
||||
rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, rec_register_value[REC_CHANNEL_INDEX]);
|
||||
return;
|
||||
}
|
||||
|
||||
// enable stimulation
|
||||
// WriteRegister will only be enable at check_register_value()
|
||||
if(sti_register[STI_ENABLE_INDEX].WriteRegister){
|
||||
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
|
||||
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
|
||||
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
|
||||
return;
|
||||
}
|
||||
|
||||
// enable/disable stimulation
|
||||
if (((rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ) ||
|
||||
(!(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI))){
|
||||
|
||||
if(rec_sti_command & ENABLE_STI){
|
||||
if(sti_register_value[STI_ENABLE_INDEX]){
|
||||
rec_sti_command |= STATUS_STI;
|
||||
}
|
||||
// change LED base on working status
|
||||
headstage_led_control();
|
||||
|
||||
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
|
||||
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
|
||||
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
|
||||
return;
|
||||
}
|
||||
else{
|
||||
rec_sti_command &= ~STATUS_STI;
|
||||
headstage_led_control();
|
||||
|
||||
// enable stimulation and check register
|
||||
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
|
||||
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
|
||||
sti_register_value[STI_ENABLE_INDEX] = 0;
|
||||
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// start recording
|
||||
if(!(rec_sti_command & STATUS_REC) && (rec_sti_command & ENABLE_REC)){
|
||||
IsFirstData = true;
|
||||
|
||||
if(rec_sti_command & ENABLE_REC){
|
||||
rec_sti_command |= STATUS_REC; // neu is recording now
|
||||
}
|
||||
|
||||
// change LED base on working status
|
||||
headstage_led_control();
|
||||
|
||||
AppendSPITX(0, 0);
|
||||
SPICallBack = READ_MOSI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
return;
|
||||
}
|
||||
|
||||
if(rec_sti_command & STATUS_REC){
|
||||
if(!(rec_sti_command & ENABLE_REC)){
|
||||
// terminate record
|
||||
rec_sti_command &= ~STATUS_REC;
|
||||
headstage_led_control();
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
else{
|
||||
if(SPICallBack != READ_MOSI){
|
||||
SPICallBack = READ_MOSI;
|
||||
}
|
||||
|
||||
headstage_neu_append_notify_data();
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if(rec_sti_command & STATUS_STI){
|
||||
stimulation_handle();
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#define RESEND_SPI_READ_NUMBER 3
|
||||
static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit){
|
||||
for(int i=0 ; i<reg_size ; i++){
|
||||
if(dbs_register[i].CheckRegister){
|
||||
if(check_reg_counter < RESEND_SPI_READ_NUMBER){
|
||||
dbs_register[i].read_reg(dbs_register+i);
|
||||
}
|
||||
else{
|
||||
// check register value
|
||||
check_reg_counter = 0;
|
||||
dbs_register[i].CheckRegister = false;
|
||||
|
||||
uint16_t ins_to_fit = value_to_fit[i];
|
||||
uint16_t ins_recv = spi_rxbuf[1] << 8 | spi_rxbuf[2];
|
||||
|
||||
if(ins_recv != ins_to_fit){
|
||||
SPI_close(headstage_spi_handle);
|
||||
dbs_register[i].WriteRegister = true;
|
||||
ReopenSPI();
|
||||
dbs_register[i].write_reg(dbs_register+i, value_to_fit[i]);
|
||||
}
|
||||
else{
|
||||
AppendSPITX(0, 0);
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write){
|
||||
|
||||
// start from index 1, since 0 is rec/sti enable
|
||||
for(int i=1 ; i<reg_size ; i++){
|
||||
if(dbs_register[i].WriteRegister){
|
||||
dbs_register[i].WriteRegister = false;
|
||||
dbs_register[i].CheckRegister = true;
|
||||
dbs_register[i].write_reg(dbs_register+i, value_to_write[i]);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void recording_handle(){
|
||||
if(!(rec_sti_command & ENABLE_REC)){
|
||||
// terminate record
|
||||
rec_sti_command &= ~STATUS_REC;
|
||||
headstage_led_control();
|
||||
|
||||
if(rec_sti_command & STATUS_STI){
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
else{
|
||||
AppendSPITX(0, 0);
|
||||
ResetINSTRUCTION();
|
||||
|
||||
SPI_close(headstage_spi_handle);
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
|
||||
spi_txbuf[i] = 0;
|
||||
spi_rxbuf[i] = 0;
|
||||
}
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
ReopenSPI();
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
else{
|
||||
headstage_neu_append_notify_data();
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
static void stimulation_handle(){
|
||||
if(!(rec_sti_command & ENABLE_STI)){
|
||||
rec_sti_command &= ~STATUS_STI;
|
||||
headstage_led_control();
|
||||
sti_register[STI_ENABLE_INDEX].WriteRegister = false;
|
||||
sti_register[STI_ENABLE_INDEX].CheckRegister = true;
|
||||
sti_register_value[STI_ENABLE_INDEX] = 0;
|
||||
sti_register[STI_ENABLE_INDEX].write_reg(sti_register+STI_ENABLE_INDEX, sti_register_value[STI_ENABLE_INDEX]);
|
||||
}
|
||||
|
||||
// nothing to do
|
||||
else{
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+1
-1
@@ -3,7 +3,7 @@
|
||||
#ifndef HEADSTAGE_PIN_H
|
||||
#define HEADSTAGE_PIN_H
|
||||
|
||||
#include <Board.h>
|
||||
#include <board.h>
|
||||
#include <ti/drivers/PIN.h>
|
||||
|
||||
#if defined(HEADSTAGE_TNI_H)
|
||||
|
||||
+6
-6
@@ -3,15 +3,15 @@
|
||||
#define VERSION_DATE
|
||||
|
||||
#define VERSION_DATE_YEAR 20
|
||||
#define VERSION_DATE_MONTH 6
|
||||
#define VERSION_DATE_DAY 16
|
||||
#define VERSION_DATE_HOUR 15
|
||||
#define VERSION_DATE_MINUTE 21
|
||||
#define VERSION_DATE_MONTH 10
|
||||
#define VERSION_DATE_DAY 26
|
||||
#define VERSION_DATE_HOUR 17
|
||||
#define VERSION_DATE_MINUTE 3
|
||||
|
||||
// this is NOT the version hash !!
|
||||
// it's the last version hash
|
||||
#define VERSION_HASH fce3f53b404738630e7f598238b1936d9bf0a72e
|
||||
#define VERSION_GIT_BRANCH Neulive2.0_developement
|
||||
#define VERSION_HASH 764bd9364d7a99761ada31d35af557a39e1d65a4
|
||||
#define VERSION_GIT_BRANCH neulive20_development_onchange_central
|
||||
|
||||
static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
|
||||
uint8 name_offset = 18;
|
||||
|
||||
+1
-1
@@ -3,7 +3,7 @@
|
||||
#ifndef HEADSTAGE_WATCHDOG
|
||||
#define HEADSTAGE_WATCHDOG
|
||||
|
||||
#include <Board.h>
|
||||
#include <board.h>
|
||||
#include <ti/drivers/Watchdog.h>
|
||||
#include <ti/drivers/watchdog/WatchdogCC26XX.h>
|
||||
|
||||
|
||||
+292
-3
@@ -8,11 +8,120 @@
|
||||
#error "headstage/headstage_notify.h not included"
|
||||
#endif
|
||||
|
||||
#include "headstage_dbs_object.h"
|
||||
#define NOT_BUF_OFFSET_INIT 8
|
||||
|
||||
#include "headstage_cali_table.h"
|
||||
|
||||
static uint8_t numFFT = 64; // user define
|
||||
static uint8_t step = 32; // which is numFFT/2
|
||||
static uint8_t stageFFT = 6; // which is log2(numFFT)
|
||||
//static int twiddle_real[16] = {10000, 9238, 7071, 3826, 0, -3827, -7072, -9239, -10000, -9239, \
|
||||
// -7072, -3827, -1, 3826, 7071, 9238};
|
||||
//
|
||||
//static int twiddle_imag[16] = { 0, -3827, -7072, -9239, -10000, -9239, -7072, -3827, -1, 3826, \
|
||||
// 7071, 9238, 10000, 9238, 7071, 3826};
|
||||
static int twiddle_real[64] = {10000, 9951, 9807, 9569, 9238, 8819, 8314, 7730, 7071, 6343, \
|
||||
5555, 4713, 3826, 2902, 1950, 980, 0, -981, -1951, -2903, \
|
||||
-3827, -4714, -5556, -6344, -7072, -7731, -8315, -8820, -9239, -9570, \
|
||||
-9808, -9952, -10000, -9952, -9808, -9570, -9239, -8820, -8315, -7731, \
|
||||
-7072, -6344, -5556, -4714, -3827, -2903, -1951, -981, -1, 980,\
|
||||
1950, 2902, 3826, 4713, 5555, 6343, 7071, 7730, 8314, 8819, \
|
||||
9238, 9569, 9807, 9951 };
|
||||
|
||||
static int twiddle_imag[64] = { 0, -981, -1951, -2903, -3827, -4714, -5556, -6344, -7072, -7731, \
|
||||
-8315, -8820, -9239, -9570, -9808, -9952, -10000, -9952, -9808, -9570, \
|
||||
-9239, -8820, -8315, -7731, -7072, -6344, -5556, -4714, -3827, -2903, \
|
||||
-1951, -981, -1, 980, 1950, 2902, 3826, 4713, 5555, 6343, \
|
||||
7071, 7730, 8314, 8819, 9238, 9569, 9807, 9951, 10000, 9951, \
|
||||
9807, 9569, 9238, 8819, 8314, 7730, 7071, 6343, 5555, 4713, \
|
||||
3826, 2902, 1950, 980};
|
||||
|
||||
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT);
|
||||
static void BitReverse(int* BR_Array, int numFFT);
|
||||
static void CLP(int raw_data);
|
||||
static int ADC_U2S( uint16_t unsigned_buff);
|
||||
|
||||
|
||||
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
|
||||
static uint32_t not_time_stamp = 0;
|
||||
|
||||
static void headstage_notify_set_timestamp();
|
||||
static void headstage_notify_flip_buffer();
|
||||
static uint8_t headstage_notify_append_data(uint8_t *data_value);
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_append_notify_data
|
||||
*/
|
||||
#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
|
||||
static void headstage_neu_append_notify_data() {
|
||||
|
||||
uint8_t channel = spi_rxbuf[0];
|
||||
|
||||
// close-reopen SPI, if the first channel received is invalid
|
||||
if(IsFirstData){
|
||||
// start record
|
||||
if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
|
||||
IsFirstData = false;
|
||||
}
|
||||
// restart SPI
|
||||
else{
|
||||
SPI_close(headstage_spi_handle);
|
||||
ReopenSPI();
|
||||
IsFirstData = true;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// discard illegal channel
|
||||
uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
|
||||
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
|
||||
// illegal channel
|
||||
return;
|
||||
}
|
||||
|
||||
uint16_t borshin_raw;
|
||||
int16_t borshin_a;
|
||||
int16_t borshin_b;
|
||||
uint8_t borshin_sample_rate;
|
||||
int borshin_real;
|
||||
int borshin_compute_data;
|
||||
static uint8_t borshin_sample_count;
|
||||
|
||||
uint8_t not_buf[2];
|
||||
not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
|
||||
not_buf[1] = spi_rxbuf[2];
|
||||
|
||||
// Borshin FFT start here <<<<<<<<<<<<<<<<<<<<---->>>>>>>>>>>>>>>>>>>>----------------------
|
||||
borshin_sample_count = !borshin_sample_count;
|
||||
if (borshin_sample_count){
|
||||
|
||||
borshin_raw = (spi_rxbuf[1]&0x0F)<<8 | spi_rxbuf[2]; // range from [ FFF , 000 ]
|
||||
borshin_a = CaliTable.Ch[channel].Gain[ rec_register_value[REC_CHANNEL_INDEX] ];
|
||||
borshin_b = CaliTable.Ch[channel].Offset[ rec_register_value[REC_CHANNEL_INDEX] ];
|
||||
borshin_real = (borshin_raw - 2048 - borshin_b)*1000/borshin_a; // range from +- someting [ no FFF , 000 ]
|
||||
borshin_compute_data = borshin_real >> 10;
|
||||
borshin_sample_rate = 2000000/10/rec_register_value[REC_ADC_CLOCK_INDEX];
|
||||
// if (borshin_raw<3450&&borshin_raw>600)
|
||||
// headstage_pin_output(PIN_CLP, 1);
|
||||
// else
|
||||
// headstage_pin_output(PIN_CLP, 0);
|
||||
CLP( borshin_compute_data ); // This function input is 12-bit value
|
||||
// the function will buffer 16-point then
|
||||
// perform 16-point FFT.
|
||||
// Afterwards, calculate sum of PSD then
|
||||
// decided if HVS happened. (GPIO_4)
|
||||
// Borshin FFT END here <<<<<<<<<<<<<<<<<<<<----------------------------->>>>>>>>>>>>>>>>>>>>
|
||||
}
|
||||
uint8_t data_size = headstage_notify_append_data(not_buf);
|
||||
|
||||
if (data_size >= BLE_NOT_BUFF_SIZE) {
|
||||
headstage_notify_flip_buffer();
|
||||
headstage_notify_send();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void headstage_notify_set_timestamp() {
|
||||
not_time_stamp = headstage_time_stamp_us();
|
||||
|
||||
@@ -23,7 +132,7 @@ static void headstage_notify_set_timestamp() {
|
||||
}
|
||||
|
||||
static void headstage_notify_flip_buffer() {
|
||||
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 3;
|
||||
uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 2;
|
||||
|
||||
headstage_notify_buffer[0] = CHIP_ID;
|
||||
headstage_notify_buffer[1] = data_count;
|
||||
@@ -40,11 +149,9 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
|
||||
if (data_value == NULL) {
|
||||
headstage_notify_buffer[not_buf_offset++] = 0x00;
|
||||
headstage_notify_buffer[not_buf_offset++] = 0x00;
|
||||
headstage_notify_buffer[not_buf_offset++] = 0x00;
|
||||
} else {
|
||||
headstage_notify_buffer[not_buf_offset++] = data_value[0];
|
||||
headstage_notify_buffer[not_buf_offset++] = data_value[1];
|
||||
headstage_notify_buffer[not_buf_offset++] = data_value[2];
|
||||
}
|
||||
|
||||
if (not_buf_offset >= BLE_NOT_BUFF_SIZE - 1) {
|
||||
@@ -61,3 +168,185 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
|
||||
}
|
||||
|
||||
#endif // HEADSTAGE_NOTIFY_TDC4VAF2_H
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FFT
|
||||
*
|
||||
* @brief TI Cortex M3 doesn't have floating-point ALU, we have to do
|
||||
* fixed-point FFT. And in-place FFT because lack of RAM.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT){
|
||||
// testing_sig = !testing_sig;
|
||||
// uint8_t stageFFT = 6; // static global log2(numFFT)
|
||||
int l;
|
||||
int product_real, product_imag;
|
||||
int upfly_real, upfly_imag;
|
||||
int downfly_real, downfly_imag;
|
||||
|
||||
for (int i=0; i<stageFFT; i++){
|
||||
l = 1<<i;
|
||||
for (int j=0; j<numFFT; j+=2*l){
|
||||
for (int k=0; k<l; k++){
|
||||
//printf("stage = %d , butterfly_top = %d , butterfly_down = %d , twiddle[%d] \n", i, j+k, j+k+l, NFFT*(k)/2/l);
|
||||
product_real = pred_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l] \
|
||||
- imag_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l];
|
||||
product_imag = pred_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l] \
|
||||
+ imag_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l];
|
||||
|
||||
product_real = product_real/10000; // left shift number =10 which is up to Int_twiddle-factor
|
||||
product_imag = product_imag/10000;
|
||||
|
||||
upfly_real = pred_LFP[j+k] + product_real;
|
||||
upfly_imag = imag_LFP[j+k] + product_imag;
|
||||
|
||||
downfly_real = pred_LFP[j+k] - product_real;
|
||||
downfly_imag = imag_LFP[j+k] - product_imag;
|
||||
|
||||
pred_LFP[j+k] = upfly_real;
|
||||
imag_LFP[j+k] = upfly_imag;
|
||||
|
||||
pred_LFP[j+k+l] = downfly_real;
|
||||
imag_LFP[j+k+l] = downfly_imag;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ADC_U2S
|
||||
*
|
||||
* @brief ADC sample data in 12-bit which is FFF~000, but for FFT
|
||||
* it needs to be pulled back to +7FF to -7FF. These is based
|
||||
* on simulation result, which is like the function ADC_ISR()
|
||||
* in Ramesh or Remy's code. [ ADC_unsigned_2_signed ]
|
||||
*
|
||||
* @param unsigned 16-bit input
|
||||
*
|
||||
* @return signed 16-bit output ----_0000_0000_0000 ~ ----_1000_0000_0000
|
||||
*/
|
||||
static int ADC_U2S( uint16_t unsigned_buff){
|
||||
|
||||
// 0x0FFF ~ 0x0000 (16-bit unsigned)
|
||||
int output; // 0x07FF-0x0000 ~ 0x0FFF-0x0800
|
||||
// int is 32-bit 0x0000_0000
|
||||
if ( unsigned_buff >= 0x00000800)
|
||||
output = unsigned_buff - 0x00000800;
|
||||
else
|
||||
output = unsigned_buff | 0xFFFFF800;
|
||||
|
||||
return output;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn BitReverse
|
||||
*
|
||||
* @brief Do array Bit-Reverse before perform FFT
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void BitReverse(int* BR_Array, int numFFT){
|
||||
|
||||
|
||||
// This BIR specify for 7-bit (0000_0000 ~ 0111_1111)
|
||||
uint8_t n=0;
|
||||
int tmp;
|
||||
|
||||
// for (uint8_t i=0; i<numFFT; i++){
|
||||
// n = i; // printf ("%d %d\n",i,n);
|
||||
// n = (n&0x0f)<<4 | (n&0xf0)>>4; // 0123_4567 -> 4567_0123
|
||||
// n = (n&0x33)<<2 | (n&0xcc)>>2; // 4567_0123 -> 6745_2301
|
||||
// n = (n&0xaa)<<2 | (n&0x55)>>1; // 7856_3412 -> 7654_3210
|
||||
// n = n >> 1; // 7654_3210 -> 0765_4321
|
||||
// if (n>i){
|
||||
// tmp = BR_Array[n];
|
||||
// BR_Array[n] = BR_Array[i];
|
||||
// BR_Array[i] = tmp;
|
||||
// }
|
||||
// }
|
||||
|
||||
// This BIR specify for 6-bit (0000_0000 ~ 0011_1111)
|
||||
for (uint8_t i=0; i<numFFT; i++){
|
||||
n = i; // printf ("%d %d\n",i,n);
|
||||
n = (n&0x07)<<3 | (n)>>3; // 0012_3456 -> 0045_6123
|
||||
n = (n&0x09)<<2 | (n&0x36)>>1; // 0045_6123 -> 0064_5312
|
||||
n = (n&0x09)<<1 | (n&0x12)>>1 | (n&0x24); // 0064_5312 -> 0065_4321
|
||||
if (n>i){
|
||||
tmp = BR_Array[n];
|
||||
BR_Array[n] = BR_Array[i];
|
||||
BR_Array[i] = tmp;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
return;
|
||||
} // END Bit Reverse Order Sort
|
||||
|
||||
/*********************************************************************
|
||||
* @fn CLP ( Closed LooP )
|
||||
*
|
||||
* @brief
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void CLP(int signed_real_data){
|
||||
|
||||
int signed_buff;
|
||||
static int accumu_sum;
|
||||
static int x_in[64];
|
||||
static int real[64];
|
||||
static int imag[64];
|
||||
static int count;
|
||||
int abs_tmp;
|
||||
|
||||
// signed_buff = ADC_U2S(unsigned_real_data);
|
||||
x_in[count] = signed_real_data;
|
||||
real[count] = signed_real_data;
|
||||
imag[count] = 0;
|
||||
count++;
|
||||
if (count >= numFFT){
|
||||
BitReverse( real, numFFT);
|
||||
FFT( real, imag, numFFT);
|
||||
abs_tmp=0;
|
||||
accumu_sum = 0;
|
||||
for ( int i=0; i<numFFT; i++){
|
||||
accumu_sum = accumu_sum + (real[i]*real[i]+imag[i]*imag[i]);
|
||||
if (i>0){
|
||||
if (i==1){
|
||||
abs_tmp = real[i]*real[i]+imag[i]*imag[i];
|
||||
}
|
||||
real[i-1] = x_in[i];
|
||||
imag[i-1] = 0;
|
||||
x_in[i-1] = x_in[i];
|
||||
}
|
||||
}
|
||||
int flag;
|
||||
flag = abs_tmp*100/(accumu_sum>>1);
|
||||
if (flag > 62 && flag < 65 ){
|
||||
headstage_pin_output(PIN_CLP, 1);
|
||||
}
|
||||
else {
|
||||
headstage_pin_output(PIN_CLP, 0);
|
||||
}
|
||||
// if (abs_tmp > 300000 ){
|
||||
// headstage_pin_output(PIN_CLP, 1);
|
||||
// }
|
||||
// else {
|
||||
// headstage_pin_output(PIN_CLP, 0);
|
||||
// }
|
||||
count--;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
+5
-3
@@ -29,7 +29,8 @@
|
||||
#define PIN_LED_CLK IOID_1 // SPI1 clock
|
||||
#define PIN_DC_DC IOID_2 // STI select need
|
||||
#define PIN_EN_ADC_SPI_CLK IOID_3 //
|
||||
#define PIN_BATT_HALF IOID_4 //
|
||||
//#define PIN_BATT_HALF IOID_4 //
|
||||
#define PIN_CLP IOID_4 // cDBS detect HVS LED::also added in config table
|
||||
#define PIN_SPI_MISO IOID_7 //
|
||||
#define PIN_SPI_MOSI IOID_8 //
|
||||
#define PIN_SPI_CS IOID_9 //
|
||||
@@ -77,9 +78,10 @@ static PIN_Config headstage_pin_configuration[] = { //
|
||||
PIN_RESET | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_EN_ADC_SPI_CLK | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_DC_DC | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_CLP | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL, // cDBS detect HVS LED::added in config table
|
||||
// PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_STI_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
//
|
||||
// TODO : add PIN_IRQ for STI clock to detect STI status (update LED & resend STI command if failed before)
|
||||
PIN_TERMINATE};
|
||||
|
||||
#endif // HEADSTAGE_PIN_UNI_H
|
||||
|
||||
+1
-1
@@ -3,7 +3,7 @@
|
||||
#ifndef HEADSTAGE_PWM_H
|
||||
#define HEADSTAGE_PWM_H
|
||||
|
||||
#include <Board.h>
|
||||
#include <board.h>
|
||||
#include <ti/drivers/PWM.h>
|
||||
|
||||
static PWM_Handle headstage_system_pwm_handle = NULL;
|
||||
|
||||
+3
-1
@@ -19,6 +19,8 @@ static void MCUReset(){
|
||||
// SPI reset
|
||||
SPI_close(headstage_spi_handle);
|
||||
spi_state_counter = 0;
|
||||
check_reg_counter = 0;
|
||||
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
|
||||
spi_txbuf[i] = 0;
|
||||
spi_rxbuf[i] = 0;
|
||||
@@ -31,7 +33,7 @@ static void MCUReset(){
|
||||
}
|
||||
|
||||
// CIS buffer reset
|
||||
for(int i=0 ; i<BLE_CDR_SAMLL_SIZE ; i++){
|
||||
for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++){
|
||||
cdr_buf[i] = 0;
|
||||
}
|
||||
|
||||
|
||||
+69
-1
@@ -7,7 +7,7 @@
|
||||
#error "put HEADSTAGE_MA_USE_SPI2 in predefined"
|
||||
#endif
|
||||
|
||||
#include <Board.h>
|
||||
#include <board.h>
|
||||
#include <ti/drivers/SPI.h>
|
||||
#include <ti/drivers/dma/UDMACC26XX.h>
|
||||
#include <ti/drivers/spi/SPICC26XXDMA.h>
|
||||
@@ -120,4 +120,72 @@ static void AppendSPITX(uint8_t index, uint32_t value){
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_spi_callback
|
||||
*
|
||||
* description: callback function to deal with data transmission between DBS and CC2650
|
||||
*/
|
||||
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
|
||||
switch(SPICallBack){
|
||||
case CONTINUOUS_TRANS:{
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER:{
|
||||
SPICallBack = FLUSH_BUFFER2;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER2:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
// headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case ONE_SHOT_SPI:{
|
||||
SPICallBack = FLUSH_BUFFER;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_MOSI:{
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_REG:{
|
||||
check_reg_counter ++;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case CLOSE_SPI:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
SPI_close(headstage_spi_handle);
|
||||
break;
|
||||
}
|
||||
|
||||
case END_TRANSMIT:{
|
||||
tx_put_u24(0, 0);
|
||||
SPICallBack = CONTINUOUS_TRANS;
|
||||
break;
|
||||
}
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+1
@@ -561,6 +561,7 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
|
||||
headstage_init_device_info();
|
||||
|
||||
headstage_init();
|
||||
InitDBSRegister();
|
||||
|
||||
for (;;) {
|
||||
// Waits for a signal to the semaphore associated with the calling thread.
|
||||
|
||||
@@ -51,7 +51,7 @@
|
||||
|
||||
#include "hal_types.h"
|
||||
#include "ble_user_config.h"
|
||||
#include <ti/drivers/rf/rf.h>
|
||||
#include <ti/drivers/rf/RF.h>
|
||||
|
||||
#if defined(BLE_V42_FEATURES) && (BLE_V42_FEATURES & SECURE_CONNS_CFG)
|
||||
#include "ecc/ECCROMCC26XX.h"
|
||||
|
||||
@@ -82,7 +82,8 @@ extern "C" {
|
||||
|
||||
// Length of Characteristic 5 in bytes
|
||||
#define SIMPLEPROFILE_CHAR1_LEN 2
|
||||
#define SIMPLEPROFILE_CHAR2_LEN 50
|
||||
//#define SIMPLEPROFILE_CHAR2_LEN 50
|
||||
#define SIMPLEPROFILE_CHAR2_LEN 34
|
||||
#define SIMPLEPROFILE_CHAR3_LEN 20
|
||||
#define SIMPLEPROFILE_CHAR4_LEN 200
|
||||
//#define SIMPLEPROFILE_CHAR4_LEN 20
|
||||
|
||||
Reference in New Issue
Block a user