Merge branch 'dev/PELv3.0' into develp

1.correct anode/sample_I/sample_V timing
2.include pel_v3_0.h for PELv3.0

.gitignore

@@ -3,3 +3,4 @@
 /VisualGDB/
 *.vgdbsettings.*.user
 *.zip
+/build/

FreeRTOSConfig.h

@@ -62,7 +62,7 @@
 #define configTICK_RATE_HZ                      1024
 #define configMAX_PRIORITIES                    (6)
 #define configMINIMAL_STACK_SIZE                (192)
-#define configTOTAL_HEAP_SIZE                   (32 * 1024)
+#define configTOTAL_HEAP_SIZE                   (48 * 1024)
 #define configMAX_TASK_NAME_LEN                 (16)
 #define configUSE_16_BIT_TICKS                  0
 #define configIDLE_SHOULD_YIELD                 1

adc_drv.c

@@ -83,4 +83,13 @@ int adc_read_milivolt(uint32_t channel, float *mv)
     return p_inst->read_milivolt(channel, mv);
 }
 
+int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
+{
+    if (p_inst == NULL)
+    {
+        return ADC_DRV_ERROR;
+    }
+    return p_inst->adc_convert_multiple_milivolt(p_val_14bit, p_val_f, count);
+}
+
 #endif /* ! DEF_ADC_DRV_ENABLED */

adc_drv.h

@@ -29,6 +29,7 @@ int adc_read_milivolt(uint32_t channel, float *mv);
 int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
 int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
 int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
+int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
 #else
 #define adc_init()
 #define adc_reset()
@@ -38,6 +39,7 @@ int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cn
 #define adc_read_mutiple_channels(x, y, z)
 #define adc_read_mutiple_channels_ex(x, y, z, a)
 #define adc_read_multiple_milivolt_ex(x, y, z, a)
+#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
 #endif /* ! DEF_ADC_DRV_ENABLED */
 
 #ifdef __cplusplus

adc_drv_if.h

@@ -38,6 +38,7 @@ typedef struct
     int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
     int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
     int (*gain)(adc_gain_t gain);
+    int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
 } adc_drv_if_t;
 
 #ifdef __cplusplus

apa102_2020.c

@@ -1,16 +1,13 @@
-#include "nrf_gpio.h"
-#include "nrf_log.h"
-#include "nrf_spim.h"
+#include "app_config.h"
 
+#if (DEF_APA102_2020_ENABLED)
 #include "apa102_2020.h"
 
+#include "elite_board.h"
+
 #include "FreeRTOS.h"
 #include "task.h"
 
-#if (DEF_APA102_2020_ENABLED)
-
-#define DISP_LED_COLOR 0
-
 typedef struct
 {
     uint8_t brightness : 5;

apa102_2020.h

@@ -2,16 +2,17 @@
 #define __APA102_2020_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include "app_config.h"
-#include "elite_board.h"
-#include "led_drv_if.h"
 
 #if (DEF_APA102_2020_ENABLED)
 
-extern const led_drv_if_t apa102_drv;
+#include "led_drv_if.h"
+
+    extern const led_drv_if_t apa102_drv;
 
 #endif /* ! DEF_APA102_2020_ENABLED */
 

app_config.h

@@ -1,6 +1,8 @@
 #ifndef __APP_CONFIG_H__
 #define __APP_CONFIG_H__
 
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C"
 {
@@ -18,6 +20,7 @@ extern "C"
 #define NRF_LOG_DEFERRED                            0
 #define NRF_LOG_USES_TIMESTAMP                      0
 #define NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED 0
+#define NRF_LOG_MSGPOOL_ELEMENT_COUNT               31
 
 // SEGGER-RTT
 #define SEGGER_RTT_SECTION                          ".segger_rtt"
@@ -103,21 +106,29 @@ extern "C"
 
 // BLE device name
 #define DEF_ELITE_DEV                               0x00000000
-#define DEF_ELITE_EDC_20                            0x00020109
-#define DEF_PULSE_E_LOAD_10                         0x00070000
-#define DEF_CURRENT_PULSE_GANERATOR_10              0x00080000
+#define DEF_ELITE_EDC_V2_0                          0x00020109
+#define DEF_ELITE_PEL_V2_0                          0x00070001
+#define DEF_ELITE_PEL_V3_0                          0x00070002
+#define DEF_ELITE_CPG_V1_1                          0x00080001
+#define DEF_ELITE_MMM_V1_0                          0x00090001
 #define DEF_ELITE_MODEL                             DEF_ELITE_DEV
 
+#define DEF_ELITE_DEMO_W_SOFTDEVICE                 0
+
 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
 #define ELITE_DEVICE_NAME       "Elite-Dev"
+#define ELITE_HW_NAME           "Elite-Dev"
 #define MAJOR_PRODUCT_NUMBER    0
 #define MINOR_PRODUCT_NUMBER    0
 #define MAJOR_VERSION_NUMBER    0
 #define MINOR_VERSION_NUMBER    0
 
-#define DEF_LED_COUNT           0
+#define DEF_TW1508_ENABLED      0
+
 #define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0
 
 #define DEF_ADC_DRV_ENABLED     0
 #define DEF_ADS8691_ENABLED     0
@@ -127,6 +138,7 @@ extern "C"
 #define DEF_MAX5136_ENABLED     0
 
 #define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
 #define DEF_ADGS1412_ENABLED    0
 
 #define DEF_FS_ENABLED          0
@@ -137,16 +149,24 @@ extern "C"
 
 #define DEF_RTT_JSCOP_ENABLED   0
 
-#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UART_ENABLED        0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 #define ELITE_DEVICE_NAME       "Elite-EDC"
+#define ELITE_HW_NAME           "Elite-EDCv2.0"
 #define MAJOR_PRODUCT_NUMBER    0
 #define MINOR_PRODUCT_NUMBER    2
 #define MAJOR_VERSION_NUMBER    1
 #define MINOR_VERSION_NUMBER    9
 
-#define DEF_LED_COUNT           12
+#define DEF_TW1508_ENABLED      0
+
 #define DEF_LED_DRV_ENABLED     1
+#define DEF_LED_COUNT           12
 #define DEF_APA102_2020_ENABLED 1
+#define DEF_RGB_ENABLED         0
 
 #define DEF_ADC_DRV_ENABLED     1
 #define DEF_ADS8691_ENABLED     1
@@ -156,6 +176,7 @@ extern "C"
 #define DEF_MAX5136_ENABLED     1
 
 #define DEF_SW_DRV_ENABLED      1
+#define DEF_MAX14802_ENABLED    0
 #define DEF_ADGS1412_ENABLED    1
 
 #define DEF_FS_ENABLED          0
@@ -166,16 +187,28 @@ extern "C"
 
 #define DEF_RTT_JSCOP_ENABLED   0
 
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-#define ELITE_DEVICE_NAME       "Elite-PEL"
-#define MAJOR_PRODUCT_NUMBER    0
-#define MINOR_PRODUCT_NUMBER    2
-#define MAJOR_VERSION_NUMBER    1
-#define MINOR_VERSION_NUMBER    9
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UART_ENABLED        0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+#define BOARD_IOPH              1
+#define BOARD_IOPL              0
+
+#define ELITE_DEVICE_NAME       "Elite-PEL"
+#define ELITE_HW_NAME           "Elite-PELv2.0"
+#define BOARD_IOPx              BOARD_IOPH
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    7
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    1
+
+#define DEF_TW1508_ENABLED      0
 
-#define DEF_LED_COUNT           0
 #define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0
 
 #define DEF_ADC_DRV_ENABLED     1
 #define DEF_ADS8691_ENABLED     0
@@ -185,6 +218,7 @@ extern "C"
 #define DEF_MAX5136_ENABLED     0
 
 #define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
 #define DEF_ADGS1412_ENABLED    0
 
 #define DEF_FS_ENABLED          0
@@ -195,16 +229,104 @@ extern "C"
 
 #define DEF_RTT_JSCOP_ENABLED   0
 
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-#define ELITE_DEVICE_NAME       "Elite-CPG"
-#define MAJOR_PRODUCT_NUMBER    0
-#define MINOR_PRODUCT_NUMBER    2
-#define MAJOR_VERSION_NUMBER    1
-#define MINOR_VERSION_NUMBER    9
+#define DEF_USBD_ENABLED        1
 
-#define DEF_LED_COUNT           0
-#define DEF_LED_DRV_ENABLED     0
+#define DEF_UART_ENABLED        0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#define BOARD_IOPH              1
+#define BOARD_IOPL              0
+
+#define ELITE_DEVICE_NAME       "Elite-PEL"
+#define ELITE_HW_NAME           "Elite-PELv3.0"
+#define BOARD_IOPx              BOARD_IOPH
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    7
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    2
+
+#define DEF_TW1508_ENABLED      0
+
+#define DEF_LED_DRV_ENABLED     1
+#define DEF_LED_COUNT           1
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         1
+
+#define DEF_ADC_DRV_ENABLED     1
+#define DEF_ADS8691_ENABLED     0
+#define DEF_BULTIN_ADC_ENABED   1
+
+#define DEF_DAC_DRV_ENABLED     0
+#define DEF_MAX5136_ENABLED     0
+
+#define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
+#define DEF_ADGS1412_ENABLED    0
+
+#define DEF_FS_ENABLED          0
+#define DEF_FS_RTT_DIR          0
+#define DEF_GD25D10C_ENABLED    0
+
+#define DEF_BTN_ENABLED         0
+
+#define DEF_RTT_JSCOP_ENABLED   0
+
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UART_ENABLED        0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+#define ELITE_DEVICE_NAME       "Elite-CPG"
+#define ELITE_HW_NAME           "Elite-CPGv1.1"
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    8
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    1
+
+#define DEF_TW1508_ENABLED      1
+
+#define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
+#define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0
+
+#define DEF_ADC_DRV_ENABLED     0
+#define DEF_ADS8691_ENABLED     0
+#define DEF_BULTIN_ADC_ENABED   0
+
+#define DEF_DAC_DRV_ENABLED     0
+#define DEF_MAX5136_ENABLED     0
+
+#define DEF_SW_DRV_ENABLED      1
+#define DEF_MAX14802_ENABLED    1
+#define DEF_ADGS1412_ENABLED    0
+
+#define DEF_FS_ENABLED          0
+#define DEF_FS_RTT_DIR          0
+#define DEF_GD25D10C_ENABLED    0
+
+#define DEF_BTN_ENABLED         0
+
+#define DEF_RTT_JSCOP_ENABLED   0
+
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UARTE_ENABLED       0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+#define ELITE_DEVICE_NAME       "Elite-MMM"
+#define ELITE_HW_NAME           "Elite-MMM"
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    9
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    1
+
+#define DEF_TW1508_ENABLED      0
+
+#define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
+#define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0
 
 #define DEF_ADC_DRV_ENABLED     0
 #define DEF_ADS8691_ENABLED     0
@@ -214,6 +336,7 @@ extern "C"
 #define DEF_MAX5136_ENABLED     0
 
 #define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
 #define DEF_ADGS1412_ENABLED    0
 
 #define DEF_FS_ENABLED          0
@@ -224,6 +347,10 @@ extern "C"
 
 #define DEF_RTT_JSCOP_ENABLED   0
 
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UARTE_ENABLED       1
+
 #endif
 
 #define BLE_ELITE_SRV_ENABLED   1
@@ -256,6 +383,12 @@ extern "C"
 // Enable ble device info module
 #define BLE_DIS_ENABLED                            1
 
+// Enable ble uart module
+#define BLE_NUS_ENABLED                            1
+#define BLE_UART_SRV_ENABLED                       1
+#define BLE_UART_OBSERVER_PRIO                     3
+#define NRF_UARTE_ENABLED                          1
+
 // DFU
 #define NRF_DFU_TRANSPORT_BLE                      1
 #define BLE_DFU_BLE_OBSERVER_PRIO                  2
@@ -283,6 +416,60 @@ extern "C"
 #define COUNT_ARRAY_SIZE(x)                        (sizeof(x) / sizeof(x[0]))
 #define COUNTOF(x)                                 (sizeof(x) / sizeof(x[0]))
 
+#define u8_to_u32(a, b, c, d)                      (((uint32_t)(a) << 24) | ((uint32_t)(b) << 16) | ((uint32_t)(c) << 8) | (d))
+#define u8_to_u16(a, b)                            (((uint16_t)(a) << 8) | (b))
+#define u8_to_i32(a, b, c, d)                      (((int32_t)(a) << 24) | ((int32_t)(b) << 16) | ((int32_t)(c) << 8) | ((int32_t)(d)))
+#define u8_to_i16(a, b)                            (((int16_t)(a) << 8) | (int16_t)(b))
+
+#define DEBUG_NRF                                  1
+
+    // USBD
+
+#define APP_USBD_ENABLED                           1
+#define APP_USBD_VID                               0x1915
+#define APP_USBD_PID                               0xC00A
+#define APP_USBD_DEVICE_VER_MAJOR                  1
+#define APP_USBD_DEVICE_VER_MINOR                  1
+#define USBD_CONFIG_IRQ_PRIORITY                   _PRIO_APP_MID
+#define APP_USBD_DEVICE_VER_SUB                    0
+#define APP_USBD_STRINGS_LANGIDS                   APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
+#define APP_USBD_STRINGS_USER                      X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
+#define APP_USBD_STRINGS_MANUFACTURER              APP_USBD_STRING_DESC("Nordic Semiconductor")
+#define APP_USBD_STRINGS_PRODUCT                   APP_USBD_STRING_DESC("nRF52 USB Product")
+#define APP_USBD_STRINGS_CONFIGURATION             APP_USBD_STRING_DESC("Default configuration")
+#define APP_USBD_STRING_ID_MANUFACTURER            1
+#define APP_USBD_STRING_ID_PRODUCT                 2
+#define APP_USBD_STRING_ID_SERIAL                  3
+#define APP_USBD_STRING_ID_CONFIGURATION           4
+#define APP_USBD_STRING_SERIAL_EXTERN              1
+#define APP_USBD_CONFIG_SELF_POWERED               1
+#define APP_USBD_CONFIG_MAX_POWER                  100
+#define APP_USBD_CONFIG_DESC_STRING_SIZE           31
+#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE         1
+#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE           32
+
+    extern uint8_t g_extern_serial_number[];
+#define APP_USBD_STRING_SERIAL                      g_extern_serial_number
+
+// USBD CDC ACM
+#define APP_USBD_CDC_ACM_ENABLED                    1
+#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE        1
+
+// USBD DFU TRIGGER
+#define APP_USBD_NRF_DFU_TRIGGER_ENABLED            1
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 1
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL   4
+#define NRF_DFU_TRIGGER_USB_USB_SHARED              1
+
+// NRF_USBD
+#define NRFX_USBD_ENABLED                           1
+#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST     1
+#define NRFX_USBD_CONFIG_IRQ_PRIORITY               _PRIO_APP_LOW
+
+#define NRF_DFU_TRIGGER_USB_INTERFACE_NUM           0
+#define NRF_CDC_ACM_COMM_INTERFACE                  1
+#define NRF_CDC_ACM_DATA_INTERFACE                  2
+
 #ifdef __cplusplus
 }
 #endif

bmd380_peripheral-Debug.vgdbsettings

@@ -107,6 +107,7 @@
       <EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
       <AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
       <TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
+      <BacktraceFrameLimit>0</BacktraceFrameLimit>
       <EnableNonStopMode>false</EnableNonStopMode>
       <MaxBreakpointLimit>0</MaxBreakpointLimit>
       <EnableVerboseMode>true</EnableVerboseMode>
@@ -115,10 +116,8 @@
     </AdditionalGDBSettings>
     <DebugMethod>
       <ID>jlink-jtag</ID>
-      <InterfaceID>com.sysprogs.debug.jlink.jlinksw</InterfaceID>
-      <InterfaceSerialNumber>000801018887</InterfaceSerialNumber>
       <Configuration xsi:type="com.visualgdb.edp.segger.settings">
-        <CommandLine>-select USB -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
+        <CommandLine>-select USB=682409936 -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
         <ProgramMode>Enabled</ProgramMode>
         <StartupCommands>
           <string>target remote :$$SYS:GDB_PORT$$</string>

bmd380_peripheral-Release.vgdbsettings

@@ -23,7 +23,10 @@
       </Version>
     </ToolchainID>
     <ProjectFile>bmd380_peripheral.vcxproj</ProjectFile>
-    <ParallelJobCount>0</ParallelJobCount>
+    <RemoteBuildEnvironment>
+      <Records />
+    </RemoteBuildEnvironment>
+    <ParallelJobCount>1</ParallelJobCount>
     <SuppressDirectoryChangeMessages>true</SuppressDirectoryChangeMessages>
     <BuildAsRoot>false</BuildAsRoot>
   </Build>
@@ -45,6 +48,7 @@
     <ShowMessageAfterExecuting>true</ShowMessageAfterExecuting>
   </CustomShortcuts>
   <UserDefinedVariables />
+  <ImportedPropertySheets />
   <CodeSense>
     <Enabled>Unknown</Enabled>
     <ExtraSettings>
@@ -57,6 +61,8 @@
       <Enabled>false</Enabled>
     </CodeAnalyzerSettings>
   </CodeSense>
+  <Configurations />
+  <ProgramArgumentsSuggestions />
   <Debug xsi:type="com.visualgdb.debug.embedded">
     <AdditionalStartupCommands />
     <AdditionalGDBSettings>
@@ -88,10 +94,12 @@
       <EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
       <AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
       <TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
+      <BacktraceFrameLimit>0</BacktraceFrameLimit>
       <EnableNonStopMode>false</EnableNonStopMode>
       <MaxBreakpointLimit>0</MaxBreakpointLimit>
       <EnableVerboseMode>true</EnableVerboseMode>
       <EnablePrettyPrinters>false</EnablePrettyPrinters>
+      <EnableAbsolutePathReporting>true</EnableAbsolutePathReporting>
     </AdditionalGDBSettings>
     <DebugMethod>
       <ID>jlink-jtag</ID>

bmd380_peripheral.vcxproj

@@ -32,21 +32,21 @@
   <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
     <GNUConfigurationType>Debug</GNUConfigurationType>
     <ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
-    <ToolchainVersion>12.3.1/13.2/r1</ToolchainVersion>
+    <ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
     <GenerateHexFile>true</GenerateHexFile>
     <MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
   </PropertyGroup>
   <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|VisualGDB'">
     <ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
-    <ToolchainVersion>12.3.1/13.2/r1</ToolchainVersion>
+    <ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
     <GenerateHexFile>true</GenerateHexFile>
     <MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
   </PropertyGroup>
   <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
     <ClCompile>
       <CLanguageStandard>GNU99</CLanguageStandard>
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-      <PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
+      <AdditionalIncludeDirectories>.;../bmd380_sdk/components/softdevice/s140/headers;../bmd380_sdk/components/softdevice/s140/headers/nrf52;../bmd380_sdk/external/segger_rtt;../bmd380_sdk/components/libraries/log;../bmd380_sdk/components/libraries/log/src;../bmd380_sdk/components/libraries/memobj;../bmd380_sdk/components/libraries/ringbuf;../bmd380_sdk/components/libraries/atomic;../bmd380_sdk/components/libraries/balloc;../bmd380_sdk/external/freertos/portable/CMSIS/nrf52;../bmd380_sdk/external/freertos/portable/GCC/nrf52;../bmd380_sdk/integration/nrfx;../bmd380_sdk/integration/nrfx/legacy;../bmd380_sdk/components/libraries/experimental_section_vars;../bmd380_sdk/components/libraries/strerror;../bmd380_sdk/external/freertos/source/include;../bmd380_sdk/components/softdevice/common;../bmd380_sdk/components/ble/common;../bmd380_sdk/components/ble/ble_advertising;../bmd380_sdk/components/libraries/atomic_flags;../bmd380_sdk/components/ble/ble_db_discovery;../bmd380_sdk/components/ble/ble_dtm;../bmd380_sdk/components/ble/ble_link_ctx_manager;../bmd380_sdk/components/ble/ble_racp;../bmd380_sdk/components/ble/ble_radio_notification;../bmd380_sdk/components/ble/ble_services/ble_ancs_c;../bmd380_sdk/components/ble/ble_services/ble_ans_c;../bmd380_sdk/components/ble/ble_services/ble_bas;../bmd380_sdk/components/ble/ble_services/ble_bas_c;../bmd380_sdk/components/ble/ble_services/ble_bps;../bmd380_sdk/components/ble/ble_services/ble_cscs;../bmd380_sdk/components/ble/ble_services/ble_cts_c;../bmd380_sdk/components/ble/ble_services/ble_dfu;../bmd380_sdk/components/ble/ble_services/ble_dis;../bmd380_sdk/components/ble/ble_services/ble_dis_c;../bmd380_sdk/components/ble/ble_services/ble_escs;../bmd380_sdk/components/ble/ble_services/ble_gls;../bmd380_sdk/components/ble/ble_services/ble_hids;../bmd380_sdk/components/ble/ble_services/ble_hrs;../bmd380_sdk/components/ble/ble_services/ble_hrs_c;../bmd380_sdk/components/ble/ble_services/ble_hts;../bmd380_sdk/components/ble/ble_services/ble_ias;../bmd380_sdk/components/ble/ble_services/ble_ias_c;../bmd380_sdk/components/ble/ble_services/ble_ipsp;../bmd380_sdk/components/ble/ble_services/ble_lbs;../bmd380_sdk/components/ble/ble_services/ble_lbs_c;../bmd380_sdk/components/ble/ble_services/ble_lls;../bmd380_sdk/components/ble/ble_services/ble_nus;../bmd380_sdk/components/ble/ble_services/ble_nus_c;../bmd380_sdk/components/ble/ble_services/ble_rscs;../bmd380_sdk/components/ble/ble_services/ble_rscs_c;../bmd380_sdk/components/ble/ble_services/ble_tps;../bmd380_sdk/components/ble/ble_services/eddystone;../bmd380_sdk/components/ble/ble_services/experimental_ble_lns;../bmd380_sdk/components/ble/ble_services/experimental_ble_ots;../bmd380_sdk/components/ble/ble_services/experimental_gatts_c;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_cgms;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_ots_c;../bmd380_sdk/components/ble/ble_services/nrf_ble_bms;../bmd380_sdk/components/ble/nrf_ble_gatt;../bmd380_sdk/components/ble/nrf_ble_gq;../bmd380_sdk/components/ble/nrf_ble_qwr;../bmd380_sdk/components/ble/nrf_ble_scan;../bmd380_sdk/components/ble/peer_manager;../bmd380_sdk/components/libraries/pwr_mgmt;littlefs;../bmd380_sdk/external/utf_converter;../bmd380_sdk/components/boards;../bmd380_sdk/components/libraries/usbd;../bmd380_sdk/components/libraries/usbd/class/audio;../bmd380_sdk/components/libraries/usbd/class/cdc;../bmd380_sdk/components/libraries/usbd/class/cdc/acm;../bmd380_sdk/components/libraries/usbd/class/dummy;../bmd380_sdk/components/libraries/usbd/class/hid;../bmd380_sdk/components/libraries/usbd/class/hid/generic;../bmd380_sdk/components/libraries/usbd/class/hid/kbd;../bmd380_sdk/components/libraries/usbd/class/hid/mouse;../bmd380_sdk/components/libraries/usbd/class/msc;../bmd380_sdk/components/libraries/usbd/class/nrf_dfu_trigger;%(ClCompile.AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
+      <PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;CONFIG_NFCT_PINS_AS_GPIOS;NRF52840_XXAA;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
       <AdditionalOptions />
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       <Optimization>O0</Optimization>
@@ -73,7 +73,7 @@
     <ClCompile>
       <CLanguageStandard>GNU99</CLanguageStandard>
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-      <PreprocessorDefinitions>NDEBUG=1;RELEASE=1;USE_APP_CONFIG=1;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
+      <PreprocessorDefinitions>NDEBUG=1;RELEASE=1;USE_APP_CONFIG=1;NRF52840_XXAA;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
     </ClCompile>
     <Link>
       <AdditionalLinkerInputs>;%(Link.AdditionalLinkerInputs)</AdditionalLinkerInputs>
@@ -167,6 +167,7 @@
     <ClCompile Include="..\bmd380_sdk\integration\nrfx\legacy\nrf_drv_clock.c" />
     <ClCompile Include="..\bmd380_sdk\integration\nrfx\legacy\nrf_drv_power.c">
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|VisualGDB'">true</ExcludedFromBuild>
     </ClCompile>
     <ClCompile Include="..\bmd380_sdk\integration\nrfx\legacy\nrf_drv_ppi.c">
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">true</ExcludedFromBuild>
@@ -190,6 +191,7 @@
     </ClCompile>
     <ClCompile Include="..\bmd380_sdk\integration\nrfx\legacy\nrf_drv_uart.c">
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|VisualGDB'">true</ExcludedFromBuild>
     </ClCompile>
     <ClCompile Include="adc_drv.c" />
     <ClCompile Include="adgs1412.c" />
@@ -198,14 +200,17 @@
     <ClCompile Include="btn.c" />
     <ClCompile Include="builtin_saadc.c" />
     <ClCompile Include="cpg.c" />
-    <ClCompile Include="cpg10_dev_mode.c" />
-    <ClCompile Include="cpg10_io.c" />
+    <ClCompile Include="cpg11_io.c" />
     <ClCompile Include="elite_board.c" />
     <ClCompile Include="dac_drv.c" />
     <ClCompile Include="elite_dev.c" />
     <ClCompile Include="edc20_cycle_iv_mode.c" />
+    <ClCompile Include="elite_mmm.c" />
     <ClCompile Include="fs.c" />
     <ClCompile Include="gd25d10c.c" />
+    <ClCompile Include="led_rgb.c" />
+    <ClCompile Include="le_uart_srv.c" />
+    <ClCompile Include="max14802.c" />
     <ClCompile Include="max5136.c" />
     <ClCompile Include="edc20_io.c" />
     <ClCompile Include="edc20.c" />
@@ -223,9 +228,25 @@
     <ClCompile Include="main.c" />
     <ClCompile Include="j_scop.c" />
     <ClCompile Include="pel.c" />
-    <ClCompile Include="pel10_io.c" />
+    <ClCompile Include="pel20_io.c" />
+    <ClCompile Include="pel_v3_0.c" />
+    <ClCompile Include="pel_v3_0_io.c" />
     <ClCompile Include="sw_drv.c" />
     <ClCompile Include="syscalls.c" />
+    <ClCompile Include="tw1508.c" />
+    <ClCompile Include="uart.drv.c" />
+    <ClCompile Include="usbd.c" />
+    <ClCompile Include="usbd_dfu_trigger.c" />
+    <ClInclude Include="elite_mmm.h" />
+    <ClInclude Include="led_rgb.h" />
+    <ClInclude Include="le_uart_srv.h" />
+    <ClInclude Include="max14802.h" />
+    <ClInclude Include="pel20_io.h" />
+    <ClInclude Include="pel_v3_0.h" />
+    <ClInclude Include="pel_v3_0_io.h" />
+    <ClInclude Include="tw1508.h" />
+    <ClInclude Include="uart_drv.h" />
+    <ClInclude Include="usbd.h" />
     <None Include="nRF52811_XXAA_s140.lds" />
     <None Include="nRF52840_XXAA_S140_reserve.lds" />
     <None Include="nrf5x.props" />
@@ -377,8 +398,7 @@
     <ClInclude Include="block_dev_drv_if.h" />
     <ClInclude Include="btn.h" />
     <ClInclude Include="cpg.h" />
-    <ClInclude Include="cpg10_dev_mode.h" />
-    <ClInclude Include="cpg10_io.h" />
+    <ClInclude Include="cpg11_io.h" />
     <ClInclude Include="dac_drv.h" />
     <ClInclude Include="dac_drv_if.h" />
     <ClInclude Include="edc.h" />
@@ -399,7 +419,6 @@
     <ClInclude Include="led_drv_if.h" />
     <ClInclude Include="max5136.h" />
     <ClInclude Include="pel.h" />
-    <ClInclude Include="pel10_io.h" />
     <ClInclude Include="sw_drv.h" />
     <ClInclude Include="sw_drv_if.h" />
     <ClInclude Include="sdk_config.h" />
@@ -662,5 +681,55 @@
     <ClCompile Include="littlefs\lfs_util.c" />
     <ClInclude Include="littlefs\lfs.h" />
     <ClInclude Include="littlefs\lfs_util.h" />
+    <ClCompile Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.c" />
+    <ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.h" />
+    <ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo_internal.h" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.c" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.c" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.c" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.c" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.c" />
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.c" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_class_base.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_descriptor.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_langid.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_request.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_desc.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_scsi.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_types.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_internal.h" />
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_types.h" />
+    <ClCompile Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.c" />
+    <ClInclude Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.h" />
   </ItemGroup>
 </Project>

bmd380_peripheral.vcxproj.filters

@@ -238,6 +238,84 @@
     <Filter Include="Header files\littlefs">
       <UniqueIdentifier>{0203873a-9b27-4c14-8951-9bfadceafef5}</UniqueIdentifier>
     </Filter>
+    <Filter Include="Source files\usbd">
+      <UniqueIdentifier>{9be4b3f1-08fa-4a57-8ced-ded05bb33eba}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class">
+      <UniqueIdentifier>{122aa9a3-1166-4746-88a1-a8da702e2492}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\audio">
+      <UniqueIdentifier>{e52bf7ec-f9d1-4538-983e-47bfa81d3562}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\cdc">
+      <UniqueIdentifier>{6fc37e7a-7664-4c33-b0d7-61151720fd57}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\cdc\acm">
+      <UniqueIdentifier>{8496e952-f8c1-4375-bb2a-f6a118cb7535}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\dummy">
+      <UniqueIdentifier>{a28b1a63-6aa9-475d-81a5-a8d5d73a2673}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\hid">
+      <UniqueIdentifier>{829fe130-1940-411f-8a78-a76d73d4ea62}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\hid\generic">
+      <UniqueIdentifier>{5d6b27be-e48c-46ad-9f4c-52075b8ae027}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\hid\kbd">
+      <UniqueIdentifier>{73a00df5-663d-457c-9725-f2b3d0fcf006}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\hid\mouse">
+      <UniqueIdentifier>{a2f1fa49-5de7-42a5-9a34-dc48461b153a}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\msc">
+      <UniqueIdentifier>{9ea41d3c-7a5d-4296-9d5f-2639ae75a71d}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\usbd\class\nrf_dfu_trigger">
+      <UniqueIdentifier>{5825fda0-6751-48da-9704-6346db1b0a00}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd">
+      <UniqueIdentifier>{cde73016-f997-4dc2-8ee8-940b177f0a10}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class">
+      <UniqueIdentifier>{4b5836ba-e752-48f2-92ae-8df0556f5fa6}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\audio">
+      <UniqueIdentifier>{ed489212-e566-416f-a5ad-b06050b0479f}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\cdc">
+      <UniqueIdentifier>{d7485e51-66b3-40d5-95fb-fc0ae2cf995a}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\cdc\acm">
+      <UniqueIdentifier>{bf1f22a8-8609-45e9-b701-93abc62db085}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\dummy">
+      <UniqueIdentifier>{d5b73400-cbef-4759-b305-1b98ec4a48f0}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\hid">
+      <UniqueIdentifier>{c0f5969a-b240-4245-98dd-bbbf01c8ce7d}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\hid\generic">
+      <UniqueIdentifier>{518f50b5-4bf5-4a2c-88f1-c8804676ffb3}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\hid\kbd">
+      <UniqueIdentifier>{ccbf274a-f437-4779-ad06-c4a4d8e3a462}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\hid\mouse">
+      <UniqueIdentifier>{1229e16a-43c9-4efc-bfb5-e59c503f3a1b}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\msc">
+      <UniqueIdentifier>{e68fbc57-b424-4590-8ac9-7e5a1d78d600}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\usbd\class\nrf_dfu_trigger">
+      <UniqueIdentifier>{65e0c43e-e430-42db-8dce-59f9cfa1f595}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Source files\ble_nus">
+      <UniqueIdentifier>{1b8de2a3-45ae-44b2-b2f0-ea91c8a11f84}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="Header files\ble_nus">
+      <UniqueIdentifier>{ca14490c-607f-4260-b6f5-2dece53e6531}</UniqueIdentifier>
+    </Filter>
   </ItemGroup>
   <ItemGroup>
     <ClCompile Include="main.c">
@@ -1380,9 +1458,6 @@
     <ClCompile Include="adgs1412.c">
       <Filter>Source files</Filter>
     </ClCompile>
-    <ClCompile Include="builtin_saadc.c.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
     <ClCompile Include="sw_drv.c">
       <Filter>Source files</Filter>
     </ClCompile>
@@ -1428,9 +1503,6 @@
     <ClCompile Include="elite_dac.c">
       <Filter>Source files</Filter>
     </ClCompile>
-    <ClCompile Include="pel10_io.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
     <ClCompile Include="btn.c">
       <Filter>Source files</Filter>
     </ClCompile>
@@ -1443,6 +1515,198 @@
     <ClCompile Include="edc20_cycle_iv_mode.c">
       <Filter>Source files</Filter>
     </ClCompile>
+    <ClCompile Include="builtin_saadc.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="cpg.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="cpg11_io.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="tw1508.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="max14802.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="pel20_io.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.c">
+      <Filter>Source files\Device-specific files\Libraries</Filter>
+    </ClCompile>
+    <ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.h">
+      <Filter>Header files\Device-specific files\Libraries</Filter>
+    </ClInclude>
+    <ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo_internal.h">
+      <Filter>Header files\Device-specific files\Libraries</Filter>
+    </ClInclude>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.c">
+      <Filter>Source files\usbd</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.c">
+      <Filter>Source files\usbd</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.c">
+      <Filter>Source files\usbd</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.c">
+      <Filter>Source files\usbd</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.c">
+      <Filter>Source files\usbd\class\cdc\acm</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.c">
+      <Filter>Source files\usbd\class\nrf_dfu_trigger</Filter>
+    </ClCompile>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_class_base.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_descriptor.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_langid.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_request.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_types.h">
+      <Filter>Header files\usbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio.h">
+      <Filter>Header files\usbd\class\audio</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_desc.h">
+      <Filter>Header files\usbd\class\audio</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_internal.h">
+      <Filter>Header files\usbd\class\audio</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_types.h">
+      <Filter>Header files\usbd\class\audio</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_desc.h">
+      <Filter>Header files\usbd\class\cdc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_types.h">
+      <Filter>Header files\usbd\class\cdc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.h">
+      <Filter>Header files\usbd\class\cdc\acm</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm_internal.h">
+      <Filter>Header files\usbd\class\cdc\acm</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy.h">
+      <Filter>Header files\usbd\class\dummy</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_internal.h">
+      <Filter>Header files\usbd\class\dummy</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_types.h">
+      <Filter>Header files\usbd\class\dummy</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid.h">
+      <Filter>Header files\usbd\class\hid</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid_types.h">
+      <Filter>Header files\usbd\class\hid</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic.h">
+      <Filter>Header files\usbd\class\hid\generic</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_desc.h">
+      <Filter>Header files\usbd\class\hid\generic</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_internal.h">
+      <Filter>Header files\usbd\class\hid\generic</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd.h">
+      <Filter>Header files\usbd\class\hid\kbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_desc.h">
+      <Filter>Header files\usbd\class\hid\kbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_internal.h">
+      <Filter>Header files\usbd\class\hid\kbd</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse.h">
+      <Filter>Header files\usbd\class\hid\mouse</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_desc.h">
+      <Filter>Header files\usbd\class\hid\mouse</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_internal.h">
+      <Filter>Header files\usbd\class\hid\mouse</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc.h">
+      <Filter>Header files\usbd\class\msc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_desc.h">
+      <Filter>Header files\usbd\class\msc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_internal.h">
+      <Filter>Header files\usbd\class\msc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_scsi.h">
+      <Filter>Header files\usbd\class\msc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_types.h">
+      <Filter>Header files\usbd\class\msc</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.h">
+      <Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_internal.h">
+      <Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
+    </ClInclude>
+    <ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_types.h">
+      <Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
+    </ClInclude>
+    <ClCompile Include="usbd.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="usbd_dfu_trigger.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="le_uart_srv.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.c">
+      <Filter>Source files\ble_nus</Filter>
+    </ClCompile>
+    <ClInclude Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.h">
+      <Filter>Header files\ble_nus</Filter>
+    </ClInclude>
+    <ClCompile Include="uart.drv.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="elite_mmm.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="pel_v3_0.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="pel_v3_0_io.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="led_rgb.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <None Include="nRF52840_XXAA_S140_reserve.lds">
@@ -1756,9 +2020,6 @@
     <ClInclude Include="fs.h">
       <Filter>Header files</Filter>
     </ClInclude>
-    <ClInclude Include="board_pulse_e_load01.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
     <ClInclude Include="edc.h">
       <Filter>Header files</Filter>
     </ClInclude>
@@ -1786,9 +2047,6 @@
     <ClInclude Include="elite_def.h">
       <Filter>Header files</Filter>
     </ClInclude>
-    <ClInclude Include="pel10_io.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
     <ClInclude Include="btn.h">
       <Filter>Header files</Filter>
     </ClInclude>
@@ -1798,6 +2056,42 @@
     <ClInclude Include="pel.h">
       <Filter>Header files</Filter>
     </ClInclude>
+    <ClInclude Include="tw1508.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="cpg.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="cpg11_io.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="max14802.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="pel20_io.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="usbd.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="uart_drv.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="le_uart_srv.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="elite_mmm.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="pel_v3_0.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="pel_v3_0_io.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="led_rgb.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
   </ItemGroup>
   <ItemGroup>
     <Text Include="..\bmd380_sdk\external\segger_rtt\license\license.txt">

btn.c

@@ -104,8 +104,12 @@ static BtnEvent_t btn_event(void)
 static void btn_event_shortx1_cb(void)
 {
     NRF_LOG_INFO("BTN_EVENT_SHORTx1");
+#if (DEF_APA102_2020_ENABLED)
     const struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
-    static int idx                  = 0;
+#elif (DEF_RGB_ENABLED)
+    const struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
+#endif
+    static int idx = 0;
     led_set(color[idx++ % COUNTOF(color)]);
 }
 
@@ -119,7 +123,7 @@ static void btn_event_shortx2_cb(void)
         led_set(LED_BLUE);
         vTaskDelay(pdMS_TO_TICKS(250));
     }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }
 
 static void btn_event_shortx3_cb(void)
@@ -131,21 +135,25 @@ static void btn_event_shortx3_cb(void)
         vTaskDelay(pdMS_TO_TICKS(250));
         led_set(LED_CYAN);
         vTaskDelay(pdMS_TO_TICKS(250));
-        led_set(LED_IDEL_DISCONNECT);
+        led_set(LED_IDLE_DISCONNECTED);
     }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }
 
 static void btn_event_long(void)
 {
     NRF_LOG_INFO("BTN_EVENT_LONG");
+#if (DEF_APA102_2020_ENABLED)
     led_set(LED_ORANGE);
+#elif (DEF_RGB_ENABLED)
+    led_set(LED_YELLOW);
+#endif
     if (!wait_released(TIME_PRESS_LONG))
     {
         led_set(LED_OFF);
         elite_board_power_off();
     }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }
 
 static void btn_task(void *pvArg)
@@ -190,5 +198,3 @@ void btn_init(void)
 }
 
 #endif /* ! DEF_BTN_ENABLED */
-
-

builtin_saadc.c

@@ -330,12 +330,26 @@ static int read_multiple_milivolt_ex(uint32_t *p_channels, float *p_val, uint32_
     return 0;
 }
 
+static int adc_convert_multiple_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
+{
+    int32_t int_val[16];
+
+    for (int i = 0; i < count; i++)
+    {
+        int_val[i] = p_val_14bit[i]; // copy values
+        p_val_f[i] = adc_convert_milivolt(m_gain, int_val[i], false);
+    }
+
+    return 0;
+}
+
 const adc_drv_if_t builtin_saadc = {
-    .init                      = init,
-    .reset                     = reset,
-    .read                      = read,
-    .gain                      = gain,
-    .read_multiple_channels    = read_channels,
-    .read_multiple_channels_ex = read_channels_ex,
-    .read_multiple_milivolt_ex = read_multiple_milivolt_ex,
+    .init                          = init,
+    .reset                         = reset,
+    .read                          = read,
+    .gain                          = gain,
+    .read_multiple_channels        = read_channels,
+    .read_multiple_channels_ex     = read_channels_ex,
+    .read_multiple_milivolt_ex     = read_multiple_milivolt_ex,
+    .adc_convert_multiple_milivolt = adc_convert_multiple_milivolt,
 };

cpg.h

@@ -6,6 +6,16 @@ extern "C"
 {
 #endif
 
+#include "app_config.h"
+#include "elite.h"
+#include "elite_board.h"
+
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  4
+#define VERSION_DATE_DAY    9
+#define VERSION_DATE_HOUR   14
+#define VERSION_DATE_MINUTE 45
+
     const elite_instance_t *cpg_init(void);
 
 #ifdef __cplusplus

cpg10_dev_mode.h

@@ -1,21 +0,0 @@
-#ifndef __CPG10_DEV_MODE_H__
-#define __CPG10_DEV_MODE_H__
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "app_button.h"
-#include "elite_board.h"
-
-#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-    void dev_mode_set_cpg10_electrodes(uint8_t *ins);
-    void dev_mode_gpio_function(uint8_t *ins);
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! __CPG10_DEV_MODE_H__ */

cpg10_io.c

@@ -1,146 +0,0 @@
-#include "elite_board.h"
-
-#include "nrf_spim.h"
-
-#include "FreeRTOS.h"
-#include "semphr.h"
-#include "task.h"
-
-#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-
-void spim_xfer(uint32_t cs_pin,
-               nrf_spim_mode_t spi_mode,
-               uint8_t *p_tx_buffer,
-               uint16_t tx_buffer_length,
-               uint8_t *p_rx_buf,
-               uint16_t rx_buffer_length)
-{
-    __disable_irq();
-
-    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
-
-    switch (spi_mode)
-    {
-        default:
-        case NRF_SPIM_MODE_0:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_1:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_2:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_3:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
-            break;
-    }
-
-    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
-
-    NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
-    NRF_SPIM3->TXD.PTR    = (uint32_t)p_tx_buffer;
-
-    NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
-    NRF_SPIM3->RXD.PTR    = (uint32_t)p_rx_buf;
-
-    nrf_gpio_pin_clear(cs_pin);
-
-    NRF_SPIM3->EVENTS_END  = 0;
-    NRF_SPIM3->TASKS_START = 1;
-    do {
-    } while (NRF_SPIM3->EVENTS_END == 0);
-
-    nrf_gpio_pin_set(cs_pin);
-
-    __enable_irq();
-}
-
-void cpg10_io_init(void)
-{
-    const uint32_t pel_pins_default_high[] = {
-        VA1H_PIN,
-        VA2H_PIN,
-        VA3H_PIN,
-        VA4H_PIN,
-        VB1H_PIN,
-        VB2H_PIN,
-        VB3H_PIN,
-        VB4H_PIN,
-        LED_R_PIN,
-        LED_G_PIN,
-        LED_B_PIN
-    };
-
-    const uint32_t pel_pins_default_low[] = {
-        ADPT0_S4_PIN,
-        ADPT0_S3_PIN,
-        ADPT0_S2_PIN,
-        ADPT0_S1_PIN,
-        ADPT_LE_PIN,
-        ADPT_CLR_PIN,
-        TW_SCKI_0_PIN,
-        TW_SCKI_1_PIN,
-        HV_EN_PIN,
-        ADPT1_S1_PIN,
-        VA1L_PIN,
-        VA2L_PIN,
-        VA3L_PIN,
-        VA4L_PIN,
-        VB1L_PIN,
-        VB2L_PIN,
-        VB3L_PIN,
-        VB4L_PIN,
-        ADPT1_S4_PIN,
-        ADPT1_S3_PIN,
-        ADPT1_S2_PIN
-    };
-
-    for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
-    {
-        nrf_gpio_pin_set(pel_pins_default_high[i]);
-        nrf_gpio_cfg_output(pel_pins_default_high[i]);
-    }
-
-    for (int i = 0; i < COUNTOF(pel_pins_default_low); i++)
-    {
-        nrf_gpio_pin_clear(pel_pins_default_low[i]);
-        nrf_gpio_cfg_output(pel_pins_default_low[i]);
-    }
-
-    nrf_gpio_cfg_input(AIN0_PIN, NRF_GPIO_PIN_NOPULL);
-    nrf_gpio_cfg_input(AIN1_PIN, NRF_GPIO_PIN_NOPULL);
-
-    // Config spi module
-    nrf_gpio_pin_set(CS_MEM_PIN);
-    nrf_gpio_cfg_output(CS_MEM_PIN);
-    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
-    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
-    nrf_gpio_pin_clear(SPIM_CLK_PIN);
-    nrf_gpio_cfg_output(SPIM_CLK_PIN);
-    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
-
-    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
-    NRF_SPIM3->ORC             = 0x00000000;
-    NRF_SPIM3->FREQUENCY       = SPIM_FREQUENCY_FREQUENCY_M32;
-    NRF_SPIM3->CSNPOL          = SPIM_CSNPOL_CSNPOL_LOW;
-    NRF_SPIM3->IFTIMING.CSNDUR = 8;
-    NRF_SPIM3->PSEL.CSN        = CS_MEM_PIN;
-    NRF_SPIM3->PSEL.SCK        = SPIM_CLK_PIN;
-    NRF_SPIM3->PSEL.MOSI       = SPIM_MOSI_PIN;
-    NRF_SPIM3->PSEL.MISO       = SPIM_MISO_PIN;
-    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
-}
-
-#endif

cpg10_io.h

@@ -1,71 +0,0 @@
-#ifndef __CPG10_IO_H__
-#define __CPG10_IO_H__
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "app_config.h"
-#include "elite_board.h"
-#include "nrf_gpio.h"
-#include "nrf_spim.h"
-
-#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-
-#define UNDEF_GPIO    0xFFFFFFFF
-#define ADPT0_S4_PIN  NRF_GPIO_PIN_MAP(0, 22)
-#define ADPT0_S3_PIN  NRF_GPIO_PIN_MAP(0, 25)
-#define ADPT0_S2_PIN  NRF_GPIO_PIN_MAP(0, 19)
-#define ADPT0_S1_PIN  NRF_GPIO_PIN_MAP(0, 21)
-#define ADPT_LE_PIN   NRF_GPIO_PIN_MAP(0, 17)
-#define ADPT_CLR_PIN  NRF_GPIO_PIN_MAP(0, 20)
-#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
-#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
-#define HV_EN_PIN     NRF_GPIO_PIN_MAP(0, 11)
-#define SPIM_CLK_PIN  NRF_GPIO_PIN_MAP(0, 12)
-#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
-#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
-#define ADPT1_S1_PIN  NRF_GPIO_PIN_MAP(0, 6)
-#define CS_MEM_PIN    NRF_GPIO_PIN_MAP(0, 27)
-#define VA1H_PIN      NRF_GPIO_PIN_MAP(0, 26)
-#define VA1L_PIN      NRF_GPIO_PIN_MAP(0, 4)
-#define VA2H_PIN      NRF_GPIO_PIN_MAP(0, 1)
-#define VA2L_PIN      NRF_GPIO_PIN_MAP(0, 29)
-#define VA3H_PIN      NRF_GPIO_PIN_MAP(0, 0)
-#define VA3L_PIN      NRF_GPIO_PIN_MAP(0, 31)
-#define VA4H_PIN      NRF_GPIO_PIN_MAP(1, 15)
-#define VA4L_PIN      NRF_GPIO_PIN_MAP(0, 2)
-#define AIN0_PIN      NRF_GPIO_PIN_MAP(0, 30)
-#define AIN1_PIN      NRF_GPIO_PIN_MAP(0, 28)
-#define VB1H_PIN      NRF_GPIO_PIN_MAP(1, 12)
-#define VB1L_PIN      NRF_GPIO_PIN_MAP(1, 14)
-#define VB2H_PIN      NRF_GPIO_PIN_MAP(0, 3)
-#define VB2L_PIN      NRF_GPIO_PIN_MAP(1, 13)
-#define VB3H_PIN      NRF_GPIO_PIN_MAP(1, 3)
-#define VB3L_PIN      NRF_GPIO_PIN_MAP(1, 10)
-#define VB4H_PIN      NRF_GPIO_PIN_MAP(1, 6)
-#define VB4L_PIN      NRF_GPIO_PIN_MAP(1, 11)
-#define LED_R_PIN     NRF_GPIO_PIN_MAP(0, 10)
-#define LED_G_PIN     NRF_GPIO_PIN_MAP(0, 9)
-#define LED_B_PIN     NRF_GPIO_PIN_MAP(1, 2)
-#define ADPT1_S4_PIN  NRF_GPIO_PIN_MAP(0, 24)
-#define ADPT1_S3_PIN  NRF_GPIO_PIN_MAP(0, 23)
-#define ADPT1_S2_PIN  NRF_GPIO_PIN_MAP(0, 16)
-
-    void spim_xfer(uint32_t cs_pin,
-                   nrf_spim_mode_t spi_mode,
-                   uint8_t *p_tx_buffer,
-                   uint16_t tx_buffer_length,
-                   uint8_t *p_rx_buf,
-                   uint16_t rx_buffer_length);
-
-    void cpg10_io_init(void);
-
-#endif /* ! DEF_ELITE_MODEL */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! __CPG10_IO_H__ */

cpg11_io.c

@@ -0,0 +1,574 @@
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+#include "nrf_log.h"
+#include "nrf_spim.h"
+#include "nrf_timer.h"
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "task.h"
+
+#pragma GCC optimize("O2")
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+
+typedef struct
+{
+    const uint32_t gpiote_idx[4];
+    NRF_TIMER_Type *TMR_A;
+    NRF_TIMER_Type *TMR_B;
+    uint32_t TMR_A_IRQn;
+    uint32_t TMR_B_IRQn;
+    pulse_gen_t *p_pulse_gen;
+    struct
+    {
+        pulse_gen_t *p_pulse_gen;
+        uint32_t len;
+        uint32_t select;
+    } private;
+} pulse_gen_hw_t;
+
+pulse_gen_hw_t pulse_gen_hw[] = {
+    {.gpiote_idx  = { 0, 1, 2, 3 },
+     .TMR_A       = NRF_TIMER1,
+     .TMR_B       = NRF_TIMER3,
+     .TMR_A_IRQn  = TIMER1_IRQn,
+     .TMR_B_IRQn  = TIMER3_IRQn,
+     .p_pulse_gen = NULL,
+     .private     = { NULL, 0, 0 }},
+    {.gpiote_idx  = { 4, 5, 6, 7 },
+     .TMR_A       = NRF_TIMER2,
+     .TMR_B       = NRF_TIMER4,
+     .TMR_A_IRQn  = TIMER2_IRQn,
+     .TMR_B_IRQn  = TIMER4_IRQn,
+     .p_pulse_gen = NULL,
+     .private     = { NULL, 0, 0 }},
+};
+
+__STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
+{
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+
+    pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
+}
+
+__STATIC_INLINE void cpg11_tmrB_cb(uint32_t hw_idx)
+{
+    if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3])
+    {
+        uint32_t sel = pulse_gen_hw[hw_idx].private.select;
+
+        pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3] = 0;
+
+        if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
+        {
+            pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt--;
+        }
+
+        for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
+        {
+            sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
+            if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
+            {
+                pulse_gen_hw[hw_idx].private.select = sel;
+                config_tmrB(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
+                return;
+            }
+        }
+
+        pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
+        pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
+    }
+}
+
+__STATIC_INLINE void config_tmrA(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
+{
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+
+    pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1 + p_pulse_gen->idle_us * 16;
+    pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
+    pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
+    pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
+}
+
+__STATIC_INLINE void cpg11_tmrA_cb(uint32_t hw_idx)
+{
+    if (pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3])
+    {
+        uint32_t sel = pulse_gen_hw[hw_idx].private.select;
+
+        pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3] = 0;
+
+        for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
+        {
+            sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
+            if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
+            {
+                config_tmrA(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
+                return;
+            }
+        }
+    }
+}
+
+void TIMER1_IRQHandler(void)
+{
+    cpg11_tmrA_cb(0);
+}
+
+void TIMER3_IRQHandler(void)
+{
+    cpg11_tmrB_cb(0);
+}
+
+void TIMER2_IRQHandler(void)
+{
+    cpg11_tmrA_cb(1);
+}
+
+void TIMER4_IRQHandler(void)
+{
+    cpg11_tmrB_cb(1);
+}
+
+void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id)
+{
+    for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
+    {
+        for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
+        {
+            if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
+            {
+                taskENTER_CRITICAL();
+                pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = 0xFFFFFFFF;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = 0xFFFFFFFF;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = 0xFFFFFFFF;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = 0xFFFFFFFF;
+                taskEXIT_CRITICAL();
+            }
+        }
+    }
+}
+
+void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id)
+{
+    for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
+    {
+        for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
+        {
+            if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
+            {
+                taskENTER_CRITICAL();
+                pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = pulse_gen_hw[i].p_pulse_gen[j].VAxH;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = pulse_gen_hw[i].p_pulse_gen[j].VBxH;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = pulse_gen_hw[i].p_pulse_gen[j].VAxL;
+                pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = pulse_gen_hw[i].p_pulse_gen[j].VBxL;
+                taskEXIT_CRITICAL();
+            }
+        }
+    }
+}
+
+void cpg11_pulse_stop(uint32_t hw_idx)
+{
+    pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
+    pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
+
+    sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+    sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+
+    sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+    sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+}
+
+void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
+{
+    pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
+    pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
+
+    sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+    sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+
+    sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+    sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+    nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+    nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+
+    uint32_t offs = 8 * hw_idx;
+
+    NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
+    NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
+    NRF_PPI->CHENSET          = (1 << (offs + 0));
+
+    NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
+    NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
+    NRF_PPI->CHENSET          = (1 << (offs + 1));
+
+    NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
+    NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
+    NRF_PPI->CHENSET          = (1 << (offs + 2));
+
+    NRF_PPI->CH[offs + 3].EEP   = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
+    NRF_PPI->CH[offs + 3].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
+    NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->TASKS_START;
+    NRF_PPI->CHENSET            = (1 << (offs + 3));
+
+    NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
+    NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
+    NRF_PPI->CHENSET          = (1 << (offs + 4));
+
+    NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
+    NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
+    NRF_PPI->CHENSET          = (1 << (offs + 5));
+
+    NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
+    NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
+    NRF_PPI->CHENSET          = (1 << (offs + 6));
+
+    NRF_PPI->CH[offs + 7].EEP   = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
+    NRF_PPI->CH[offs + 7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
+    NRF_PPI->FORK[offs + 7].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->TASKS_START;
+    NRF_PPI->CHENSET            = (1 << (offs + 7));
+
+    pulse_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
+    pulse_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
+
+    pulse_gen_hw[hw_idx].TMR_B->CC[0]    = 1 + p_pulse_gen->point_us[3] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[1]    = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[2]    = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->CC[3]    = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
+    pulse_gen_hw[hw_idx].TMR_B->SHORTS   = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
+    pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
+
+    pulse_gen_hw[hw_idx].TMR_A->CC[0]    = 1;
+    pulse_gen_hw[hw_idx].TMR_A->CC[1]    = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
+    pulse_gen_hw[hw_idx].TMR_A->CC[2]    = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
+    pulse_gen_hw[hw_idx].TMR_A->CC[3]    = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
+    pulse_gen_hw[hw_idx].TMR_A->SHORTS   = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
+    pulse_gen_hw[hw_idx].TMR_A->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
+
+    sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+    sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+
+    pulse_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
+}
+
+void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
+{
+    taskENTER_CRITICAL();
+
+    if (pulse_gen_hw[hw_idx].private.p_pulse_gen != NULL)
+    {
+        pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
+        pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
+
+        sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+        sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
+
+        sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+        sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
+
+        nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
+        nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
+        nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
+        nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
+
+        vPortFree(pulse_gen_hw[hw_idx].private.p_pulse_gen);
+    }
+
+    uint32_t swap_idle_us = p_pulse_gen[len - 1].idle_us;
+    for (int i = len - 1; i > 0; i--)
+    {
+        p_pulse_gen[i].idle_us = p_pulse_gen[i - 1].idle_us;
+    }
+    p_pulse_gen[0].idle_us = swap_idle_us;
+
+    pulse_gen_hw[hw_idx].p_pulse_gen    = p_pulse_gen;
+    pulse_gen_hw[hw_idx].private.len    = len;
+    pulse_gen_hw[hw_idx].private.select = 0;
+
+    pulse_gen_hw[hw_idx].private.p_pulse_gen = pvPortMalloc(sizeof(pulse_gen_t) * len);
+    memcpy(pulse_gen_hw[hw_idx].private.p_pulse_gen, pulse_gen_hw[hw_idx].p_pulse_gen, sizeof(*p_pulse_gen) * len);
+
+    taskEXIT_CRITICAL();
+};
+
+void cpg_pulse_default_demo_ext(void)
+{
+    bool e1 = 1;
+    bool e2 = 1;
+    bool e3 = 1;
+    bool e4 = 1;
+    pulse_gen_t p_pulse_genA[2];
+    pulse_gen_t p_pulse_genB[2];
+
+    p_pulse_genA[0] = (pulse_gen_t) {
+        .VBxH        = VB1H_PIN,
+        .VBxL        = VB1L_PIN,
+        .VAxH        = VA1H_PIN,
+        .VAxL        = VA1L_PIN,
+        .point_us[0] = 1,
+        .point_us[1] = 50,
+        .point_us[2] = 1,
+        .point_us[3] = 0,
+        .point_us[4] = 1,
+        .point_us[5] = 50,
+        .point_us[6] = 1,
+        .idle_us     = 1000,
+        .pulse_cnt   = UINT32_MAX,
+        .pulse_id    = PULSE_ID_A,
+    };
+
+    p_pulse_genA[1] = (pulse_gen_t) {
+        .VBxH        = VB2H_PIN,
+        .VBxL        = VB2L_PIN,
+        .VAxH        = VA2H_PIN,
+        .VAxL        = VA2L_PIN,
+        .point_us[0] = 1,
+        .point_us[1] = 100,
+        .point_us[2] = 1,
+        .point_us[3] = 0,
+        .point_us[4] = 1,
+        .point_us[5] = 100,
+        .point_us[6] = 1,
+        .idle_us     = 2000,
+        .pulse_cnt   = UINT32_MAX,
+        .pulse_id    = PULSE_ID_B,
+    };
+
+    p_pulse_genB[0] = (pulse_gen_t) {
+        .VBxH        = VB3H_PIN,
+        .VBxL        = VB3L_PIN,
+        .VAxH        = VA3H_PIN,
+        .VAxL        = VA3L_PIN,
+        .point_us[0] = 1,
+        .point_us[1] = 150,
+        .point_us[2] = 1,
+        .point_us[3] = 0,
+        .point_us[4] = 1,
+        .point_us[5] = 150,
+        .point_us[6] = 1,
+        .idle_us     = 3000,
+        .pulse_cnt   = UINT32_MAX,
+        .pulse_id    = PULSE_ID_C,
+    };
+
+    p_pulse_genB[1] = (pulse_gen_t) {
+        .VBxH        = VB4H_PIN,
+        .VBxL        = VB4L_PIN,
+        .VAxH        = VA4H_PIN,
+        .VAxL        = VA4L_PIN,
+        .point_us[0] = 1,
+        .point_us[1] = 200,
+        .point_us[2] = 1,
+        .point_us[3] = 0,
+        .point_us[4] = 1,
+        .point_us[5] = 200,
+        .point_us[6] = 1,
+        .idle_us     = 4000,
+        .pulse_cnt   = UINT32_MAX,
+        .pulse_id    = PULSE_ID_D,
+    };
+
+    if (e1)
+    {
+        nrf_gpio_pin_clear(p_pulse_genA[0].VBxL);
+        nrf_gpio_pin_clear(p_pulse_genA[0].VBxH);
+        nrf_gpio_pin_clear(p_pulse_genA[0].VAxL);
+        nrf_gpio_pin_clear(p_pulse_genA[0].VAxH);
+    }
+
+    if (e2)
+    {
+        nrf_gpio_pin_clear(p_pulse_genA[1].VBxL);
+        nrf_gpio_pin_clear(p_pulse_genA[1].VBxH);
+        nrf_gpio_pin_clear(p_pulse_genA[1].VAxL);
+        nrf_gpio_pin_clear(p_pulse_genA[1].VAxH);
+    }
+
+    if (e3)
+    {
+        nrf_gpio_pin_clear(p_pulse_genB[0].VBxL);
+        nrf_gpio_pin_clear(p_pulse_genB[0].VBxH);
+        nrf_gpio_pin_clear(p_pulse_genB[0].VAxL);
+        nrf_gpio_pin_clear(p_pulse_genB[0].VAxH);
+    }
+
+    if (e4)
+    {
+        nrf_gpio_pin_clear(p_pulse_genB[1].VBxL);
+        nrf_gpio_pin_clear(p_pulse_genB[1].VBxH);
+        nrf_gpio_pin_clear(p_pulse_genB[1].VAxL);
+        nrf_gpio_pin_clear(p_pulse_genB[1].VAxH);
+    }
+
+    if (e1 && e2)
+    {
+        cpg11_pulse_init(0, p_pulse_genA, 2);
+        cpg11_pulse_start(0, p_pulse_genA);
+    }
+    else if (e1 && e2 == 0)
+    {
+        cpg11_pulse_init(0, p_pulse_genA, 1);
+        cpg11_pulse_start(0, p_pulse_genA);
+    }
+    else if (e2 && e1 == 0)
+    {
+        cpg11_pulse_init(0, &p_pulse_genA[1], 1);
+        cpg11_pulse_start(0, &p_pulse_genA[1]);
+    }
+
+    if (e3 && e4)
+    {
+        cpg11_pulse_init(1, p_pulse_genB, 2);
+        cpg11_pulse_start(1, p_pulse_genB);
+    }
+    else if (e3 && e4 == 0)
+    {
+        cpg11_pulse_init(1, p_pulse_genB, 1);
+        cpg11_pulse_start(1, p_pulse_genB);
+    }
+    else if (e4 && e3 == 0)
+    {
+        cpg11_pulse_init(1, &p_pulse_genB[1], 1);
+        cpg11_pulse_start(1, &p_pulse_genB[1]);
+    }
+}
+
+void cpg11_io_init(void)
+{
+    const uint32_t pel_pins_default_high[] = {
+        LED_R_PIN,
+        LED_G_PIN,
+        CS_MEM_PIN,
+        ADPT_CLR_PIN,
+        ADPT_LE_PIN
+    };
+
+    const uint32_t pel_pins_default_low[] = {
+        LED_B_PIN,
+        TW_SCKI_0_PIN,
+        TW_SCKI_1_PIN,
+        ADPT_CLK_PIN,
+        HV_EN_PIN,
+        SPIM_CLK_PIN,
+        SPIM_MOSI_PIN,
+        SPIM_MISO_PIN,
+        ADPT0_S4_PIN,
+        ADPT0_S3_PIN,
+        ADPT0_S2_PIN,
+        ADPT0_S1_PIN,
+        ADPT1_S4_PIN,
+        ADPT1_S3_PIN,
+        ADPT1_S2_PIN,
+        ADPT1_S1_PIN,
+
+        VB1L_PIN,
+        VB1H_PIN,
+        VA1L_PIN,
+        VA1H_PIN,
+
+        VB2L_PIN,
+        VB2H_PIN,
+        VA2L_PIN,
+        VA2H_PIN,
+
+        VB3L_PIN,
+        VB3H_PIN,
+        VA3L_PIN,
+        VA3H_PIN,
+
+        VB4L_PIN,
+        VB4H_PIN,
+        VA4L_PIN,
+        VA4H_PIN,
+    };
+
+    for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
+    {
+        nrf_gpio_cfg_output(pel_pins_default_high[i]);
+        nrf_gpio_pin_set(pel_pins_default_high[i]);
+    }
+
+    for (int i = 0; i < COUNTOF(pel_pins_default_low); i++)
+    {
+        nrf_gpio_cfg_output(pel_pins_default_low[i]);
+        nrf_gpio_pin_clear(pel_pins_default_low[i]);
+    }
+
+    nrf_gpio_cfg_input(AIN0_PIN, NRF_GPIO_PIN_NOPULL);
+    nrf_gpio_cfg_input(AIN1_PIN, NRF_GPIO_PIN_NOPULL);
+
+    for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
+    {
+        pulse_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
+        pulse_gen_hw[i].TMR_B->MODE      = NRF_TIMER_MODE_TIMER;
+        pulse_gen_hw[i].TMR_B->BITMODE   = NRF_TIMER_BIT_WIDTH_32;
+
+        pulse_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
+        pulse_gen_hw[i].TMR_A->MODE      = NRF_TIMER_MODE_TIMER;
+        pulse_gen_hw[i].TMR_A->BITMODE   = NRF_TIMER_BIT_WIDTH_32;
+
+        sd_nvic_SetPriority(pulse_gen_hw[i].TMR_B_IRQn, _PRIO_APP_HIGH);
+        sd_nvic_SetPriority(pulse_gen_hw[i].TMR_A_IRQn, _PRIO_APP_HIGH);
+    }
+
+    for (int i = 0; i < 2; i++)
+    {
+        pulse_gen_hw[i].p_pulse_gen[0].VAxH         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[0].VBxH         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[0].VAxL         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[0].VBxL         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[1].VAxH         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[1].VBxH         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[1].VAxL         = 0xFFFFFFFF;
+        pulse_gen_hw[i].p_pulse_gen[1].VBxL         = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[0].VAxH = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[0].VBxH = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[0].VAxL = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[0].VBxL = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[1].VAxH = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[1].VBxH = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[1].VAxL = 0xFFFFFFFF;
+        pulse_gen_hw[i].private.p_pulse_gen[1].VBxL = 0xFFFFFFFF;
+    }
+}
+
+#endif

cpg11_io.h

@@ -0,0 +1,98 @@
+#ifndef __CPG10_IO_H__
+#define __CPG10_IO_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite_board.h"
+#include "nrf_gpio.h"
+#include "nrf_spim.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+
+#define UNDEF_GPIO      0xFFFFFFFF
+#define VA1H_PIN        NRF_GPIO_PIN_MAP(0, 22)
+#define VA1L_PIN        NRF_GPIO_PIN_MAP(0, 25)
+#define VB1H_PIN        NRF_GPIO_PIN_MAP(0, 19)
+#define VB1L_PIN        NRF_GPIO_PIN_MAP(0, 21)
+#define VA2H_PIN        NRF_GPIO_PIN_MAP(0, 17)
+#define VA2L_PIN        NRF_GPIO_PIN_MAP(0, 20)
+#define TW_SCKI_0_PIN   NRF_GPIO_PIN_MAP(0, 14)
+#define TW_SCKI_1_PIN   NRF_GPIO_PIN_MAP(0, 13)
+#define ADPT_CLK_PIN    NRF_GPIO_PIN_MAP(0, 11)
+#define HV_EN_PIN       NRF_GPIO_PIN_MAP(1, 8)
+#define SPIM_CLK_PIN    NRF_GPIO_PIN_MAP(0, 12)
+#define SPIM_MISO_PIN   NRF_GPIO_PIN_MAP(1, 9)
+#define VB2H_PIN        NRF_GPIO_PIN_MAP(0, 8)
+#define VB2L_PIN        NRF_GPIO_PIN_MAP(0, 6)
+#define VA3H_PIN        NRF_GPIO_PIN_MAP(0, 5)
+#define VA3L_PIN        NRF_GPIO_PIN_MAP(0, 27)
+#define VB3H_PIN        NRF_GPIO_PIN_MAP(0, 26)
+#define VB3L_PIN        NRF_GPIO_PIN_MAP(0, 4)
+#define VA4H_PIN        NRF_GPIO_PIN_MAP(0, 1)
+#define VA4L_PIN        NRF_GPIO_PIN_MAP(0, 0)
+#define ADPT_LE_PIN     NRF_GPIO_PIN_MAP(0, 31)
+#define ADPT_CLR_PIN    NRF_GPIO_PIN_MAP(1, 15)
+#define CS_MEM_PIN      NRF_GPIO_PIN_MAP(0, 2)
+#define AIN0_PIN        NRF_GPIO_PIN_MAP(0, 30)
+#define AIN1_PIN        NRF_GPIO_PIN_MAP(0, 28)
+#define ADPT0_S4_PIN    NRF_GPIO_PIN_MAP(1, 12)
+#define ADPT0_S3_PIN    NRF_GPIO_PIN_MAP(1, 14)
+#define ADPT0_S2_PIN    NRF_GPIO_PIN_MAP(0, 3)
+#define ADPT0_S1_PIN    NRF_GPIO_PIN_MAP(1, 13)
+#define ADPT1_S4_PIN    NRF_GPIO_PIN_MAP(1, 3)
+#define ADPT1_S3_PIN    NRF_GPIO_PIN_MAP(1, 10)
+#define ADPT1_S2_PIN    NRF_GPIO_PIN_MAP(1, 6)
+#define ADPT1_S1_PIN    NRF_GPIO_PIN_MAP(1, 11)
+#define LED_R_PIN       NRF_GPIO_PIN_MAP(0, 10)
+#define LED_G_PIN       NRF_GPIO_PIN_MAP(0, 9)
+#define LED_B_PIN       NRF_GPIO_PIN_MAP(1, 2)
+#define VB4H_PIN        NRF_GPIO_PIN_MAP(0, 24)
+#define VB4L_PIN        NRF_GPIO_PIN_MAP(0, 23)
+#define SPIM_MOSI_PIN   NRF_GPIO_PIN_MAP(0, 7)
+#define TW_SDI_PIN      NRF_GPIO_PIN_MAP(0, 7)
+#define ADPT_DIN_PIN    NRF_GPIO_PIN_MAP(0, 7)
+#define UNCONNECTED_PIN NRF_GPIO_PIN_MAP(0, 2)
+
+#define PULSE_ID_NULL   0
+#define PULSE_ID_A      1
+#define PULSE_ID_B      2
+#define PULSE_ID_C      3
+#define PULSE_ID_D      4
+
+    typedef struct
+    {
+        uint32_t VAxH;
+        uint32_t VAxL;
+        uint32_t VBxH;
+        uint32_t VBxL;
+        uint32_t idle_us;     // min: 500us, max: 60sec
+        uint32_t point_us[7]; // toggle point timestamp
+        uint32_t pulse_cnt;   // min: 1, max: 0xFFFFFFFF
+        uint32_t pulse_id;    // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
+    } pulse_gen_t;
+
+    void spim_xfer(uint32_t cs_pin,
+                   nrf_spim_mode_t spi_mode,
+                   uint8_t *p_tx_buffer,
+                   uint16_t tx_buffer_length,
+                   uint8_t *p_rx_buf,
+                   uint16_t rx_buffer_length);
+
+    void cpg11_io_init(void);
+    void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
+    void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
+    void cpg11_pulse_stop(uint32_t hw_idx);
+    void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
+    void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
+
+#endif /* ! DEF_ELITE_MODEL */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __CPG10_IO_H__ */

dfu_over_usb.py

@@ -0,0 +1,28 @@
+import os
+import sys
+import serial.tools.list_ports
+
+def find_com_port(vid, pid):
+    ports = serial.tools.list_ports.comports()
+    for port in ports:
+        if port.vid == vid and port.pid == pid:
+            print(f"Found device: {port.device}")
+            print(f"Description: {port.description}")
+            print(f"HWID: {port.hwid}")
+            return port.device
+    print(f"No COM port found for VID={vid:04X}, PID={pid:04X}")
+    return None
+
+def main(args): 
+    os.chdir(os.path.dirname(os.path.realpath(__file__)))
+    portname = find_com_port(0x1915, 0x521F)
+    if portname is None:
+        return
+    else:
+        os.system('nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -b 115200 -p ' + portname)
+
+
+if __name__ == '__main__':
+    main(sys.argv)
+
+#nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -snr DC051F1F71DA

edc20.c

@@ -1,22 +1,26 @@
 #include "app_config.h"
-#include "elite_board.h"
-
-#include "edc.h"
-#include "elite.h"
-#include "elite_adc.h"
-#include "elite_correction.h"
-#include "elite_dac.h"
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 
 #include "adc_drv.h"
 #include "dac_drv.h"
+#include "edc.h"
+#include "elite.h"
+#include "elite_adc.h"
+#include "elite_board.h"
+#include "elite_correction.h"
+#include "elite_dac.h"
 #include "led_drv.h"
 #include "sw_drv.h"
 
 #include "nrf_log.h"
 
-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#include "timers.h"
 
-extern ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len);
+#define DEV_IDENTIFICATION_DELAY_MS 3000
+
+static TimerHandle_t dev_identify_timer_handle = NULL;
+
+extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);
 
 static void dummy(uint8_t *ins, uint16_t size)
 {
@@ -419,7 +423,7 @@ static void dev_mode_read_output_pin(void)
                      (output.cs_adc << 1) |
                      output.cs_dac;
 
-    le_event_upadate((uint8_t *)&pin_out_status, sizeof(pin_out_status));
+    le_event_update((uint8_t *)&pin_out_status, sizeof(pin_out_status));
 
     NRF_LOG_INFO("pin_out_status = 0x%08X", pin_out_status);
     NRF_LOG_INFO("| %-32s | %d |", "pin_out_status[31:21] resvd", output.resvd);
@@ -467,7 +471,7 @@ static void dev_mode_read_input_pin(void)
                        (input.shut_down << 1) |
                        input.int9466;
 
-    le_event_upadate((uint8_t *)&pin_input_status, sizeof(pin_input_status));
+    le_event_update((uint8_t *)&pin_input_status, sizeof(pin_input_status));
 
     NRF_LOG_INFO("pin_input_status = 0x%08X", pin_input_status);
     NRF_LOG_INFO("| %-32s | %d |", "pin_input_status[31:3] resvd", input.resvd);
@@ -670,7 +674,7 @@ static void dev_mode_spi2_transfer(uint8_t *ins, uint16_t size)
 
     if (miso_data_len > 0)
     {
-        le_event_upadate(miso_data, miso_data_len);
+        le_event_update(miso_data, miso_data_len);
     }
 }
 
@@ -845,8 +849,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
         .hh     = 22,
         .mm     = 40,
     };
-    extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
-    le_data_upadate((void *)&cis_ver, sizeof(cis_ver));
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)&cis_ver, sizeof(cis_ver));
 }
 
 __WEAK uint16_t bat_volt_read(void)
@@ -867,8 +871,8 @@ static void cis_volt(uint8_t *ins, uint16_t size)
         .opcode = CIS_VOLT,
         .volt   = bat_volt_read(),
     };
-    extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
-    le_data_upadate((void *)&cis_volt, sizeof(cis_volt));
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)&cis_volt, sizeof(cis_volt));
 }
 
 __WEAK uint16_t temperature_read(void)
@@ -890,8 +894,8 @@ static void cis_temperature(uint8_t *ins, uint16_t size)
         .opcode      = CIS_TEMPERATURE,
         .temperature = __REV(temperature_read()),
     };
-    extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
-    le_data_upadate((void *)&cis_temperature, sizeof(cis_temperature));
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)&cis_temperature, sizeof(cis_temperature));
 }
 
 static void cis_cali(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
@@ -913,22 +917,58 @@ static void vis_rst(uint8_t *ins, uint16_t size)
 
     uint16_t volt = Usercode_Correction_to_DAC(edc.instru.VoutGainLv, 25000);
     dac_write_through(DAC0, volt);
-
-    led_mode(NO_EVENT);
 }
 static void vis_sti(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
 static void vis_int(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
 
-static void vis_device_shiny(uint8_t *ins, uint16_t size)
+static void device_identification_callback(TimerHandle_t xTimer)
 {
-    NRF_LOG_INFO("%s", __FUNCTION__);
-    led_set(LED_IDENTICY_DEV);
+    extern bool is_ble_connected(void);
+    if (!is_ble_connected())
+    {
+        led_set(LED_IDLE_DISCONNECTED);
+        return;
+    }
+
+    extern bool is_mode_running(void);
+    if (is_mode_running())
+    {
+        led_set(LED_REC);
+    }
+    else
+    {
+        led_set(LED_IDLE_CONNECTED);
+    }
 }
 
-static void vis_shiny_dis(uint8_t *ins, uint16_t size)
+void start_device_identification_timer(void)
+{
+    if (dev_identify_timer_handle == NULL)
+    {
+        dev_identify_timer_handle = xTimerCreate("dev_identify_timer",
+                                                 pdMS_TO_TICKS(DEV_IDENTIFICATION_DELAY_MS),
+                                                 pdFALSE,
+                                                 NULL,
+                                                 device_identification_callback);
+
+        if (dev_identify_timer_handle == NULL)
+        {
+            NRF_LOG_ERROR("dev_identify_timer creation failed");
+            return;
+        }
+    }
+
+    if (xTimerStart(dev_identify_timer_handle, 0) != pdPASS)
+    {
+        NRF_LOG_ERROR("dev_identify_timer start failed");
+    }
+}
+
+static void vis_dev_shiny(uint8_t *ins, uint16_t size)
 {
     NRF_LOG_INFO("%s", __FUNCTION__);
-    led_set(LED_IDEL_CONNECTED);
+    led_set(LED_IDENTIFY_DEV);
+    start_device_identification_timer();
 }
 
 static void curve_iv(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
@@ -970,8 +1010,7 @@ elite_instance_t edc20_elite_instance = {
                  [VIS_RST]          = vis_rst,
                  [VIS_STI]          = vis_sti,
                  [VIS_INT]          = vis_int,
-                 [VIS_DEVICE_SHINY] = vis_device_shiny,
-                 [VIS_SHINY_DIS]    = vis_shiny_dis,
+                 [VIS_DEVICE_SHINY] = vis_dev_shiny,
                  },
     .ris_func = {
                  [CURVE_IV]                  = curve_iv,

edc20_cycle_iv_mode.c

@@ -16,7 +16,7 @@
 #include <stdlib.h>
 #include <string.h>
 
-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 
 #define OUT_0 DAC0
 #define OUT_1 DAC1
@@ -311,6 +311,7 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
         NRF_LOG_INFO("%s", info);
     }
 
+    led_set(LED_REC);
     dac_write_through(OUT_0, mV_out_0(&dac_param));
 
     dac_param.mV_output = dac_param.mV_start;
@@ -350,6 +351,7 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
     edc20_dac_tim_stop();
     edc20_adc_tim_stop();
     dac_init();
+    led_set(LED_IDLE_CONNECTED);
 
     if (1)
     {
@@ -445,6 +447,11 @@ static uint32_t convt_uS_step(uint32_t idx)
     }
 }
 
+bool is_mode_running(void)
+{
+    return running;
+}
+
 void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size)
 {
     /*

edc20_io.c

@@ -14,7 +14,7 @@
 #include "dac_drv.h"
 #include "sw_drv.h"
 
-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 
 //==========================================================
 // gpio

elite.c

@@ -2,12 +2,16 @@
 
 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
 #include "elite_dev.h"
-#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 #include "edc.h"
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
 #include "pel.h"
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#include "pel_v3_0.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #include "cpg.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+#include "elite_mmm.h"
 #else
 #error "Unknown DEF_ELITE_MODEL"
 #endif
@@ -102,13 +106,17 @@ void elite_init(void)
 {
 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
     p_instance = dev_init();
-#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
     edc.init();
     p_instance = edc.p_elite_instance;
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
     p_instance = pel_init();
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    p_instance = pel_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
     p_instance = cpg_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+    p_instance = mmm_init();
 #else
 #error "Unknown DEF_ELITE_MODEL"
 #endif
@@ -120,8 +128,8 @@ void elite_init(void)
 void elite_instr_send(void *p, size_t size)
 {
     /* reply the instruction */
-    extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
-    le_data_upadate(p, size);
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update(p, size);
 
     xMessageBufferSend(instr_msg, p, size, portMAX_DELAY);
 }

elite.h

@@ -2,19 +2,20 @@
 #define __ELITE_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
+#include "app_config.h"
+#include "app_error.h"
+
 #include "elite_def.h"
 
-#include "app_config.h"
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdlib.h>
-
-void elite_init(void);
-void elite_instr_send(void *p, size_t size);
+    void elite_init(void);
+    void elite_instr_send(void *p, size_t size);
+    ret_code_t le_data_notify(uint8_t *p_value, uint16_t len);
+    ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
+    ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait);
 
 #ifdef __cplusplus
 }

elite_board.c

@@ -2,21 +2,43 @@
 
 void elite_board_init(void)
 {
-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
     edc20_io_init();
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-    pel10_io_init();
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-    cpg10_io_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+    pel20_io_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    pel20_io_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+    cpg11_io_init();
+#endif
+}
+
+void elite_board_demo(void)
+{
+#if (DEF_ELITE_DEMO_WO_SOFTDEVICE || DEF_ELITE_DEMO_W_SOFTDEVICE)
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+    extern void pel_pulse_gen_demo(void);
+    pel_pulse_gen_demo();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    extern void pel_pulse_gen_demo(void);
+    pel_pulse_gen_demo();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+    cpg_pulse_default_demo_ext();
+#endif
+
 #endif
 }
 
 void elite_board_power_off(void)
 {
-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
     edc20_io_power_off();
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #endif
 }
 
@@ -24,11 +46,13 @@ void elite_drv_init(void)
 {
     btn_init();
     led_init();
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
     sw_init();
     adc_init();
     dac_init();
     fs_init();
+    usbd_init();
+    uart_init();
 
 #if (DEF_FS_ENABLED && DEF_FS_RTT_DIR)
     if (1)

elite_board.h

@@ -13,14 +13,19 @@ extern "C"
 #include "fs.h"
 #include "led_drv.h"
 #include "sw_drv.h"
+#include "uart_drv.h"
+#include "usbd.h"
 
 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
-#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 #include "edc20_io.h"
-#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-#include "pel10_io.h"
-#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
-#include "cpg10_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+#include "pel20_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#include "pel_v3_0_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+#include "cpg11_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
 #else
 #error "Not implemented xxx_io.h"
 #endif
@@ -28,6 +33,7 @@ extern "C"
     void elite_board_init(void);
     void elite_board_power_off(void);
     void elite_drv_init(void);
+    void elite_board_demo(void);
 
 #ifdef __cplusplus
 }

elite_def.h

@@ -2,7 +2,8 @@
 #define __ELITE_DEF_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include <stdint.h>
@@ -20,32 +21,32 @@ extern "C" {
 #define VIS_DEVICE_SHINY 0x10
 #define VIS_SHINY_DIS    0x20
 
-// RIS (real instruction)
-enum all_mode_e
-{
-    CURVE_IV                  = 0x01, // I-V Curve
-    CURVE_IV_CY               = 0x02, // Cycle I-V
-    CURVE_VO                  = 0x03, // Function Generator
-    CURVE_RT                  = 0x04, // R-T Graph
-    CURVE_VT                  = 0x05, // V-T Graph
-    CURVE_IT                  = 0x06, // I-T Graph
-    CURVE_CC                  = 0x07, // Constant Current (CC)
-    CURVE_OCP                 = 0x08, // Open Circuit Potential (OCP)
-    CURVE_CV                  = 0x09, // Cyclic Voltammetry (CV)
-    CURVE_LSV                 = 0x0A, // Linear Sweep Voltammetry (LSV)
-    CURVE_CA                  = 0x0B, // Chronoamperometric Graph (CA)
-    CURVE_CP                  = 0x0C, // Chronopotentiometry (CP)
-    CURVE_UNI_PULSE           = 0x0D, // Pulse Sensing (universal pulse)
-    CURVE_DPV                 = 0x0E, // Differential Pulse Voltammetry (DPV)
-    CURVE_DPV_ADVANCE         = 0x0F,
-    CURVE_DPV_SMPRATE         = 0x10,
-    CURVE_DPV_ADVANCE_SMPRATE = 0x11,
-    CURVE_EIS                 = 0x12,
-    CURVE_CF                  = 0x13, // Constant Frequency(CF)
-    CURVE_CALI                = 0xF1,
-    SET_SAMPLE_RATE           = 0xE0,
-    DEV_MODE                  = 0xFF, // Develop Mode
-};
+    // RIS (real instruction)
+    enum all_mode_e
+    {
+        CURVE_IV                  = 0x01, // I-V Curve
+        CURVE_IV_CY               = 0x02, // Cycle I-V
+        CURVE_VO                  = 0x03, // Function Generator
+        CURVE_RT                  = 0x04, // R-T Graph
+        CURVE_VT                  = 0x05, // V-T Graph
+        CURVE_IT                  = 0x06, // I-T Graph
+        CURVE_CC                  = 0x07, // Constant Current (CC)
+        CURVE_OCP                 = 0x08, // Open Circuit Potential (OCP)
+        CURVE_CV                  = 0x09, // Cyclic Voltammetry (CV)
+        CURVE_LSV                 = 0x0A, // Linear Sweep Voltammetry (LSV)
+        CURVE_CA                  = 0x0B, // Chronoamperometric Graph (CA)
+        CURVE_CP                  = 0x0C, // Chronopotentiometry (CP)
+        CURVE_UNI_PULSE           = 0x0D, // Pulse Sensing (universal pulse)
+        CURVE_DPV                 = 0x0E, // Differential Pulse Voltammetry (DPV)
+        CURVE_DPV_ADVANCE         = 0x0F,
+        CURVE_DPV_SMPRATE         = 0x10,
+        CURVE_DPV_ADVANCE_SMPRATE = 0x11,
+        CURVE_EIS                 = 0x12,
+        CURVE_CF                  = 0x13, // Constant Frequency(CF)
+        CURVE_CALI                = 0xF1,
+        SET_SAMPLE_RATE           = 0xE0,
+        DEV_MODE                  = 0xFF, // Develop Mode
+    };
 
 // CIS (control instruction)
 #define CIS_VERSION        0x40
@@ -62,7 +63,7 @@ enum all_mode_e
 #define CTL_RD_ADC         0x7A
 #define CTL_RESET          0x11
 
-// mode parameter
+    // mode parameter
 
 #define VMAX(v1, v2)       ((v1 >= v2) ? v1 : v2)
 #define VMIN(v1, v2)       ((v1 < v2) ? v1 : v2)
@@ -100,18 +101,12 @@ enum all_mode_e
 #define COLOR_WHITE        0x09
 #define COLOR_YELLOWGREEN  0x0A
 
-#define BT_WAIT            0x01
-#define NO_EVENT           0x02
-#define PRE_WORK           0x03
-#define WORKING            0x04
-#define POST_WORK          0x05
-
-typedef struct
-{
-    void (*cis_func[256])(uint8_t *ins, uint16_t size);
-    void (*vis_func[256])(uint8_t *ins, uint16_t size);
-    void (*ris_func[256])(uint8_t *ins, uint16_t size);
-} elite_instance_t;
+    typedef struct
+    {
+        void (*cis_func[256])(uint8_t *ins, uint16_t size);
+        void (*vis_func[256])(uint8_t *ins, uint16_t size);
+        void (*ris_func[256])(uint8_t *ins, uint16_t size);
+    } elite_instance_t;
 
 #ifdef __cplusplus
 }

elite_dev.c

@@ -21,8 +21,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
         VERSION_DATE_HOUR,
         VERSION_DATE_MINUTE,
     };
-    extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
-    le_data_upadate((void *)cis_ver, sizeof(cis_ver));
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }
 
 static void vis_rst(uint8_t *ins, uint16_t size)
@@ -30,7 +30,7 @@ static void vis_rst(uint8_t *ins, uint16_t size)
     NRF_LOG_INFO("%s", __FUNCTION__);
 }
 
-#define UNDEF_GPIO  0xFFFFFFFF
+#define UNDEF_GPIO 0xFFFFFFFF
 
 // The GPIO corresponding to the pin
 const uint32_t pin_to_gpio_table[] = {
@@ -194,14 +194,10 @@ void dev_mode_gpio_function(uint8_t *ins)
         }
 
         case 0x01: {
-            uint32_t high_low = p_ins->param[0];
-            uint32_t set_pin[44] = {6, 8, 9, 10, 11, 12, 13, 14, 16, 17,
-                                 18, 20, 25, 26, 27, 28, 29, 30, 31, 32,
-                                 33, 34, 36, 37, 38, 39, 40, 41, 42, 43,
-                                 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-                                 59, 60, 61, 62};
+            uint32_t high_low    = p_ins->param[0];
+            uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
 
-            for (int i=0; i<sizeof(set_pin) / sizeof(set_pin[0]); i++)
+            for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
             {
                 set_bmd380_pin_signal(set_pin[i], high_low);
             }

elite_mmm.c

@@ -1,9 +1,36 @@
-#include "cpg10_dev_mode.h"
+#include "elite_mmm.h"
 
 #include "nrf_gpio.h"
 #include "nrf_log.h"
 
-#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10)
+#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  6
+#define VERSION_DATE_DAY    4
+#define VERSION_DATE_HOUR   16
+#define VERSION_DATE_MINUTE 44
+static void cis_version(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    uint8_t cis_ver[] = {
+        CIS_VERSION,
+        VERSION_DATE_YEAR,
+        VERSION_DATE_MONTH,
+        VERSION_DATE_DAY,
+        VERSION_DATE_HOUR,
+        VERSION_DATE_MINUTE,
+    };
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)cis_ver, sizeof(cis_ver));
+}
+
+static void vis_rst(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+}
+
+#define UNDEF_GPIO 0xFFFFFFFF
 
 // The GPIO corresponding to the pin
 const uint32_t pin_to_gpio_table[] = {
@@ -120,6 +147,7 @@ static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low)
 
     if (gpio != UNDEF_GPIO)
     {
+        nrf_gpio_cfg_output(gpio);
         nrf_gpio_pin_write(gpio, high_low);
         NRF_LOG_INFO("set pin %d (gpio %d) = %d", pin, gpio, high_low);
     }
@@ -133,10 +161,16 @@ static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low)
                 06h: P0.22_GPIO
                 08h: P0.25_GPIO
                 ......
-                3Eh:P0.16_GPIO
+                3Eh: P0.16_GPIO
             -ss: signal         00h-01h
                 00h: low
                 01h: high
+
+    (2)0x3000FFA001ss
+        -func: set_bmd380 all pin signal high/low
+        -ss: signal         00h-01h
+            00h: low
+            01h: high
 */
 void dev_mode_gpio_function(uint8_t *ins)
 {
@@ -158,107 +192,65 @@ void dev_mode_gpio_function(uint8_t *ins)
             set_bmd380_pin_signal(pin, high_low);
             break;
         }
+
+        case 0x01: {
+            uint32_t high_low    = p_ins->param[0];
+            uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
+
+            for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
+            {
+                set_bmd380_pin_signal(set_pin[i], high_low);
+            }
+            break;
+        }
     }
 }
 
-#define ELECTRODES_A1HB1L 0
-#define ELECTRODES_A1LB1H 1
-#define ELECTRODES_A2HB2L 2
-#define ELECTRODES_A2LB2H 3
-#define ELECTRODES_A3HB3L 4
-#define ELECTRODES_A3LB3H 5
-#define ELECTRODES_A4HB4L 6
-#define ELECTRODES_A4LB4H 7
-static void cpg10_electrodes(uint32_t electrodes_mode)
-{
-    switch (electrodes_mode)
-    {
-        case ELECTRODES_A1HB1L:
-            nrf_gpio_pin_write(VB1H_PIN, 1);
-            nrf_gpio_pin_write(VA1L_PIN, 0);
-            nrf_gpio_pin_write(VA1H_PIN, 0);
-            nrf_gpio_pin_write(VB1L_PIN, 1);
-            break;
-
-        case ELECTRODES_A1LB1H:
-            nrf_gpio_pin_write(VA1H_PIN, 1);
-            nrf_gpio_pin_write(VB1L_PIN, 0);
-            nrf_gpio_pin_write(VB1H_PIN, 0);
-            nrf_gpio_pin_write(VA1L_PIN, 1);
-            break;
-
-        case ELECTRODES_A2HB2L:
-            nrf_gpio_pin_write(VB2H_PIN, 1);
-            nrf_gpio_pin_write(VA2L_PIN, 0);
-            nrf_gpio_pin_write(VA2H_PIN, 0);
-            nrf_gpio_pin_write(VB2L_PIN, 1);
-            break;
-
-        case ELECTRODES_A2LB2H:
-            nrf_gpio_pin_write(VA2H_PIN, 1);
-            nrf_gpio_pin_write(VB2L_PIN, 0);
-            nrf_gpio_pin_write(VB2H_PIN, 0);
-            nrf_gpio_pin_write(VA2L_PIN, 1);
-            break;
-
-        case ELECTRODES_A3HB3L:
-            nrf_gpio_pin_write(VB3H_PIN, 1);
-            nrf_gpio_pin_write(VA3L_PIN, 0);
-            nrf_gpio_pin_write(VA3H_PIN, 0);
-            nrf_gpio_pin_write(VB3L_PIN, 1);
-            break;
-
-        case ELECTRODES_A3LB3H:
-            nrf_gpio_pin_write(VA3H_PIN, 1);
-            nrf_gpio_pin_write(VB3L_PIN, 0);
-            nrf_gpio_pin_write(VB3H_PIN, 0);
-            nrf_gpio_pin_write(VA3L_PIN, 1);
-            break;
-
-        case ELECTRODES_A4HB4L:
-            nrf_gpio_pin_write(VB4H_PIN, 1);
-            nrf_gpio_pin_write(VA4L_PIN, 0);
-            nrf_gpio_pin_write(VA4H_PIN, 0);
-            nrf_gpio_pin_write(VB4L_PIN, 1);
-            break;
-
-        case ELECTRODES_A4LB4H:
-            nrf_gpio_pin_write(VA4H_PIN, 1);
-            nrf_gpio_pin_write(VB4L_PIN, 0);
-            nrf_gpio_pin_write(VB4H_PIN, 0);
-            nrf_gpio_pin_write(VA4L_PIN, 1);
-            break;
-    }
-}
-
-/*
-    dev_mode_set_cpg10_electrodes
-    (1)0x3000FF90nn
-            -func: dev_mode_set_cpg10_electrodes
-            -nn: electrodes mode     01h-09h
-                01h: ELECTRODES_A1HB1L
-                02h: ELECTRODES_A1HB1L
-                03h: ELECTRODES_A1LB1H
-                04h: ELECTRODES_A2HB2L
-                05h: ELECTRODES_A2LB2H
-                06h: ELECTRODES_A3HB3L
-                07h: ELECTRODES_A3LB3H
-                08h: ELECTRODES_A4HB4L
-                09h: ELECTRODES_A4LB4H
-*/
-void dev_mode_set_cpg10_electrodes(uint8_t *ins)
+#define MAGIC_NUM 0xFF00
+static void dev_mode(uint8_t *ins, uint16_t size)
 {
+    NRF_LOG_INFO("%s", __FUNCTION__);
     struct __PACKED
     {
         uint8_t id     : 4;
         uint8_t        : 4;
         uint16_t magic : 16;
-        uint8_t dev_opcode;
-        uint8_t electrodes_opcode;
+        uint8_t opcode;
         uint8_t param[];
     } *p_ins = (void *)ins;
 
-    cpg10_electrodes(p_ins->electrodes_opcode);
+    if (p_ins->magic != MAGIC_NUM)
+    {
+        return;
+    }
+
+    // TODO...
+    switch (p_ins->opcode)
+    {
+        case 0xA0:
+            dev_mode_gpio_function(ins);
+            break;
+
+        default:
+            break;
+    }
 }
 
-#endif
+const elite_instance_t mmm_elite_instance = {
+    .cis_func = {
+                 [CIS_VERSION] = cis_version,
+                 },
+    .vis_func = {
+                 [VIS_RST] = vis_rst,
+                 },
+    .ris_func = {
+                 [DEV_MODE] = dev_mode,
+                 }
+};
+
+const elite_instance_t *mmm_init(void)
+{
+    return &mmm_elite_instance;
+}
+
+#endif /* !DEF_ELITE_MODEL */

elite_mmm.h

@@ -0,0 +1,18 @@
+#ifndef __ELITE_MMM_H__
+#define __ELITE_MMM_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite.h"
+
+    const elite_instance_t *mmm_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __ELITE_MMM_H__ */

le_adv.c

@@ -1,29 +1,14 @@
-#include <stdbool.h>
-#include <stdint.h>
-
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
 #include "app_config.h"
-#include "apply_old_config.h"
-#include "sdk_config.h"
+#include "app_error.h"
 
-#include "nrf_log.h"
-#include "nrf_log_ctrl.h"
-#include "nrf_log_default_backends.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-
-#include "nrf_sdh.h"
-#include "nrf_sdh_ble.h"
-#include "nrf_sdh_freertos.h"
-
-#include "ble_advdata.h"
 #include "ble_advertising.h"
-#include "ble_srv_common.h"
+
+#include "nrf_sdh_ble.h"
 
 #ifdef __cplusplus
 }

le_dfu.c

@@ -1,31 +1,15 @@
-#include <stdbool.h>
-#include <stdint.h>
-
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
 #include "app_config.h"
-#include "apply_old_config.h"
-#include "sdk_config.h"
-
-#include "nrf_log.h"
-#include "nrf_log_ctrl.h"
-#include "nrf_log_default_backends.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-
-#include "nrf_sdh.h"
-#include "nrf_sdh_ble.h"
-#include "nrf_sdh_freertos.h"
+#include "app_error.h"
 
 #include "ble_conn_state.h"
-
 #include "ble_dfu.h"
-#include "ble_dis.h"
-#include "nrf_ble_gatt.h"
+
+#include "nrf_log.h"
 
 #ifdef __cplusplus
 }

le_elite_srv.c

@@ -1,22 +1,27 @@
-#include "sdk_common.h"
+#ifdef __cplusplus
+extern "C"
+{
+#endif
 
+#include <string.h>
+
+#include "app_config.h"
 #include "app_error.h"
-#include "ble_conn_state.h"
-#include "ble_gatts.h"
+
 #include "ble_srv_common.h"
-#include "elite.h"
-#include "nrf_sdh_ble.h"
 
 #include "nrf_log.h"
-#include "nrf_log_ctrl.h"
-#include "nrf_log_default_backends.h"
+#include "nrf_sdh_ble.h"
 
 #include "FreeRTOS.h"
-#include "semphr.h"
+#include "message_buffer.h"
 #include "task.h"
 
-#include <stdlib.h>
-#include <string.h>
+#include "elite.h"
+
+#ifdef __cplusplus
+}
+#endif
 
 #if NRF_MODULE_ENABLED(BLE_ELITE_SRV)
 
@@ -46,6 +51,8 @@ static elite_context_t elite_context = {
     .event_notify_enable = false,
 };
 
+static MessageBufferHandle_t async_notify_msg = NULL;
+
 static void on_connect(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
 {
     taskENTER_CRITICAL();
@@ -100,6 +107,7 @@ static void on_write(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
             break;
 
         case BLE_UUID_ELITE_INST_CHAR:
+            NRF_LOG_INFO("");
             NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
             elite_instr_send((void *)p_evt_write->data, p_evt_write->len);
             break;
@@ -204,17 +212,40 @@ static uint32_t elite_srv_init(void)
     // Register a handler for BLE events.
     NRF_SDH_BLE_OBSERVER(m_ble_elite_observer, BLE_ELITE_OBSERVER_PRIO, on_ble_evt_handler, &elite_context);
 
-    NRF_LOG_INFO("+---------------------+------+");
-    NRF_LOG_INFO("| data_char_handle    | 0x%02x |", elite_context.data_char_handle.value_handle);
-    NRF_LOG_INFO("| inst_char_handle    | 0x%02x |", elite_context.inst_char_handle.value_handle);
-    NRF_LOG_INFO("| event_char_handle   | 0x%02x |", elite_context.event_char_handle.value_handle);
-    NRF_LOG_INFO("+---------------------+------+");
-
     return NRF_SUCCESS;
 }
 
+static void le_elite_srv_async_notify_task(void *p_arg)
+{
+    static uint8_t buf[256];
+    for (;;)
+    {
+        uint32_t size = xMessageBufferReceive(async_notify_msg, buf, sizeof(buf), portMAX_DELAY);
+        if (size)
+        {
+            for (uint32_t i = 0; i < 10; i++)
+            {
+                ret_code_t ret = le_event_notify(buf, size);
+                if (ret == NRF_ERROR_BUSY)
+                {
+                    vTaskDelay(pdMS_TO_TICKS(5));
+                }
+                else
+                {
+                    break;
+                }
+            }
+        }
+    }
+}
+
 void le_elite_srv_init(void)
 {
+    async_notify_msg = xMessageBufferCreate(10 * 1024);
+    if (xTaskCreate(le_elite_srv_async_notify_task, "async_notify", 512, NULL, 4, NULL) == pdFALSE)
+    {
+        APP_ERROR_CHECK(NRF_ERROR_RESOURCES);
+    }
     ret_code_t err_code = elite_srv_init();
     APP_ERROR_CHECK(err_code);
 
@@ -233,7 +264,7 @@ ret_code_t le_data_notify(uint8_t *p_value, uint16_t len)
     return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
 }
 
-ret_code_t le_data_upadate(uint8_t *p_value, uint16_t len)
+ret_code_t le_data_update(uint8_t *p_value, uint16_t len)
 {
     static uint8_t values[1 + NRF_SDH_BLE_GATT_MAX_MTU_SIZE - 3];
 
@@ -267,7 +298,7 @@ ret_code_t le_event_notify(uint8_t *p_value, uint16_t len)
     return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
 }
 
-ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len)
+ret_code_t le_event_update(uint8_t *p_value, uint16_t len)
 {
     // update database.
     ble_gatts_value_t gatts_value = {
@@ -278,4 +309,37 @@ ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len)
     return sd_ble_gatts_value_set(BLE_CONN_HANDLE_INVALID, elite_context.event_char_handle.value_handle, &gatts_value);
 }
 
+ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait)
+{
+    ret_code_t ret                      = NRF_SUCCESS;
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+
+    if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0)
+    {
+        // not inside ISR (Thread mode)
+        if (ms_to_wait)
+        {
+            ret = xMessageBufferSend(async_notify_msg, p_value, len, pdMS_TO_TICKS(ms_to_wait)) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
+        }
+        else
+        {
+            taskENTER_CRITICAL();
+            ret = xMessageBufferSend(async_notify_msg, p_value, len, 0) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
+            taskEXIT_CRITICAL();
+        }
+    }
+    else
+    {
+        // inside  ISR
+        ret = xMessageBufferSendFromISR(async_notify_msg, p_value, len, &xHigherPriorityTaskWoken) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
+        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    }
+    return ret;
+}
+
+bool is_ble_connected(void)
+{
+    return (elite_context.conn_handle != BLE_CONN_HANDLE_INVALID);
+}
+
 #endif // NRF_MODULE_ENABLED(BLE_ELITE)

le_gap.c

@@ -1,22 +1,18 @@
-#include <stdbool.h>
-#include <stdint.h>
-#include <string.h>
-
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
-#include "app_config.h"
-#include "apply_old_config.h"
-#include "sdk_config.h"
+#include <string.h>
 
-#include "nrf_sdh.h"
-#include "nrf_sdh_ble.h"
+#include "app_config.h"
+#include "app_error.h"
+#include "app_util.h"
+
+#include "ble_gap.h"
 
 #include "nrf_log.h"
-
-#include "app_error.h"
+#include "nrf_sdh_ble.h"
 
 #ifdef __cplusplus
 }
@@ -64,4 +60,4 @@ void le_gap_disconnect(uint16_t conn_handle, void *p_context)
     {
         NRF_LOG_DEBUG("Disconnected connection handle %d", conn_handle);
     }
-}
+}

le_gatt.c

@@ -1,28 +1,13 @@
-#include <stdbool.h>
-#include <stdint.h>
-
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
 #include "app_config.h"
-#include "apply_old_config.h"
-#include "sdk_config.h"
+#include "app_error.h"
 
-#include "nrf_log.h"
-#include "nrf_log_ctrl.h"
-#include "nrf_log_default_backends.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-
-#include "nrf_sdh.h"
-#include "nrf_sdh_ble.h"
-#include "nrf_sdh_freertos.h"
-
-#include "ble_gatt.h"
 #include "nrf_ble_gatt.h"
+#include "nrf_sdh_ble.h"
 
 #ifdef __cplusplus
 }

le_srv.c

@@ -1,41 +1,28 @@
-#include <stdbool.h>
-#include <stdint.h>
 
 #ifdef __cplusplus
 extern "C"
 {
 #endif
 
+#include <string.h>
+
 #include "app_config.h"
-#include "apply_old_config.h"
-#include "sdk_config.h"
+#include "app_error.h"
 
-#include "nrf_log.h"
-#include "nrf_log_ctrl.h"
-#include "nrf_log_default_backends.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-
-#include "nrf_sdh.h"
-#include "nrf_sdh_ble.h"
-#include "nrf_sdh_freertos.h"
-
-#include "ble_conn_state.h"
-
-#include "ble_dfu.h"
 #include "ble_dis.h"
-#include "nrf_ble_gatt.h"
+#include "ble_srv_common.h"
+
+#include "le_uart_srv.h"
 
 #ifdef __cplusplus
 }
 #endif
 
-#define MANUFACTURER_NAME "MEMCHIP" /**< Manufacturer. Will be passed to Device Information Service. */
-#define HW_REV            STRINGIFY(MAJOR_PRODUCT_NUMBER) "." STRINGIFY(MINOR_PRODUCT_NUMBER) "." STRINGIFY(MAJOR_VERSION_NUMBER) "." STRINGIFY(MINOR_VERSION_NUMBER)
-#define FW_REV            "0.1.0"
-#define SER_NUM           "0000-00-00-00001"
-#define MODULE_NAME       ELITE_DEVICE_NAME
+#define MANUFACTURER_NAME "Wisetop Technology Co." /**< Manufacturer. Will be passed to Device Information Service. */
+#define SERIAL_NUMBER     "0000-00-00-00001"
+#define MODEL_NUMBER      ELITE_HW_NAME
+#define HARDWARE_REVISION STRINGIFY(MAJOR_PRODUCT_NUMBER) "." STRINGIFY(MINOR_PRODUCT_NUMBER) "." STRINGIFY(MAJOR_VERSION_NUMBER) "." STRINGIFY(MINOR_VERSION_NUMBER)
+#define FIRMWARE_REVISION "0.1.0"
 
 static void le_dis_init(void)
 {
@@ -46,10 +33,10 @@ static void le_dis_init(void)
     memset(&sys_id, 0, sizeof(sys_id));
 
     ble_srv_ascii_to_utf8(&dis_init.manufact_name_str, MANUFACTURER_NAME);
-    ble_srv_ascii_to_utf8(&dis_init.fw_rev_str, FW_REV);
-    ble_srv_ascii_to_utf8(&dis_init.hw_rev_str, HW_REV);
-    ble_srv_ascii_to_utf8(&dis_init.model_num_str, MODULE_NAME);
-    ble_srv_ascii_to_utf8(&dis_init.serial_num_str, SER_NUM);
+    ble_srv_ascii_to_utf8(&dis_init.fw_rev_str, FIRMWARE_REVISION);
+    ble_srv_ascii_to_utf8(&dis_init.hw_rev_str, HARDWARE_REVISION);
+    ble_srv_ascii_to_utf8(&dis_init.model_num_str, MODEL_NUMBER);
+    ble_srv_ascii_to_utf8(&dis_init.serial_num_str, SERIAL_NUMBER);
     dis_init.p_sys_id        = &sys_id;
     dis_init.dis_char_rd_sec = SEC_OPEN;
 
@@ -66,4 +53,6 @@ void le_srv_init(void)
 
     extern void le_elite_srv_init(void);
     le_elite_srv_init(); // customer service
+
+    le_uart_srv_init(); // customer service
 }

le_uart_srv.c

@@ -0,0 +1,243 @@
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "app_error.h"
+#include "sdk_common.h"
+
+#include "ble.h"
+#include "ble_srv_common.h"
+#include "le_uart_srv.h"
+#include "uart_drv.h"
+
+#include "nrf_log.h"
+#include "nrf_sdh_ble.h"
+
+#include "FreeRTOS.h"
+#include "message_buffer.h"
+#include "task.h"
+
+#include <string.h>
+
+#ifdef __cplusplus
+}
+#endif
+
+#if NRF_MODULE_ENABLED(BLE_UART_SRV)
+
+#define BLE_UUID_UART_SERVICE   0xFFF8 /**< The UUID of the Service. */
+#define BLE_UUID_UART_RX_CHAR   0xFFF9 /**< The UUID of the RX Characteristic. */
+#define BLE_UUID_UART_TX_CHAR   0xFFFA /**< The UUID of the TX Characteristic. */
+#define BLE_UUID_UART_BAUD_CHAR 0xFFFB /**< The UUID of the Baud Characteristic. */
+
+#define BLE_UART_BASE_UUID                                                                                 \
+    {                                                                                                      \
+        {                                                                                                  \
+            0x9E, 0xCA, 0xDC, 0x24, 0x0E, 0xE5, 0xA9, 0xE0, 0x93, 0xF3, 0xA3, 0xB5, 0x00, 0x00, 0x40, 0x6E \
+        }                                                                                                  \
+    } /**< Used vendor specific UUID. */
+
+#define DEF_BAUD_RATE 115200
+
+typedef struct
+{
+    uint16_t conn_handle;
+    uint16_t service_handle;
+    ble_gatts_char_handles_t rx_handle;
+    ble_gatts_char_handles_t tx_handle;
+    ble_gatts_char_handles_t baud_handle;
+    bool tx_notify_enable;
+    uint8_t rx_buf[BLE_UART_MAX_DATA_LEN];
+    uint8_t tx_buf[BLE_UART_MAX_DATA_LEN];
+    uint32_t baudrate;
+} ble_uart_context_t;
+
+static ble_uart_context_t ble_uart_context = {
+    .conn_handle      = BLE_CONN_HANDLE_INVALID,
+    .tx_notify_enable = false,
+    .baudrate         = DEF_BAUD_RATE
+};
+
+static void on_connect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
+{
+    taskENTER_CRITICAL();
+    p_context->conn_handle = p_ble_evt->evt.common_evt.conn_handle;
+    taskEXIT_CRITICAL();
+}
+
+static void on_disconnect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
+{
+    taskENTER_CRITICAL();
+    p_context->conn_handle      = BLE_CONN_HANDLE_INVALID;
+    p_context->tx_notify_enable = false;
+    taskEXIT_CRITICAL();
+}
+
+static void ble_uart_ccc_update(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
+{
+    ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
+    if (p_evt_write->handle == p_context->tx_handle.cccd_handle)
+    {
+        p_context->tx_notify_enable = ble_srv_is_notification_enabled(p_evt_write->data);
+        NRF_LOG_INFO("data_notify:%s", p_context->tx_notify_enable ? "enable" : "disable");
+    }
+}
+
+static void on_write(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
+{
+    ble_uuid_t uuid                          = p_ble_evt->evt.gatts_evt.params.write.uuid;
+    uint16_t handle                          = p_ble_evt->evt.gatts_evt.params.write.handle;
+    ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
+    switch (uuid.uuid)
+    {
+        case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG:
+            ble_uart_ccc_update(p_ble_evt, p_context);
+            break;
+
+        case BLE_UUID_UART_RX_CHAR:
+            NRF_LOG_INFO("RX:");
+            NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
+            uart_send((void *)p_evt_write->data, p_evt_write->len);
+            break;
+
+        case BLE_UUID_UART_BAUD_CHAR:
+            NRF_LOG_INFO("BAUD: %d", *(uint32_t *)p_evt_write->data);
+            uart_set_baud(*(uint32_t *)p_evt_write->data);
+            break;
+        default:
+            break;
+    }
+}
+
+static void on_hvx_tx_complete(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
+{
+    // TODO...
+}
+
+static void on_ble_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
+{
+    switch (p_ble_evt->header.evt_id)
+    {
+        case BLE_GAP_EVT_CONNECTED:
+            on_connect(p_ble_evt, p_context);
+            break;
+        case BLE_GAP_EVT_DISCONNECTED:
+            on_disconnect(p_ble_evt, p_context);
+            break;
+        case BLE_GATTS_EVT_WRITE:
+            on_write(p_ble_evt, p_context);
+            break;
+        case BLE_GATTS_EVT_HVN_TX_COMPLETE:
+            on_hvx_tx_complete(p_ble_evt, p_context);
+        default:
+            // No implementation needed.
+            break;
+    }
+}
+
+static ret_code_t add_rx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
+{
+    ble_add_char_params_t add_char_params;
+    memset(&add_char_params, 0, sizeof(add_char_params));
+    add_char_params.uuid                     = uuid;
+    add_char_params.uuid_type                = uuid_type;
+    add_char_params.max_len                  = sizeof(context->rx_buf);
+    add_char_params.init_len                 = 0;
+    add_char_params.p_init_value             = (void *)context->rx_buf;
+    add_char_params.is_var_len               = true;
+    add_char_params.write_access             = SEC_OPEN;
+    add_char_params.char_props.write         = 1;
+    add_char_params.char_props.write_wo_resp = 1;
+    add_char_params.read_access              = SEC_OPEN;
+    add_char_params.char_props.read          = 1;
+    ret_code_t err_code                      = characteristic_add(context->service_handle, &add_char_params, &context->rx_handle);
+    return err_code;
+}
+
+static ret_code_t add_tx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
+{
+    ble_add_char_params_t add_char_params;
+    memset(&add_char_params, 0, sizeof(add_char_params));
+    add_char_params.uuid              = uuid;
+    add_char_params.uuid_type         = uuid_type;
+    add_char_params.max_len           = sizeof(context->tx_buf);
+    add_char_params.init_len          = 0;
+    add_char_params.p_init_value      = (void *)context->tx_buf;
+    add_char_params.is_value_user     = true;
+    add_char_params.is_var_len        = true;
+    add_char_params.read_access       = SEC_OPEN;
+    add_char_params.char_props.read   = 1;
+    add_char_params.cccd_write_access = SEC_OPEN;
+    add_char_params.char_props.notify = 1;
+    ret_code_t err_code               = characteristic_add(context->service_handle, &add_char_params, &context->tx_handle);
+    return err_code;
+}
+
+static ret_code_t add_baud_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
+{
+    ble_add_char_params_t add_char_params;
+    memset(&add_char_params, 0, sizeof(add_char_params));
+    add_char_params.uuid             = uuid;
+    add_char_params.uuid_type        = uuid_type;
+    add_char_params.max_len          = sizeof(context->baudrate);
+    add_char_params.init_len         = sizeof(context->baudrate);
+    add_char_params.p_init_value     = (void *)&context->baudrate;
+    add_char_params.is_value_user    = true;
+    add_char_params.is_var_len       = false;
+    add_char_params.write_access     = SEC_OPEN;
+    add_char_params.char_props.write = 1;
+    add_char_params.read_access      = SEC_OPEN;
+    add_char_params.char_props.read  = 1;
+    ret_code_t err_code              = characteristic_add(context->service_handle, &add_char_params, &context->baud_handle);
+    return err_code;
+}
+
+void le_uart_srv_init(void)
+{
+    ret_code_t err_code;
+    uint8_t uuid_type = 0;
+
+    /**@snippet [Adding proprietary Service to the SoftDevice] */
+
+    ble_uuid_t ble_uuid = {
+        .type = BLE_UUID_TYPE_BLE,
+        .uuid = BLE_UUID_UART_SERVICE,
+    };
+
+    // Add the service.
+    err_code = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
+                                        &ble_uuid,
+                                        &ble_uart_context.service_handle);
+    APP_ERROR_CHECK(err_code);
+
+    // Add rx char
+    err_code = add_rx_characteristic(BLE_UUID_UART_RX_CHAR, ble_uuid.type, &ble_uart_context);
+    APP_ERROR_CHECK(err_code);
+
+    // Add tx char
+    err_code = add_tx_characteristic(BLE_UUID_UART_TX_CHAR, ble_uuid.type, &ble_uart_context);
+    APP_ERROR_CHECK(err_code);
+
+    // Add baud char
+    err_code = add_baud_characteristic(BLE_UUID_UART_BAUD_CHAR, ble_uuid.type, &ble_uart_context);
+    APP_ERROR_CHECK(err_code);
+
+    // Register a handler for BLE events.
+    NRF_SDH_BLE_OBSERVER(m_ble_uart_observer, BLE_UART_OBSERVER_PRIO, on_ble_evt_handler, &ble_uart_context);
+}
+
+ret_code_t le_uart_notify(uint8_t *p_value, uint16_t len)
+{
+    ble_gatts_hvx_params_t hvx_params = {
+        .handle = ble_uart_context.tx_handle.value_handle,
+        .type   = BLE_GATT_HVX_NOTIFICATION,
+        .offset = 0,
+        .p_len  = &len,
+        .p_data = p_value,
+    };
+    return sd_ble_gatts_hvx(ble_uart_context.conn_handle, &hvx_params);
+}
+
+#endif

le_uart_srv.h

@@ -0,0 +1,21 @@
+#ifndef __LE_UART_SRV_H__
+#define __LE_UART_SRV_H__
+
+#include "app_config.h"
+#include "sdk_errors.h"
+
+#define OPCODE_LENGTH 1
+#define HANDLE_LENGTH 2
+
+/**@brief   Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
+#if defined(NRF_SDH_BLE_GATT_MAX_MTU_SIZE) && (NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 0)
+#define BLE_UART_MAX_DATA_LEN (NRF_SDH_BLE_GATT_MAX_MTU_SIZE - OPCODE_LENGTH - HANDLE_LENGTH)
+#else
+#define BLE_UART_MAX_DATA_LEN (BLE_GATT_MTU_SIZE_DEFAULT - OPCODE_LENGTH - HANDLE_LENGTH)
+#warning NRF_SDH_BLE_GATT_MAX_MTU_SIZE is not defined.
+#endif
+
+void le_uart_srv_init(void);
+ret_code_t le_uart_notify(uint8_t * p_value, uint16_t len);
+
+#endif // !__LE_UART_SRV_H__

led_drv.c

@@ -1,3 +1,5 @@
+#include "app_config.h"
+#if (DEF_LED_DRV_ENABLED)
 #include "led_drv.h"
 
 #include "nrf_log.h"
@@ -9,60 +11,15 @@
 #if (DEF_APA102_2020_ENABLED)
 #include "apa102_2020.h"
 static const led_drv_if_t *p_inst = &apa102_drv;
+
+#elif (DEF_RGB_ENABLED)
+#include "led_rgb.h"
+static const led_drv_if_t *p_inst = &led_rgb_drv;
+
 #else
 static led_drv_if_t *p_inst = NULL;
 #endif
 
-#if (DEF_LED_DRV_ENABLED)
-
-static bool btWaitLedFlag   = 0;
-static bool noEventLedFlag  = 0;
-static bool preWorkLedFlag  = 0;
-static bool workingLedFlag  = 0;
-static bool postWorkLedFlag = 0;
-
-int32_t led_mode(uint16_t mode_status)
-{
-    btWaitLedFlag   = 0;
-    noEventLedFlag  = 0;
-    preWorkLedFlag  = 0;
-    workingLedFlag  = 0;
-    postWorkLedFlag = 0;
-
-    switch (mode_status)
-    {
-        case BT_WAIT:
-            btWaitLedFlag = 1;
-            NRF_LOG_INFO("%s(BT_WAIT) is unimplemented.", __FUNCTION__);
-            break;
-
-        case NO_EVENT:
-            noEventLedFlag = 1;
-            NRF_LOG_INFO("%s(NO_EVENT) is unimplemented.", __FUNCTION__);
-            break;
-
-        case PRE_WORK:
-            preWorkLedFlag = 1;
-            NRF_LOG_INFO("%s(PRE_WORK) is unimplemented.", __FUNCTION__);
-            break;
-
-        case WORKING:
-            workingLedFlag = 1;
-            NRF_LOG_INFO("%s(WORKING) is unimplemented.", __FUNCTION__);
-            break;
-
-        case POST_WORK:
-            postWorkLedFlag = 1;
-            NRF_LOG_INFO("%s(POST_WORK) is unimplemented.", __FUNCTION__);
-            break;
-
-        default:
-            NRF_LOG_INFO("%s(default) is unimplemented.", __FUNCTION__);
-            break;
-    }
-    return 0;
-}
-
 int32_t led_set(struct led_color color)
 {
     if (p_inst == NULL)
@@ -111,7 +68,14 @@ int32_t led_init(void)
 int32_t led_as_rainbow(void)
 {
     uint8_t color_idx;
+
+#if (DEF_APA102_2020_ENABLED)
     struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
+#endif
+
+#if (DEF_RGB_ENABLED)
+    struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
+#endif
 
     for (int i = 0; i < DEF_LED_COUNT; i++)
     {

led_drv.h

@@ -2,7 +2,8 @@
 #define __LED_DRV_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include "app_config.h"
@@ -11,6 +12,7 @@ extern "C" {
 #define LED_DRV_ERROR   (-1)
 #define LED_DRV_SUCCESS (0)
 
+#if (DEF_APA102_2020_ENABLED)
 #define LED_NONE                        \
     (struct led_color)                  \
     {                                   \
@@ -51,41 +53,45 @@ extern "C" {
     {                                   \
         .R = 0xFF, .G = 0x00, .B = 0xFF \
     }
-#define LED_ORANGE                      \
-    (struct led_color)                  \
-    {                                   \
-        .R = 0xFF, .G = 0x58, .B = 0x09 \
-    }
 
-#define LED_OFF             LED_NONE
-#define LED_ON              LED_GREEN
-#define LED_ERROR           LED_RED
-#define LED_IDEL_DISCONNECT LED_YELLOW
-#define LED_IDEL_CONNECTED  LED_GREEN
-#define LED_REC             LED_CYAN
-#define LED_IDENTICY_DEV    LED_PURPLE
-#define LED_BUTTON_PRESS    LED_YELLOW
+#elif (DEF_RGB_ENABLED)
+#define LED_NONE \
+    (struct led_color) { .R = 0, .G = 0, .B = 0 }
+#define LED_RED \
+    (struct led_color) { .R = 1, .G = 0, .B = 0 }
+#define LED_YELLOW \
+    (struct led_color) { .R = 1, .G = 1, .B = 0 }
+#define LED_WHITE \
+    (struct led_color) { .R = 1, .G = 1, .B = 1 }
+#define LED_GREEN \
+    (struct led_color) { .R = 0, .G = 1, .B = 0 }
+#define LED_CYAN \
+    (struct led_color) { .R = 0, .G = 1, .B = 1 }
+#define LED_BLUE \
+    (struct led_color) { .R = 0, .G = 0, .B = 1 }
+#define LED_PURPLE \
+    (struct led_color) { .R = 1, .G = 0, .B = 1 }
+#endif
 
-#define BT_WAIT             0x01
-#define NO_EVENT            0x02
-#define PRE_WORK            0x03
-#define WORKING             0x04
-#define POST_WORK           0x05
+#define LED_OFF               LED_NONE
+#define LED_ON                LED_GREEN
+#define LED_ERROR             LED_RED
+#define LED_IDLE_DISCONNECTED LED_YELLOW
+#define LED_IDLE_CONNECTED    LED_GREEN
+#define LED_REC               LED_CYAN
+#define LED_IDENTIFY_DEV      LED_PURPLE
+#define LED_BUTTON_PRESS      LED_YELLOW
 
 #if (DEF_LED_DRV_ENABLED)
-    int32_t
-    led_init(void);
-int32_t led_set(struct led_color color);
-int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
-int32_t led_mode(uint16_t mode_status);
-int32_t led_as_rainbow(void);
+    int32_t led_init(void);
+    int32_t led_set(struct led_color color);
+    int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
+    int32_t led_as_rainbow(void);
 
 #else
-
 #define led_init()
 #define led_set(x)
 #define led_single_led_set(x, y, z)
-#define led_mode(x)
 #define led_as_rainbow(x)
 
 #endif /* ! DEF_LED_DRV_ENABLED */

led_rgb.c

@@ -0,0 +1,47 @@
+
+#include "app_config.h"
+
+#if (DEF_RGB_ENABLED)
+#include "led_rgb.h"
+
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+
+static const uint32_t r_pins[DEF_LED_COUNT] = LED_R_PINS;
+static const uint32_t g_pins[DEF_LED_COUNT] = LED_G_PINS;
+static const uint32_t b_pins[DEF_LED_COUNT] = LED_B_PINS;
+static uint32_t led_count                   = 0;
+
+int32_t rgb_led_set(uint32_t idx, struct led_color color, uint8_t brightness)
+{
+    if (idx >= led_count) return 1;
+    nrf_gpio_pin_write(r_pins[idx], color.R ? 0 : 1);
+    nrf_gpio_pin_write(g_pins[idx], color.G ? 0 : 1);
+    nrf_gpio_pin_write(b_pins[idx], color.B ? 0 : 1);
+    return 0;
+}
+
+int32_t rgb_init(uint32_t cnt)
+{
+    led_count = cnt;
+    for (uint8_t i = 0; i < led_count; i++)
+    {
+        nrf_gpio_cfg_output(r_pins[i]);
+        nrf_gpio_cfg_output(g_pins[i]);
+        nrf_gpio_cfg_output(b_pins[i]);
+        /* all dark */
+        nrf_gpio_pin_set(r_pins[i]);
+        nrf_gpio_pin_set(g_pins[i]);
+        nrf_gpio_pin_set(b_pins[i]);
+    }
+
+    return 0;
+}
+
+const led_drv_if_t led_rgb_drv = {
+    .init = rgb_init,
+    .set  = rgb_led_set,
+};
+
+#endif /* ! DEF_RGB_ENABLED */

led_rgb.h

@@ -0,0 +1,26 @@
+#ifndef __LED_RGB_H__
+#define __LED_RGB_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+
+#include "elite_board.h"
+#include "led_drv_if.h"
+#if (DEF_RGB_ENABLED)
+
+#if !(defined(LED_R_PINS) && defined(LED_G_PINS) && defined(LED_B_PINS))
+#error "LED_R_PINS, LED_G_PINS and LED_B_PINS must all be defined"
+#endif
+    extern const led_drv_if_t led_rgb_drv;
+
+#endif /* ! DEF_RGB_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __LED_RGB_H__ */

main.c

@@ -17,6 +17,9 @@ extern "C"
 #include "nrf_sdh_ble.h"
 #include "nrf_sdh_freertos.h"
 
+#include "nrf_drv_clock.h"
+#include "nrf_drv_power.h"
+
 #ifdef __cplusplus
 }
 #endif
@@ -39,13 +42,13 @@ static void le_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
             NRF_LOG_INFO("Connect to peer.");
             err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_CONN, p_ble_evt->evt.gap_evt.conn_handle, 8);
             APP_ERROR_CHECK(err_code);
-            led_set(LED_IDEL_CONNECTED);
+            led_set(LED_IDLE_CONNECTED);
             break;
         case BLE_GAP_EVT_DISCONNECTED:
             NRF_LOG_INFO("Disconnect from peer.");
             err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_ADV, p_ble_evt->evt.gap_evt.conn_handle, 0);
             APP_ERROR_CHECK(err_code);
-            led_set(LED_IDEL_DISCONNECT);
+            led_set(LED_IDLE_DISCONNECTED);
             break;
         case BLE_GAP_EVT_PHY_UPDATE_REQUEST: {
             NRF_LOG_INFO("PHY update response. (AUTO)");
@@ -101,6 +104,13 @@ static void nrf_sdh_freertos_task_hook(void *p_context)
 
     elite_board_init();
 
+#if DEF_ELITE_DEMO_WO_SOFTDEVICE
+    elite_board_demo();
+    for (;;)
+    {
+    }
+#endif
+
     elite_drv_init();
 
     le_stack_Init(); // enable ble stack, but unscannable!! register "le_evt_handler" handle(CB)
@@ -116,6 +126,10 @@ static void nrf_sdh_freertos_task_hook(void *p_context)
 
     extern void le_adv_init(uint8_t ble_conn_cfg_tag);
     le_adv_init(APP_BLE_CONN_CFG_TAG); // could be scanned
+
+#if DEF_ELITE_DEMO_W_SOFTDEVICE
+    elite_board_demo();
+#endif
 }
 
 int main(void)
@@ -123,6 +137,10 @@ int main(void)
     NRF_LOG_INIT(NULL, 0);
     NRF_LOG_DEFAULT_BACKENDS_INIT();
     NRF_LOG_INFO("%s Build: %s %s", ELITE_DEVICE_NAME, __TIME__, __DATE__);
+    NRF_LOG_INFO("[Board] HW ver: %d.%d.%d.%d(%s)", MAJOR_PRODUCT_NUMBER, MINOR_PRODUCT_NUMBER, MAJOR_VERSION_NUMBER, MINOR_VERSION_NUMBER, ELITE_HW_NAME);
+
+    nrf_drv_power_init(NULL);
+    nrf_drv_clock_init();
 
     nrf_sdh_freertos_init(nrf_sdh_freertos_task_hook, NULL); // create event: softdevice_task - wireless protocal stack
 

max14802.c

@@ -0,0 +1,190 @@
+#include "max14802.h"
+#include "elite_board.h"
+
+#include "nrf_delay.h"
+#include "nrf_gpio.h"
+
+#include "string.h"
+
+#pragma GCC optimize("O2")
+
+#if (DEF_MAX14802_ENABLED)
+
+static sw_t m_sw = { .val = UINT64_MAX };
+
+#define EXCLUDE_IO_ENABLE  1
+#define EXCLUDE_IO_DISABLE 0
+
+static const uint32_t exclude_io[64] = {
+    ADPT0_S1_PIN,
+    ADPT0_S2_PIN,
+    ADPT0_S3_PIN,
+    ADPT0_S4_PIN,
+    ADPT1_S1_PIN,
+    ADPT1_S2_PIN,
+    ADPT1_S3_PIN,
+    ADPT1_S4_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+    UNCONNECTED_PIN,
+};
+
+static void shift_out(uint8_t *p, uint32_t len)
+{
+    nrf_gpio_pin_set(ADPT_LE_PIN);
+
+    for (int32_t j = len; j > 0; j--)
+    {
+        uint32_t val = p[j - 1];
+        for (uint32_t i = 0x01 << (SW_PER_BYTE - 1); i > 0; i >>= 1)
+        {
+            nrf_gpio_pin_clear(ADPT_CLK_PIN);
+            nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
+            nrf_gpio_pin_set(ADPT_CLK_PIN);
+            nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
+        }
+    }
+
+    nrf_gpio_pin_clear(ADPT_CLK_PIN);
+    nrf_gpio_pin_clear(ADPT_DIN_PIN);
+    nrf_gpio_pin_clear(ADPT_LE_PIN);
+    nrf_gpio_pin_set(ADPT_LE_PIN);
+}
+
+int max14802_reset(void)
+{
+    m_sw.val = 0;
+    shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
+    return 0;
+}
+
+int max14802_write(sw_t sw_mask)
+{
+    if (m_sw.val != sw_mask.val)
+    {
+        m_sw = sw_mask;
+
+        // Disable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT
+
+        for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
+        {
+            nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
+        }
+
+        nrf_delay_ms(1);
+
+        // Set max14082
+        shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
+
+        // Enable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT are all disable when all max14082 off
+
+        if (m_sw.val == 0)
+        {
+            nrf_delay_ms(1);
+            for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
+            {
+                nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_ENABLE);
+            }
+        }
+    }
+
+    return 0;
+}
+
+int max14802_read(sw_t *p_sw_mask)
+{
+    *p_sw_mask = m_sw;
+    return 0;
+}
+int max14802_get_sw_count(uint32_t *p_sw_count)
+{
+    *p_sw_count = SW_TOTAL_COUNT;
+    return 0;
+}
+
+int max14802_init(void)
+{
+    nrf_gpio_pin_set(ADPT_CLR_PIN);
+    nrf_gpio_pin_set(ADPT_LE_PIN);
+    nrf_gpio_pin_clear(ADPT_CLK_PIN);
+    nrf_gpio_pin_clear(ADPT_DIN_PIN);
+
+    nrf_gpio_cfg_output(ADPT_CLR_PIN);
+    nrf_gpio_cfg_output(ADPT_LE_PIN);
+    nrf_gpio_cfg_output(ADPT_CLK_PIN);
+    nrf_gpio_cfg_output(ADPT_DIN_PIN);
+
+    for (uint32_t i = 0; i < COUNTOF(exclude_io); i++)
+    {
+        nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
+    }
+
+    max14802_write((sw_t) { .val = 0 });
+
+    nrf_gpio_pin_clear(ADPT_CLR_PIN);
+
+    return 0;
+}
+
+const sw_drv_if_t max14802 = {
+    .init         = max14802_init,
+    .reset        = max14802_reset,
+    .write        = max14802_write,
+    .read         = max14802_read,
+    .get_sw_count = max14802_get_sw_count,
+};
+
+#endif

max14802.h

@@ -0,0 +1,31 @@
+#ifndef __MAX14802_H__
+#define __MAX14802_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "sw_drv_if.h"
+
+#if (DEF_MAX14802_ENABLED)
+
+#define MAX14802_COUNT  1
+#define SW_PER_MAX14802 16
+#define SW_TOTAL_COUNT  (SW_PER_MAX14802 * MAX14802_COUNT)
+#define SW_PER_BYTE     8
+
+#if (SW_TOTAL_COUNT > 64)
+#error "unsupport"
+#endif /* ! SW_TOTAL_COUNT */
+
+extern const sw_drv_if_t max14802;
+
+#endif /* ! DEF_MAX14802_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // !__MAX14802_H__

nrf5x.xml

@@ -2,9 +2,9 @@
 <EmbeddedProfile xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
   <ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
   <ToolchainVersion>
-    <GCC>12.3.1</GCC>
-    <GDB>13.2</GDB>
-    <Revision>1</Revision>
+    <GCC>14.2.1</GCC>
+    <GDB>15.2</GDB>
+    <Revision>2</Revision>
   </ToolchainVersion>
   <BspID>com.sysprogs.arm.nordic.nrf5x</BspID>
   <BspVersion>17.0</BspVersion>
@@ -53,32 +53,33 @@
   <BSPSourceFolderName>Device-specific files</BSPSourceFolderName>
   <MCUMakFile>nrf5x.mak</MCUMakFile>
   <ReferencedFrameworks>
+    <string>com.sysprogs.arm.nordic.nrf5x.periph_legacy</string>
     <string>com.sysprogs.arm.nordic.nrf5x.util</string>
-    <string>com.sysprogs.arm.nordic.nrf5x.drivers_nrf</string>
     <string>com.sysprogs.arm.nordic.nrf5x.libraries</string>
     <string>com.sysprogs.arm.nordic.nrf5x.modules_nrfx</string>
-    <string>com.sysprogs.arm.nordic.nrf5x.periph_legacy</string>
+    <string>com.sysprogs.arm.nordic.nrf5x.drivers_nrf</string>
   </ReferencedFrameworks>
   <FrameworkProperties>
     <Entries>
       <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.nrf_soc_nosd</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.radio_config</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.sdio</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.spi_master</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.twi_master</Key>
+        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.spi</Key>
         <Value>none</Value>
       </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.swi</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.twi</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.uart</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.clock</Key>
+      </KeyValue>
       <KeyValue>
         <Key>com.sysprogs.bspoptions.nrf5x.libraries.atomic_fifo</Key>
+        <Value>yes</Value>
       </KeyValue>
       <KeyValue>
         <Key>com.sysprogs.bspoptions.nrf5x.libraries.atomic_flags</Key>
@@ -246,27 +247,28 @@
       </KeyValue>
       <KeyValue>
         <Key>com.sysprogs.bspoptions.nrf5x.libraries.usbd</Key>
+        <Value />
       </KeyValue>
       <KeyValue>
         <Key>com.sysprogs.bspoptions.nrf5x.libraries.fprintf</Key>
         <Value>yes</Value>
       </KeyValue>
       <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.spi</Key>
+        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.nrf_soc_nosd</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.radio_config</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.sdio</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.spi_master</Key>
+      </KeyValue>
+      <KeyValue>
+        <Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.twi_master</Key>
         <Value>none</Value>
       </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.swi</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.twi</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.uart</Key>
-      </KeyValue>
-      <KeyValue>
-        <Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.clock</Key>
-      </KeyValue>
     </Entries>
   </FrameworkProperties>
   <TestFrameworkProperties>

pel.h

@@ -2,38 +2,55 @@
 #define __PEL_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
 #include "app_config.h"
-#include "elite_board.h"
 #include "elite.h"
+#include "elite_board.h"
 
-#define PEL_0P5R_MASK  (0x01 << 0)
-#define PEL_1P0R_MASK  (0x01 << 1)
-#define PEL_2P0R_MASK  (0x01 << 2)
-#define PEL_4P0R_MASK  (0x01 << 3)
-#define PEL_8P0R_MASK  (0x01 << 4)
-#define PEL_16P2R_MASK (0x01 << 5)
-#define PEL_32P4R_MASK (0x01 << 6)
-#define PEL_63P4R_MASK (0x01 << 7)
-#define PEL_127R_MASK  (0x01 << 8)
-#define PEL_255R_MASK  (0x01 << 9)
-#define PEL_511R_MASK  (0x01 << 10)
-#define PEL_1000R_MASK (0x01 << 11)
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  3
+#define VERSION_DATE_DAY    31
+#define VERSION_DATE_HOUR   10
+#define VERSION_DATE_MINUTE 45
 
-typedef struct
-{
-    int32_t output_r1;
-    int32_t output_r2;
-    int32_t output_vo;
-    int32_t output_vc;
-    int32_t output_ve;
-} pel_output_t;
+#define PEL_0P5R_MASK       (0x01 << 0)
+#define PEL_1P0R_MASK       (0x01 << 1)
+#define PEL_2P0R_MASK       (0x01 << 2)
+#define PEL_4P0R_MASK       (0x01 << 3)
+#define PEL_8P0R_MASK       (0x01 << 4)
+#define PEL_16P2R_MASK      (0x01 << 5)
+#define PEL_32P4R_MASK      (0x01 << 6)
+#define PEL_63P4R_MASK      (0x01 << 7)
+#define PEL_127R_MASK       (0x01 << 8)
+#define PEL_255R_MASK       (0x01 << 9)
+#define PEL_511R_MASK       (0x01 << 10)
+#define PEL_1000R_MASK      (0x01 << 11)
 
-void pel_relays_set(uint32_t measure_out);
-pel_output_t pel_smaple_and_convt_all(uint32_t measure_out, uint32_t load_mask);
-const elite_instance_t *pel_init(void);
+    typedef struct __PACKED
+    {
+        uint16_t mem_board_id : 8;
+        uint16_t packet_seq   : 8;
+        uint32_t notify_time;
+        int32_t output_vo_raw;
+        int32_t output_vc_raw;
+        int32_t output_ve_raw;
+        float hold_OUT_v;
+        float hold_VCC_v;
+        float hold_VEE_v;
+        uint16_t resis_pattern_id;
+        uint16_t resis_bitsmask;
+        float resis_g_value;
+        uint32_t mode_complete : 4;
+        uint32_t rsvd          : 28;
+        uint32_t val_1;
+        uint32_t val_2;
+        uint16_t val_3;
+    } scan_mode_notify_packet_t;
+
+    const elite_instance_t *pel_init(void);
 
 #ifdef __cplusplus
 }

pel10_io.c

@@ -1,132 +0,0 @@
-#include "elite_board.h"
-
-#include "nrf_spim.h"
-
-#include "FreeRTOS.h"
-#include "semphr.h"
-#include "task.h"
-
-#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-
-void spim_xfer(uint32_t cs_pin,
-               nrf_spim_mode_t spi_mode,
-               uint8_t *p_tx_buffer,
-               uint16_t tx_buffer_length,
-               uint8_t *p_rx_buf,
-               uint16_t rx_buffer_length)
-{
-    __disable_irq();
-
-    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
-
-    switch (spi_mode)
-    {
-        default:
-        case NRF_SPIM_MODE_0:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_1:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_2:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
-            break;
-
-        case NRF_SPIM_MODE_3:
-            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
-                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
-                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
-            break;
-    }
-
-    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
-
-    NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
-    NRF_SPIM3->TXD.PTR    = (uint32_t)p_tx_buffer;
-
-    NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
-    NRF_SPIM3->RXD.PTR    = (uint32_t)p_rx_buf;
-
-    nrf_gpio_pin_clear(cs_pin);
-
-    NRF_SPIM3->EVENTS_END  = 0;
-    NRF_SPIM3->TASKS_START = 1;
-    do {
-    } while (NRF_SPIM3->EVENTS_END == 0);
-
-    nrf_gpio_pin_set(cs_pin);
-
-    __enable_irq();
-}
-
-void pel10_io_init(void)
-{
-    const uint32_t pel_pins_default_high[] = {
-        INPUT_1_PIN,
-        INPUT_2_PIN,
-        INPUT_3_PIN,
-        INPUT_4_PIN,
-        INPUT_5_PIN,
-        INPUT_6_PIN,
-        INPUT_7_PIN,
-        INPUT_8_PIN,
-        INPUT_9_PIN,
-        INPUT_10_PIN,
-        INPUT_11_PIN,
-        INPUT_12_PIN
-    };
-
-    const uint32_t pel_pins_default_low[] = {
-        ANODE_PIN,
-        CATHODE_PIN,
-        SAMPLE_R_PIN,
-        SAMPLE_V_PIN,
-        RELAY1_PIN,
-        RELAY2_PIN
-    };
-
-    for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
-    {
-        nrf_gpio_pin_set(pel_pins_default_high[i]);
-        nrf_gpio_cfg_output(pel_pins_default_high[i]);
-    }
-
-    for (int i = 0; i < COUNTOF(pel_pins_default_low); i++)
-    {
-        nrf_gpio_pin_clear(pel_pins_default_low[i]);
-        nrf_gpio_cfg_output(pel_pins_default_low[i]);
-    }
-
-    // Config spi module
-
-    nrf_gpio_pin_set(WP_MEM_PIN);
-    nrf_gpio_cfg_output(WP_MEM_PIN);
-    nrf_gpio_pin_set(CS_MEM_PIN);
-    nrf_gpio_cfg_output(CS_MEM_PIN);
-    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
-    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
-    nrf_gpio_pin_clear(SPIM_CLK_PIN);
-    nrf_gpio_cfg_output(SPIM_CLK_PIN);
-    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
-
-    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
-    NRF_SPIM3->ORC             = 0x00000000;
-    NRF_SPIM3->FREQUENCY       = SPIM_FREQUENCY_FREQUENCY_M32;
-    NRF_SPIM3->CSNPOL          = SPIM_CSNPOL_CSNPOL_LOW;
-    NRF_SPIM3->IFTIMING.CSNDUR = 8;
-    NRF_SPIM3->PSEL.CSN        = CS_MEM_PIN;
-    NRF_SPIM3->PSEL.SCK        = SPIM_CLK_PIN;
-    NRF_SPIM3->PSEL.MOSI       = SPIM_MOSI_PIN;
-    NRF_SPIM3->PSEL.MISO       = SPIM_MISO_PIN;
-    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
-}
-
-#endif

pel10_io.h

@@ -1,76 +0,0 @@
-#ifndef __PEL10_IO_H__
-#define __PEL10_IO_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "app_config.h"
-#include "elite_board.h"
-#include "nrf_gpio.h"
-#include "nrf_spim.h"
-
-#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
-
-#define RELAY1_PIN        NRF_GPIO_PIN_MAP(1, 10)
-#define RELAY2_PIN        NRF_GPIO_PIN_MAP(1, 15)
-
-#define SAMPLE_R_PIN      NRF_GPIO_PIN_MAP(1, 11)
-#define SAMPLE_V_PIN      NRF_GPIO_PIN_MAP(1, 6)
-
-#define CATHODE_PIN       NRF_GPIO_PIN_MAP(0, 7)
-#define ANODE_PIN         NRF_GPIO_PIN_MAP(0, 8)
-
-#define OUTPUT_R1_PIN     NRF_GPIO_PIN_MAP(0, 31)
-#define OUTPUT_R2_PIN     NRF_GPIO_PIN_MAP(0, 28)
-#define OUTPUT_VO_PIN     NRF_GPIO_PIN_MAP(0, 29)
-#define OUTPUT_VC_PIN     NRF_GPIO_PIN_MAP(0, 3)
-#define OUTPUT_VE_PIN     NRF_GPIO_PIN_MAP(0, 2)
-
-#define OUTPUT_R1_CHANNEL 7
-#define OUTPUT_R2_CHANNEL 4
-#define OUTPUT_VO_CHANNEL 5
-#define OUTPUT_VC_CHANNEL 1
-#define OUTPUT_VE_CHANNEL 0
-
-#define OUTPUT_R1_IDX     0
-#define OUTPUT_R2_IDX     1
-#define OUTPUT_VO_IDX     2
-#define OUTPUT_VC_IDX     3
-#define OUTPUT_VE_IDX     4
-
-#define INPUT_1_PIN       NRF_GPIO_PIN_MAP(0, 15)
-#define INPUT_2_PIN       NRF_GPIO_PIN_MAP(0, 13)
-#define INPUT_3_PIN       NRF_GPIO_PIN_MAP(0, 20)
-#define INPUT_4_PIN       NRF_GPIO_PIN_MAP(1, 0)
-#define INPUT_5_PIN       NRF_GPIO_PIN_MAP(0, 25)
-#define INPUT_6_PIN       NRF_GPIO_PIN_MAP(0, 11)
-#define INPUT_7_PIN       NRF_GPIO_PIN_MAP(0, 14)
-#define INPUT_8_PIN       NRF_GPIO_PIN_MAP(0, 17)
-#define INPUT_9_PIN       NRF_GPIO_PIN_MAP(0, 18)
-#define INPUT_10_PIN      NRF_GPIO_PIN_MAP(0, 21)
-#define INPUT_11_PIN      NRF_GPIO_PIN_MAP(0, 19)
-#define INPUT_12_PIN      NRF_GPIO_PIN_MAP(0, 22)
-
-#define WP_MEM_PIN        NRF_GPIO_PIN_MAP(0, 12)
-#define CS_MEM_PIN        NRF_GPIO_PIN_MAP(0, 6)
-#define SPIM_MOSI_PIN     NRF_GPIO_PIN_MAP(0, 27)
-#define SPIM_CLK_PIN      NRF_GPIO_PIN_MAP(0, 4)
-#define SPIM_MISO_PIN     NRF_GPIO_PIN_MAP(1, 9)
-
-void spim_xfer(uint32_t cs_pin,
-               nrf_spim_mode_t spi_mode,
-               uint8_t *p_tx_buffer,
-               uint16_t tx_buffer_length,
-               uint8_t *p_rx_buf,
-               uint16_t rx_buffer_length);
-
-void pel10_io_init(void);
-
-#endif /* ! DEF_ELITE_MODEL */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! __PEL10_IO_H__ */

pel20_io.c

@@ -0,0 +1,423 @@
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+
+#include "nrf_spim.h"
+#include "nrf_timer.h"
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "task.h"
+
+#include "SEGGER_RTT.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+
+pel_hw_t pel_hw = {
+    .pulse_tmr    = NRF_TIMER3,
+    .pulse_irq_n  = TIMER3_IRQn,
+    .pulse_cnt    = 0,
+    .adc.channels = {
+                     [OUTPUT_R1_IDX] = OUTPUT_R1_CHANNEL,
+                     [OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
+                     [OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
+                     [OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
+                     [OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL},
+    .adc.gain        = NRF_SAADC_GAIN1_6,
+    .adc.smaple_time = NRF_SAADC_ACQTIME_3US
+};
+
+void spim_xfer(uint32_t cs_pin,
+               nrf_spim_mode_t spi_mode,
+               uint8_t *p_tx_buffer,
+               uint16_t tx_buffer_length,
+               uint8_t *p_rx_buf,
+               uint16_t rx_buffer_length)
+{
+    __disable_irq();
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+
+    switch (spi_mode)
+    {
+        default:
+        case NRF_SPIM_MODE_0:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_1:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_2:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_3:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+    }
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+
+    NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
+    NRF_SPIM3->TXD.PTR    = (uint32_t)p_tx_buffer;
+
+    NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
+    NRF_SPIM3->RXD.PTR    = (uint32_t)p_rx_buf;
+
+    nrf_gpio_pin_clear(cs_pin);
+
+    NRF_SPIM3->EVENTS_END  = 0;
+    NRF_SPIM3->TASKS_START = 1;
+    do {
+    } while (NRF_SPIM3->EVENTS_END == 0);
+
+    nrf_gpio_pin_set(cs_pin);
+
+    __enable_irq();
+}
+
+#define MIN_PULSE_WIDTH 2
+#define MIN_PULSE_IDLE  2
+#define MAX_PULSE_WIDTH INT16_MAX
+#define MAX_PULSE_IDLE  INT16_MAX
+
+void set_anode_cathode_to_default(void)
+{
+    if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_pin_clear(CATHODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_R_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+        nrf_gpio_pin_clear(RELAY1_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_pin_set(CATHODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_R_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+        nrf_gpio_pin_clear(RELAY1_PIN);
+    }
+}
+
+static void pel_saadc_init(pel_adc_t *p_adc)
+{
+    /* stop ssadc */
+    NRF_SAADC->EVENTS_STOPPED = 0;
+    NRF_SAADC->TASKS_STOP     = 1;
+    do {
+    } while (NRF_SAADC->EVENTS_STOPPED == 0);
+
+    /* disable ssadc */
+    NRF_SAADC->ENABLE = 0;
+
+    /*
+        ref: p.381, nrf52840_PS_v1.1.pdf
+        Note: Oversampling should only be used when a single input channel is enabled, as averaging is
+        performed over all enabled channels.
+    */
+    NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
+    NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
+    /* config analog inputs */
+    for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
+    {
+        if (i < COUNTOF(p_adc->channels))
+        {
+            NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
+            NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG =
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
+                (p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
+                (NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
+                (p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
+                (NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
+                (NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
+        }
+        else
+        {
+            NRF_SAADC->CH[i].PSELP  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].PSELN  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG = 0;
+        }
+    }
+    /* enable ssadc */
+    NRF_SAADC->INTENSET      = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
+    NRF_SAADC->ENABLE        = 1;
+    NRF_SAADC->RESULT.PTR    = (uint32_t)p_adc->results;
+    NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
+}
+
+void TIMER3_IRQHandler(void)
+{
+    if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
+    {
+        pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
+
+        pel_hw.pulse_is_running = 1;
+
+        if (pel_hw.pulse_cnt)
+        {
+            pel_hw.pulse_cnt--;
+        }
+    }
+}
+
+void SAADC_IRQHandler(void)
+{
+    if (NRF_SAADC->EVENTS_STARTED)
+    {
+        NRF_SAADC->EVENTS_STARTED = 0;
+        if (pel_hw.pulse_cnt == 0)
+        {
+            pel_hw.pulse_tmr->TASKS_STOP = 1;
+        }
+        return;
+    }
+
+    if (NRF_SAADC->EVENTS_END)
+    {
+        NRF_SAADC->EVENTS_END    = 0;
+        NRF_SAADC->RESULT.PTR    = (uint32_t)pel_hw.adc.results;
+        NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
+        pel_hw.pulse_is_running  = 0;
+        if (pel_hw.adc.convt_new_arrival_cb)
+        {
+            pel_hw.adc.convt_new_arrival_cb();
+        }
+    }
+}
+
+void pel_pulse_gen_init(pel_config_t cfg)
+{
+    pel_hw.pulse_tmr->TASKS_STOP = 1;
+
+    sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
+    sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
+
+    sd_nvic_DisableIRQ(SAADC_IRQn);
+    sd_nvic_ClearPendingIRQ(SAADC_IRQn);
+
+    pel_hw.pulse_cnt                = cfg.pulse_cnt;
+    pel_hw.adc.gain                 = cfg.gain;
+    pel_hw.adc.smaple_time          = cfg.smaple_time;
+    pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
+
+    pel_saadc_init(&pel_hw.adc);
+
+    // disable gpio task
+    for (int i = 0; i < 5; i++)
+    {
+        nrf_gpiote_task_disable(i);
+    }
+
+    set_anode_cathode_to_default();
+
+    // config gpiote task
+    switch (cfg.mode)
+    {
+        default:
+        case 1:
+            nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+            nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
+            break;
+        case 0:
+            nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
+            nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+            break;
+    }
+
+    nrf_gpiote_task_configure(2, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    }
+
+    // enable gpio task
+    for (int i = 0; i < 5; i++)
+    {
+        nrf_gpiote_task_enable(i);
+    }
+
+    NRF_PPI->CH[0].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
+    NRF_PPI->CH[0].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
+    NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->CHENSET     = (1 << (0));
+
+    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
+    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
+    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+    NRF_PPI->CHENSET     = (1 << (1));
+
+    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
+    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
+    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+    NRF_PPI->CHENSET     = (1 << (2));
+
+    NRF_PPI->CH[3].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
+    NRF_PPI->CH[3].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
+    NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->CHENSET     = (1 << (3));
+
+    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
+    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
+    NRF_PPI->CHENSET   = (1 << (4));
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        NRF_PPI->CH[6].EEP   = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
+        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
+        NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
+        NRF_PPI->CHENSET     = (1 << (6));
+        NRF_PPI->CH[7].EEP   = (uint32_t)&NRF_SAADC->EVENTS_END;
+        NRF_PPI->CH[7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
+        NRF_PPI->CHENSET     = (1 << (7));
+    }
+
+    pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
+    pel_hw.pulse_tmr->MODE      = NRF_TIMER_MODE_TIMER;
+    pel_hw.pulse_tmr->BITMODE   = NRF_TIMER_BIT_WIDTH_32;
+    pel_hw.pulse_tmr->CC[0]     = cfg.point_us[0] * 16;
+    pel_hw.pulse_tmr->CC[1]     = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
+    pel_hw.pulse_tmr->CC[2]     = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
+    pel_hw.pulse_tmr->CC[3]     = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
+    pel_hw.pulse_tmr->CC[4]     = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
+    pel_hw.pulse_tmr->CC[5]     = pel_hw.pulse_tmr->CC[4];
+    pel_hw.pulse_tmr->SHORTS    = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
+    pel_hw.pulse_tmr->INTENSET  = NRF_TIMER_INT_COMPARE0_MASK;
+
+    sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(SAADC_IRQn);
+
+    sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
+}
+
+void pel_pulse_gen_start(void)
+{
+    pel_hw.pulse_tmr->TASKS_START = 1;
+}
+
+void pel_pulse_gen_stop(void)
+{
+    pel_hw.pulse_cnt = 0;
+    do {
+    } while (pel_hw.pulse_is_running == 1);
+    pel_hw.adc.convt_new_arrival_cb = NULL;
+}
+
+#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
+static void pel_pulse_gen_demo_task(void *p_arg)
+{
+    pel_config_t pel_cfg = {
+        .anode_pin    = ANODE_PIN,
+        .cathode_pin  = CATHODE_PIN,
+        .smaple_r_pin = SAMPLE_R_PIN,
+        .sample_v_pin = SAMPLE_V_PIN,
+        .test_pin     = TP1_PIN,
+        .mode         = BOARD_IOPx,
+        .point_us     = {
+                         10000,
+                         3,
+                         5,
+                         2,
+                         0,
+                         },
+        .pulse_cnt        = 0xFFFFFFFF,
+        .gain             = NRF_SAADC_GAIN1_6,
+        .smaple_time      = NRF_SAADC_ACQTIME_10US,
+        .adc_timing_shift = 0,
+    };
+
+    pel_pulse_gen_init(pel_cfg);
+
+    pel_pulse_gen_start();
+
+    for (;;)
+    {
+        static uint32_t i = 0;
+        vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
+        SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
+    }
+}
+
+void pel_pulse_gen_demo(void)
+{
+}
+#endif
+
+void pel20_io_init(void)
+{
+    const uint32_t pel_pins_default_high[] = {
+        INPUT_1_PIN,
+        INPUT_2_PIN,
+        INPUT_3_PIN,
+        INPUT_4_PIN,
+        INPUT_5_PIN,
+        INPUT_6_PIN,
+        INPUT_7_PIN,
+        INPUT_8_PIN,
+        INPUT_9_PIN,
+        INPUT_10_PIN,
+        INPUT_11_PIN,
+        INPUT_12_PIN
+    };
+
+    for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
+    {
+        nrf_gpio_pin_set(pel_pins_default_high[i]);
+        nrf_gpio_cfg_output(pel_pins_default_high[i]);
+    }
+
+    set_anode_cathode_to_default();
+    nrf_gpio_cfg_output(ANODE_PIN);
+    nrf_gpio_cfg_output(CATHODE_PIN);
+    nrf_gpio_cfg_output(SAMPLE_R_PIN);
+    nrf_gpio_cfg_output(SAMPLE_V_PIN);
+    nrf_gpio_cfg_output(TP1_PIN);
+    nrf_gpio_cfg_output(TP2_PIN);
+    nrf_gpio_cfg_output(RELAY1_PIN);
+
+    // Config spi module
+
+    nrf_gpio_pin_set(WP_MEM_PIN);
+    nrf_gpio_cfg_output(WP_MEM_PIN);
+    nrf_gpio_pin_set(CS_MEM_PIN);
+    nrf_gpio_cfg_output(CS_MEM_PIN);
+    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
+    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
+    nrf_gpio_pin_clear(SPIM_CLK_PIN);
+    nrf_gpio_cfg_output(SPIM_CLK_PIN);
+    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
+
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+    NRF_SPIM3->ORC             = 0x00000000;
+    NRF_SPIM3->FREQUENCY       = SPIM_FREQUENCY_FREQUENCY_M32;
+    NRF_SPIM3->CSNPOL          = SPIM_CSNPOL_CSNPOL_LOW;
+    NRF_SPIM3->IFTIMING.CSNDUR = 8;
+    NRF_SPIM3->PSEL.CSN        = CS_MEM_PIN;
+    NRF_SPIM3->PSEL.SCK        = SPIM_CLK_PIN;
+    NRF_SPIM3->PSEL.MOSI       = SPIM_MOSI_PIN;
+    NRF_SPIM3->PSEL.MISO       = SPIM_MISO_PIN;
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+}
+
+#endif

pel20_io.h

@@ -0,0 +1,121 @@
+#ifndef __PEL20_IO_H__
+#define __PEL20_IO_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite_board.h"
+#include "nrf_gpio.h"
+#include "nrf_saadc.h"
+#include "nrf_spim.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+
+#define RELAY1_PIN        NRF_GPIO_PIN_MAP(1, 10)
+#define RELAY2_PIN        NRF_GPIO_PIN_MAP(1, 15)
+
+#define TP1_PIN           NRF_GPIO_PIN_MAP(0, 5)
+#define TP2_PIN           NRF_GPIO_PIN_MAP(0, 26)
+
+#define SAMPLE_R_PIN      NRF_GPIO_PIN_MAP(1, 11)
+#define SAMPLE_V_PIN      NRF_GPIO_PIN_MAP(1, 6)
+
+#define CATHODE_PIN       NRF_GPIO_PIN_MAP(0, 8)
+#define ANODE_PIN         NRF_GPIO_PIN_MAP(0, 7)
+
+#define OUTPUT_R1_PIN     NRF_GPIO_PIN_MAP(0, 31)
+#define OUTPUT_R2_PIN     NRF_GPIO_PIN_MAP(0, 28)
+#define OUTPUT_VO_PIN     NRF_GPIO_PIN_MAP(0, 29)
+#define OUTPUT_VC_PIN     NRF_GPIO_PIN_MAP(0, 2)
+#define OUTPUT_VE_PIN     NRF_GPIO_PIN_MAP(0, 3)
+
+#define OUTPUT_R1_CHANNEL 7
+#define OUTPUT_R2_CHANNEL 4
+#define OUTPUT_VO_CHANNEL 5
+#define OUTPUT_VC_CHANNEL 0
+#define OUTPUT_VE_CHANNEL 1
+
+#define OUTPUT_R1_IDX     0
+#define OUTPUT_R2_IDX     1
+#define OUTPUT_VO_IDX     2
+#define OUTPUT_VC_IDX     3
+#define OUTPUT_VE_IDX     4
+
+#define INPUT_1_PIN       NRF_GPIO_PIN_MAP(0, 15)
+#define INPUT_2_PIN       NRF_GPIO_PIN_MAP(0, 13)
+#define INPUT_3_PIN       NRF_GPIO_PIN_MAP(0, 20)
+#define INPUT_4_PIN       NRF_GPIO_PIN_MAP(1, 0)
+#define INPUT_5_PIN       NRF_GPIO_PIN_MAP(0, 25)
+#define INPUT_6_PIN       NRF_GPIO_PIN_MAP(0, 11)
+#define INPUT_7_PIN       NRF_GPIO_PIN_MAP(0, 14)
+#define INPUT_8_PIN       NRF_GPIO_PIN_MAP(0, 17)
+#define INPUT_9_PIN       NRF_GPIO_PIN_MAP(0, 18)
+#define INPUT_10_PIN      NRF_GPIO_PIN_MAP(0, 21)
+#define INPUT_11_PIN      NRF_GPIO_PIN_MAP(0, 19)
+#define INPUT_12_PIN      NRF_GPIO_PIN_MAP(0, 22)
+
+#define WP_MEM_PIN        NRF_GPIO_PIN_MAP(0, 12)
+#define CS_MEM_PIN        NRF_GPIO_PIN_MAP(0, 6)
+#define SPIM_MOSI_PIN     NRF_GPIO_PIN_MAP(0, 27)
+#define SPIM_CLK_PIN      NRF_GPIO_PIN_MAP(0, 4)
+#define SPIM_MISO_PIN     NRF_GPIO_PIN_MAP(1, 9)
+
+    typedef struct
+    {
+        uint32_t anode_pin;
+        uint32_t cathode_pin;
+        uint32_t smaple_r_pin;
+        uint32_t sample_v_pin;
+        uint32_t test_pin;
+        uint32_t point_us[5]; // toggle point timestamp
+        uint32_t pulse_cnt;   // min: 1, max: 0xFFFFFFFF
+        uint32_t mode;        // 0: IOPL mode, 1: IOPH mode
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        int32_t adc_timing_shift;
+        void (*convt_new_arrival_cb)(void);
+    } pel_config_t;
+
+    typedef struct
+    {
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        uint32_t channels[5];
+        int16_t results[5];
+        float results_f[5];
+        void (*convt_new_arrival_cb)(void);
+    } pel_adc_t;
+
+    typedef struct
+    {
+        NRF_TIMER_Type *pulse_tmr;
+        uint32_t pulse_irq_n;
+        uint32_t pulse_cnt;
+        uint32_t pulse_is_running;
+        pel_adc_t adc;
+    } pel_hw_t;
+
+    extern pel_hw_t pel_hw;
+
+    void spim_xfer(uint32_t cs_pin,
+                   nrf_spim_mode_t spi_mode,
+                   uint8_t *p_tx_buffer,
+                   uint16_t tx_buffer_length,
+                   uint8_t *p_rx_buf,
+                   uint16_t rx_buffer_length);
+
+    void pel20_io_init(void);
+    void pel_pulse_gen_init(pel_config_t cfg);
+    void pel_pulse_gen_start(void);
+    void pel_pulse_gen_stop(void);
+
+#endif /* ! DEF_ELITE_MODEL */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __PEL20_IO_H__ */

pel_v3_0.c

@@ -0,0 +1,966 @@
+#include "app_config.h"
+#include "app_error.h"
+
+#include "elite_board.h"
+#include "pel_v3_0.h"
+
+#include "elite_def.h"
+
+#include "nrf_delay.h"
+#include "nrf_gpio.h"
+#include "nrf_log.h"
+
+#include "adc_drv.h"
+
+#include "FreeRTOS.h"
+#include "message_buffer.h"
+#include "pel_v3_0_io.h"
+#include "queue.h"
+#include "semphr.h"
+#include "stream_buffer.h"
+#include "task.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+
+#include "FreeRTOS.h"
+#include "nrfx_gpiote.h"
+#include "timers.h"
+#define DEBOUNCE_DELAY_MS     30
+#define HOT_SWAP_IS_CONNECTED 0
+#define VCC_DUT1_output_en()  nrf_gpio_pin_set(HOT_SWAP_1_PIN)
+#define VCC_DUT1_output_dis() nrf_gpio_pin_clear(HOT_SWAP_1_PIN)
+static TimerHandle_t debounce_timer = NULL;
+
+static void debounce_timer_callback(TimerHandle_t xTimer)
+{
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}
+
+static void hot_swap_gpiote_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
+{
+    // only handle timer, not handle GPIO
+    if (debounce_timer != NULL)
+    {
+        // reset and start debounce timer
+        xTimerStopFromISR(debounce_timer, NULL);
+        xTimerStartFromISR(debounce_timer, NULL);
+    }
+}
+
+void hot_swap_monitor_init(void)
+{
+    nrfx_gpiote_in_config_t config = {
+        .hi_accuracy     = 0,
+        .is_watcher      = 0,
+        .pull            = NRF_GPIO_PIN_PULLUP,
+        .sense           = NRF_GPIOTE_POLARITY_TOGGLE,
+        .skip_gpio_setup = 0
+    };
+
+    nrfx_gpiote_init();
+    nrfx_gpiote_in_init(HOT_SWAP_SIGNAL_PIN, &config, hot_swap_gpiote_handler);
+    nrfx_gpiote_in_event_enable(HOT_SWAP_SIGNAL_PIN, true);
+
+    debounce_timer = xTimerCreate("debounce", pdMS_TO_TICKS(DEBOUNCE_DELAY_MS), pdFALSE, NULL, debounce_timer_callback);
+    if (debounce_timer == NULL)
+    {
+        NRF_LOG_ERROR("Failed to create debounce timer");
+        return;
+    }
+
+    // initial HOT_SWAP_1_PIN
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}
+
+typedef struct
+{
+    uint32_t pattern_index;
+    uint32_t resistor_mask;
+    float resistor_conductance;
+} resistor_t;
+
+typedef struct
+{
+    resistor_t resistor;
+    bool use_pattern_index;
+} load_config_t;
+
+static load_config_t load_config;
+
+static float _load_set(uint32_t mask)
+{
+    typedef struct
+    {
+        float val;
+        uint32_t pin;
+        uint32_t mask;
+    } input_pin_t;
+
+    const input_pin_t input_pin_tab[] = {
+        {  0.6,  INPUT_1_PIN,  PEL_0P5R_MASK},
+        {  1.2,  INPUT_2_PIN,  PEL_1P0R_MASK},
+        {  2.2,  INPUT_3_PIN,  PEL_2P0R_MASK},
+        {  4.1,  INPUT_4_PIN,  PEL_4P0R_MASK},
+        {  8.4,  INPUT_5_PIN,  PEL_8P0R_MASK},
+        { 16.3,  INPUT_6_PIN, PEL_16P2R_MASK},
+        { 32.7,  INPUT_7_PIN, PEL_32P4R_MASK},
+        { 62.3,  INPUT_8_PIN, PEL_63P4R_MASK},
+        {129.8,  INPUT_9_PIN,  PEL_127R_MASK},
+        {270.0, INPUT_10_PIN,  PEL_255R_MASK},
+        {510.0, INPUT_11_PIN,  PEL_511R_MASK},
+        {998.0, INPUT_12_PIN, PEL_1000R_MASK},
+    };
+
+    float ohms                = 0;
+    float sum_of_conductances = 0;
+
+    for (int32_t i = COUNTOF(input_pin_tab) - 1; i >= 0; i--)
+    {
+        if (input_pin_tab[i].mask & mask)
+        {
+            nrf_gpio_pin_clear(input_pin_tab[i].pin);
+            ohms                += input_pin_tab[i].val;
+            sum_of_conductances += 1 / input_pin_tab[i].val;
+            NRF_LOG_INFO("enable R%-2d(" NRF_LOG_FLOAT_MARKER "ohm)", i + 1, NRF_LOG_FLOAT(input_pin_tab[i].val));
+        }
+        else
+        {
+            nrf_gpio_pin_set(input_pin_tab[i].pin);
+        }
+    }
+
+    if (mask == 0)
+    {
+        NRF_LOG_INFO("disable R1~R12");
+    }
+    return sum_of_conductances;
+}
+
+static void set_resistor_load_bits(uint32_t mask)
+{
+    load_config.use_pattern_index             = false;
+    load_config.resistor.pattern_index        = 0;
+    load_config.resistor.resistor_mask        = mask;
+    load_config.resistor.resistor_conductance = _load_set(load_config.resistor.resistor_mask);
+}
+
+static void set_resistor_load_pattern(uint32_t index)
+{
+    const resistor_t pattern_tab[] = {
+        { 1, 0b0000000000000111},
+        { 2, 0b0000000000000011},
+        { 3, 0b0000000000000101},
+        { 4, 0b0000000000000001},
+        { 5, 0b0000000000001110},
+        { 6, 0b0000000000000110},
+        { 7, 0b0000000000001010},
+        { 8, 0b0000000000000010},
+        { 9, 0b0000000000011100},
+        {10, 0b0000000000001100},
+        {11, 0b0000000000010100},
+        {12, 0b0000000000000100},
+        {13, 0b0000000000111000},
+        {14, 0b0000000000011000},
+        {15, 0b0000000000101000},
+        {16, 0b0000000000001000},
+        {17, 0b0000000001110000},
+        {18, 0b0000000000110000},
+        {19, 0b0000000001010000},
+        {20, 0b0000000000010000},
+        {21, 0b0000000011100000},
+        {22, 0b0000000001100000},
+        {23, 0b0000000010100000},
+        {24, 0b0000000000100000},
+        {25, 0b0000000111000000},
+        {26, 0b0000000011000000},
+        {27, 0b0000000101000000},
+        {28, 0b0000000001000000},
+        {29, 0b0000001110000000},
+        {30, 0b0000000110000000},
+        {31, 0b0000001010000000},
+        {32, 0b0000000010000000},
+        {33, 0b0000011100000000},
+        {34, 0b0000001100000000},
+        {35, 0b0000010100000000},
+        {36, 0b0000000100000000},
+        {37, 0b0000111000000000},
+        {38, 0b0000011000000000},
+        {39, 0b0000101000000000},
+        {40, 0b0000001000000000},
+        {41, 0b0000110000000000},
+        {42, 0b0000010000000000},
+        {43, 0b0000100000000000},
+    };
+
+    for (int32_t i = 0; i < ARRAY_SIZE(pattern_tab); i++)
+    {
+        if (pattern_tab[i].pattern_index == index)
+        {
+            load_config.use_pattern_index             = true;
+            load_config.resistor.pattern_index        = index;
+            load_config.resistor.resistor_mask        = pattern_tab[i].resistor_mask;
+            load_config.resistor.resistor_conductance = _load_set(load_config.resistor.resistor_mask);
+            break;
+        }
+    }
+}
+
+static void set_resistor_to_high_z(void)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    set_resistor_load_bits(0);
+}
+
+typedef struct
+{
+    uint32_t setting_pattern_id_max;
+    uint32_t setting_pattern_id_min;
+    uint16_t setting_notify_cnt_every_pattern;
+} auto_scan_mode_params_t;
+
+typedef struct
+{
+    union
+    {
+        uint32_t value;
+        uint32_t bitmask;
+        uint32_t pattern;
+    };
+    bool is_pattern;
+} resistor_setting_t;
+
+typedef struct
+{
+    uint32_t count;
+    uint32_t drop;
+    bool the_last_record_flag;
+    void (*complete_cb)(void);
+} notify_setting_t;
+
+typedef struct
+{
+    uint32_t opcode;
+    union
+    {
+        uint32_t raw[256 / sizeof(uint32_t)];
+        resistor_setting_t resistor_setting;
+        notify_setting_t notify_setting;
+    };
+} pel_scan_msg_t;
+
+static uint8_t global_memoryboard_id        = 0xFF;
+static SemaphoreHandle_t auto_scan_cplt_sem = NULL;
+static SemaphoreHandle_t adc_convt_cplt_sem = NULL;
+static MessageBufferHandle_t pel_scan_msqQ  = NULL;
+
+static void vis_rst(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+}
+
+static void cis_version(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    uint8_t cis_ver[] = {
+        CIS_VERSION,
+        VERSION_DATE_YEAR,
+        VERSION_DATE_MONTH,
+        VERSION_DATE_DAY,
+        VERSION_DATE_HOUR,
+        VERSION_DATE_MINUTE,
+    };
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)cis_ver, sizeof(cis_ver));
+}
+
+static void send_start_package(void *packet_buf, uint32_t packet_len)
+{
+    for (uint32_t i = 0; i < 4; i++)
+    {
+        ret_code_t le_event_notify(uint8_t * p_value, uint16_t len);
+        nrf_gpio_pin_set(TP2_PIN);
+        ret_code_t ret = le_event_notify(packet_buf, packet_len);
+        nrf_gpio_pin_clear(TP2_PIN);
+
+        vTaskDelay(pdMS_TO_TICKS(10));
+
+        NRF_LOG_HEXDUMP_INFO(packet_buf, packet_len);
+        NRF_LOG_INFO("\n");
+    }
+}
+
+static void pel_scan_mode_notify(scan_mode_notify_packet_t *packet_buf, uint32_t packet_len)
+{
+    int32_t adc_raw[COUNTOF(pel_hw.adc.results)] = { 0 };
+
+    for (int i = 0; i < COUNTOF(pel_hw.adc.results); i++)
+    {
+        adc_raw[i] = pel_hw.adc.results[i];
+    }
+
+    adc_read_mutiple_channels_convert_milivolt(adc_raw, pel_hw.adc.results_f, COUNTOF(pel_hw.adc.channels));
+
+    packet_buf->mem_board_id = global_memoryboard_id;
+    packet_buf->packet_seq++;
+    packet_buf->notify_time      = xTaskGetTickCount();
+    packet_buf->output_vo_raw    = pel_hw.adc.results[2];
+    packet_buf->output_vc_raw    = pel_hw.adc.results[3];
+    packet_buf->output_ve_raw    = pel_hw.adc.results[4];
+    packet_buf->hold_OUT_v       = pel_hw.adc.results_f[2] * 10 / 1000;
+    packet_buf->hold_VCC_v       = pel_hw.adc.results_f[3] * 10 / 1000;
+    packet_buf->hold_VEE_v       = pel_hw.adc.results_f[4] * 10 / 1000;
+    packet_buf->resis_pattern_id = load_config.resistor.pattern_index;
+    packet_buf->resis_bitsmask   = load_config.resistor.resistor_mask;
+    packet_buf->resis_g_value    = load_config.resistor.resistor_conductance;
+    packet_buf->val_1            = 0xFFFFFFFF;
+    packet_buf->val_2            = 0xFFFFFFFF;
+    packet_buf->val_3            = 0xFFFF;
+    ret_code_t ret               = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
+
+    // NRF_LOG_HEXDUMP_INFO(packet_buf,packet_len);
+    {
+        char str[128];
+        snprintf(str, sizeof(str), "{%3d, %3d, %10lu, %10lu, %10lu, %10lu, %2.7f, %2.7f, %2.7f, %5d, 0x%04X, %.7f, %d}", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time, packet_buf->output_vo_raw, packet_buf->output_vc_raw, packet_buf->output_ve_raw, packet_buf->hold_OUT_v, packet_buf->hold_VCC_v, packet_buf->hold_VEE_v, packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
+        NRF_LOG_INFO("%s", str);
+    }
+}
+
+void test_gpio_task(void *pArg)
+{
+    const uint32_t pel_pins[] = {
+        INPUT_1_PIN,
+        INPUT_2_PIN,
+        INPUT_3_PIN,
+        INPUT_4_PIN,
+        INPUT_5_PIN,
+        INPUT_6_PIN,
+        INPUT_7_PIN,
+        INPUT_8_PIN,
+        INPUT_9_PIN,
+        INPUT_10_PIN,
+        INPUT_11_PIN,
+        INPUT_12_PIN,
+        ANODE_PIN,
+        CATHODE_PIN,
+        SAMPLE_I_PIN,
+        SAMPLE_V_PIN
+    };
+
+    for (;;)
+    {
+
+        NRF_LOG_INFO("[test] all output pin set low");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+
+        NRF_LOG_INFO("[test] all output pin set high");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_set(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+
+        NRF_LOG_INFO("[test] alternating high and low signals on all output pins");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_set(pel_pins[i]);
+            vTaskDelay(100);
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+    }
+}
+
+static void decode_and_set_resistor_pattern(uint8_t *param)
+{
+    uint16_t pattern_id = u8_to_u16(param[0], param[1]);
+
+    set_resistor_load_pattern(pattern_id);
+}
+
+static void decode_and_set_manual_resistor(uint8_t *param)
+{
+    uint16_t manual_val = u8_to_u16(param[0], param[1]);
+
+    set_resistor_load_bits(manual_val);
+}
+
+static void dev_mode_input_resistor(uint8_t *ins)
+{
+    NRF_LOG_INFO("[DEV MODE] %s", __FUNCTION__);
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t func_id;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    switch (p_ins->opcode)
+    {
+        case 0x00:
+            set_resistor_to_high_z();
+            break;
+
+        case 0x01:
+            decode_and_set_resistor_pattern(p_ins->param);
+            break;
+
+        case 0x02:
+            decode_and_set_manual_resistor(p_ins->param);
+            break;
+
+        default:
+            break;
+    }
+}
+
+static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
+{
+    pel_config_t pel_cfg = {
+        .anode_pin    = ANODE_PIN,
+        .cathode_pin  = CATHODE_PIN,
+        .smaple_i_pin = SAMPLE_I_PIN,
+        .sample_v_pin = SAMPLE_V_PIN,
+        .test_pin     = TP1_PIN,
+        .mode         = BOARD_IOPx,
+        .point_us     = {
+                         10000,
+                         3,
+                         5,
+                         2,
+                         0,
+                         },
+        .pulse_cnt            = pusle_cnt,
+        .gain                 = NRF_SAADC_GAIN1_6,
+        .smaple_time          = NRF_SAADC_ACQTIME_10US,
+        .adc_timing_shift     = 0,
+        .convt_new_arrival_cb = convt_done_cb,
+    };
+
+    pel_pulse_gen_init(pel_cfg);
+    pel_pulse_gen_start();
+}
+
+static void stop_adc_pulse(void)
+{
+    pel_pulse_gen_stop();
+}
+
+static void adc_event_end_cb(void)
+{
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    xSemaphoreGiveFromISR(adc_convt_cplt_sem, &xHigherPriorityTaskWoken);
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+}
+
+static void pel_pulse_start(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    resistor_setting_t *p_setting = p_arg;
+
+    stop_adc_pulse();
+
+    vTaskDelay(pdMS_TO_TICKS(20));
+
+    if (p_setting->is_pattern == true)
+    {
+        set_resistor_load_pattern(p_setting->pattern);
+    }
+    else
+    {
+        set_resistor_load_bits(p_setting->bitmask);
+    }
+
+    nrf_gpio_pin_set(TP2_PIN);   // For testing
+    start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
+    nrf_gpio_pin_clear(TP2_PIN); // For testing
+}
+
+static void pel_pulse_stop(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    UNUSED_PARAMETER(p_arg);
+
+    stop_adc_pulse();
+    set_resistor_to_high_z();
+}
+
+#define MODE_COMPLETE (0xA)
+static void pel_pulse_notify(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    notify_setting_t *p_setting = p_arg;
+
+    static scan_mode_notify_packet_t packet_buf = { 0 };
+
+    xSemaphoreTake(adc_convt_cplt_sem, 0);
+
+    for (uint32_t i = 0; i < p_setting->drop; i++)
+    {
+        xSemaphoreTake(adc_convt_cplt_sem, pdMS_TO_TICKS(1000));
+    }
+
+    for (uint32_t i = 0; i < p_setting->count; i++)
+    {
+        xSemaphoreTake(adc_convt_cplt_sem, pdMS_TO_TICKS(1000));
+
+        if (p_setting->the_last_record_flag && (i == p_setting->count - 1))
+        {
+            packet_buf.mode_complete |= MODE_COMPLETE;
+        }
+        else
+        {
+            packet_buf.mode_complete &= ~MODE_COMPLETE;
+        }
+
+        nrf_gpio_pin_set(TP2_PIN);
+        pel_scan_mode_notify(&packet_buf, sizeof(packet_buf));
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+
+    if (p_setting->complete_cb)
+    {
+        p_setting->complete_cb();
+    }
+}
+
+#define PEL_START        0x00
+#define PEL_SET_RESISTOR 0x01
+#define PEL_STOP         0x02
+#define PEL_NOTIFY       0x03
+
+static void pel_scan_mode_task(void *pvArg)
+{
+    uint8_t recv[sizeof(pel_scan_msg_t)];
+
+    for (;;)
+    {
+        pel_scan_msg_t *p  = (void *)recv;
+        uint32_t recv_size = xMessageBufferReceive(pel_scan_msqQ, recv, sizeof(recv), portMAX_DELAY);
+        if (recv_size)
+        {
+            switch (p->opcode)
+            {
+                case PEL_START:
+                    pel_pulse_start(&p->resistor_setting);
+                    break;
+                case PEL_SET_RESISTOR:
+                    pel_pulse_start(&p->resistor_setting);
+                    break;
+                case PEL_STOP:
+                    pel_pulse_stop(NULL);
+                    break;
+                case PEL_NOTIFY:
+                    pel_pulse_notify(&p->notify_setting);
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+}
+
+static void dev_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t func_id;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    switch (p_ins->func_id)
+    {
+        case 0x01:
+            dev_mode_input_resistor(ins);
+            break;
+
+        default:
+            break;
+    }
+}
+
+static void manual_scan_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    static pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // manual_scan_mode stop
+            // 30 00 01 00
+            pel_scan_msg.opcode = PEL_STOP;
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        case 0x01: {
+            // manual_scan_mode start
+            // 30 00 01 01  00 01  00 05  00 0A  00 03 (pattern_index)
+            // 30 00 01 01  00 00  00 F0  00 0A  00 03 (resistor_mask)
+            send_start_package((void *)&packet_buf, sizeof(packet_buf));
+            pel_scan_msg.opcode                      = PEL_START;
+            pel_scan_msg.resistor_setting.is_pattern = u8_to_u16(p_ins->param[0], p_ins->param[1]) & 0x01;
+            pel_scan_msg.resistor_setting.value      = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+            pel_scan_msg.opcode               = PEL_NOTIFY;
+            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        case 0x02: {
+            // manual_scan_mode set resistor
+            // 30 00 01 02  00 01  00 07  00 0A  00 03 (pattern_index)
+            // 30 00 01 02  00 00  00 F0  00 0A  00 03 (resistor_mask)
+            pel_scan_msg.opcode                      = PEL_SET_RESISTOR;
+            pel_scan_msg.resistor_setting.is_pattern = u8_to_u16(p_ins->param[0], p_ins->param[1]) & 0x01;
+            pel_scan_msg.resistor_setting.value      = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+            pel_scan_msg.opcode               = PEL_NOTIFY;
+            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+static void auto_scan_complete(void)
+{
+    xSemaphoreGive(auto_scan_cplt_sem);
+}
+
+static void wait_auto_scan_complete(void)
+{
+    xSemaphoreTake(auto_scan_cplt_sem, portMAX_DELAY);
+}
+
+static TaskHandle_t auto_scan_start_handle = NULL;
+
+static void auto_scan_start_task(void *p_arg)
+{
+    uint8_t ins_buf[256];
+
+    struct
+    {
+        uint32_t size;
+        uint8_t payload[];
+    } *p = (void *)p_arg;
+
+    memcpy(ins_buf, p->payload, MIN(p->size, sizeof(ins_buf)));
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)&ins_buf[0];
+
+    pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    uint16_t pattern_max                             = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+    uint16_t pattern_min                             = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+    pel_scan_msg.notify_setting.the_last_record_flag = false;
+
+    send_start_package((void *)&packet_buf, sizeof(packet_buf));
+
+    for (uint16_t i = pattern_max; i >= pattern_min; i--)
+    {
+        pel_scan_msg.opcode                      = PEL_START;
+        pel_scan_msg.resistor_setting.is_pattern = true;
+        pel_scan_msg.resistor_setting.value      = i;
+        ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+        pel_scan_msg.opcode                     = PEL_NOTIFY;
+        pel_scan_msg.notify_setting.drop        = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+        pel_scan_msg.notify_setting.count       = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+        pel_scan_msg.notify_setting.complete_cb = auto_scan_complete;
+        if (i == pattern_min)
+        {
+            pel_scan_msg.notify_setting.the_last_record_flag = true;
+        }
+        ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+
+        wait_auto_scan_complete();
+    }
+
+    pel_scan_msg.opcode = PEL_STOP;
+    ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+
+    auto_scan_start_handle = NULL;
+
+    vTaskDelete(NULL);
+}
+
+static void auto_scan_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    pel_scan_msg_t pel_scan_msg;
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // auto_scan_mode stop
+            // 30 00 02 00
+            taskENTER_CRITICAL();
+            if (auto_scan_start_handle)
+            {
+                ASSERT(xMessageBufferReset(pel_scan_msqQ));
+
+                pel_scan_msg.opcode = PEL_STOP;
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), 0));
+
+                vTaskDelete(auto_scan_start_handle);
+                auto_scan_start_handle = NULL;
+            }
+            taskEXIT_CRITICAL();
+            break;
+        }
+
+        case 0x01: {
+            // auto_scan_mode start
+            // 30 00 02 01  00 1C  00 01  00 0A  00 05
+            if (auto_scan_start_handle == NULL)
+            {
+                struct
+                {
+                    uint32_t size;
+                    uint8_t payload[256];
+                } param;
+
+                param.size = MIN(size, sizeof(param.payload));
+                memcpy(param.payload, ins, param.size);
+
+                BaseType_t ret = xTaskCreate(auto_scan_start_task, "auto_start", 320, &param, 4, &auto_scan_start_handle);
+                if (ret != pdPASS)
+                {
+                    NRF_LOG_ERROR("auto_scan_start_task task not created.");
+                }
+
+                // using a 100ms delay to ensure the parameter is copied to  to auto_scan_start_task()
+                vTaskDelay(pdMS_TO_TICKS(100));
+            }
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+#define R1  PEL_0P5R_MASK
+#define R2  PEL_1P0R_MASK
+#define R3  PEL_2P0R_MASK
+#define R4  PEL_4P0R_MASK
+#define R5  PEL_8P0R_MASK
+#define R6  PEL_16P2R_MASK
+#define R7  PEL_32P4R_MASK
+#define R8  PEL_63P4R_MASK
+#define R9  PEL_127R_MASK
+#define R10 PEL_255R_MASK
+#define R11 PEL_511R_MASK
+#define R12 PEL_1000R_MASK
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    uint32_t calibration_bits_pattern_tab[] = {
+        R1,
+        R2,
+        R1 | R2,
+        R3,
+        R2 | R3,
+        R4,
+        R3 | R4,
+        R5,
+        R4 | R5,
+        R6,
+        R5 | R6,
+        R7,
+        R6 | R7,
+        R8,
+        R7 | R8,
+    };
+
+    global_memoryboard_id = p_ins->id;
+
+    static pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // R_external_calibration_mode stop
+            // 30 00 03 00
+            break;
+        }
+
+        case 0x01: {
+            // R_external_calibration_mode start with drop n * 10ms
+            // 30 00 03 01  00 0A  00 05
+            pel_scan_msg.notify_setting.the_last_record_flag = false;
+
+            send_start_package((void *)&packet_buf, sizeof(packet_buf));
+
+            for (uint16_t i = 0; i < COUNTOF(calibration_bits_pattern_tab); i++)
+            {
+                pel_scan_msg.opcode                      = PEL_START;
+                pel_scan_msg.resistor_setting.is_pattern = false;
+                pel_scan_msg.resistor_setting.value      = calibration_bits_pattern_tab[i];
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+                pel_scan_msg.opcode                     = PEL_NOTIFY;
+                pel_scan_msg.notify_setting.drop        = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+                pel_scan_msg.notify_setting.count       = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+                pel_scan_msg.notify_setting.complete_cb = auto_scan_complete;
+                if (i == COUNTOF(calibration_bits_pattern_tab) - 1)
+                {
+                    pel_scan_msg.notify_setting.the_last_record_flag = true;
+                }
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+
+                wait_auto_scan_complete();
+            }
+
+            pel_scan_msg.opcode = PEL_STOP;
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+#define MANUAL_SCAN_MODE            0x01
+#define AUTO_SCAN_MODE              0x02
+#define R_EXTERNAL_CALIBRATION_MODE 0x03
+
+const elite_instance_t pel_elite_instance = {
+    .cis_func = {
+                 [CIS_VERSION] = cis_version,
+                 },
+    .vis_func = {
+                 [VIS_RST] = vis_rst,
+                 },
+    .ris_func = {
+                 [MANUAL_SCAN_MODE]            = manual_scan_mode,
+                 [AUTO_SCAN_MODE]              = auto_scan_mode,
+                 [R_EXTERNAL_CALIBRATION_MODE] = R_external_calibration_mode,
+                 [DEV_MODE]                    = dev_mode,
+                 }
+};
+
+const elite_instance_t *pel_init(void)
+{
+    NRF_LOG_INFO("[Board] FW ver: %02d%02d%02d %02d:%02d", VERSION_DATE_YEAR, VERSION_DATE_MONTH, VERSION_DATE_DAY, VERSION_DATE_HOUR, VERSION_DATE_MINUTE);
+    NRF_LOG_INFO("[Board] %s", BOARD_IOPx ? "IOPH" : "IOPL");
+
+    auto_scan_cplt_sem = xSemaphoreCreateBinary();
+    ASSERT(auto_scan_cplt_sem);
+
+    adc_convt_cplt_sem = xSemaphoreCreateBinary();
+    ASSERT(adc_convt_cplt_sem);
+
+    pel_scan_msqQ = xMessageBufferCreate(1024);
+    ASSERT(pel_scan_msqQ);
+
+    ASSERT(xTaskCreate(pel_scan_mode_task, "pel_scan_mode", 512, NULL, 4, NULL));
+
+    hot_swap_monitor_init();
+
+    return &pel_elite_instance;
+}
+
+#endif

pel_v3_0.h

@@ -0,0 +1,59 @@
+#ifndef __PEL_V3_0_H__
+#define __PEL_V3_0_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite.h"
+#include "elite_board.h"
+
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  7
+#define VERSION_DATE_DAY    10
+#define VERSION_DATE_HOUR   14
+#define VERSION_DATE_MINUTE 15
+
+#define PEL_0P5R_MASK       (0x01 << 0)
+#define PEL_1P0R_MASK       (0x01 << 1)
+#define PEL_2P0R_MASK       (0x01 << 2)
+#define PEL_4P0R_MASK       (0x01 << 3)
+#define PEL_8P0R_MASK       (0x01 << 4)
+#define PEL_16P2R_MASK      (0x01 << 5)
+#define PEL_32P4R_MASK      (0x01 << 6)
+#define PEL_63P4R_MASK      (0x01 << 7)
+#define PEL_127R_MASK       (0x01 << 8)
+#define PEL_255R_MASK       (0x01 << 9)
+#define PEL_511R_MASK       (0x01 << 10)
+#define PEL_1000R_MASK      (0x01 << 11)
+
+    typedef struct __PACKED
+    {
+        uint16_t mem_board_id : 8;
+        uint16_t packet_seq   : 8;
+        uint32_t notify_time;
+        int32_t output_vo_raw;
+        int32_t output_vc_raw;
+        int32_t output_ve_raw;
+        float hold_OUT_v;
+        float hold_VCC_v;
+        float hold_VEE_v;
+        uint16_t resis_pattern_id;
+        uint16_t resis_bitsmask;
+        float resis_g_value;
+        uint32_t mode_complete : 4;
+        uint32_t rsvd          : 28;
+        uint32_t val_1;
+        uint32_t val_2;
+        uint16_t val_3;
+    } scan_mode_notify_packet_t;
+
+    const elite_instance_t *pel_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __PEL_V3_0_H__ */

pel_v3_0_io.c

@@ -0,0 +1,434 @@
+#include "app_config.h"
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+
+#include "nrf_spim.h"
+#include "nrf_timer.h"
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "task.h"
+
+#include "SEGGER_RTT.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+
+pel_hw_t pel_hw = {
+    .pulse_tmr    = NRF_TIMER3,
+    .pulse_irq_n  = TIMER3_IRQn,
+    .pulse_cnt    = 0,
+    .adc.channels = {
+                     [OUTPUT_ACS37030_REF_IDX] = OUTPUT_ACS37030_VREF_CHANNEL,
+                     [OUTPUT_I_OUT_IDX]        = OUTPUT_I_OUT_CHANNEL,
+                     [OUTPUT_VO_IDX]           = OUTPUT_VO_CHANNEL,
+                     [OUTPUT_VC_IDX]           = OUTPUT_VC_CHANNEL,
+                     [OUTPUT_VE_IDX]           = OUTPUT_VE_CHANNEL},
+    .adc.gain        = NRF_SAADC_GAIN1_6,
+    .adc.smaple_time = NRF_SAADC_ACQTIME_3US
+};
+
+void spim_xfer(uint32_t cs_pin,
+               nrf_spim_mode_t spi_mode,
+               uint8_t *p_tx_buffer,
+               uint16_t tx_buffer_length,
+               uint8_t *p_rx_buf,
+               uint16_t rx_buffer_length)
+{
+    __disable_irq();
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+
+    switch (spi_mode)
+    {
+        default:
+        case NRF_SPIM_MODE_0:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_1:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_2:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_3:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+    }
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+
+    NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
+    NRF_SPIM3->TXD.PTR    = (uint32_t)p_tx_buffer;
+
+    NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
+    NRF_SPIM3->RXD.PTR    = (uint32_t)p_rx_buf;
+
+    nrf_gpio_pin_clear(cs_pin);
+
+    NRF_SPIM3->EVENTS_END  = 0;
+    NRF_SPIM3->TASKS_START = 1;
+    do {
+    } while (NRF_SPIM3->EVENTS_END == 0);
+
+    nrf_gpio_pin_set(cs_pin);
+
+    __enable_irq();
+}
+
+#define MIN_PULSE_WIDTH 2
+#define MIN_PULSE_IDLE  2
+#define MAX_PULSE_WIDTH INT16_MAX
+#define MAX_PULSE_IDLE  INT16_MAX
+
+void set_anode_cathode_to_default(void)
+{
+    if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_I_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_I_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+}
+
+static void pel_saadc_init(pel_adc_t *p_adc)
+{
+    /* stop ssadc */
+    NRF_SAADC->EVENTS_STOPPED = 0;
+    NRF_SAADC->TASKS_STOP     = 1;
+    do {
+    } while (NRF_SAADC->EVENTS_STOPPED == 0);
+
+    /* disable ssadc */
+    NRF_SAADC->ENABLE = 0;
+
+    /*
+        ref: p.381, nrf52840_PS_v1.1.pdf
+        Note: Oversampling should only be used when a single input channel is enabled, as averaging is
+        performed over all enabled channels.
+    */
+    NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
+    NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
+    /* config analog inputs */
+    for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
+    {
+        if (i < COUNTOF(p_adc->channels))
+        {
+            NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
+            NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG =
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
+                (p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
+                (NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
+                (p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
+                (NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
+                (NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
+        }
+        else
+        {
+            NRF_SAADC->CH[i].PSELP  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].PSELN  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG = 0;
+        }
+    }
+    /* enable ssadc */
+    NRF_SAADC->INTENSET      = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
+    NRF_SAADC->ENABLE        = 1;
+    NRF_SAADC->RESULT.PTR    = (uint32_t)p_adc->results;
+    NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
+}
+
+void TIMER3_IRQHandler(void)
+{
+    if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
+    {
+        pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
+
+        pel_hw.pulse_is_running = 1;
+
+        if (pel_hw.pulse_cnt)
+        {
+            pel_hw.pulse_cnt--;
+        }
+    }
+}
+
+void SAADC_IRQHandler(void)
+{
+    if (NRF_SAADC->EVENTS_STARTED)
+    {
+        NRF_SAADC->EVENTS_STARTED = 0;
+        if (pel_hw.pulse_cnt == 0)
+        {
+            pel_hw.pulse_tmr->TASKS_STOP = 1;
+        }
+        return;
+    }
+
+    if (NRF_SAADC->EVENTS_END)
+    {
+        NRF_SAADC->EVENTS_END    = 0;
+        NRF_SAADC->RESULT.PTR    = (uint32_t)pel_hw.adc.results;
+        NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
+        pel_hw.pulse_is_running  = 0;
+        if (pel_hw.adc.convt_new_arrival_cb)
+        {
+            pel_hw.adc.convt_new_arrival_cb();
+        }
+    }
+}
+
+void pel_pulse_gen_init(pel_config_t cfg)
+{
+    pel_hw.pulse_tmr->TASKS_STOP = 1;
+
+    sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
+    sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
+
+    sd_nvic_DisableIRQ(SAADC_IRQn);
+    sd_nvic_ClearPendingIRQ(SAADC_IRQn);
+
+    pel_hw.pulse_cnt                = cfg.pulse_cnt;
+    pel_hw.adc.gain                 = cfg.gain;
+    pel_hw.adc.smaple_time          = cfg.smaple_time;
+    pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
+
+    pel_saadc_init(&pel_hw.adc);
+
+    // disable gpio task
+    for (int i = 0; i < 4; i++)
+    {
+        nrf_gpiote_task_disable(i);
+    }
+
+    set_anode_cathode_to_default();
+
+    // config gpiote task
+    nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(1, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    }
+
+    // enable gpio task
+    for (int i = 0; i < 4; i++)
+    {
+        nrf_gpiote_task_enable(i);
+    }
+
+    NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
+    NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->CHENSET   = (1 << (0));
+
+    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
+    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_i_pin
+    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
+    NRF_PPI->CHENSET     = (1 << (1));
+
+    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
+    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
+    NRF_PPI->CHENSET     = (1 << (2));
+
+    NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
+    NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->CHENSET   = (1 << (3));
+
+    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
+    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
+    NRF_PPI->CHENSET   = (1 << (4));
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        NRF_PPI->CH[6].EEP   = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
+        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
+        NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
+        NRF_PPI->CHENSET     = (1 << (6));
+        NRF_PPI->CH[7].EEP   = (uint32_t)&NRF_SAADC->EVENTS_END;
+        NRF_PPI->CH[7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+        NRF_PPI->CHENSET     = (1 << (7));
+    }
+
+    pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
+    pel_hw.pulse_tmr->MODE      = NRF_TIMER_MODE_TIMER;
+    pel_hw.pulse_tmr->BITMODE   = NRF_TIMER_BIT_WIDTH_32;
+    pel_hw.pulse_tmr->CC[0]     = cfg.point_us[0] * 16;
+    pel_hw.pulse_tmr->CC[1]     = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
+    pel_hw.pulse_tmr->CC[2]     = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
+    pel_hw.pulse_tmr->CC[3]     = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
+    pel_hw.pulse_tmr->CC[4]     = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
+    pel_hw.pulse_tmr->CC[5]     = pel_hw.pulse_tmr->CC[4];
+    pel_hw.pulse_tmr->SHORTS    = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
+    pel_hw.pulse_tmr->INTENSET  = NRF_TIMER_INT_COMPARE0_MASK;
+
+    sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(SAADC_IRQn);
+
+    sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
+}
+
+void pel_pulse_gen_start(void)
+{
+    pel_hw.pulse_tmr->TASKS_START = 1;
+}
+
+void pel_pulse_gen_stop(void)
+{
+    pel_hw.pulse_cnt = 0;
+    do {
+    } while (pel_hw.pulse_is_running == 1);
+    pel_hw.adc.convt_new_arrival_cb = NULL;
+}
+
+#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
+static void pel_pulse_gen_demo_task(void *p_arg)
+{
+    pel_config_t pel_cfg = {
+        .anode_pin    = ANODE_PIN,
+        .cathode_pin  = CATHODE_PIN,
+        .smaple_i_pin = SAMPLE_I_PIN,
+        .sample_v_pin = SAMPLE_V_PIN,
+        .test_pin     = TP1_PIN,
+        .mode         = BOARD_IOPx,
+        .point_us     = {
+                         10000,
+                         3,
+                         5,
+                         2,
+                         0,
+                         },
+        .pulse_cnt        = 0xFFFFFFFF,
+        .gain             = NRF_SAADC_GAIN1_6,
+        .smaple_time      = NRF_SAADC_ACQTIME_10US,
+        .adc_timing_shift = 0,
+    };
+
+    pel_pulse_gen_init(pel_cfg);
+
+    pel_pulse_gen_start();
+
+    for (;;)
+    {
+        static uint32_t i = 0;
+        vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
+        SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
+    }
+}
+
+void pel_pulse_gen_demo(void)
+{
+}
+#endif
+
+void pel20_io_init(void)
+{
+    const uint32_t config_output_and_set[] = {
+        INPUT_1_PIN,
+        INPUT_2_PIN,
+        INPUT_3_PIN,
+        INPUT_4_PIN,
+        INPUT_5_PIN,
+        INPUT_6_PIN,
+        INPUT_7_PIN,
+        INPUT_8_PIN,
+        INPUT_9_PIN,
+        INPUT_10_PIN,
+        INPUT_11_PIN,
+        INPUT_12_PIN
+    };
+
+    const uint32_t config_output_and_clear[] = {
+        TP1_PIN,
+        TP2_PIN,
+        SAMPLE_I_PIN,
+        SAMPLE_V_PIN,
+        HOT_SWAP_1_PIN
+    };
+
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
+    {
+        nrf_gpio_pin_set(config_output_and_set[i]);
+        nrf_gpio_cfg_output(config_output_and_set[i]);
+    }
+
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
+    {
+        nrf_gpio_pin_clear(config_output_and_clear[i]);
+        nrf_gpio_cfg_output(config_output_and_clear[i]);
+    }
+
+    nrf_gpio_cfg_input(RESET_PIN, NRF_GPIO_PIN_NOPULL);
+    nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
+    nrf_gpio_cfg_input(HOT_SWAP_SIGNAL_PIN, NRF_GPIO_PIN_PULLUP);
+
+    if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_pin_set(INA_HI_PIN);
+        nrf_gpio_pin_set(LED_IOPL_PIN);
+        nrf_gpio_pin_clear(LED_IOPH_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_pin_clear(INA_HI_PIN);
+        nrf_gpio_pin_clear(LED_IOPL_PIN);
+        nrf_gpio_pin_set(LED_IOPH_PIN);
+    }
+
+    nrf_gpio_cfg_output(ANODE_PIN);
+    nrf_gpio_cfg_output(INA_HI_PIN);
+    nrf_gpio_cfg_output(LED_IOPL_PIN);
+    nrf_gpio_cfg_output(LED_IOPH_PIN);
+
+    // Config spi module
+    nrf_gpio_pin_set(WP_MEM_PIN);
+    nrf_gpio_pin_set(CS_MEM_PIN);
+    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
+    nrf_gpio_pin_clear(SPIM_CLK_PIN);
+    nrf_gpio_cfg_output(WP_MEM_PIN);
+    nrf_gpio_cfg_output(CS_MEM_PIN);
+    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
+    nrf_gpio_cfg_output(SPIM_CLK_PIN);
+    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
+
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+    NRF_SPIM3->ORC             = 0x00000000;
+    NRF_SPIM3->FREQUENCY       = SPIM_FREQUENCY_FREQUENCY_M32;
+    NRF_SPIM3->CSNPOL          = SPIM_CSNPOL_CSNPOL_LOW;
+    NRF_SPIM3->IFTIMING.CSNDUR = 8;
+    NRF_SPIM3->PSEL.CSN        = CS_MEM_PIN;
+    NRF_SPIM3->PSEL.SCK        = SPIM_CLK_PIN;
+    NRF_SPIM3->PSEL.MOSI       = SPIM_MOSI_PIN;
+    NRF_SPIM3->PSEL.MISO       = SPIM_MISO_PIN;
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+}
+
+#endif

pel_v3_0_io.h

@@ -0,0 +1,129 @@
+#ifndef __PEL_V3_0_IO_H__
+#define __PEL_V3_0_IO_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite_board.h"
+#include "nrf_gpio.h"
+#include "nrf_saadc.h"
+#include "nrf_spim.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#define INPUT_1_PIN         NRF_GPIO_PIN_MAP(0, 15)
+#define INPUT_2_PIN         NRF_GPIO_PIN_MAP(0, 13)
+#define INPUT_3_PIN         NRF_GPIO_PIN_MAP(0, 20)
+#define INPUT_4_PIN         NRF_GPIO_PIN_MAP(1, 0)
+#define INPUT_5_PIN         NRF_GPIO_PIN_MAP(0, 25)
+#define INPUT_6_PIN         NRF_GPIO_PIN_MAP(0, 11)
+#define INPUT_7_PIN         NRF_GPIO_PIN_MAP(0, 14)
+#define INPUT_8_PIN         NRF_GPIO_PIN_MAP(0, 17)
+#define INPUT_9_PIN         NRF_GPIO_PIN_MAP(1, 8)
+#define INPUT_10_PIN        NRF_GPIO_PIN_MAP(0, 21)
+#define INPUT_11_PIN        NRF_GPIO_PIN_MAP(0, 19)
+#define INPUT_12_PIN        NRF_GPIO_PIN_MAP(0, 22)
+
+#define RESET_PIN           NRF_GPIO_PIN_MAP(0, 18)
+#define TP1_PIN             NRF_GPIO_PIN_MAP(0, 5)
+#define TP2_PIN             NRF_GPIO_PIN_MAP(0, 26)
+#define SAMPLE_I_PIN        NRF_GPIO_PIN_MAP(1, 11)
+#define SAMPLE_V_PIN        NRF_GPIO_PIN_MAP(1, 6)
+#define ANODE_PIN           NRF_GPIO_PIN_MAP(0, 7)
+#define CATHODE_PIN         NRF_GPIO_PIN_MAP(0, 8)
+#define HOT_SWAP_1_PIN      NRF_GPIO_PIN_MAP(0, 1)
+#define HOT_SWAP_SIGNAL_PIN NRF_GPIO_PIN_MAP(0, 0)
+#define INA_HI_PIN          NRF_GPIO_PIN_MAP(1, 12)
+
+#define WP_MEM_PIN          NRF_GPIO_PIN_MAP(0, 12)
+#define CS_MEM_PIN          NRF_GPIO_PIN_MAP(0, 6)
+#define SPIM_MOSI_PIN       NRF_GPIO_PIN_MAP(0, 27)
+#define SPIM_CLK_PIN        NRF_GPIO_PIN_MAP(0, 4)
+#define SPIM_MISO_PIN       NRF_GPIO_PIN_MAP(1, 9)
+
+#define LED_IOPL_PIN        NRF_GPIO_PIN_MAP(0, 24) // pin60
+#define LED_IOPH_PIN        NRF_GPIO_PIN_MAP(0, 16) // pin62
+
+#define LED_R_PINS              \
+    {                           \
+        NRF_GPIO_PIN_MAP(1, 13) \
+    }
+#define LED_G_PINS             \
+    {                          \
+        NRF_GPIO_PIN_MAP(1, 3) \
+    }
+#define LED_B_PINS              \
+    {                           \
+        NRF_GPIO_PIN_MAP(1, 10) \
+    }
+
+#define OUTPUT_ACS37030_VREF_CHANNEL 7
+#define OUTPUT_I_OUT_CHANNEL         4
+#define OUTPUT_VO_CHANNEL            5
+#define OUTPUT_VC_CHANNEL            0
+#define OUTPUT_VE_CHANNEL            1
+
+#define OUTPUT_ACS37030_REF_IDX      0
+#define OUTPUT_I_OUT_IDX             1
+#define OUTPUT_VO_IDX                2
+#define OUTPUT_VC_IDX                3
+#define OUTPUT_VE_IDX                4
+
+    typedef struct
+    {
+        uint32_t anode_pin;
+        uint32_t cathode_pin;
+        uint32_t smaple_i_pin;
+        uint32_t sample_v_pin;
+        uint32_t test_pin;
+        uint32_t point_us[5]; // toggle point timestamp
+        uint32_t pulse_cnt;   // min: 1, max: 0xFFFFFFFF
+        uint32_t mode;        // 0: IOPL mode, 1: IOPH mode
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        int32_t adc_timing_shift;
+        void (*convt_new_arrival_cb)(void);
+    } pel_config_t;
+
+    typedef struct
+    {
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        uint32_t channels[5];
+        int16_t results[5];
+        float results_f[5];
+        void (*convt_new_arrival_cb)(void);
+    } pel_adc_t;
+
+    typedef struct
+    {
+        NRF_TIMER_Type *pulse_tmr;
+        uint32_t pulse_irq_n;
+        uint32_t pulse_cnt;
+        uint32_t pulse_is_running;
+        pel_adc_t adc;
+    } pel_hw_t;
+
+    extern pel_hw_t pel_hw;
+
+    void spim_xfer(uint32_t cs_pin,
+                   nrf_spim_mode_t spi_mode,
+                   uint8_t *p_tx_buffer,
+                   uint16_t tx_buffer_length,
+                   uint8_t *p_rx_buf,
+                   uint16_t rx_buffer_length);
+
+    void pel20_io_init(void);
+    void pel_pulse_gen_init(pel_config_t cfg);
+    void pel_pulse_gen_start(void);
+    void pel_pulse_gen_stop(void);
+
+#endif /* ! DEF_ELITE_MODEL */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __PEL_V3_0_IO_H__ */

sw_drv.c

@@ -5,6 +5,11 @@
 #include "adgs1412.h"
 const sw_drv_if_t *p_inst = &adgs1412;
 
+#elif (DEF_MAX14802_ENABLED)
+
+#include "max14802.h"
+const sw_drv_if_t *p_inst = &max14802;
+
 #else
 
 const sw_drv_if_t *p_inst = NULL;

tw1508.c

@@ -0,0 +1,49 @@
+#include "tw1508.h"
+
+#include "nrf_delay.h"
+#include "nrf_log.h"
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#if (DEF_TW1508_ENABLED)
+
+void tw1508_set(uint16_t out_0, uint16_t out_1)
+{
+    NRF_LOG_INFO("%s(0x%04X, 0x%04X)", __FUNCTION__, out_0, out_1);
+    typedef struct
+    {
+        uint32_t scki_pin;
+        uint32_t sdi_pin;
+        uint32_t val;
+    } tw1805_t;
+
+    tw1805_t tw1508[2] = {
+        {TW_SCKI_0_PIN, TW_SDI_PIN, out_0},
+        {TW_SCKI_1_PIN, TW_SDI_PIN, out_1},
+    };
+
+    nrf_gpio_pin_write(tw1508[0].scki_pin, 0);
+    nrf_gpio_pin_write(tw1508[1].scki_pin, 0);
+
+    for (uint32_t i = 0; i < COUNTOF(tw1508); i++)
+    {
+        for (uint16_t j = 0b1000000000; j > 0; j >>= 1)
+        {
+            nrf_delay_us(1);
+            nrf_gpio_pin_write(tw1508[i].sdi_pin, j & tw1508[i].val);
+            nrf_delay_us(1);
+            nrf_gpio_pin_write(tw1508[i].scki_pin, 1);
+            nrf_delay_us(1);
+            nrf_gpio_pin_write(tw1508[i].scki_pin, 0);
+        }
+    }
+    nrf_delay_us(256);
+}
+
+void tw1508_init(void)
+{
+    tw1508_set(0, 0);
+}
+
+#endif /* ! DEF_TW1508_ENABLED */

tw1508.h

@@ -0,0 +1,21 @@
+#ifndef __TW1508_H__
+#define __TW1508_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite_board.h"
+
+#if (DEF_TW1508_ENABLED)
+    void tw1508_set(uint16_t out_0, uint16_t out_1);
+    void tw1508_init(void);
+#endif /* ! DEF_TW1508_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __CPG_H__ */

uart.drv.c

@@ -0,0 +1,243 @@
+#include "nrf.h"
+#include "nrf_gpio.h"
+#include "nrf_uarte.h"
+
+#include "le_uart_srv.h"
+#include "uart_drv.h"
+
+#include "nrf_error.h"
+
+#include "FreeRTOS.h"
+#include "message_buffer.h"
+#include "semphr.h"
+#include "task.h"
+
+#include <string.h>
+
+#if (DEF_UARTE_ENABLED)
+
+#define UART_TX_PIN NRF_GPIO_PIN_MAP(0, 6)
+#define UART_RX_PIN NRF_GPIO_PIN_MAP(0, 8)
+
+static MessageBufferHandle_t rx_message = NULL;
+static MessageBufferHandle_t tx_message = NULL;
+static SemaphoreHandle_t tx_done_sem    = NULL;
+
+void UARTE0_UART0_IRQHandler(void)
+{
+    if (NRF_UARTE0->EVENTS_ENDTX)
+    {
+        NRF_UARTE0->EVENTS_ENDTX            = 0;
+        BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+        xSemaphoreGiveFromISR(tx_done_sem, &xHigherPriorityTaskWoken);
+        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    }
+}
+
+ret_code_t uart_set_baud(uint32_t baudrate)
+{
+    ret_code_t ret = NRF_SUCCESS;
+
+    vTaskSuspendAll();
+
+    NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
+    switch (baudrate)
+    {
+        case 4800:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud4800;
+            break;
+        case 9600:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud9600;
+            break;
+        case 19200:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud19200;
+            break;
+        case 38400:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud38400;
+            break;
+        case 56000:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud56000;
+            break;
+        case 57600:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud57600;
+            break;
+        case 115200:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud115200;
+            break;
+        case 250000:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud250000;
+            break;
+        case 1000000:
+            NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;
+            break;
+        default:
+            ret = NRF_ERROR_INVALID_PARAM;
+            break;
+    }
+    NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
+
+    xTaskResumeAll();
+
+    return ret;
+}
+
+void uart_tx_task(void *p_arg)
+{
+    for (;;)
+    {
+        static uint8_t tx[2048];
+        size_t tx_size = xMessageBufferReceive(tx_message, tx, sizeof(tx), portMAX_DELAY);
+        if (tx_size)
+        {
+            NRF_UARTE0->TXD.PTR          = (uint32_t)tx;
+            NRF_UARTE0->TXD.MAXCNT       = tx_size;
+            NRF_UARTE0->EVENTS_ENDTX     = 0;
+            NRF_UARTE0->EVENTS_TXSTOPPED = 0;
+            NRF_UARTE0->EVENTS_TXSTARTED = 0;
+            NRF_UARTE0->TASKS_STARTTX    = 1;
+            NRF_UARTE0->INTENSET         = UARTE_INTENSET_ENDTX_Msk;
+            if (xSemaphoreTake(tx_done_sem, pdMS_TO_TICKS(10000)) == pdFALSE)
+            {
+                NRF_UARTE0->TASKS_STOPTX = 1;
+            }
+            NRF_UARTE0->INTENCLR = UARTE_INTEN_ENDTX_Msk;
+        }
+    }
+}
+
+void uart_rx_task(void *p_arg)
+{
+    static uint8_t rx[2][2048];
+    int idx                   = 0;
+    NRF_UARTE0->SHORTS        = UARTE_SHORTS_ENDRX_STARTRX_Msk;
+    NRF_UARTE0->RXD.PTR       = (uint32_t)rx[idx];
+    NRF_UARTE0->RXD.MAXCNT    = sizeof(rx[idx]);
+    NRF_UARTE0->TASKS_STOPRX  = 1;
+    NRF_UARTE0->TASKS_STARTRX = 1;
+    do {
+    } while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
+    NRF_UARTE0->RXD.PTR    = (uint32_t)rx[idx ^ 1];
+    NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx ^ 1]);
+
+    for (;;)
+    {
+        NRF_UARTE0->EVENTS_RXDRDY = 0;
+
+        do {
+            vTaskDelay(pdMS_TO_TICKS(5));
+        } while (NRF_UARTE0->EVENTS_RXDRDY == 0);
+
+        do {
+            NRF_UARTE0->EVENTS_RXDRDY = 0;
+            vTaskDelay(pdMS_TO_TICKS(5));
+        } while (NRF_UARTE0->EVENTS_RXDRDY == 1);
+
+        NRF_UARTE0->EVENTS_ENDRX     = 0;
+        NRF_UARTE0->EVENTS_RXSTARTED = 0;
+        NRF_UARTE0->TASKS_STOPRX     = 1;
+
+        do {
+            vTaskDelay(pdMS_TO_TICKS(1));
+        } while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
+
+        NRF_UARTE0->RXD.PTR    = (uint32_t)rx[idx];
+        NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx]);
+
+        xMessageBufferSend(rx_message, rx[idx], NRF_UARTE0->RXD.AMOUNT, portMAX_DELAY);
+
+        idx ^= 1;
+    }
+}
+
+void uart_rx_notify_task(void *p_arg)
+{
+    for (;;)
+    {
+        static uint8_t buf[2048];
+        uint32_t recv_size = uart_recv(buf, sizeof(buf));
+        if (recv_size)
+        {
+            uint8_t *p      = buf;
+            uint32_t loops  = recv_size / BLE_UART_MAX_DATA_LEN;
+            uint32_t remain = recv_size % BLE_UART_MAX_DATA_LEN;
+
+            for (int i = 0; i < loops; i++)
+            {
+                for (int i = 0; i < 10; i++)
+                {
+                    if (le_uart_notify((void *)p, BLE_UART_MAX_DATA_LEN) == NRF_SUCCESS)
+                    {
+                        p += BLE_UART_MAX_DATA_LEN;
+                        break;
+                    }
+                    else
+                    {
+                        vTaskDelay(pdMS_TO_TICKS(5));
+                    }
+                }
+            }
+
+            if (remain)
+            {
+                for (int i = 0; i < 10; i++)
+                {
+                    if (le_uart_notify((void *)p, remain) == NRF_SUCCESS)
+                    {
+                        p += BLE_UART_MAX_DATA_LEN;
+                        break;
+                    }
+                    else
+                    {
+                        vTaskDelay(pdMS_TO_TICKS(5));
+                    }
+                }
+            }
+        }
+    }
+}
+
+void uart_init(void)
+{
+    rx_message  = xMessageBufferCreate(4096);
+    tx_message  = xMessageBufferCreate(2048);
+    tx_done_sem = xSemaphoreCreateBinary();
+
+    NRF_UARTE0->ENABLE   = UARTE_ENABLE_ENABLE_Disabled;
+    NRF_UARTE0->PSEL.TXD = UART_TX_PIN | (UARTE_PSEL_TXD_CONNECT_Connected << UARTE_PSEL_TXD_CONNECT_Pos);
+    NRF_UARTE0->PSEL.RXD = UART_RX_PIN | (UARTE_PSEL_RXD_CONNECT_Connected << UARTE_PSEL_RXD_CONNECT_Pos);
+    NRF_UARTE0->PSEL.CTS = 0;
+    NRF_UARTE0->PSEL.RTS = 0;
+    NRF_UARTE0->CONFIG   = 0;
+    NRF_UARTE0->BAUDRATE = UARTE_BAUDRATE_BAUDRATE_Baud115200;
+    NRF_UARTE0->ENABLE   = UARTE_ENABLE_ENABLE_Enabled;
+
+    // Config uart tx pin
+    nrf_gpio_cfg(
+        UART_TX_PIN,
+        NRF_GPIO_PIN_DIR_OUTPUT,
+        NRF_GPIO_PIN_INPUT_DISCONNECT,
+        NRF_GPIO_PIN_NOPULL,
+        NRF_GPIO_PIN_H0H1,
+        NRF_GPIO_PIN_NOSENSE);
+
+    // Config uart rx pin
+    nrf_gpio_cfg_input(UART_RX_PIN, NRF_GPIO_PIN_PULLUP);
+
+    sd_nvic_SetPriority(UARTE0_UART0_IRQn, _PRIO_APP_LOWEST);
+    sd_nvic_EnableIRQ(UARTE0_UART0_IRQn);
+
+    xTaskCreate(uart_tx_task, "uart tx", 64, NULL, 4, NULL);
+    xTaskCreate(uart_rx_task, "uart rx", 64, NULL, 4, NULL);
+    xTaskCreate(uart_rx_notify_task, "uart rx notify", 128, NULL, 3, NULL);
+}
+
+int uart_send(void *p_data, uint32_t size)
+{
+    return xMessageBufferSend(tx_message, p_data, size, portMAX_DELAY);
+}
+
+int uart_recv(void *p_data, uint32_t max_size)
+{
+    return xMessageBufferReceive(rx_message, p_data, max_size, portMAX_DELAY);
+}
+#endif

uart_drv.h

@@ -0,0 +1,29 @@
+#pragma once
+#ifndef __UART_DRV_H__
+#define __UART_DRV_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "sdk_errors.h"
+
+#if (DEF_UARTE_ENABLED)
+    void uart_init(void);
+    int uart_send(void *p_data, uint32_t size);
+    int uart_recv(void *p_data, uint32_t max_size);
+    ret_code_t uart_set_baud(uint32_t baudrate);
+#else
+#define uart_init()
+#define uart_send(...) ;
+#define uart_recv(...) ;
+#define uart_set_baud(...)
+#endif /* ! DEF_UARTE_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __UART_DRV_H__ */

usbd.c

@@ -0,0 +1,256 @@
+#include "nrf.h"
+
+#include "app_usbd.h"
+#include "app_usbd_cdc_acm.h"
+#include "app_usbd_cdc_types.h"
+#include "app_usbd_serial_num.h"
+
+#include "nrf_log.h"
+
+#include "FreeRTOS.h"
+#include "message_buffer.h"
+#include "semphr.h"
+#include "stream_buffer.h"
+#include "task.h"
+
+#define DEBUG_ACM_CDC_READ 1
+
+static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event);
+
+#define CDC_ACM_COMM_EPIN  NRF_DRV_USBD_EPIN1
+#define CDC_ACM_DATA_EPIN  NRF_DRV_USBD_EPIN2
+#define CDC_ACM_DATA_EPOUT NRF_DRV_USBD_EPOUT2
+
+APP_USBD_CDC_ACM_GLOBAL_DEF(cdc_acm_inst,
+                            cdc_acm_user_ev_handler,
+                            NRF_CDC_ACM_COMM_INTERFACE,
+                            NRF_CDC_ACM_DATA_INTERFACE,
+                            CDC_ACM_COMM_EPIN,
+                            CDC_ACM_DATA_EPIN,
+                            CDC_ACM_DATA_EPOUT,
+                            APP_USBD_CDC_COMM_PROTOCOL_AT_V250);
+
+static SemaphoreHandle_t usbd_ready_rx_done_sem = NULL;
+static SemaphoreHandle_t usbd_ready_tx_done_sem = NULL;
+static SemaphoreHandle_t usbd_evt_queue_sem     = NULL;
+static MessageBufferHandle_t usbd_tx_message    = NULL;
+static MessageBufferHandle_t usbd_rx_message    = NULL;
+static bool is_port_closed                      = true;
+
+static void usbd_isr_handler(app_usbd_internal_evt_t const *const p_event, bool queued)
+{
+    if (queued)
+    {
+        BaseType_t xHigherPriorityTaskWoken = false;
+        xSemaphoreGiveFromISR(usbd_evt_queue_sem, &xHigherPriorityTaskWoken);
+        portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    }
+}
+
+static void usbd_state_proc(app_usbd_event_type_t event)
+{
+    switch (event)
+    {
+        case APP_USBD_EVT_DRV_SUSPEND:
+            break;
+        case APP_USBD_EVT_DRV_RESUME:
+            break;
+        case APP_USBD_EVT_STARTED:
+            NRF_LOG_INFO("APP_USBD_EVT_STARTED");
+            break;
+        case APP_USBD_EVT_STOPPED:
+            NRF_LOG_INFO("APP_USBD_EVT_STOPPED");
+            app_usbd_disable();
+            break;
+        case APP_USBD_EVT_POWER_DETECTED:
+            NRF_LOG_INFO("USB power detected");
+            if (!nrf_drv_usbd_is_enabled())
+            {
+                app_usbd_enable();
+            }
+            break;
+        case APP_USBD_EVT_POWER_REMOVED:
+            NRF_LOG_INFO("USB power removed");
+            app_usbd_stop();
+            break;
+        case APP_USBD_EVT_POWER_READY:
+            NRF_LOG_INFO("USB ready");
+            app_usbd_start();
+            break;
+        default:
+            break;
+    }
+}
+
+static void usbd_ser_send_task(void *p_arg)
+{
+    static uint8_t buf[512];
+    for (;;)
+    {
+        size_t send_size = xStreamBufferReceive(usbd_tx_message, buf, sizeof(buf), portMAX_DELAY);
+        if (send_size && is_port_closed == false)
+        {
+            ret_code_t ret_code = app_usbd_cdc_acm_write(&cdc_acm_inst, buf, send_size);
+            switch (ret_code)
+            {
+                case NRF_SUCCESS:
+                    xSemaphoreTake(usbd_ready_tx_done_sem, pdMS_TO_TICKS(1000));
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+}
+
+static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event)
+{
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    switch (event)
+    {
+        case APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN:
+            is_port_closed = false;
+            xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
+            break;
+        case APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE:
+            is_port_closed = true;
+            break;
+        case APP_USBD_CDC_ACM_USER_EVT_TX_DONE:
+            xSemaphoreGiveFromISR(usbd_ready_tx_done_sem, &xHigherPriorityTaskWoken);
+            break;
+        case APP_USBD_CDC_ACM_USER_EVT_RX_DONE:
+            xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
+            break;
+        default:
+            break;
+    }
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+}
+
+static void usbd_ser_recv_task(void *arg)
+{
+    static uint8_t recv[NRFX_USBD_EPSIZE];
+    static uint32_t recv_size;
+    for (;;)
+    {
+        if (is_port_closed)
+        {
+            xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
+        }
+
+        taskENTER_CRITICAL();
+        xSemaphoreTake(usbd_ready_rx_done_sem, 0);
+        taskEXIT_CRITICAL();
+
+        ret_code_t ret_code = app_usbd_cdc_acm_read_any(&cdc_acm_inst, recv, NRFX_USBD_EPSIZE);
+
+        switch (ret_code)
+        {
+            case NRF_SUCCESS:
+                recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
+                break;
+            case NRF_ERROR_IO_PENDING:
+                xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
+                recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
+                break;
+            default:
+                break;
+        }
+#if (DEBUG_ACM_CDC_READ == 1)
+        {
+            static uint8_t str[256];
+            memcpy(str, recv, recv_size);
+            str[recv_size] = '\0';
+            NRF_LOG_INFO("%s", str);
+        }
+#endif
+    }
+}
+
+static void usbd_evt_task(void *arg)
+{
+    app_usbd_serial_num_generate();
+
+    app_usbd_config_t usbd_config = {
+        .ev_isr_handler = usbd_isr_handler,
+        .ev_state_proc  = usbd_state_proc,
+    };
+
+    ret_code_t ret;
+    ret = app_usbd_init(&usbd_config);
+    APP_ERROR_CHECK(ret);
+
+    extern ret_code_t nrf_dfu_trigger_usb_init(void);
+    ret = nrf_dfu_trigger_usb_init();
+    APP_ERROR_CHECK(ret);
+
+    app_usbd_class_inst_t const *pxInst = app_usbd_cdc_acm_class_inst_get(&cdc_acm_inst);
+    ret                                 = app_usbd_class_append(pxInst);
+    APP_ERROR_CHECK(ret);
+
+    app_usbd_enable();
+
+    app_usbd_start();
+
+    for (;;)
+    {
+        xSemaphoreTake(usbd_evt_queue_sem, portMAX_DELAY);
+        do {
+        } while (app_usbd_event_queue_process());
+    }
+}
+
+void usbd_init(void)
+{
+    usbd_ready_rx_done_sem = xSemaphoreCreateBinary();
+    usbd_ready_tx_done_sem = xSemaphoreCreateBinary();
+    usbd_evt_queue_sem     = xSemaphoreCreateBinary();
+    usbd_tx_message        = xMessageBufferCreate(512);
+    usbd_rx_message        = xMessageBufferCreate(512);
+
+    xTaskCreate(usbd_evt_task, "usb_evt", 1024, NULL, 3, NULL);
+    xTaskCreate(usbd_ser_recv_task, "usb_recv", 256, NULL, 3, NULL);
+    xTaskCreate(usbd_ser_send_task, "usb_send", 256, NULL, 3, NULL);
+}
+
+int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout)
+{
+    int32_t ret = 0;
+
+    if (size)
+    {
+        if (timeout)
+        {
+            xMessageBufferSend(usbd_tx_message, p_data, size, timeout);
+        }
+        else
+        {
+            taskENTER_CRITICAL();
+            xMessageBufferSend(usbd_tx_message, p_data, size, 0);
+            taskEXIT_CRITICAL();
+        }
+    }
+
+    return ret;
+}
+
+int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout)
+{
+    int32_t ret = 0;
+
+    if (size)
+    {
+        if (timeout)
+        {
+            ret = xMessageBufferReceive(usbd_rx_message, p_data, size, timeout);
+        }
+        else
+        {
+            taskENTER_CRITICAL();
+            ret = xMessageBufferReceive(usbd_rx_message, p_data, size, 0);
+            taskEXIT_CRITICAL();
+        }
+    }
+
+    return ret;
+}

usbd.h

@@ -0,0 +1,25 @@
+#ifndef __USBD_H__
+#define __USBD_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "app_config.h"
+
+#if (DEF_USBD_ENABLED)
+void usbd_init(void);
+int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout);
+int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout);
+#else
+#define usbd_init()
+#define usbd_ser_write(...);
+#define usbd_ser_read(...);
+
+#endif /* ! DEF_FS_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __USBD_H__ */

usbd_dfu_trigger.c

@@ -0,0 +1,132 @@
+/**
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "usbd_dfu_trigger.h"
+#include "app_usbd.h"
+#include "app_usbd_nrf_dfu_trigger.h"
+#include "nrf_drv_clock.h"
+#include "nrf_gpio.h"
+#include "nrf_log_ctrl.h"
+
+#include "app_usbd_serial_num.h"
+#include "app_util.h"
+#include "nrf_bootloader_info.h"
+#include "nrf_pwr_mgmt.h"
+#define NRF_LOG_MODULE_NAME nrf_dfu_trigger_usb
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+#define DFU_FLASH_PAGE_SIZE  (NRF_FICR->CODEPAGESIZE)
+#define DFU_FLASH_PAGE_COUNT (NRF_FICR->CODESIZE)
+
+#define APP_NAME             ELITE_DEVICE_NAME
+#define APP_VERSION_STRING   "1.0.0"
+
+static uint8_t m_version_string[] = APP_NAME " " APP_VERSION_STRING; ///< Human-readable version string.
+static app_usbd_nrf_dfu_trigger_nordic_info_t m_dfu_info;            ///< Struct with various information about the current firmware.
+
+static void dfu_trigger_evt_handler(app_usbd_class_inst_t const *p_inst, app_usbd_nrf_dfu_trigger_user_event_t event)
+{
+    UNUSED_PARAMETER(p_inst);
+    ret_code_t err_code;
+    switch (event)
+    {
+        case APP_USBD_NRF_DFU_TRIGGER_USER_EVT_DETACH:
+            NRF_LOG_INFO("DFU Detach request received. Triggering a pin reset.");
+            NRF_LOG_FINAL_FLUSH();
+            {
+                err_code = sd_power_gpregret_clr(0, 0xFFFFFFFF);
+                APP_ERROR_CHECK(err_code);
+                err_code = sd_power_gpregret_set(0, BOOTLOADER_DFU_START);
+                APP_ERROR_CHECK(err_code);
+                // Signal that DFU mode is to be enter to the power management module
+                nrf_pwr_mgmt_shutdown(NRF_PWR_MGMT_SHUTDOWN_GOTO_DFU);
+            }
+            break;
+        default:
+            break;
+    }
+}
+
+APP_USBD_NRF_DFU_TRIGGER_GLOBAL_DEF(m_app_dfu,
+                                    NRF_DFU_TRIGGER_USB_INTERFACE_NUM,
+                                    &m_dfu_info,
+                                    m_version_string,
+                                    dfu_trigger_evt_handler);
+
+static void strings_create(void)
+{
+    uint8_t prev_char = 'a'; // Arbitrary valid char, not '-'.
+    // Remove characters that are not supported in semantic version strings.
+    for (size_t i = strlen(APP_NAME) + 1; i < strlen((char *)m_version_string); i++)
+    {
+        if (((m_version_string[i] >= 'a') && (m_version_string[i] <= 'z')) || ((m_version_string[i] >= 'A') && (m_version_string[i] <= 'Z')) || ((m_version_string[i] >= '0') && (m_version_string[i] <= '9')) || (m_version_string[i] == '+') || (m_version_string[i] == '.') || (m_version_string[i] == '-'))
+        {
+            // Valid semantic version character.
+        }
+        else if (prev_char == '-')
+        {
+            m_version_string[i] = '0';
+        }
+        else
+        {
+            m_version_string[i] = '-';
+        }
+        prev_char = m_version_string[i];
+    }
+}
+
+ret_code_t nrf_dfu_trigger_usb_init(void)
+{
+
+    m_dfu_info.wAddress       = CODE_START;
+    m_dfu_info.wFirmwareSize  = CODE_SIZE;
+    m_dfu_info.wVersionMajor  = 1;
+    m_dfu_info.wVersionMinor  = 0;
+    m_dfu_info.wFirmwareID    = 0;
+    m_dfu_info.wFlashPageSize = DFU_FLASH_PAGE_SIZE;
+    m_dfu_info.wFlashSize     = m_dfu_info.wFlashPageSize * DFU_FLASH_PAGE_COUNT;
+
+    strings_create();
+
+    app_usbd_class_inst_t const *class_dfu = app_usbd_nrf_dfu_trigger_class_inst_get(&m_app_dfu);
+    ret_code_t ret                         = app_usbd_class_append(class_dfu);
+
+    return ret;
+}

usbd_dfu_trigger.h

@@ -0,0 +1,74 @@
+/**
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef USBD_DFU_TRIGGER_H
+#define USBD_DFU_TRIGGER_H
+
+#include "sdk_errors.h"
+
+/**
+ * @defgroup nrf_dfu_trigger_usb USB DFU trigger library
+ * @ingroup app_common
+ *
+ * @brief @tagAPI52840 USB DFU trigger library is used to enter the bootloader and read the firmware version.
+ *
+ * @details See @ref lib_dfu_trigger_usb for additional documentation.
+ * @{
+ */
+
+/**
+ * @brief Function for initializing the USB DFU trigger library.
+ *
+ * @note  If the USB is also used for other purposes, then this function must be called after USB is
+ *        initialized but before it is enabled. In this case, the configuration flag @ref
+ *        NRF_DFU_TRIGGER_USB_USB_SHARED must be set to 1.
+ *
+ * @note  Calling this again after the first success has no effect and returns @ref NRF_SUCCESS.
+ *
+ * @note  If @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE is on (1), USB events must be handled manually.
+ *        See @ref app_usbd_event_queue_process.
+ *
+ * @retval NRF_SUCCESS  On successful initialization.
+ * @return An error code on failure, for example if called at a wrong time.
+ */
+ret_code_t nrf_dfu_trigger_usb_init(void);
+
+/** @} */
+
+#endif //NRF_DFU_TRIGGER_USB_H