wisetop/microchip-application-bmd380-bmd380_peripheral
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feat: update the gpio instruction in dev_mode

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This commit is contained in:
Roy_01
2025-03-25 16:36:06 +08:00
parent b976d5e21e
commit d62fc6dfc1
2 changed files with 145 additions and 275 deletions
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cpg.c
+143 -273
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@@ -15,86 +15,92 @@ void dev_mode_electrode_switch(uint8_t *ins);
void dev_mode_tw1508(uint8_t *ins);
void dev_mode_ctrl_cpg11_electrodes_task(uint8_t *ins);
void dev_mode_adapter_block_switch(uint8_t *ins);
void dev_mode_gpio(uint8_t *ins);
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
// The GPIO corresponding to the pin
const uint32_t pin_to_gpio_table[] = {
[0] = UNDEF_GPIO,
[1] = UNDEF_GPIO,
[2] = UNDEF_GPIO,
[3] = UNDEF_GPIO,
[4] = UNDEF_GPIO,
[5] = UNDEF_GPIO,
[6] = NRF_GPIO_PIN_MAP(0, 22),
[7] = UNDEF_GPIO,
[8] = NRF_GPIO_PIN_MAP(0, 25),
[9] = NRF_GPIO_PIN_MAP(0, 19),
[10] = NRF_GPIO_PIN_MAP(0, 21),
[11] = NRF_GPIO_PIN_MAP(1, 0),
[12] = NRF_GPIO_PIN_MAP(0, 18),
[13] = NRF_GPIO_PIN_MAP(0, 17),
[14] = NRF_GPIO_PIN_MAP(0, 20),
[15] = UNDEF_GPIO,
[16] = NRF_GPIO_PIN_MAP(0, 14),
[17] = NRF_GPIO_PIN_MAP(0, 13),
[18] = NRF_GPIO_PIN_MAP(0, 11),
[19] = UNDEF_GPIO,
[20] = NRF_GPIO_PIN_MAP(0, 15),
[21] = UNDEF_GPIO,
[22] = UNDEF_GPIO,
[23] = UNDEF_GPIO,
[24] = UNDEF_GPIO,
[25] = NRF_GPIO_PIN_MAP(1, 8),
[26] = NRF_GPIO_PIN_MAP(0, 12),
[27] = NRF_GPIO_PIN_MAP(0, 7),
[28] = NRF_GPIO_PIN_MAP(1, 9),
[29] = NRF_GPIO_PIN_MAP(0, 8),
[30] = NRF_GPIO_PIN_MAP(0, 6),
[31] = NRF_GPIO_PIN_MAP(0, 5),
[32] = NRF_GPIO_PIN_MAP(0, 27),
[33] = NRF_GPIO_PIN_MAP(0, 26),
[34] = NRF_GPIO_PIN_MAP(0, 4),
[35] = UNDEF_GPIO,
[36] = NRF_GPIO_PIN_MAP(0, 1),
[37] = NRF_GPIO_PIN_MAP(0, 29),
[38] = NRF_GPIO_PIN_MAP(0, 0),
[39] = NRF_GPIO_PIN_MAP(0, 31),
[40] = NRF_GPIO_PIN_MAP(1, 15),
[41] = NRF_GPIO_PIN_MAP(0, 2),
[42] = NRF_GPIO_PIN_MAP(0, 30),
[43] = NRF_GPIO_PIN_MAP(0, 28),
[44] = NRF_GPIO_PIN_MAP(1, 12),
[45] = NRF_GPIO_PIN_MAP(1, 14),
[46] = NRF_GPIO_PIN_MAP(0, 3),
[47] = NRF_GPIO_PIN_MAP(1, 13),
[48] = NRF_GPIO_PIN_MAP(1, 3),
[49] = NRF_GPIO_PIN_MAP(1, 10),
[50] = NRF_GPIO_PIN_MAP(1, 6),
[51] = NRF_GPIO_PIN_MAP(1, 11),
[52] = NRF_GPIO_PIN_MAP(0, 10),
[53] = NRF_GPIO_PIN_MAP(0, 9),
[54] = UNDEF_GPIO,
[55] = UNDEF_GPIO,
[56] = UNDEF_GPIO,
[57] = UNDEF_GPIO,
[58] = UNDEF_GPIO,
[59] = NRF_GPIO_PIN_MAP(1, 2),
[60] = NRF_GPIO_PIN_MAP(0, 24),
[61] = NRF_GPIO_PIN_MAP(0, 23),
[62] = NRF_GPIO_PIN_MAP(0, 16),
[63] = UNDEF_GPIO,
#define PULSE_GEN_NUMB 4
static pulse_gen_t pulse_gen[PULSE_GEN_NUMB];
typedef struct
{
uint32_t gpio;
const char *desc;
} pin_func_name_t;
static const pin_func_name_t pin_to_gpio_table[] = {
[1] = { UNDEF_GPIO, "UNDEF_GPIO" },
[2] = { UNDEF_GPIO, "UNDEF_GPIO" },
[3] = { UNDEF_GPIO, "UNDEF_GPIO" },
[4] = { UNDEF_GPIO, "UNDEF_GPIO" },
[5] = { UNDEF_GPIO, "UNDEF_GPIO" },
[6] = { NRF_GPIO_PIN_MAP(0, 22), "GPIO(0, 22)" },
[7] = { UNDEF_GPIO, "UNDEF_GPIO" },
[8] = { NRF_GPIO_PIN_MAP(0, 25), "GPIO(0, 25)" },
[9] = { NRF_GPIO_PIN_MAP(0, 19), "GPIO(0, 19)" },
[10] = { NRF_GPIO_PIN_MAP(0, 21), "GPIO(0, 21)" },
[11] = { NRF_GPIO_PIN_MAP(1, 0), "GPIO(1, 0)" },
[12] = { NRF_GPIO_PIN_MAP(0, 18), "GPIO(0, 18)" },
[13] = { NRF_GPIO_PIN_MAP(0, 17), "GPIO(0, 17)" },
[14] = { NRF_GPIO_PIN_MAP(0, 20), "GPIO(0, 20)" },
[15] = { UNDEF_GPIO, "UNDEF_GPIO" },
[16] = { NRF_GPIO_PIN_MAP(0, 14), "GPIO(0, 14)" },
[17] = { NRF_GPIO_PIN_MAP(0, 13), "GPIO(0, 13)" },
[18] = { NRF_GPIO_PIN_MAP(0, 11), "GPIO(0, 11)" },
[19] = { UNDEF_GPIO, "UNDEF_GPIO" },
[20] = { NRF_GPIO_PIN_MAP(0, 15), "GPIO(0, 15)" },
[21] = { UNDEF_GPIO, "UNDEF_GPIO" },
[22] = { UNDEF_GPIO, "UNDEF_GPIO" },
[23] = { UNDEF_GPIO, "UNDEF_GPIO" },
[24] = { UNDEF_GPIO, "UNDEF_GPIO" },
[25] = { NRF_GPIO_PIN_MAP(1, 8), "GPIO(1, 8)" },
[26] = { NRF_GPIO_PIN_MAP(0, 12), "GPIO(0, 12)" },
[27] = { NRF_GPIO_PIN_MAP(0, 7), "GPIO(0, 7)" },
[28] = { NRF_GPIO_PIN_MAP(1, 9), "GPIO(1, 9)" },
[29] = { NRF_GPIO_PIN_MAP(0, 8), "GPIO(0, 8)" },
[30] = { NRF_GPIO_PIN_MAP(0, 6), "GPIO(0, 6)" },
[31] = { NRF_GPIO_PIN_MAP(0, 5), "GPIO(0, 5)" },
[32] = { NRF_GPIO_PIN_MAP(0, 27), "GPIO(0, 27)" },
[33] = { NRF_GPIO_PIN_MAP(0, 26), "GPIO(0, 26)" },
[34] = { NRF_GPIO_PIN_MAP(0, 4), "GPIO(0, 4)" },
[35] = { UNDEF_GPIO, "UNDEF_GPIO" },
[36] = { NRF_GPIO_PIN_MAP(0, 1), "GPIO(0, 1)" },
[37] = { NRF_GPIO_PIN_MAP(0, 29), "GPIO(0, 29)" },
[38] = { NRF_GPIO_PIN_MAP(0, 0), "GPIO(0, 0)" },
[39] = { NRF_GPIO_PIN_MAP(0, 31), "GPIO(0, 31)" },
[40] = { NRF_GPIO_PIN_MAP(1, 15), "GPIO(1, 15)" },
[41] = { NRF_GPIO_PIN_MAP(0, 2), "GPIO(0, 2)" },
[42] = { NRF_GPIO_PIN_MAP(0, 30), "GPIO(0, 30)" },
[43] = { NRF_GPIO_PIN_MAP(0, 28), "GPIO(0, 28)" },
[44] = { NRF_GPIO_PIN_MAP(1, 12), "GPIO(1, 12)" },
[45] = { NRF_GPIO_PIN_MAP(1, 14), "GPIO(1, 14)" },
[46] = { NRF_GPIO_PIN_MAP(0, 3), "GPIO(0, 3)" },
[47] = { NRF_GPIO_PIN_MAP(1, 13), "GPIO(1, 13)" },
[48] = { NRF_GPIO_PIN_MAP(1, 3), "GPIO(1, 3)" },
[49] = { NRF_GPIO_PIN_MAP(1, 10), "GPIO(1, 10)" },
[50] = { NRF_GPIO_PIN_MAP(1, 6), "GPIO(1, 6)" },
[51] = { NRF_GPIO_PIN_MAP(1, 11), "GPIO(1, 11)" },
[52] = { NRF_GPIO_PIN_MAP(0, 10), "GPIO(0, 10)" },
[53] = { NRF_GPIO_PIN_MAP(0, 9), "GPIO(0, 9)" },
[54] = { UNDEF_GPIO, "UNDEF_GPIO" },
[55] = { UNDEF_GPIO, "UNDEF_GPIO" },
[56] = { UNDEF_GPIO, "UNDEF_GPIO" },
[57] = { UNDEF_GPIO, "UNDEF_GPIO" },
[58] = { UNDEF_GPIO, "UNDEF_GPIO" },
[59] = { NRF_GPIO_PIN_MAP(1, 2), "GPIO(1, 2)" },
[60] = { NRF_GPIO_PIN_MAP(0, 24), "GPIO(0, 24)" },
[61] = { NRF_GPIO_PIN_MAP(0, 23), "GPIO(0, 23)" },
[62] = { NRF_GPIO_PIN_MAP(0, 16), "GPIO(0, 16)" },
[63] = { UNDEF_GPIO, "UNDEF_GPIO" },
};
float u8_to_float(const uint8_t *ins, uint32_t start_idx)
static float u8_to_float(const uint8_t *ins, uint32_t start_idx)
{
float result;
uint32_t temp_u32 = ((uint32_t)ins[start_idx + 0] << 24) |
@@ -106,7 +112,7 @@ float u8_to_float(const uint8_t *ins, uint32_t start_idx)
return result;
}
double u8_to_double(const uint8_t *ins, uint32_t start_idx)
static double u8_to_double(const uint8_t *ins, uint32_t start_idx)
{
double result;
uint64_t temp_u64 = ((uint64_t)ins[start_idx + 0] << 56) |
@@ -122,96 +128,74 @@ double u8_to_double(const uint8_t *ins, uint32_t start_idx)
return result;
}
#define PULSE_GEN_NUMB 4
static pulse_gen_t pulse_gen[PULSE_GEN_NUMB];
static void set_bmd380_pin_signal(uint8_t pin_number, uint8_t high_low)
static void set_single_pin_as_output(uint16_t pin_number, uint16_t high_low)
{
uint32_t gpio = pin_to_gpio_table[pin_number];
const char *str_pin_to_gpio_table[] = {
[0] = "UNDEF_GPIO",
[1] = "UNDEF_GPIO",
[2] = "UNDEF_GPIO",
[3] = "UNDEF_GPIO",
[4] = "UNDEF_GPIO",
[5] = "UNDEF_GPIO",
[6] = "GPIO(0, 22)",
[7] = "UNDEF_GPIO",
[8] = "GPIO(0, 25)",
[9] = "GPIO(0, 19)",
[10] = "GPIO(0, 21)",
[11] = "GPIO(1, 0)",
[12] = "GPIO(0, 18)",
[13] = "GPIO(0, 17)",
[14] = "GPIO(0, 20)",
[15] = "UNDEF_GPIO",
[16] = "GPIO(0, 14)",
[17] = "GPIO(0, 13)",
[18] = "GPIO(0, 11)",
[19] = "UNDEF_GPIO",
[20] = "GPIO(0, 15)",
[21] = "UNDEF_GPIO",
[22] = "UNDEF_GPIO",
[23] = "UNDEF_GPIO",
[24] = "UNDEF_GPIO",
[25] = "GPIO(1, 8)",
[26] = "GPIO(0, 12)",
[27] = "GPIO(0, 7)",
[28] = "GPIO(1, 9)",
[29] = "GPIO(0, 8)",
[30] = "GPIO(0, 6)",
[31] = "GPIO(0, 5)",
[32] = "GPIO(0, 27)",
[33] = "GPIO(0, 26)",
[34] = "GPIO(0, 4)",
[35] = "UNDEF_GPIO",
[36] = "GPIO(0, 1)",
[37] = "GPIO(0, 29)",
[38] = "GPIO(0, 0)",
[39] = "GPIO(0, 31)",
[40] = "GPIO(1, 15)",
[41] = "GPIO(0, 2)",
[42] = "GPIO(0, 30)",
[43] = "GPIO(0, 28)",
[44] = "GPIO(1, 12)",
[45] = "GPIO(1, 14)",
[46] = "GPIO(0, 3)",
[47] = "GPIO(1, 13)",
[48] = "GPIO(1, 3)",
[49] = "GPIO(1, 10)",
[50] = "GPIO(1, 6)",
[51] = "GPIO(1, 11)",
[52] = "GPIO(0, 10)",
[53] = "GPIO(0, 9)",
[54] = "UNDEF_GPIO",
[55] = "UNDEF_GPIO",
[56] = "UNDEF_GPIO",
[57] = "UNDEF_GPIO",
[58] = "UNDEF_GPIO",
[59] = "GPIO(1, 2)",
[60] = "GPIO(0, 24)",
[61] = "GPIO(0, 23)",
[62] = "GPIO(0, 16)",
[63] = "UNDEF_GPIO",
};
if (pin_number == 0 || pin_number > 63 || gpio == UNDEF_GPIO)
if (pin_number < 1 || pin_number >= ARRAY_SIZE(pin_to_gpio_table))
{
NRF_LOG_INFO("UNDEF_GPIO: pin(%d) can't convert to gpio number", pin_number);
NRF_LOG_INFO("pin_number(%d) out of range", pin_number);
return;
}
uint32_t gpio = pin_to_gpio_table[pin_number].gpio;
if (gpio == UNDEF_GPIO)
{
NRF_LOG_INFO("pin_number(%d) is not used", pin_number);
}
else
{
nrf_gpio_cfg_output(gpio);
nrf_gpio_pin_write(gpio, high_low);
NRF_LOG_INFO("set pin(%d) = %d //%s", pin_number, high_low, str_pin_to_gpio_table[pin_number]);
NRF_LOG_INFO("pin_number(%d) = %d // pin_function_name: %s",
pin_number,
high_low,
pin_to_gpio_table[pin_number].desc);
}
}
static void set_bmd380_all_pin_signal(uint8_t high_low)
static void dev_mode_gpio(uint8_t *ins)
{
for (int i = 1; i < sizeof(pin_to_gpio_table) / sizeof(pin_to_gpio_table[0]); i++)
struct __PACKED
{
set_bmd380_pin_signal(i, high_low);
uint8_t id : 4;
uint8_t ins_type : 4;
uint8_t pkg_size;
uint8_t mode;
uint8_t mode_opcode; // dev mode could ignore
uint8_t dev_feat;
uint8_t dev_feat_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
{
case 0xA000: {
// gpio - CPGv1.1 default gpio state
// 3000FFFF A000
cpg11_io_init();
break;
}
case 0xA001: {
// gpio - set single pin as output
// 3000FFFF A001 0006 0001
uint16_t pin_number = u8_to_u16(p_ins->param[0], p_ins->param[1]);
uint16_t high_low = u8_to_u16(p_ins->param[2], p_ins->param[3]);
set_single_pin_as_output(pin_number, high_low);
break;
}
case 0xA002: {
// gpio - set all pin as output
// 3000FFFF A002 0001
uint16_t high_low = u8_to_u16(p_ins->param[0], p_ins->param[1]);
for (int i = 1; i < ARRAY_SIZE(pin_to_gpio_table); i++)
{
set_single_pin_as_output(i, high_low);
nrf_delay_us(100);
}
break;
}
}
}
@@ -967,16 +951,8 @@ void start_electrodes_api(uint8_t *ins)
set_cpg_pulse_parameter(ins_temp);
NRF_LOG_INFO("...........................");
params.dev_opcode = 0xA0;
params.item_opcode = 0x00;
ins_temp[3] = params.dev_opcode;
ins_temp[4] = params.item_opcode;
ins_temp[5] = 0x19;
ins_temp[6] = 0x01;
NRF_LOG_INFO("parse:");
NRF_LOG_HEXDUMP_INFO(ins_temp, 7);
dev_mode_gpio(ins_temp);
NRF_LOG_INFO("...........................");
nrf_gpio_pin_set(HV_EN_PIN);
NRF_LOG_INFO("HV_EN_PIN(1)");
params.dev_opcode = 0x02;
params.item_opcode = 0x03;
@@ -1012,17 +988,9 @@ void stop_electrodes_api(uint8_t *ins)
NRF_LOG_INFO("parse:");
NRF_LOG_HEXDUMP_INFO(ins_temp, 6);
stop_which_electrodes(ins_temp);
NRF_LOG_INFO("...........................");
params.dev_opcode = 0xA0;
params.item_opcode = 0x00;
ins_temp[3] = params.dev_opcode;
ins_temp[4] = params.item_opcode;
ins_temp[5] = 0x19;
ins_temp[6] = 0x00;
NRF_LOG_INFO("parse:");
NRF_LOG_HEXDUMP_INFO(ins_temp, 7);
dev_mode_gpio(ins_temp);
nrf_gpio_pin_clear(HV_EN_PIN);
NRF_LOG_INFO("HV_EN_PIN(0)");
NRF_LOG_INFO("...........................");
}
@@ -1346,104 +1314,6 @@ void dev_mode_adapter_block_switch(uint8_t *ins)
}
}
/*
dev_mode_gpio
(1) Command Format: 0x3000FFA000ppss
- feat: set_bmd380_pin_signal()
- pp: pin number (0x06 to 0x3E)
0x06: pin06 = P0.22_GPIO
0x08: pin08 = P0.25_GPIO
0x09: pin09 = P0.19_GPIO
0x0A: pin10 = P0.21_GPIO
0x0B: pin11 = P1.00_GPIO/TRACEDATA[0]/SWO
0x0C: pin12 = P0.18_GPIO/RESET
0x0D: pin13 = P0.17_GPIO
0x0E: pin14 = P0.20_GPIO
0x10: pin16 = P0.14_GPIO
0x11: pin17 = P0.13_GPIO
0x12: pin18 = P0.11_GPIO/TRACEDATA[2]
0x14: pin20 = P0.15_GPIO
0x19: pin25 = P1.08_GPIO_slow
0x1A: pin26 = P0.12_GPIO/TRACEDATA[1]
0x1B: pin27 = P0.07_GPIO/TRACECLK
0x1C: pin28 = P1.09_GPIO/TRACEDATA[3]
0x1D: pin29 = P0.08_GPIO
0x1E: pin30 = P0.06_GPIO
0x1F: pin31 = P0.05_GPIO/AIN3
0x20: pin32 = P0.27_GPIO
0x21: pin33 = P0.26_GPIO
0x22: pin34 = P0.04_GPIO/AIN2
0x24: pin36 = P0.01_GPIO/XTAL2
0x25: pin37 = P0.29_GPIO_slow/AIN5
0x26: pin38 = P0.00_GPIO/XTAL1
0x27: pin39 = P0.31_GPIO_slow/AIN7
0x28: pin40 = P1.15_GPIO_slow
0x29: pin41 = P0.02_GPIO_slow/AIN0
0x2A: pin42 = P0.30_GPIO_slow/AIN6
0x2B: pin43 = P0.28_GPIO_slow/AIN4
0x2C: pin44 = P1.12_GPIO_slow
0x2D: pin45 = P1.14_GPIO_slow
0x2E: pin46 = P0.03_GPIO_slow/AIN1
0x2F: pin47 = P1.13_GPIO_slow
0x30: pin48 = P1.03_GPIO_slow
0x31: pin49 = P1.10_GPIO_slow
0x32: pin50 = P1.06_GPIO_slow
0x33: pin51 = P1.11_GPIO_slow
0x34: pin52 = P0.10_GPIO_slow/NFC2
0x35: pin53 = P0.09_GPIO_slow/NFC1
0x3B: pin59 = P1.02_GPIO_slow
0x3C: pin60 = P0.24_GPIO
0x3D: pin61 = P0.23_GPIO
0x3E: pin62 = P0.16_GPIO
- ss: signal (0x00 or 0x01)
0x00: low
0x01: high
(2) Command Format: 0x3000FFA001ss
- feat: set_bmd380_all_pin_signal()
- ss: signal (0x00 or 0x01)
0x00: low
0x01: high
*/
void dev_mode_gpio(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t func_id;
uint8_t gpio_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->gpio_opcode)
{
case 0x00: {
uint8_t pin_number = ins[5];
uint8_t high_low = ins[6];
set_bmd380_pin_signal(pin_number, high_low);
break;
}
case 0x01: {
uint8_t high_low = ins[5];
set_bmd380_all_pin_signal(high_low);
break;
}
}
}
static void cis_version(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
cpg.h
+2 -2
View File
@@ -13,8 +13,8 @@ extern "C"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 3
#define VERSION_DATE_DAY 25
#define VERSION_DATE_HOUR 14
#define VERSION_DATE_MINUTE 7
#define VERSION_DATE_HOUR 16
#define VERSION_DATE_MINUTE 36
const elite_instance_t *cpg_init(void);