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13 Commits

Author SHA1 Message Date
hchen3 657b1b2b0e add HCI 2020-02-04 16:48:33 +08:00
yichin aa410bec37 debug channel swap 2019-10-07 21:56:14 +08:00
yichin 3ac4620c7d debug channel swap 2019-10-04 18:20:41 +08:00
yichin 5283d905b7 debug channel swap 2019-10-04 16:11:23 +08:00
yichin f1b30c3ba7 channel length extension done 2019-10-03 19:01:26 +08:00
yichin 37d16a41b7 channel length extension don 2019-10-03 15:22:35 +08:00
yichin 4d5704d99e temporary modification 2019-10-01 12:18:10 +08:00
yichin 95f667e3b0 neulive 1.3 parameter done 2019-09-30 11:16:33 +08:00
yichin 1d33c05ca3 debug neulive1.3 2019-09-27 13:39:35 +08:00
yichin 5b4e14ec73 pass 2019-09-25 23:32:36 +08:00
yichin fb5cbe212e pass 2019-09-25 14:40:25 +08:00
yichin f675ff0b66 debug done 2019-09-24 16:15:00 +08:00
yichin 83ad8302c1 neulive1.3 with bug 2019-09-24 15:31:22 +08:00
32 changed files with 614 additions and 1376 deletions
+4 -4
View File
@@ -36,10 +36,10 @@ NEULIVE_PARAMETER = {
'SB': 2, # STIMULATION BEHAVIOR
'TF': 1, # STIMULATION FREQUENCY
'CA': 1, # AMP CHANNEL A ENABLE
'CB': 0, # AMP CHANNEL B ENABLE
'CC': 0, # AMP CHANNEL C ENABLE
'CD': 0, # AMP CHANNEL D ENABLE
'CHA': 0, # AMP CHANNEL A
'CB': 1, # AMP CHANNEL B ENABLE
'CC': 1, # AMP CHANNEL C ENABLE
'CD': 1, # AMP CHANNEL D ENABLE
'CHA': 9, # AMP CHANNEL A
'CHB': 1, # AMP CHANNEL B
'CHC': 2, # AMP CHANNEL C
'CHD': 3, # AMP CHANNEL D
@@ -9,6 +9,6 @@
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<connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
<connection value="common/targetdb/connections/TIXDS100v3_Dot7_Connection.xml"/>
<isTargetManual value="false"/>
</projectOptions>
@@ -18,279 +18,141 @@
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<listOptionValue builtIn="false" value="${CG_TOOL_ROOT}/include"/>
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<option id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.MEMWIDTH.2120609162" name="Specify memory width (--memwidth, -memwidth=width)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.MEMWIDTH" value="8" valueType="string"/>
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@@ -12,7 +12,7 @@
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650em_app}"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\ccsv8\ccs_base\emulation\gel\images\cc26xx\cc26x0_rtos_rom_syms.out"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/simple_peripheral_cc2650em_app"/>
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@@ -1,20 +1,19 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe_0" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds510icepick_c.xml" id="drivers" xml="tixds510icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM.xml" id="drivers" xml="tixds510cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="1" id="Power Selection">
<choice Name="Probe supplied power" value="1">
<property Type="stringfield" Value="3.3" id="Voltage Level"/>
</choice>
</property>
<property Type="choicelist" Value="0" id="JTAG Signal Isolation"/>
<property Type="choicelist" Value="4" id="SWD Mode Settings">
<choice Name="cJTAG (1149.7) 2-pin advanced modes" value="enable">
<property Type="choicelist" Value="1" id="XDS110 Aux Port"/>
<configuration XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS100v3 USB Debug Probe_0" href="connections/TIXDS100v3_Dot7_Connection.xml" id="Texas Instruments XDS100v3 USB Debug Probe_0" xml="TIXDS100v3_Dot7_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cortexM.xml" id="drivers" xml="tixds100v2cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="2" id="The Converter Usage">
<choice Name="Generate 1149.7 2-pin advanced modes" value="enable">
<property Type="choicelist" Value="1" id="The Converter 1149.7 Frequency">
<choice Name="Overclock with user specified value" value="unused">
<property Type="choicelist" Value="5" id="-- Choose a value from 1.0MHz to 50.0MHz"/>
</choice>
</property>
<property Type="choicelist" Value="5" id="The Target Scan Format"/>
</choice>
</property>
<platform XML_version="1.2" id="platform_0">
@@ -16,11 +16,11 @@ BIOS_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/pa
TARGET_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
CC = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
ASM = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/include
AR = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.5.LTS/bin/armar rq
CC = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include
ASM = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include
AR = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armar rq
DEL = C:/ti/xdctools_3_32_02_25_core/packages/../bin/rm -f
CP = C:/ti/xdctools_3_32_02_25_core/packages/../bin/cp -f
@@ -9,6 +9,6 @@
<linkerCommandFile value="cc26x0f128.cmd"/>
<rts value="libc.a"/>
<createSlaveProjects value=""/>
<connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
<connection value="common/targetdb/connections/TIXDS100v3_Dot7_Connection.xml"/>
<isTargetManual value="false"/>
</projectOptions>
@@ -14,246 +14,130 @@
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<option id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.linkerID.OUTPUT_FILE.829303802" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.linkerID.OUTPUT_FILE" value="${ProjName}.out" valueType="string"/>
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<option id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.linkerID.ENTRY_POINT.1153340314" name="Specify program entry point for the output module (--entry_point, -e)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.linkerID.ENTRY_POINT" value="startup_entry" valueType="string"/>
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<tool id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.947560992" name="ARM Hex Utility" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex">
<option id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.ROMWIDTH.1295209583" name="Specify rom width (--romwidth, -romwidth=width)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.ROMWIDTH" value="8" valueType="string"/>
<option id="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.MEMWIDTH.110293046" name="Specify memory width (--memwidth, -memwidth=width)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_18.1.hex.MEMWIDTH" value="8" valueType="string"/>
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</folderInfo>
<sourceEntries>
<entry excluding="cc26x0f128.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
@@ -12,7 +12,6 @@
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650em_stack}"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\FlashROM\simple_peripheral_cc2650em_stack.out"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\FlashROM\simple_peripheral_cc2650em_stack.out"/>
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\FlashROM\simple_peripheral_cc2650em_stack.out"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/simple_peripheral_cc2650em_stack"/>
</listAttribute>
@@ -1,20 +1,19 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe_0" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds510icepick_c.xml" id="drivers" xml="tixds510icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM.xml" id="drivers" xml="tixds510cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="1" id="Power Selection">
<choice Name="Probe supplied power" value="1">
<property Type="stringfield" Value="3.3" id="Voltage Level"/>
</choice>
</property>
<property Type="choicelist" Value="0" id="JTAG Signal Isolation"/>
<property Type="choicelist" Value="4" id="SWD Mode Settings">
<choice Name="cJTAG (1149.7) 2-pin advanced modes" value="enable">
<property Type="choicelist" Value="1" id="XDS110 Aux Port"/>
<configuration XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS100v3 USB Debug Probe_0" href="connections/TIXDS100v3_Dot7_Connection.xml" id="Texas Instruments XDS100v3 USB Debug Probe_0" xml="TIXDS100v3_Dot7_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cortexM.xml" id="drivers" xml="tixds100v2cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="2" id="The Converter Usage">
<choice Name="Generate 1149.7 2-pin advanced modes" value="enable">
<property Type="choicelist" Value="1" id="The Converter 1149.7 Frequency">
<choice Name="Overclock with user specified value" value="unused">
<property Type="choicelist" Value="5" id="-- Choose a value from 1.0MHz to 50.0MHz"/>
</choice>
</property>
<property Type="choicelist" Value="5" id="The Target Scan Format"/>
</choice>
</property>
<platform XML_version="1.2" id="platform_0">
@@ -116,46 +116,46 @@ const PowerCC26XX_Config PowerCC26XX_config = {
* ============================= UART begin ===================================
*/
/* Place into subsections to allow the TI linker to remove items properly */
//#if defined(__TI_COMPILER_VERSION__)
//#pragma DATA_SECTION(UART_config, ".const:UART_config")
//#pragma DATA_SECTION(uartCC26XXHWAttrs, ".const:uartCC26XXHWAttrs")
//#endif
//
///* Include drivers */
//#include <ti/drivers/UART.h>
//#include <ti/drivers/uart/UARTCC26XX.h>
//
///* UART objects */
//UARTCC26XX_Object uartCC26XXObjects[BOOSTXL_CC2650MA_UARTCOUNT];
//
///* UART hardware parameter structure, also used to assign UART pins */
//const UARTCC26XX_HWAttrsV2 uartCC26XXHWAttrs[BOOSTXL_CC2650MA_UARTCOUNT] = {
// //
// {
// .baseAddr = UART0_BASE,
// .powerMngrId = PowerCC26XX_PERIPH_UART0,
// .intNum = INT_UART0_COMB,
// .intPriority = ~0,
// .swiPriority = 0,
// .txPin = Board_UART_TX,
// .rxPin = Board_UART_RX,
// .ctsPin = PIN_UNASSIGNED,
// .rtsPin = PIN_UNASSIGNED
// //
// }
// //
//};
//
///* UART configuration structure */
//const UART_Config UART_config[] = { //
// {
// //
// .fxnTablePtr = &UARTCC26XX_fxnTable,
// .object = &uartCC26XXObjects[0],
// .hwAttrs = &uartCC26XXHWAttrs[0]
// //
// },
// {NULL, NULL, NULL}};
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(UART_config, ".const:UART_config")
#pragma DATA_SECTION(uartCC26XXHWAttrs, ".const:uartCC26XXHWAttrs")
#endif
/* Include drivers */
#include <ti/drivers/UART.h>
#include <ti/drivers/uart/UARTCC26XX.h>
/* UART objects */
UARTCC26XX_Object uartCC26XXObjects[BOOSTXL_CC2650MA_UARTCOUNT];
/* UART hardware parameter structure, also used to assign UART pins */
const UARTCC26XX_HWAttrsV2 uartCC26XXHWAttrs[BOOSTXL_CC2650MA_UARTCOUNT] = {
//
{
.baseAddr = UART0_BASE,
.powerMngrId = PowerCC26XX_PERIPH_UART0,
.intNum = INT_UART0_COMB,
.intPriority = ~0,
.swiPriority = 0,
.txPin = Board_UART_TX,
.rxPin = Board_UART_RX,
.ctsPin = PIN_UNASSIGNED,
.rtsPin = PIN_UNASSIGNED
//
}
//
};
/* UART configuration structure */
const UART_Config UART_config[] = { //
{
//
.fxnTablePtr = &UARTCC26XX_fxnTable,
.object = &uartCC26XXObjects[0],
.hwAttrs = &uartCC26XXHWAttrs[0]
//
},
{NULL, NULL, NULL}};
/*
* ============================= UART end =====================================
*/
@@ -51,7 +51,6 @@ extern "C" {
#include <ti/drivers/PIN.h>
#include <driverlib/ioc.h>
#define HEADSTAGE_UNI_2_0
#ifdef HEADSTAGE_UNI_2_0
#include "neu/headstage_pin.h"
#else
@@ -316,8 +316,7 @@ typedef struct {
==== device implement implement header ====
=========================================*/
#include "headstage_neu.h"
#include "headstage_uni.h"
/*======================
==== main function ====
======================*/
@@ -1,85 +0,0 @@
#ifndef NEU_INSTRUCTION
#define NEU_INSTRUCTION
struct HEADSTAGE_PARAMETER_TABLE {
uint8_t current_sti_cycle[NEU_STI_CHANNEL_COUNTS]; /** stimulation times will be executed. */
// sti_tx[0~7] is current stimulate
// sti_tx[8] assign to voltage mode channel. */
uint16_t sti_t1[NEU_STI_CHANNEL_COUNTS]; /**< first stimulation pulse duration, it can't be 0. */
uint16_t sti_t2[NEU_STI_CHANNEL_COUNTS]; /**< interval between biphasic pulses. */
uint16_t sti_t3[NEU_STI_CHANNEL_COUNTS]; /**< second stimulation pulse duration. */
uint32_t sti_t4[NEU_STI_CHANNEL_COUNTS]; /**< discharge time per stimulation. */
uint16_t sti_t5[NEU_STI_CHANNEL_COUNTS]; /**< discharge time after final stimulation. */
bool sti_mode; /**< if true: continuous mode, else limited mode. */
bool sti_h_bridge; /**< if true: enable h bridge, else single ended. */
bool sti_ref; /**< if true: reference cell body to gnd, else single ended is used. */
uint8_t current_sti_polarity; /**<
* default : low side.
* define which channel is high side or low side.
*/
uint8_t voltage_sti_channel; /**<
* voltage_channel[7:4] represent pmos channel,
* voltage_channel[3:0] represent nmos channel
*/
uint8_t amplifier_gain; /**<
* parameter table to represent actual amplifier gain
* ----------
* | bit |mean|
* ----------
* |0b00 | 100|
* ----------
* |0b01 | 400|
* ----------
* |0b10 | 800|
* -----------
* |0b11 | 25 |
* -----------
*/
/**< these parameter define the bias voltage of amplifier. */
uint8_t vgrp;
uint8_t vgrn;
uint8_t vgr_int_old;
uint8_t vgr_intp;
uint8_t vgr_intn;
uint8_t ins_opcode; /**< check instruction opcode which is transmitted to DBS. */
uint8_t voltage_sti_amplitude; /**< voltage mode stimulation amplitude control. */
uint16_t arbitrary_index; /**< this index to keep address of arbitrary data we have already stored. */
uint16_t arbitrary_en; /**< if true: enable arbitrary mode stimulation. */
uint16_t recording_channel; /**< recording_channel[17] represent enabling channel 17. */
uint16_t sti_amplitude_h; /**< positive side amplitude. */
uint16_t sti_amplitude_l; /**< negative side amplitude. */
uint16_t sys_clk_ratio; /**< frequency divider ratio for digital core clock. */
uint16_t adc_clock_ratio; /**< frequency divider ratio for adc clock. */
uint16_t sti_clock_ratio; /**< frequency divider ratio for stimulation clock. */
uint16_t chopper_ratio; /**< freqeuncy divider for chopper. */
uint16_t sti_channel; /**<
* if stimulation[7] == true, stimulation channel 7 is enabled .
* if stimulation[4] == true. stimulation channel 4 is enabled .
*/
} INSTRUCTION = {0};
/**
* @brief:
* manage which operation to be conducted
*/
struct HEADSTAGE_STATE {
uint8_t state;
uint8_t config_type;
uint8_t index;
} NEULIVE_STATE = {0};
#endif
@@ -129,9 +129,9 @@
do { \
uint32_t __i = (uint32_t)(index); \
uint32_t __v = (uint32_t)(value); \
spi_txbuf[__i++] = (__v >> 16) & 0xFF; \
spi_txbuf[__i++] = (__v >> 8) & 0xFF; \
spi_txbuf[__i++] = (__v)&0xFF; \
spi_txbuf[__i++] = (__v >> 16) & 0xff; \
spi_txbuf[__i++] = (__v >> 8) & 0xff; \
spi_txbuf[__i++] = (__v)&0xff; \
} while (0)
/**
@@ -163,51 +163,34 @@
#define NEU_REC_PARAM 0x20
#define NEU_ARB_PARAM 0x40
#define NEU_TEST_INS 0x60
#define NEU_STI_TIME 0x80
#define NEU_WRITE_REG 0xE0
#define NEU_READ_REG 0xF0
/** event */
#define EVT_NEU_SPI 0x0001 /**< spi transaction event */
#define EVT_NEU_LED 0x0002 /**< set led event */
#define EVT_NEU_CHECK 0x0004 /**< check neulive single instruction */
#define EVT_NEU_REG_SPI 0x0008 /** register spi event */
#define EVT_NEU_CHECK 0x0003 /**< check neulive single instruction */
/** clock setting */
#define NEU_SYS_CLK 4000000 /**< 10Mhz */
#define NEU_POLY_R_CLK 1000 /**< 1khz */
#define NEU_SPI_FREQ NEU_SYS_CLK/10 /**< 1Mhz */ // should be NEU_SYS_CLK/10
#define NEU_LED_FREQ 1000000 /**< 1Mhz */
#define NEU_SYS_CLK 8000000 /**< 10Mhz */
#define NEU_POLY_R_CLK 1000 /**< 1khz */
#define NEU_SPI_FREQ 800000 /**< 1Mhz */
#define NEU_LED_FREQ 1000000 /**< 1Mhz */
/** amounts of channel */
#define NEU_STI_CHANNEL_COUNTS 8 /**< voltage mode channel counts and current mode channel counts */
#define NEU_STI_CHANNEL_COUNTS 9 /**< voltage mode channel counts and current mode channel counts */
#define NEU_REC_CHANNEL_COUNTS 16 /**< recording channel counts */
/** State for SPI (SPI callback to do task) **/
static uint8_t SPICallBack = 0;
#define CLOSE_SPI 0x01 // close SPI after MISO transmit
#define CONTINUOUS_TRANS 0x02 // transmit DBS data
#define FLUSH_BUFFER 0x03 // clean SPI buffer, used after a "write" SPI instruction (MISO)
#define FLUSH_BUFFER2 0x04 // clean SPI buffer twice
#define READ_REG 0x05 // read DBS register value, used after a "read" SPI instruction (MISO)
#define READ_REG2 0x06 // read DBS register value, used after a "read" SPI instruction (MISO)
#define END_TRANSMIT 0x07 // end spi instruction
#define ONE_SHOT_SPI 0x08
#define READ_MOSI 0x09
/** state for CC2650 to control DBS */
#define NEU_WRITE_INSTRUCTION 0 /**< write instruction into register table by spi interface */
#define NEU_READ_DATA 1 /**< read amplifier data by spi interface */
#define NEU_SINGLE_INS_READ 2
#define NEU_CHECK_REGISTER 3
#define NEU_RECEIVE_PARAM 4
#define NEU_PREPARE_READ 5
#define NEU_IDLE 15
/** macros for build up DBS instruction */
#define NEU_LNA_BIAS_ONE 0x0210 /**< vgrp(1_0000) left shift 5bits | vgrn(1_0000) */
#define NEU_LNA_BIAS_TWO 0x4210 /**< vgr_int_old(1_0000) left shift 10bits | vgr_intp(1_0000) left shift 5bits | vgr_intn(1_0000) */
#define NEU_GENERAL_EN 0x40F2 /**<
#define NEU_GENERAL_EN 0x40f0 /**<
* | 15| 14| 13| 12| 11| 10| 9| 8|
* |en_ook|en_lsk|en_tg_10k|en_tg_10M|en_mux_10k|en_mux_10M|FSK_SEL|LNA_CLOCK_SEL|
*
@@ -254,7 +237,6 @@ static uint8_t SPICallBack = 0;
* include *
*****************/
#include "time.h"
#include "headstage_instruction.h"
#include "headstage_pin.h"
#include "headstage_arm.h"
#include "headstage_debug.h"
@@ -267,8 +249,6 @@ static uint8_t SPICallBack = 0;
#include "neu/headstage_pwm.h"
#include "neu/headstage_spi.h"
#include "neu/headstage_notify.h"
#include "neu/headstage_reset.h"
#include "neu/headstage_checkMOSI.h"
/******************
* variable *
@@ -281,7 +261,84 @@ static uint8_t SPICallBack = 0;
* need to check default value of each parameter
*/
struct HEADSTAGE_PARAMETER_TABLE {
uint8_t current_sti_cycle[NEU_STI_CHANNEL_COUNTS]; /** stimulation times will be executed. */
/**< channel[8] assign to voltage mode channel. */
uint16_t sti_t1[NEU_STI_CHANNEL_COUNTS]; /**< first stimulation pulse duration, it can't be 0. */
uint16_t sti_t2[NEU_STI_CHANNEL_COUNTS]; /**< interval between biphasic pulses. */
uint16_t sti_t3[NEU_STI_CHANNEL_COUNTS]; /**< second stimulation pulse duration. */
uint32_t sti_t4[NEU_STI_CHANNEL_COUNTS]; /**< discharge time per stimulation. */
uint16_t sti_t5[NEU_STI_CHANNEL_COUNTS]; /**< discharge time after final stimulation. */
bool sti_mode; /**< if true: continuous mode, else limited mode. */
bool sti_h_bridge; /**< if true: enable h bridge, else single ended. */
bool sti_ref; /**< if true: reference cell body to gnd, else single ended is used. */
uint8_t current_sti_polarity; /**<
* default : low side.
* define which channel is high side or low side.
*/
uint8_t voltage_sti_channel; /**<
* voltage_channel[7:4] represent pmos channel,
* voltage_channel[3:0] represent nmos channel
*/
uint8_t amplifier_gain; /**<
* parameter table to represent actual amplifier gain
* ----------
* | bit |mean|
* ----------
* |0b00 | 100|
* ----------
* |0b01 | 400|
* ----------
* |0b10 | 800|
* -----------
* |0b11 | 25 |
* -----------
*/
/**< these parameter define the bias voltage of amplifier. */
uint8_t vgrp;
uint8_t vgrn;
uint8_t vgr_int_old;
uint8_t vgr_intp;
uint8_t vgr_intn;
uint8_t ins_opcode; /**< check instruction opcode which is transmitted to DBS. */
uint8_t voltage_sti_amplitude; /**< voltage mode stimulation amplitude control. */
uint16_t arbitrary_index; /**< this index to keep address of arbitrary data we have already stored. */
uint16_t arbitrary_en; /**< if true: enable arbitrary mode stimulation. */
uint16_t recording_channel; /**< recording_channel[17] represent enabling channel 17. */
uint16_t sti_amplitude_h; /**< positive side amplitude. */
uint16_t sti_amplitude_l; /**< negative side amplitude. */
uint16_t sys_clk_ratio; /**< frequency divider ratio for digital core clock. */
uint16_t adc_clock_ratio; /**< frequency divider ratio for adc clock. */
uint16_t sti_clock_ratio; /**< frequency divider ratio for stimulation clock. */
uint16_t chopper_ratio; /**< freqeuncy divider for chopper. */
uint16_t sti_channel; /**<
* if stimulation[7] == true, stimulation channel 7 is enabled .
* if stimulation[4] == true. stimulation channel 4 is enabled .
*/
} INSTRUCTION = {0};
/**
* @brief:
* manage which operation to be conducted
*/
struct HEADSTAGE_STATE {
uint8_t state;
uint8_t config_type;
uint8_t index;
} NEULIVE_STATE = {0};
/*
* todo: need to define some procedure to detect this device status
@@ -292,11 +349,9 @@ static uint8_t headstage_debug_instruction(uint8_t* ins_buf) {
/**
* @fn get_sti_channel
* this is a binary to decimal function
* return the decimal value for input number < 8
* return 0xFF if input >= 8
*/
static uint8_t get_sti_channel(uint16_t sti_channel) {
static uint8_t get_sti_channel(uint8_t sti_channel) {
uint8_t sti_ch;
for (uint8_t i = 0; i < 8; i++) {
if ((0x01 << i) & sti_channel) {
@@ -304,7 +359,7 @@ static uint8_t get_sti_channel(uint16_t sti_channel) {
return sti_ch;
}
}
return 0xFF;
return 0xff;
}
/**
@@ -316,47 +371,42 @@ static bool build_sti_cur_instruction(uint8_t sti_channel, uint32_t* value) {
switch (ins_opcode) {
case T_ST: {
op_neu = sti_channel * 4 + 1;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t2[sti_channel] & 0x3F << 10) | (INSTRUCTION.sti_t1[sti_channel]);
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t2[sti_channel] & 0x3f << 10) | (INSTRUCTION.sti_t1[sti_channel]);
INSTRUCTION.ins_opcode = T_ND;
return false;
break;
}
case T_ND: {
op_neu = sti_channel * 4 + 2;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t4[sti_channel] & 0x03 << 14) | (INSTRUCTION.sti_t3[sti_channel] << 6) | (INSTRUCTION.sti_t2[sti_channel] & 0x03C0);
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t4[sti_channel] & 0x03 << 14) | (INSTRUCTION.sti_t3[sti_channel] << 6) | (INSTRUCTION.sti_t2[sti_channel] & 0x03c);
INSTRUCTION.ins_opcode = T_RD;
return false;
break;
}
case T_RD: {
op_neu = sti_channel * 4 + 3;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t4[sti_channel] >> 2) & 0x7FFF;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t4[sti_channel] >> 2) & 0xffff;
INSTRUCTION.ins_opcode = T_FT;
return false;
break;
}
case T_FT: {
op_neu = sti_channel * 4 + 4;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t5[sti_channel]) & 0x03FF;
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.sti_t5[sti_channel]) & 0x03ff;
INSTRUCTION.ins_opcode = STI_CYCLE;
return false;
break;
}
case STI_CYCLE: {
op_neu = (sti_channel / 2) + 42;
uint8_t odd_even = sti_channel % 2;
INSTRUCTION.ins_opcode = HIGH_SIDE;
if (NEULIVE_STATE.config_type == NEU_SET_STI_VOLT) INSTRUCTION.ins_opcode = HIGH_SIDE;
if (odd_even)
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.current_sti_cycle[sti_channel] << 8) | (INSTRUCTION.current_sti_cycle[sti_channel - 1]);
else
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.current_sti_cycle[sti_channel + 1] << 8) | (INSTRUCTION.current_sti_cycle[sti_channel]);
return true;
break;
}
default: {
INSTRUCTION.ins_opcode = T_ST;
return false;
break;
}
}
}
@@ -372,23 +422,19 @@ static bool build_sti_volt(uint32_t* value) {
*value = (0x01 << 23) | (0x25 << 16) | INSTRUCTION.sti_amplitude_h;
INSTRUCTION.ins_opcode = LOW_SIDE;
return false;
break;
}
case LOW_SIDE: {
*value = (0x01 << 23) | (0x26 << 16) | INSTRUCTION.sti_amplitude_l;
INSTRUCTION.ins_opcode = VOLT_MODE_AMP;
return false;
break;
}
case VOLT_MODE_AMP: {
*value = (0x01 << 23) | (0x27 << 16) | INSTRUCTION.voltage_sti_amplitude;
INSTRUCTION.ins_opcode = BIAS_ONE;
return true;
break;
}
default: {
return false;
break;
}
}
}
@@ -404,17 +450,14 @@ static bool build_amp_bias(uint32_t* value) {
*value = (0x01 << 23) | (0x39 << 16) | NEU_LNA_BIAS_ONE;
INSTRUCTION.ins_opcode = BIAS_TWO;
return false;
break;
}
case BIAS_TWO: {
*value = (0x01 << 23) | (0x3A << 16) | NEU_LNA_BIAS_TWO;
INSTRUCTION.ins_opcode = BIAS_TWO;
return true;
break;
}
default: {
return false;
break;
}
}
}
@@ -447,44 +490,18 @@ static void headstage_init() {
*/
static void headstage_neu_append_notify_data() {
uint8_t not_buf[3];
// not_buf[0] = (spi_rxbuf[0] << 4) | spi_rxbuf[1];
// not_buf[1] = spi_rxbuf[2];
not_buf[0] = (spi_rxbuf[0] >> 8) | 0xFF;
not_buf[1] = spi_rxbuf[0] | 0xFF;
not_buf[2] = (spi_rxbuf[1] >> 8) | 0xFF;
// not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
// not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
uint8_t not_buf[2];
not_buf[0] = (spi_rxbuf[0] << 4) | spi_rxbuf[1];
not_buf[1] = spi_rxbuf[2];
uint8_t data_size = headstage_notify_append_data(not_buf);
if (data_size >= BLE_NOT_BUFF_SIZE) {
uint32_t current = headstage_time_stamp_us();
uint32_t time_delta = ((current - not_time_stamp)) & 0xFFFF;
headstage_notify_buffer[6] = time_delta & 0xFF;
headstage_notify_buffer[7] = (time_delta >> 8) & 0xFF;
// headstage_led_color(COLOR_GREEN);
// headstage_notify_buffer[6] = 0;
// headstage_notify_buffer[7] = 0;
//
// headstage_notify_send();
SimpleProfile_SetParameter(BLE_NOT_BUFF_CHAR, BLE_NOT_BUFF_SIZE, headstage_notify_buffer);
not_buf_offset = NOT_BUF_OFFSET_INIT;
headstage_notify_send();
headstage_notify_flip_buffer();
}
}
static void headstage_neu_state_spi();
static void headstage_neu_register_spi();
#define MODE_IDLE 0x00
#define MODE_REGISTER_WRITE 0x01
#define MODE_REGISTER_READ 0x02
struct _NeuliveTwoControl{
uint8_t mode;
}NeuliveTwoControl = {0};
/**
* @fn headstage_neu_event
@@ -494,19 +511,14 @@ struct _NeuliveTwoControl{
static void headstage_neu_event() {
if (flag_mask(EVT_NEU_SPI)) {
flag_disable(EVT_NEU_SPI);
headstage_neu_state_spi();
flag_disable(EVT_NEU_SPI);
}
if (flag_mask(EVT_NEU_LED)) {
flag_disable(EVT_NEU_LED); /** reserved to set led power and set color manually */
}
if(flag_mask(EVT_NEU_REG_SPI)){
headstage_neu_register_spi();
flag_disable(EVT_NEU_REG_SPI);
}
if (EVENT_MASK == 0) {
// fast return
}
@@ -523,67 +535,7 @@ static void headstage_neu_event() {
*/
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
switch(SPICallBack){
case CONTINUOUS_TRANS:{
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x0000;
}
flag_notify(EVT_NEU_SPI);
break;
}
case FLUSH_BUFFER:{
SPICallBack = FLUSH_BUFFER2;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x0000;
}
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case FLUSH_BUFFER2:{
SPICallBack = ONE_SHOT_SPI;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x0000;
}
flag_notify(EVT_NEU_SPI);
// headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case ONE_SHOT_SPI:{
SPICallBack = FLUSH_BUFFER;
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_txbuf[i] = 0x0000;
}
headstage_spi_transaction(SPI_BUFFER_SIZE);
break;
}
case READ_MOSI:{
flag_notify(EVT_NEU_SPI);
break;
}
case READ_REG:{
SPICallBack = CLOSE_SPI;
headstage_spi_transaction(3);
break;
}
case CLOSE_SPI:{
SPICallBack = ONE_SHOT_SPI;
OpenSPI = true;
SPI_close(headstage_spi_handle);
break;
}
case END_TRANSMIT:{
// tx_put_u24(0, 0);
SPICallBack = ONE_SHOT_SPI;
break;
}
default:{
break;
}
}
flag_notify(EVT_NEU_SPI);
}
/**
@@ -591,36 +543,35 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
*
* description: decode real instruction to set corresponding parameter
*/
static bool STI = false; // user using STI?
static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instruction) {
switch (instruction[0] & 0xE0) {
case NEU_STI_PARAM: {
STI = true;
/** this is for test */
bool sti_volt_curr_sel = (instruction[0] & 0b00001000);
bool sti_mode = (instruction[0] & 0b00000100);
bool sti_h_bridge = (instruction[0] & 0b00000010);
bool sti_ref = (instruction[0] & 0b00000001);
uint8_t p_ch = (instruction[1] & 0xF0) >> 4;
uint8_t n_ch = (instruction[1] & 0x0F);
uint8_t p_ch = (instruction[1] & 0xf0) >> 4;
uint8_t n_ch = (instruction[1] & 0x0f);
uint8_t sti_cycles = instruction[2];
uint16_t sti_amplitude_h = (instruction[3] << 2) | ((instruction[4] & 0xC0) >> 6);
uint16_t sti_amplitude_l = ((instruction[4] & 0x3F) << 4) | ((instruction[5] & 0xF0) >> 4);
uint16_t sti_t1 = ((instruction[5] & 0x0F) << 6) | ((instruction[6] & 0xFC) >> 2);
uint16_t sti_amplitude_h = (instruction[3] << 2) | ((instruction[4] & 0xc0) >> 6);
uint16_t sti_amplitude_l = ((instruction[4] & 0x3f) << 4) | ((instruction[5] & 0xf0) >> 4);
uint16_t sti_t1 = ((instruction[5] & 0x0f) << 6) | ((instruction[6] & 0xfc) >> 2);
uint16_t sti_t2 = ((instruction[6] & 0x03) << 8) | instruction[7];
uint16_t sti_t3 = (instruction[8] << 2) | ((instruction[9] & 0xC0) >> 6);
uint32_t sti_t4 = ((instruction[9] & 0x3F) << 11) | (instruction[10] << 2) | ((instruction[11] & 0xE0) >> 6);
uint16_t sti_t5 = ((instruction[11] & 0x1F) << 5) | ((instruction[12] & 0xF8) >> 3);
uint16_t sti_clock_ratio = ((instruction[12] & 0x07) << 13) | (instruction[13] << 5) | ((instruction[14] & 0xF8) >> 3);
uint16_t sti_t3 = (instruction[8] << 2) | ((instruction[9] & 0xc0) >> 6);
uint16_t sti_t4 = ((instruction[9] & 0x3f) << 4) | ((instruction[10] & 0xf0) >> 4);
uint16_t sti_t5 = ((instruction[10] & 0x0f) << 6) | ((instruction[11] & 0xfc) >> 2);
uint16_t sti_clock_ratio = ((instruction[11] & 0x03) << 14) | (instruction[12] << 6) | ((instruction[13] & 0xfc) >> 2);
INSTRUCTION.arbitrary_en = (0x01 << p_ch) | (0x01 << n_ch);
INSTRUCTION.sti_mode = sti_mode;
INSTRUCTION.sti_h_bridge = sti_h_bridge;
INSTRUCTION.sti_ref = sti_ref;
INSTRUCTION.current_sti_polarity = (0x01) << (p_ch + 8);
INSTRUCTION.current_sti_polarity = (0x01) << (7 - p_ch);
INSTRUCTION.sti_amplitude_h = sti_amplitude_h;
INSTRUCTION.sti_amplitude_l = sti_amplitude_l;
if (!sti_volt_curr_sel) {
if (sti_volt_curr_sel) {
INSTRUCTION.sti_t1[p_ch] = sti_t1;
INSTRUCTION.sti_t1[n_ch] = sti_t1;
INSTRUCTION.sti_t2[p_ch] = sti_t2;
@@ -632,34 +583,30 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.sti_t5[p_ch] = sti_t5;
INSTRUCTION.sti_t5[n_ch] = sti_t5;
INSTRUCTION.current_sti_cycle[p_ch] = sti_cycles;
if(sti_h_bridge){
INSTRUCTION.sti_channel = ((0x01) << p_ch) | ((0x01) << n_ch);
}else{
INSTRUCTION.sti_channel = 0x01 << p_ch;
}
INSTRUCTION.sti_channel = ((0x01) << p_ch) | ((0x01) << n_ch);
} else {
INSTRUCTION.sti_t1[NEU_STI_CHANNEL_COUNTS-1] = sti_t1;
INSTRUCTION.sti_t2[NEU_STI_CHANNEL_COUNTS-1] = sti_t2;
INSTRUCTION.sti_t3[NEU_STI_CHANNEL_COUNTS-1] = sti_t3;
INSTRUCTION.sti_t4[NEU_STI_CHANNEL_COUNTS-1] = sti_t4;
INSTRUCTION.sti_t5[NEU_STI_CHANNEL_COUNTS-1] = sti_t5;
INSTRUCTION.current_sti_cycle[NEU_STI_CHANNEL_COUNTS-1] = sti_cycles;
INSTRUCTION.sti_channel = (0x01 << (NEU_STI_CHANNEL_COUNTS-1)) ;
INSTRUCTION.sti_t1[8] = sti_t1;
INSTRUCTION.sti_t2[8] = sti_t2;
INSTRUCTION.sti_t3[8] = sti_t3;
INSTRUCTION.sti_t4[8] = sti_t4;
INSTRUCTION.sti_t5[8] = sti_t5;
INSTRUCTION.current_sti_cycle[8] = sti_cycles;
INSTRUCTION.sti_channel = (0x01 << 8);
}
INSTRUCTION.sti_clock_ratio = sti_clock_ratio;
INSTRUCTION.ins_opcode = T_FT;
break;
}
case NEU_REC_PARAM: {
uint8_t vgrp = instruction[0] & 0x1F;
uint8_t vgrn = (instruction[1] & 0xF8) >> 3;
uint8_t vgr_int_old = ((instruction[1] & 0x07) << 2) | ((instruction[2] & 0xC0) >> 6);
uint8_t vgrp = instruction[0] & 0x1f;
uint8_t vgrn = (instruction[1] & 0xf8) >> 3;
uint8_t vgr_int_old = ((instruction[1] & 0x07) << 2) | ((instruction[2] & 0xc0) >> 6);
uint8_t vgr_intp = ((instruction[2] & 0x3E) >> 1);
uint8_t vgr_intn = ((instruction[2] & 0x01) << 4) | ((instruction[3] & 0xF0) >> 4);
uint16_t recording_channel = ((instruction[3] & 0x0F) << 12) | (instruction[4] << 4) | ((instruction[5] & 0xF0) >> 4);
uint16_t adc_clock_ratio = ((instruction[5] & 0x0F) << 12) | (instruction[6] << 4) | ((instruction[7] & 0xF0) >> 4);
uint16_t sys_clk_ratio = ((instruction[7] & 0x0F) << 12) | (instruction[8] << 4) | ((instruction[9] & 0xF0) >> 4);
uint8_t amplifier_gain = ((instruction[9] & 0x0C) >> 2);
uint8_t vgr_intn = ((instruction[2] & 0x01) << 4) | ((instruction[3] & 0xf0) >> 4);
uint16_t recording_channel = ((instruction[3] & 0x0f) << 12) | (instruction[4] << 4) | ((instruction[5] & 0xf0) >> 4);
uint16_t adc_clock_ratio = ((instruction[5] & 0x0f) << 12) | (instruction[6] << 4) | ((instruction[7] & 0xf0) >> 4);
uint16_t sys_clk_ratio = ((instruction[7] & 0x0f) << 12) | (instruction[8] << 4) | ((instruction[9] & 0xf0) >> 4);
uint8_t amplifier_gain = ((instruction[9] & 0x0c) >> 2);
uint16_t chopper_ratio = (instruction[10] << 8) | instruction[11];
INSTRUCTION.vgrp = vgrp;
@@ -670,27 +617,9 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.recording_channel = recording_channel;
INSTRUCTION.adc_clock_ratio = adc_clock_ratio;
INSTRUCTION.sys_clk_ratio = sys_clk_ratio;
INSTRUCTION.amplifier_gain = amplifier_gain; /**< control shift*/
INSTRUCTION.amplifier_gain = (amplifier_gain == 0) ?3 :amplifier_gain-1 ; /**< control shift*/
INSTRUCTION.chopper_ratio = chopper_ratio;
if(STI){
INSTRUCTION.ins_opcode = T_FT;
}
else{
INSTRUCTION.ins_opcode = BIAS_ONE;
}
break;
}
case NEU_STI_TIME:{
// 4b>PMOS_CH;10b>STI_T1;10b>STI_T2;10b>STI_T3;17b>STI_T4;10b>STI_T5
uint8_t StiChPos = instruction[0] & 0x0F;
if(StiChPos < 9){
INSTRUCTION.sti_t1[StiChPos] = instruction[1] << 2 | (instruction[2] & 0xC0) >> 6;
INSTRUCTION.sti_t2[StiChPos] = (instruction[2] & 0x3F) << 4 | (instruction[3] & 0xF0) >> 4;
INSTRUCTION.sti_t3[StiChPos] = (instruction[3] & 0x0F) << 6 | (instruction[4] & 0xFC) >> 2;
INSTRUCTION.sti_t4[StiChPos] = (instruction[4] & 0x03) << 15 | (instruction[5] << 7) | (instruction[6] & 0x80) >> 15;
INSTRUCTION.sti_t5[StiChPos] = instruction[6];
}
INSTRUCTION.ins_opcode = T_FT;
break;
}
case NEU_ARB_PARAM: {
@@ -703,8 +632,8 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.vgr_intp = 16;
INSTRUCTION.vgr_intn = 16;
INSTRUCTION.vgr_int_old = 16;
INSTRUCTION.recording_channel = 0b0000000010000000;
INSTRUCTION.adc_clock_ratio = 100;
INSTRUCTION.recording_channel = 2 ^ 7;
INSTRUCTION.adc_clock_ratio = 200;
INSTRUCTION.sys_clk_ratio = 10;
INSTRUCTION.sti_clock_ratio = 10;
INSTRUCTION.amplifier_gain = 0;
@@ -724,26 +653,7 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.current_sti_polarity = 2;
INSTRUCTION.sti_amplitude_h = 0;
INSTRUCTION.sti_amplitude_l = 0;
INSTRUCTION.ins_opcode = BIAS_ONE;
break;
}
case NEU_WRITE_REG:{
NeuliveTwoControl.mode = MODE_REGISTER_WRITE;
uint8_t address = instruction[1];
uint16_t data = instruction[2] << 8 | instruction[3];
uint32_t value = address << 16 | data;
// tx_put_u24(0, value);
break;
}
case NEU_READ_REG:{
NeuliveTwoControl.mode = MODE_REGISTER_READ;
uint8_t address = instruction[1];
uint16_t data = instruction[2] << 8 | instruction[3];
uint32_t value = address << 16 | data;
// tx_put_u24(0, value);
INSTRUCTION.ins_opcode = T_FT;
break;
}
default: {
@@ -761,28 +671,20 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
static void headstage_update_vis_instruction(uint8_t vis_oper) {
switch (vis_oper) {
case VIS_RST: {
Neu2Reset();
headstage_pin_output(PIN_RESET, 0);
headstage_cpu_delay_ms(1);
headstage_pin_output(PIN_RESET, 1);
/**< stop spi transaction */
break; /**< reset all the parameter */
}
case VIS_STI: {
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
NEULIVE_STATE.config_type = NEU_SET_STI_CUR;
// NEULIVE_STATE.state = NEU_READ_DATA;
SPICallBack = ONE_SHOT_SPI;
flag_notify(EVT_NEU_SPI);
// if(NeuliveTwoControl.mode == MODE_REGISTER_READ || NeuliveTwoControl.mode == MODE_REGISTER_WRITE){
// flag_notify(EVT_NEU_REG_SPI);
// }
break; /**< start to operate */
}
case VIS_INT: {
SPICallBack = END_TRANSMIT;
headstage_spi_transaction_cancel(headstage_spi_handle);
NEULIVE_STATE.state = NEU_IDLE;
Neu2Reset();
headstage_spi_transaction_cancel(headstage_spi_handle);
/**< stop stimulation and recording */
break; /**< interrupt the operation */
}
@@ -960,14 +862,10 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
bool done;
switch (config_type) {
case NEU_SET_STI_CUR: {
if(!STI){
// go to recording setting if no stimulate
return NEU_SET_GENERAL_EN;
}
uint8_t sti_channel = get_sti_channel(INSTRUCTION.sti_channel);
done = build_sti_cur_instruction(sti_channel, value);
if (done) {
if (sti_channel == 0xFF) {
if (sti_channel == 0xff) {
return NEU_SET_STI_VOLT;
} else {
INSTRUCTION.sti_channel ^= (0x01 << sti_channel);
@@ -976,7 +874,6 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
} else {
return NEU_SET_STI_CUR;
}
break;
}
case NEU_SET_STI_VOLT: {
done = build_sti_volt(value);
@@ -985,94 +882,64 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
} else {
return NEU_SET_STI_VOLT;
}
break;
}
case NEU_SET_POLARITY: {
*value = (0x01 << 23) | (0x28 << 16) | INSTRUCTION.current_sti_polarity;
return NEU_SET_GENERAL_EN;
}
case NEU_SET_STI_CHANNEL: {
*value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
return NEU_SET_STI_CUR;
}
case NEU_SET_GENERAL_EN: {
*value = (0x01 << 23) | (0x2F << 16) | NEU_GENERAL_EN;
return NEU_SET_REC_CHANNEL;
}
case NEU_SET_REC_CHANNEL: {
*value = (0x01 << 23) | (0x30 << 16) | INSTRUCTION.recording_channel;
return NEU_SET_AMP_GAIN;
}
case NEU_SET_AMP_GAIN: {
*value = (0x01 << 23) | (0x31 << 16) | INSTRUCTION.amplifier_gain;
return NEU_SET_SYS_CLK;
}
case NEU_SET_SYS_CLK: {
*value = (0x01 << 23) | (0x32 << 16) | INSTRUCTION.sys_clk_ratio;
return NEU_SET_ADC_CLK;
}
case NEU_SET_ADC_CLK: {
*value = (0x01 << 23) | (0x33 << 16) | INSTRUCTION.adc_clock_ratio;
return NEU_SET_STI_CLK;
break;
}
case NEU_SET_STI_CLK: {
*value = (0x01 << 23) | (0x34 << 16) | INSTRUCTION.sti_clock_ratio;
return NEU_SET_STI_MODE;
break;
}
// case NEU_SET_ARBITRARY: {
// *value = (0x01 << 23) | (0x36 << 16) | INSTRUCTION.arbitrary_en;
// return NEU_SET_ARB_INDEX;
// break;
// }
// case NEU_SET_ARB_INDEX: {
// *value = (0x01 << 23) | (0x37 << 16) | INSTRUCTION.arbitrary_index;
// return NEU_SET_STI_MODE;
// break;
// }
case NEU_SET_ARBITRARY: {
*value = (0x01 << 23) | (0x36 << 16) | INSTRUCTION.arbitrary_en;
return NEU_SET_ARB_INDEX;
}
case NEU_SET_ARB_INDEX: {
*value = (0x01 << 23) | (0x37 << 16) | INSTRUCTION.arbitrary_index;
return NEU_SET_STI_MODE;
}
case NEU_SET_STI_MODE: {
*value = (0x01 << 23) | (0x38 << 16) | (INSTRUCTION.sti_mode << 2) | (INSTRUCTION.sti_h_bridge << 1) | (INSTRUCTION.sti_ref);
return NEU_SET_GENERAL_EN;
break;
}
/* These are recording parameter */
case NEU_SET_GENERAL_EN: {
*value = (0x01 << 23) | (0x2F << 16) | NEU_GENERAL_EN;
return NEU_SET_REC_CHANNEL;
break;
}
case NEU_SET_REC_CHANNEL: {
*value = (0x01 << 23) | (0x30 << 16) | INSTRUCTION.recording_channel;
// *value = (0x01 << 23) | (0x30 << 16) | 0b0000000001000000;
return NEU_SET_AMP_GAIN;
break;
}
case NEU_SET_AMP_GAIN: {
*value = (0x01 << 23) | (0x31 << 16) | INSTRUCTION.amplifier_gain;
return NEU_SET_ADC_CLK;
break;
}
// case NEU_SET_SYS_CLK: {
// *value = (0x01 << 23) | (0x32 << 16) | INSTRUCTION.sys_clk_ratio;
// return NEU_SET_ADC_CLK;
// break;
// }
case NEU_SET_ADC_CLK: {
if(INSTRUCTION.adc_clock_ratio < 28){
INSTRUCTION.adc_clock_ratio = 28;
}
*value = (0x01 << 23) | (0x33 << 16) | INSTRUCTION.adc_clock_ratio;
// *value = (0x01 << 23) | (0x33 << 16) | 0x00C8;
return NEU_SET_AMP_BIAS;
break;
}
case NEU_SET_AMP_BIAS: {
done = build_amp_bias(value);
if (done){
if(STI){
return NEU_SET_STI_CHANNEL;
}
else{
return NEU_SETUP_DONE;
}
}
else{
if (done)
return NEU_SET_CHOPPER;
else
return NEU_SET_AMP_BIAS;
}
break;
}
// case NEU_SET_CHOPPER: {
// *value = (0x01 << 23) | (0x3B << 16) | INSTRUCTION.chopper_ratio;
// return NEU_SETUP_DONE;
// break;
// }
// enable stimulate
case NEU_SET_STI_CHANNEL: {
*value = (0x01 << 23) | (0x2E << 16) | INSTRUCTION.sti_channel;
case NEU_SET_CHOPPER: {
*value = (0x01 << 23) | (0x3B << 16) | INSTRUCTION.chopper_ratio;
return NEU_SETUP_DONE;
break;
}
default: {
return NEU_SET_STI_CUR;
break;
}
}
}
@@ -1082,62 +949,31 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
*
* @brief spi transaction
*/
static uint8_t FlushSPICounter = 0;
static void headstage_neu_state_spi() {
uint32_t value = 0;
uint8_t nxt_ins = 0;
uint32_t value;
uint8_t nxt_ins;
switch (NEULIVE_STATE.state) {
case NEU_WRITE_INSTRUCTION: {
SPICallBack = ONE_SHOT_SPI;
nxt_ins = build_neu_ins_config(NEULIVE_STATE.config_type, &value); /**< set instruction one by one in order to set all the parameter.*/
NEULIVE_STATE.config_type = nxt_ins;
tx_put_u24(0, value);
headstage_spi_transaction(3);
if (nxt_ins == NEU_SETUP_DONE) {
// setting done, reset STI flag
STI = false;
// go to read ADC data
NEULIVE_STATE.state = NEU_PREPARE_READ;
NEULIVE_STATE.state = NEU_READ_DATA;
} else {
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
}
AppendSPITX(0, value);
headstage_spi_transaction(3);
break;
}
case NEU_PREPARE_READ:{
if(FlushSPICounter < 6){
SPICallBack = ONE_SHOT_SPI;
NEULIVE_STATE.state = NEU_PREPARE_READ;
FlushSPICounter ++;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
else{
SPICallBack = READ_MOSI;
NEULIVE_STATE.state = NEU_READ_DATA;
headstage_led_color(COLOR_CYAN);
FlushSPICounter = 0;
AppendSPITX(0, 0);
headstage_spi_transaction(SPI_BUFFER_SIZE);
}
break;
}
case NEU_READ_DATA: {
// headstage_neu_append_notify_data();
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
cdr_buf[2*i] = (spi_rxbuf[i] >> 8) | 0xFF;
cdr_buf[2*i] = spi_rxbuf[i] | 0xFF;
}
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, 2*SPI_BUFFER_SIZE, cdr_buf);
headstage_spi_transaction(SPI_BUFFER_SIZE);
headstage_neu_append_notify_data();
headstage_spi_transaction(3);
break;
}
case NEU_SINGLE_INS_READ: {
read_neu_ins_config(NEULIVE_STATE.config_type, &value);
// tx_put_u24(0, value);
tx_put_u24(0, value);
NEULIVE_STATE.state = NEU_RECEIVE_PARAM;
headstage_spi_transaction(3);
break;
@@ -1148,8 +984,8 @@ static void headstage_neu_state_spi() {
break;
}
case NEU_CHECK_REGISTER: {
// cdr_buf[0] = spi_rxbuf[1];
// cdr_buf[1] = spi_rxbuf[2];
cdr_buf[0] = spi_rxbuf[1];
cdr_buf[1] = spi_rxbuf[2];
cdr_buf[2] = _B_4b4b(CIS_READ_PARAM, CHIP_ID);
cdr_buf[3] = _B_4b4b(CDR_SUCCESS, 0);
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
@@ -1164,22 +1000,4 @@ static void headstage_neu_state_spi() {
}
}
static void headstage_neu_register_spi(){
switch(NeuliveTwoControl.mode){
case MODE_REGISTER_WRITE:{
WriteSPI(3);
break;
}
case MODE_REGISTER_READ:{
ReadSPI();
break;
}
default:{
break;
}
}
}
#endif
@@ -236,7 +236,7 @@
/** target SYSTEM clock frequency is 1Mhz */
#define UMC_SYS_CLK 1000000
/** poly-R switching clock frequency */
#define UMC_POLY_R_CLK 1000
#define UMC_POLY_R_CLK 100
/// Neulive instruction macro
@@ -440,7 +440,7 @@ struct HEADSTAGE_PARAMETER_TABLE {
/** MODE */
uint8_t mode;
uint8_t channel_table[REC_CHANNEL_COUNT];
bool channel_table[REC_CHANNEL_COUNT];
uint8_t channel_mux[REC_CHANNEL_COUNT];
uint8_t last_enable_channel;
uint8_t enable_channel_number;
@@ -520,7 +520,6 @@ static void rearrange_channel_mux_table() {
INSTRUCTION.last_enable_channel = last_enable_channel;
INSTRUCTION.enable_channel_number = enable_channel_number;
if (enable_channel_number == 0) {
// no channel enable
memset(INSTRUCTION.channel_mux, 0, REC_CHANNEL_COUNT);
@@ -541,11 +540,12 @@ static void rearrange_channel_mux_table() {
while (channel_mux_index >= 0) {
int8_t i = next_enable_channel - 1;
for (; i >= 0; i--) {
while (i >= 0) {
if (INSTRUCTION.channel_table[i]) {
next_enable_channel = i;
break;
}
i--;
}
if (i < 0) {
@@ -765,7 +765,6 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.sti_channel_nmos = 0; // sti nch = ch2 means sti turn off
INSTRUCTION.sti_channel_pmos = 1; // sti pch = ch1 means sti turn off
INSTRUCTION.amp_low_band_freq = 0; // the maximum
// this for-loop is used for setting the amplifier channel
// for (unsigned int i = 0; i < REC_CHANNEL_COUNT; i++) {
// INSTRUCTION.channel_table[i] = (4 <= i && i <= 8);
@@ -928,10 +927,10 @@ static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) {
channel = reverse_channel[INSTRUCTION.last_enable_channel];
} else {
uint8_t channel_pointer = (INSTRUCTION.channel_pointer + 1) % INSTRUCTION.last_enable_channel;
INSTRUCTION.channel_pointer = channel_pointer;
channel = reverse_channel[INSTRUCTION.channel_mux[channel_pointer]];
INSTRUCTION.channel_pointer = channel_pointer;
}
// uint8_t data_size = headstage_notify_append_data(channel, spi_rxbuf);
uint8_t data_size = headstage_notify_append_data(channel, spi_rxbuf);
if (data_size >= BLE_NOT_BUFF_SIZE) {
headstage_notify_send();
headstage_notify_flip_buffer();
@@ -944,14 +943,12 @@ static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) {
/*=====================
==== instruction ====
=====================*/
static uint8_t build_umn_ins_config(uint8_t config_type, uint32_t* value) {
switch (config_type) {
case CONFIG_AMP_MUX: {
uint8_t channel_pointer = INSTRUCTION.channel_pointer + 1;
*value = build_configure_instruction(CONFIG_AMP_MUX, INSTRUCTION.channel_mux[INSTRUCTION.channel_pointer] + 1);
INSTRUCTION.channel_pointer = channel_pointer;
if (channel_pointer < INSTRUCTION.enable_channel_number) {
return CONFIG_AMP_MUX;
} else {
@@ -1072,8 +1069,6 @@ static void headstage_umc_state_transfer_ask() {
*
*/
static void headstage_umc_state_transfer_lsk() {
headstage_debug_buffer[0] = headstage_state;
headstage_set_debug_information();
switch (headstage_state) {
case UMC_STATE_IDLE:
headstage_state = UMC_STATE_HANDSHAKE;
@@ -1095,14 +1090,10 @@ static void headstage_umc_state_transfer_lsk() {
if (umc_pass_check()) {
tx_put_u32(0, build_configure_instruction(UMC_CALIB_DONE, UMC_MODE_LSK_OUT));
headstage_cpu_delay_ms(1);
headstage_state = UMC_STATE_INITIAL;
headstage_spi_ask_transaction(4);
} else {
headstage_cpu_delay_ms(1);
headstage_spi_ask_transaction(4);
}
break;
@@ -1111,11 +1102,8 @@ static void headstage_umc_state_transfer_lsk() {
if (umc_pass_check()) {
headstage_state = UMC_STATE_CONFIGURE;
headstage_cpu_delay_ms(1);
headstage_spi_ask_transaction(4);
} else {
headstage_cpu_delay_ms(1);
headstage_spi_ask_transaction(4);
}
@@ -1139,13 +1127,9 @@ static void headstage_umc_state_transfer_lsk() {
headstage_state = UMC_STATE_CONFIGURE;
}
headstage_cpu_delay_ms(1);
headstage_spi_ask_transaction(4);
}
} else {
headstage_cpu_delay_ms(1);
headstage_spi_ask_transaction(4);
}
@@ -1,23 +0,0 @@
#ifndef CHECK_MOSI
#define CHECK_MOSI
#include "headstage_led.h"
/*
* MOSI channel meet with INSTRUCTION.recording_channel ?
*/
static uint8_t CheckMOSI(uint8_t* MOSI){
uint8_t ch = MOSI[0];
uint16_t selectCh = 0x0001 << ch;
if(selectCh & INSTRUCTION.recording_channel){
return 1;
}
else{
// headstage_led_color(COLOR_RED);
// headstage_led_color(COLOR_GREEN);
return 0;
}
}
#endif
@@ -10,14 +10,12 @@
#define NOT_BUF_OFFSET_INIT 8
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
static uint32_t not_buf_offset = NOT_BUF_OFFSET_INIT;
static uint32_t not_time_stamp = 0;
static void headstage_notify_set_timestamp() {
not_time_stamp = headstage_time_stamp_us();
headstage_notify_buffer[0] = CHIP_ID;
headstage_notify_buffer[1] = 4;
headstage_notify_buffer[2] = not_time_stamp & 0xFF;
headstage_notify_buffer[3] = (not_time_stamp >> 8) & 0xFF;
headstage_notify_buffer[4] = (not_time_stamp >> 16) & 0xFF;
@@ -33,23 +31,27 @@ static void headstage_notify_flip_buffer() {
not_buf_offset = NOT_BUF_OFFSET_INIT;
}
/**
The data format between NEULIVE and CONTROL BOX
Use notification to transmit data to control box through BLE.
Definition of the protocol:
4 byte timestamp + (1 byte channel + 2 byte voltage) * (N)
N: numbers of data transmitted in a transaction
*/
static uint8_t headstage_notify_append_data(uint8_t *data_value) {
if (not_buf_offset <= NOT_BUF_OFFSET_INIT) {
headstage_notify_set_timestamp();
not_buf_offset = NOT_BUF_OFFSET_INIT;
}
headstage_notify_buffer[not_buf_offset++] = data_value[0];
headstage_notify_buffer[not_buf_offset++] = data_value[1];
headstage_notify_buffer[not_buf_offset++] = data_value[2];
if (data_value == NULL) {
headstage_notify_buffer[not_buf_offset++] = 0x00;
headstage_notify_buffer[not_buf_offset++] = 0x03;
} else {
headstage_notify_buffer[not_buf_offset++] = data_value[0];
headstage_notify_buffer[not_buf_offset++] = data_value[1];
}
if (not_buf_offset == BLE_NOT_BUFF_SIZE) {
uint32_t current = headstage_time_stamp_us();
uint32_t time_delta = ((current - not_time_stamp)) & 0xFFFF;
headstage_notify_buffer[6] = time_delta & 0xFF;
headstage_notify_buffer[7] = (time_delta >> 8) & 0xFF;
}
uint8_t ret = not_buf_offset;
@@ -3,9 +3,6 @@
#ifndef HEADSTAGE_PIN_NEU_H
#define HEADSTAGE_PIN_NEU_H
//#define NEU_2_0
#define NEU_2_1
#if defined(CC2650_LAUNCHXL)
// clang-format off
@@ -14,28 +11,6 @@
#define PIN_DC_DC IOID_2 // STI select need
#define PIN_BATT_HALF IOID_3 //
#define PIN_AMP_VCK IOID_4 //
#define PIN_LED_SDI IOID_5 //
#define PIN_LED_CLK IOID_8 //
#define PIN_STI_CLK IOID_9 //
#define PIN_SPI_MISO IOID_10 //
#define PIN_SPI_MOSI IOID_11 //
#define PIN_SPI_CS IOID_12 //
#define PIN_SPI_CLK IOID_13 //
#define PIN_SYS_CLK IOID_14 //
//#define GLED IOID_7
//#define RLED IOID_6
// clang-format on
#elif defined(BOOSTXL_CC2650MA)
// clang-format off
#ifdef NEU_2_0
#define PIN_RESET IOID_0 // SPI1 to receive LSK
#define PIN_EN_ADC_SPI_CLK IOID_1 // SPI1 clock
#define PIN_DC_DC IOID_2 // STI select need
#define PIN_BATT_HALF IOID_3 //
#define PIN_AMP_VCK IOID_4 //
#define PIN_LED_SDI IOID_7 //
#define PIN_LED_CLK IOID_8 //
#define PIN_STI_CLK IOID_9 //
@@ -44,22 +19,25 @@
#define PIN_SPI_CS IOID_12 //
#define PIN_SPI_CLK IOID_13 //
#define PIN_SYS_CLK IOID_14 //
// clang-format on
#elif defined(NEU_2_1)
#define PIN_LED_SDI IOID_0 // SPI1 to receive LSK
#define PIN_LED_CLK IOID_1 // SPI1 clock
#elif defined(BOOSTXL_CC2650MA)
// clang-format off
#define PIN_RESET IOID_0 // SPI1 to receive LSK
#define PIN_EN_ADC_SPI_CLK IOID_1 // SPI1 clock
#define PIN_DC_DC IOID_2 // STI select need
#define PIN_EN_ADC_SPI_CLK IOID_3 //
#define PIN_BATT_HALF IOID_4 //
#define PIN_SPI_MISO IOID_7 //
#define PIN_SPI_MOSI IOID_8 //
#define PIN_SPI_CS IOID_9 //
#define PIN_SPI_CLK IOID_10 //
#define PIN_SYS_CLK IOID_11 //
#define PIN_RESET IOID_12 //
#define PIN_AMP_VCK IOID_13 //
#define PIN_STI_CLK IOID_14 //
#endif
#define PIN_BATT_HALF IOID_3 //
#define PIN_AMP_VCK IOID_4 //
#define PIN_LED_SDI IOID_7 //
#define PIN_LED_CLK IOID_8 //
#define PIN_STI_CLK IOID_9 //
#define PIN_SPI_MISO IOID_10 //
#define PIN_SPI_MOSI IOID_11 //
#define PIN_SPI_CS IOID_12 //
#define PIN_SPI_CLK IOID_13 //
#define PIN_SYS_CLK IOID_14 //
// clang-format on
#endif
@@ -100,8 +78,6 @@ static PIN_Config headstage_pin_configuration[] = { //
PIN_DC_DC | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
PIN_STI_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
// RLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
// GLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
//
PIN_TERMINATE};
@@ -1,94 +0,0 @@
#ifndef NEU_2_RST
#define NEU_2_RST
#include "headstage_instruction.h"
#include "neu/headstage_spi.h"
static void ResetINSTRUCTION();
static void MCUReset(){
// Reset INSTRUCTION & NEULIVE_STATE
ResetINSTRUCTION();
// SPI buffer reset
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++ ){
spi_txbuf[i] = 0;
spi_rxbuf[i] = 0;
}
SPICallBack = ONE_SHOT_SPI;
// FlushSPICounter = 0;
for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
headstage_spi_led_txbuf[i] = 0;
}
// CIS buffer reset
for(int i=0 ; i<BLE_CDR_BUFF_SIZE ; i++){
cdr_buf[i] = 0;
}
// Notify Buffer reset
for(int i=0 ; i<BLE_NOT_BUFF_SIZE ; i++){
headstage_notify_buffer[i] = 0;
}
not_buf_offset = NOT_BUF_OFFSET_INIT;
not_time_stamp = 0;
headstage_led_color(COLOR_GREEN); // color green
}
static void DBSReset(){
headstage_pin_output(PIN_RESET, 0);
headstage_cpu_delay_ms(10);
headstage_pin_output(PIN_DC_DC, 1);
headstage_pin_output(PIN_EN_ADC_SPI_CLK, 1);
headstage_pin_output(PIN_RESET, 1);
}
static void Neu2Reset(){
DBSReset();
MCUReset();
}
static void ResetINSTRUCTION(){
INSTRUCTION.vgrp = 16;
INSTRUCTION.vgrn = 16;
INSTRUCTION.vgr_intp = 16;
INSTRUCTION.vgr_intn = 16;
INSTRUCTION.vgr_int_old = 16;
INSTRUCTION.recording_channel = 0b0000000000000000;
INSTRUCTION.adc_clock_ratio = 100;
INSTRUCTION.sys_clk_ratio = 10;
INSTRUCTION.sti_clock_ratio = 10;
INSTRUCTION.amplifier_gain = 0;
INSTRUCTION.chopper_ratio = 2;
INSTRUCTION.sti_t1[1] = 1;
INSTRUCTION.sti_t2[1] = 0;
INSTRUCTION.sti_t3[1] = 0;
INSTRUCTION.sti_t4[1] = 0;
INSTRUCTION.sti_t5[1] = 0;
INSTRUCTION.sti_channel = 2;
INSTRUCTION.arbitrary_en = 0;
INSTRUCTION.arbitrary_index = 0;
INSTRUCTION.sti_h_bridge = 0;
INSTRUCTION.sti_mode = 0;
INSTRUCTION.sti_ref = 0;
INSTRUCTION.current_sti_polarity = 2;
INSTRUCTION.sti_amplitude_h = 0;
INSTRUCTION.sti_amplitude_l = 0;
INSTRUCTION.ins_opcode = BIAS_ONE;
uint8_t voltage_sti_channel = 0;
uint8_t voltage_sti_amplitude = 0;
for(int i=0 ; i<NEU_STI_CHANNEL_COUNTS ; i++){
INSTRUCTION.current_sti_cycle[i] = 0;
}
NEULIVE_STATE.state = NEU_IDLE;
NEULIVE_STATE.config_type = 0;
NEULIVE_STATE.index = 0;
}
#endif
@@ -12,17 +12,16 @@
#include <ti/drivers/dma/UDMACC26XX.h>
#include <ti/drivers/spi/SPICC26XXDMA.h>
#define SPI_BUFFER_SIZE 3
#define SPI_BUFFER_SIZE 20
static uint16_t spi_txbuf[SPI_BUFFER_SIZE] = {0};
static uint16_t spi_rxbuf[SPI_BUFFER_SIZE] = {0};
static uint8_t spi_txbuf[SPI_BUFFER_SIZE] = {0};
static uint8_t spi_rxbuf[SPI_BUFFER_SIZE] = {0};
static SPI_Handle headstage_spi_handle = NULL;
static SPI_Transaction headstage_spi_transaction;
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction);
static bool OpenSPI = false;
// SPI parameters initialize
#define headstage_spi_open() \
@@ -33,20 +32,20 @@ static bool OpenSPI = false;
spi_parameter.transferMode = SPI_MODE_CALLBACK; \
spi_parameter.mode = SPI_SLAVE; \
spi_parameter.bitRate = NEU_SPI_FREQ; \
spi_parameter.dataSize = 16; \
spi_parameter.dataSize = 8; \
spi_parameter.frameFormat = SPI_POL0_PHA1; \
spi_parameter.transferCallbackFxn = headstage_spi_callback; \
headstage_spi_handle = SPI_open(Board_SPI0, &spi_parameter); \
} while (0)
//#define headstage_spi_transaction(handle, length, tx, rx) \
// ({ \
// SPI_Transaction transaction = headstage_spi_transaction ; \
// transaction.count = (length); \
// transaction.txBuf = (tx); \
// transaction.rxBuf = (rx); \
// SPI_transfer(handle, &transaction); \
// })
#define headstage_spi_transaction(handle, length, tx, rx) \
({ \
SPI_Transaction transaction = headstage_spi_transaction ; \
transaction.count = (length); \
transaction.txBuf = (tx); \
transaction.rxBuf = (rx); \
SPI_transfer(handle, &transaction); \
})
#define headstage_spi_transaction(length) \
({ \
@@ -71,69 +70,4 @@ static bool OpenSPI = false;
} \
} while (0)
static void ReopenSPI(){
SPI_init();
SPI_Params spi_parameter;
SPI_Params_init(&spi_parameter);
spi_parameter.transferMode = SPI_MODE_CALLBACK;
spi_parameter.mode = SPI_SLAVE;
spi_parameter.bitRate = NEU_SPI_FREQ;
spi_parameter.dataSize = 16;
spi_parameter.frameFormat = SPI_POL0_PHA1;
spi_parameter.transferCallbackFxn = headstage_spi_callback;
headstage_spi_handle = SPI_open(Board_SPI0, &spi_parameter);
}
static void WriteSPI(uint8_t length){
if(OpenSPI){
ReopenSPI();
}
for(int i=length ; i<SPI_BUFFER_SIZE ; i++){
spi_rxbuf[i] = 0x00;
}
SPICallBack = FLUSH_BUFFER;
headstage_spi_transaction.count = 3;
headstage_spi_transaction.txBuf = spi_txbuf;
headstage_spi_transaction.rxBuf = spi_rxbuf;
SPI_transfer(headstage_spi_handle, &headstage_spi_transaction);
}
static void ReadSPI(){
if(OpenSPI){
ReopenSPI();
}
SPICallBack = READ_REG;
headstage_spi_transaction.count = 3;
headstage_spi_transaction.txBuf = spi_txbuf;
headstage_spi_transaction.rxBuf = spi_rxbuf;
SPI_transfer(headstage_spi_handle, &headstage_spi_transaction);
}
#define tx_put_u24(index, value) \
do { \
uint32_t __i = (uint32_t)(index); \
uint32_t __v = (uint32_t)(value); \
spi_txbuf[__i++] = (__v >> 16) & 0xFF; \
spi_txbuf[__i++] = (__v >> 8) & 0xFF; \
spi_txbuf[__i++] = (__v)&0xFF; \
} while (0)
static void AppendSPITX(uint8_t index, uint32_t value){
// uint32_t Test = 0b00000000010101010000111100110001;
spi_txbuf[index++] = (value >> 8) & 0xFFFF;
spi_txbuf[index++] = (value & 0xFF) << 8;
spi_txbuf[index++] = 0;
for( /* */ ; index <SPI_BUFFER_SIZE ; index++){
spi_txbuf[index] = 0;
}
}
#endif
#endif
@@ -48,7 +48,7 @@
#define Board_SPI0_MISO PIN_UNASSIGNED
#define Board_SPI0_MOSI PIN_LSK_MOSI
#define Board_SPI0_CLK PIN_LSK_CLK
#define Board_SPI0_CS PIN_LSK_CS
#define Board_SPI0_CSN PIN_LSK_CS
/*
* SPI1 interface work with LED
@@ -57,7 +57,7 @@
#define Board_SPI1_MISO PIN_UNASSIGNED
#define Board_SPI1_MOSI PIN_ASK_MOSI
#define Board_SPI1_CLK PIN_UNASSIGNED
#define Board_SPI1_CS PIN_ASK_CS
#define Board_SPI1_CSN PIN_ASK_CS
/* Power Management Board */
#define Board_SRDY Board_BP_Pin_J2_19
@@ -12,53 +12,53 @@
"REC_CHANNEL_COUNT": 12,
"STI_CHANNEL_COUNT": 4,
"ADC_SAMPLE_RATE_LIST": [
2000,
1000,
1900,
3800,
7600,
15200,
30400
15200
],
"STI_FREQ_LIST": [
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
22,
24,
26,
28,
30,
32,
34,
36,
38,
40,
100,
200,
300,
400,
500,
600,
700,
800,
1000,
1200,
1400,
1600,
1800,
2000
900,
1000
],
"STI_PULSE_WIDTH": [
80,
180,
280,
380,
480,
580,
680,
780,
880,
980
400,
900,
1400,
1900,
2400,
2900,
3400,
3900,
4400,
4900
]
},
"parameters": {
@@ -84,9 +84,6 @@
"description": "amp gain",
"record_meta": true,
"value": [
3,
14,
27,
60,
280,
540
@@ -187,10 +184,6 @@
},
"instruction": {
"start": [
{
"expression": "len(CHANNEL) > 0",
"raise": "no recording channel"
},
"data_format",
"_notify(True)",
"start_recording",
@@ -55,9 +55,6 @@ static uint16_t amp_gain_table[] = {
0b100011, // 3
0b101100, // 14
0b101001, // 27
0b000011, // 60
0b001100, // 280
0b001001, // 540
};
#endif
@@ -115,11 +115,11 @@
#ifndef FEATURE_OAD
// Minimum connection interval (units of 1.25ms, 80=100ms) if automatic
// parameter update request is enabled
#define DEFAULT_DESIRED_MIN_CONN_INTERVAL 6
#define DEFAULT_DESIRED_MIN_CONN_INTERVAL 80
// Maximum connection interval (units of 1.25ms, 800=1000ms) if automatic
// parameter update request is enabled
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 6
#define DEFAULT_DESIRED_MAX_CONN_INTERVAL 80
#else //! FEATURE_OAD
// Minimum connection interval (units of 1.25ms, 8=10ms) if automatic
// parameter update request is enabled
@@ -153,7 +153,7 @@
#define SBP_TASK_PRIORITY 1
#ifndef SBP_TASK_STACK_SIZE
#define SBP_TASK_STACK_SIZE 1024
#define SBP_TASK_STACK_SIZE 844
#endif
// Internal Events for RTOS application
@@ -221,7 +221,6 @@ static void SimpleBLEPeripheral_sendAttRsp(void);
static void SimpleBLEPeripheral_freeAttRsp(uint8_t status);
static void SimpleBLEPeripheral_stateChangeCB(gaprole_States_t newState);
static void SimpleBLEPeripheral_enqueueMsg(uint8_t event, uint8_t state);
static void headstage_data_length_extension();
#ifndef FEATURE_OAD_ONCHIP
static void SimpleBLEPeripheral_charValueChangeCB(uint8_t paramID);
@@ -409,9 +408,7 @@ static void SimpleBLEPeripheral_init(void) {
GATT_RegisterForMsgs(self);
HCI_LE_ReadMaxDataLenCmd();
HCI_LE_WriteSuggestedDefaultDataLenCmd(251, 2120); // this is used for data length extension
}
#ifndef DEVICE_NAME
@@ -554,6 +551,9 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
// ICall_signal() function is called onto the semaphore.
ICall_Errno errno = ICall_wait(ICALL_TIMEOUT_FOREVER);
// headstage_watchdog_clear();
if (EVENT_MASK > 0) {
headstage_event_handle();
}
if (errno == ICALL_ERRNO_SUCCESS) {
ICall_EntityID dest;
ICall_ServiceEnum src;
@@ -594,9 +594,6 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
}
}
}
if (EVENT_MASK > 0) {
headstage_event_handle();
}
#ifdef FEATURE_OAD
while (!Queue_empty(oad_queue_handle)) {
@@ -823,14 +820,13 @@ static void SimpleBLEPeripheral_processStateChangeEvt(gaprole_States_t newState)
uint8_t numActive = 0;
numActive = linkDB_NumActive();
headstage_led_color(COLOR_CYAN);
uint16_t cxnHandle;
uint16_t requestedPDUSize = 251; // payload = 251 - 7 = 244 byte
uint16_t requestTxTime = 2120; // 2 ms
uint16_t requestedPDUSize = 251;
uint16_t requestTxTime = 2120;
GAPRole_GetParameter(GAPROLE_CONNHANDLE, &cxnHandle);
if (SUCCESS != HCI_LE_SetDataLenCmd(cxnHandle, requestedPDUSize, requestTxTime)) {
if (SUCCESS == HCI_LE_SetDataLenCmd(cxnHandle, requestedPDUSize, requestTxTime)) {
headstage_led_spi_color(COLOR_CYAN);
}
// Use numActive to determine the connection handle of the last
// connection
@@ -852,12 +848,12 @@ static void SimpleBLEPeripheral_processStateChangeEvt(gaprole_States_t newState)
// Device just timed out from a connection but is not yet advertising, is in waiting period before advertising again
// disconnected
SimpleBLEPeripheral_freeAttRsp(bleNotConnected);
headstage_led_color(COLOR_RED);
headstage_led_spi_color(COLOR_RED); /** for neulive1.3 call headstage_led_spi_color ; for neulive2.0 call headstage_led_color */
CONNECT_HANDLE = 0xFFFF;
flag_notify(EVT_DISCONNECTED);
break;
case GAPROLE_ERROR: // Error occurred - invalid state
headstage_led_color(COLOR_RED);
headstage_led_spi_color(COLOR_RED);
break;
case GAPROLE_INIT: // Waiting to be started
case GAPROLE_ADVERTISING: // Currently Advertising
@@ -84,8 +84,7 @@ extern "C" {
#define SIMPLEPROFILE_CHAR1_LEN 2
#define SIMPLEPROFILE_CHAR2_LEN 10
#define SIMPLEPROFILE_CHAR3_LEN 20
#define SIMPLEPROFILE_CHAR4_LEN 193
#define SIMPLEPROFILE_CHAR4_LEN 20 // 8 header + 3n data, n=3
#define SIMPLEPROFILE_CHAR4_LEN 200
#define SIMPLEPROFILE_CHAR5_LEN 20
/*********************************************************************