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2 Commits

Author SHA1 Message Date
Roy_01 3cccdba575 updated: idle訊號改成highZ訊號 2024-10-30 14:02:38 +08:00
Roy_01 b22f41e1b9 feat: 修改cpg_pulse_default_demo_ext(), 可設定e1,e2,e3,e4來輸出脈波 2024-10-30 14:00:27 +08:00
129 changed files with 7286 additions and 8269 deletions
+3
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@@ -29,6 +29,7 @@ BinPackParameters: false
BreakBeforeBinaryOperators: None
BreakBeforeTernaryOperators: false
BreakAfterJavaFieldAnnotations: true
AlignConsecutiveAssignments: true
AlignTrailingComments: true
BreakConstructorInitializers: AfterColon
AlignConsecutiveMacros:
@@ -49,4 +50,6 @@ AlignConsecutiveBitFields:
AlignCompound: true
PadOperators: true
AlignEscapedNewlines: Right
BinPackArguments: false
BinPackParameters: false
...
-2
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@@ -3,5 +3,3 @@
/VisualGDB/
*.vgdbsettings.*.user
*.zip
/build/
/output/
-74
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@@ -1,74 +0,0 @@
{
// Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": [
{
"cwd": "${workspaceRoot}",
"executable": "${command:cmake.launchTargetPath}",
"name": "(Ubuntu) launch & debug",
"request": "launch",
"type": "cortex-debug",
"servertype": "jlink",
"serverpath": "/opt/SEGGER/JLink/JLinkGDBServerCLExe",
"serverArgs": [
"-halt",
"-ir",
"-vd",
"-strict",
],
"rttConfig": {
"enabled": true,
"address": "auto",
"decoders": [
{
"label": "",
"port": 0,
"type": "console"
}
],
},
"armToolchainPath": "/opt/arm-none-eabi/bin",
"device": "NRF52840_XXAA",
"interface": "swd",
"rtos": "FreeRTOS",
"svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
"runToEntryPoint": "main",
"preLaunchTask": "CMake: build"
},
{
"cwd": "${workspaceRoot}",
"executable": "${command:cmake.launchTargetPath}",
"name": "(Windows) launch & debug",
"request": "launch",
"type": "cortex-debug",
"servertype": "jlink",
"serverpath": "C:/Program Files/SEGGER/JLink/JLinkGDBServerCL.exe",
"serverArgs": [
"-halt",
"-ir",
"-vd",
"-strict",
],
"rttConfig": {
"enabled": true,
"address": "auto",
"decoders": [
{
"label": "",
"port": 0,
"type": "console"
}
],
},
"armToolchainPath": "C:/sysgcc/arm-eabi/bin",
"device": "NRF52840_XXAA",
"interface": "swd",
"rtos": "FreeRTOS",
"svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
"runToEntryPoint": "main",
"preLaunchTask": "CMake: build"
},
]
}
-15
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@@ -1,15 +0,0 @@
{
"editor.formatOnSave": false,
"[c]": {
"editor.defaultFormatter": "xaver.clang-format",
"editor.formatOnSave": true
},
"[cpp]": {
"editor.defaultFormatter": "xaver.clang-format",
"editor.formatOnSave": true
},
"[python]": {
"editor.defaultFormatter": "ms-python.black-formatter",
"editor.formatOnSave": true
}
}
-29
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@@ -1,29 +0,0 @@
{
"version": "2.0.0",
"tasks": [
{
"type": "cmake",
"label": "CMake: build",
"command": "build",
"targets": [
"all"
],
"preset": "Debug",
"group": "build",
"problemMatcher": [],
"detail": "CMake template build task"
},
{
"type": "cmake",
"label": "CMake: clean rebuild",
"command": "cleanRebuild",
"targets": [
"all"
],
"preset": "Debug",
"group": "build",
"problemMatcher": [],
"detail": "CMake template clean rebuild task"
}
]
}
-261
View File
@@ -1,261 +0,0 @@
cmake_minimum_required(VERSION 3.10.0)
# ==========================
# Toolchain Setup
# ==========================
set(CMAKE_TOOLCHAIN_FILE ${CMAKE_SOURCE_DIR}/cmake/arm-none-eabi-gcc.cmake)
# ==========================
# Project Setup
# ==========================
project(elite VERSION 0.1.0 LANGUAGES C ASM)
set(CMAKE_C_STANDARD 99)
set(CMAKE_C_STANDARD_REQUIRED ON)
set(CMAKE_C_EXTENSIONS ON)
set(EXECUTABLE ${PROJECT_NAME}.elf)
set(NRF_SDK_DIR ${CMAKE_SOURCE_DIR}/../bmd380_sdk)
set(NRF_SDK_LINKER_DIR ${NRF_SDK_DIR}/modules/nrfx/mdk)
set(SD_LINKER_DIR ${CMAKE_SOURCE_DIR}/SoftdeviceLibraries/hard)
set(LINKER_DIR ${CMAKE_SOURCE_DIR}/linkscripts)
set(LINKER_FILE ${LINKER_DIR}/nRF52840_XXAA_S140_reserve.lds)
# ==========================
# Compiler Flags and Defines
# ==========================
set(COMMON_COMPILE_OPT
-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
-fdata-sections -ffunction-sections -Wall -Os -g3 -std=gnu99
-Wno-unused-variable -Wno-pointer-sign -Wno-array-bounds
)
set(COMMON_COMPILE_DEF
-DDEBUG=1 -DNRF52840_XXAA -DS140_reserve -DCONFIG_GPIO_AS_PIN
-DRESETHNRF_DFU_SETTINGS_VERSION=2 -DNRF_SD_BLE_API_VERSION=7
-D__STACK_SIZE=1024 -D__HEAP_SIZE=1024 -DARM_MATH_CM4
-DSOFTDEVICE_PRESENT -DUSE_APP_CONFIG
)
set(COMMON_COMPILE_INC
${ARM_TOOLCHAIN_DIR}/../arm-none-eabi/include
${CMAKE_SOURCE_DIR}/app/inc
${NRF_SDK_DIR}/components/ble/ble_db_discovery
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis_c
${NRF_SDK_DIR}/components/ble/common/
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt
${NRF_SDK_DIR}/components/ble/nrf_ble_gq
${NRF_SDK_DIR}/components/ble/nrf_ble_scan
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu
${NRF_SDK_DIR}/components/ble/ble_advertising
${NRF_SDK_DIR}/components/ble/peer_manager
${NRF_SDK_DIR}/components/libraries/atomic
${NRF_SDK_DIR}/components/libraries/atomic_flags
${NRF_SDK_DIR}/components/libraries/balloc
${NRF_SDK_DIR}/components/libraries/delay
${NRF_SDK_DIR}/components/libraries/experimental_section_vars
${NRF_SDK_DIR}/components/libraries/memobj
${NRF_SDK_DIR}/components/libraries/queue
${NRF_SDK_DIR}/components/libraries/ringbuf
${NRF_SDK_DIR}/components/libraries/strerror
${NRF_SDK_DIR}/components/libraries/util
${NRF_SDK_DIR}/components/libraries/block_dev
${NRF_SDK_DIR}/components/libraries/bootloader
${NRF_SDK_DIR}/components/libraries/bootloader/ble_dfu
${NRF_SDK_DIR}/components/libraries/bootloader/dfu
${NRF_SDK_DIR}/components/libraries/pwr_mgmt
${NRF_SDK_DIR}/components/libraries/usbd
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger
${NRF_SDK_DIR}/components/libraries/atomic_fifo
${NRF_SDK_DIR}/components/libraries/svc
${NRF_SDK_DIR}/components/libraries/mutex
${NRF_SDK_DIR}/components/softdevice/common
${NRF_SDK_DIR}/components/softdevice/mbr/headers
${NRF_SDK_DIR}/components/softdevice/s140/headers
${NRF_SDK_DIR}/components/toolchain/cmsis/include
${NRF_SDK_DIR}/modules/nrfx
${NRF_SDK_DIR}/modules/nrfx/hal
${NRF_SDK_DIR}/modules/nrfx/mdk
${NRF_SDK_DIR}/modules/nrfx/drivers/include
${NRF_SDK_DIR}/external/fprintf
${NRF_SDK_DIR}/external/segger_rtt
${NRF_SDK_DIR}/external/utf_converter
${NRF_SDK_DIR}/integration/nrfx
${NRF_SDK_DIR}/integration/nrfx/legacy
)
# ==========================
# Configuration Interface
# ==========================
add_library(prj_config INTERFACE)
target_include_directories(prj_config INTERFACE ${COMMON_COMPILE_INC})
target_compile_definitions(prj_config INTERFACE ${COMMON_COMPILE_DEF})
target_compile_options(prj_config INTERFACE ${COMMON_COMPILE_OPT})
# ==========================
# Subdirectories
# ==========================
include(cmake/littlefs.cmake)
include(cmake/freertos.cmake)
include(cmake/nrf_log.cmake)
# ==========================
# Source Files
# ==========================
set(STARTUP_SRC
${NRF_SDK_DIR}/modules/nrfx/mdk/gcc_startup_nrf52840.S
${NRF_SDK_DIR}/modules/nrfx/mdk/system_nrf52.c
)
set(UTILS_SRC
${NRF_SDK_DIR}/components/libraries/util/nrf_assert.c
${NRF_SDK_DIR}/components/libraries/util/app_error.c
${NRF_SDK_DIR}/components/libraries/util/app_error_handler_gcc.c
${NRF_SDK_DIR}/components/libraries/util/app_error_weak.c
${NRF_SDK_DIR}/components/libraries/util/app_util_platform.c
${NRF_SDK_DIR}/components/libraries/strerror/nrf_strerror.c
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
set(ATOMIC_SRC
${NRF_SDK_DIR}/components/libraries/atomic/nrf_atomic.c
${NRF_SDK_DIR}/components/libraries/atomic_fifo/nrf_atfifo.c
${NRF_SDK_DIR}/components/libraries/atomic_flags/nrf_atflags.c
${NRF_SDK_DIR}/components/libraries/memobj/nrf_memobj.c
${NRF_SDK_DIR}/components/libraries/balloc/nrf_balloc.c
${NRF_SDK_DIR}/components/libraries/ringbuf/nrf_ringbuf.c
)
set(USBD_SRC
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_core.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_serial_num.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_string_desc.c
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm/app_usbd_cdc_acm.c
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger/app_usbd_nrf_dfu_trigger.c
)
set(SOFTDEVICE_SRC
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_freertos.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_ble.c
)
set(BLE_SRC
${NRF_SDK_DIR}/components/ble/common/ble_advdata.c
${NRF_SDK_DIR}/components/ble/common/ble_conn_state.c
${NRF_SDK_DIR}/components/ble/common/ble_srv_common.c
${NRF_SDK_DIR}/components/ble/ble_advertising/ble_advertising.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis/ble_dis.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu_unbonded.c
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt/nrf_ble_gatt.c
)
set(PRINTF_SRC
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf.c
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf_format.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT_printf.c
)
set(NRFX_DRIVERS_SRC
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_clock.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_power.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_usbd.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_gpiote.c
${NRF_SDK_DIR}/modules/nrfx/soc/nrfx_atomic.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_spim.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_twim.c
)
set(NRFX_LEGACY_SRC
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_clock.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_power.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_spi.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_twi.c
)
set(EXPERIMENTAL_SRC
${NRF_SDK_DIR}/components/libraries/experimental_section_vars/nrf_section_iter.c
)
file(GLOB_RECURSE APP_SOURCES "app/*.c")
# ==========================
# Executable and Linker
# ==========================
add_executable(${EXECUTABLE}
$<TARGET_OBJECTS:lfs>
$<TARGET_OBJECTS:freertos>
$<TARGET_OBJECTS:nrf_log>
${APP_SOURCES}
${STARTUP_SRC}
${UTILS_SRC}
${ATOMIC_SRC}
${USBD_SRC}
${SOFTDEVICE_SRC}
${BLE_SRC}
${PRINTF_SRC}
${NRFX_DRIVERS_SRC}
${NRFX_LEGACY_SRC}
${EXPERIMENTAL_SRC}
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
target_link_options(${EXECUTABLE} PRIVATE
-T${LINKER_FILE}
-L${LINKER_DIR}
-L${SD_LINKER_DIR}
-L${NRF_SDK_LINKER_DIR}
-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
--specs=nano.specs --specs=nosys.specs -u _printf_float
-lc -lm
-Wl,-Map=${PROJECT_NAME}.map,--cref
-Wl,--gc-sections
-Xlinker -print-memory-usage -Xlinker
)
target_link_libraries(${EXECUTABLE} PRIVATE
prj_config
lfs
freertos
nrf_log
m
c
)
# Optional: Print executable size as part of the post build process
add_custom_command(TARGET ${EXECUTABLE}
POST_BUILD
COMMAND ${CMAKE_SIZE} ${EXECUTABLE})
string(TIMESTAMP BUILD_TIMESTAMP "%Y%m%d%H%M")
set(OTA_ZIP_NAME "ota_${PROJECT_NAME}_${BUILD_TIMESTAMP}.zip")
# Optional: Create hex, bin and S-Record files after the build
add_custom_command(TARGET ${EXECUTABLE}
POST_BUILD
COMMAND ${CMAKE_OBJCOPY} -O srec --srec-len=64 ${EXECUTABLE} ${PROJECT_NAME}.s19
COMMAND ${CMAKE_OBJCOPY} -O ihex ${EXECUTABLE} ${PROJECT_NAME}.hex
COMMAND ${CMAKE_OBJCOPY} -O binary ${EXECUTABLE} ${PROJECT_NAME}.bin
COMMAND nrfutil nrf5sdk-tools pkg generate
--hw-version 52
--sd-req 0x100
--application-version 0
--application ${PROJECT_NAME}.hex
--key-file ${CMAKE_SOURCE_DIR}/private.pem
${OTA_ZIP_NAME}
COMMAND ${CMAKE_COMMAND} -E make_directory "${CMAKE_SOURCE_DIR}/output"
COMMAND ${CMAKE_COMMAND} -E rename "${OTA_ZIP_NAME}" "${CMAKE_SOURCE_DIR}/output/${OTA_ZIP_NAME}"
)
-59
View File
@@ -1,59 +0,0 @@
{
"version": 3,
"configurePresets": [
{
"name": "default",
"hidden": true,
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"cacheVariables": {
}
},
{
"name": "Debug",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug"
}
},
{
"name": "RelWithDebInfo",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "RelWithDebInfo"
}
},
{
"name": "Release",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release"
}
},
{
"name": "MinSizeRel",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "MinSizeRel"
}
}
],
"buildPresets": [
{
"name": "Debug",
"configurePreset": "Debug"
},
{
"name": "RelWithDebInfo",
"configurePreset": "RelWithDebInfo"
},
{
"name": "Release",
"configurePreset": "Release"
},
{
"name": "MinSizeRel",
"configurePreset": "MinSizeRel"
}
]
}
@@ -62,7 +62,7 @@
#define configTICK_RATE_HZ 1024
#define configMAX_PRIORITIES (6)
#define configMINIMAL_STACK_SIZE (192)
#define configTOTAL_HEAP_SIZE (48 * 1024)
#define configTOTAL_HEAP_SIZE (32 * 1024)
#define configMAX_TASK_NAME_LEN (16)
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
+3 -13
View File
@@ -1,17 +1,16 @@
#include "adc_drv.h"
#if (DEF_ADC_DRV_ENABLED && DEF_ADS8691_ENABLED)
#if (DEF_ADS8691_ENABLED)
#include "ads8691.h"
extern const adc_drv_if_t ads8691;
static const adc_drv_if_t *p_inst = &ads8691;
#elif (DEF_ADC_DRV_ENABLED && DEF_BULTIN_ADC_ENABED)
#else
#include "builtin_saadc.h"
static const adc_drv_if_t *p_inst = &builtin_saadc;
#endif
#if (DEF_ADC_DRV_ENABLED)
#include <stdlib.h>
int adc_init(void)
{
if (p_inst == NULL)
@@ -84,13 +83,4 @@ int adc_read_milivolt(uint32_t channel, float *mv)
return p_inst->read_milivolt(channel, mv);
}
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
{
if (p_inst == NULL)
{
return ADC_DRV_ERROR;
}
return p_inst->adc_convert_multiple_milivolt(p_val_14bit, p_val_f, count);
}
#endif /* ! DEF_ADC_DRV_ENABLED */
+47
View File
@@ -0,0 +1,47 @@
#ifndef __ADC_DRV_H__
#define __ADC_DRV_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "app_config.h"
#include "adc_drv_if.h"
#define ADC_DRV_ERROR (-1)
#define ADC_DRV_SUCCESS (0)
#define AIN0 0
#define AIN1 1
#define AIN2 2
#define AIN3 3
#define AIN4 4
#define AIN5 5
#define AIN6 6
#define AIN7 7
#if (DEF_ADC_DRV_ENABLED)
int adc_init(void);
int adc_reset(void);
int adc_gain(adc_gain_t gain);
int adc_read(uint32_t channel, int32_t *adc_val);
int adc_read_milivolt(uint32_t channel, float *mv);
int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
#else
#define adc_init()
#define adc_reset()
#define adc_gain(x)
#define adc_read(x, y)
#define adc_read_milivolt(x, y)
#define adc_read_mutiple_channels(x, y, z)
#define adc_read_mutiple_channels_ex(x, y, z, a)
#define adc_read_multiple_milivolt_ex(x, y, z, a)
#endif /* ! DEF_ADC_DRV_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_H__ */
+47
View File
@@ -0,0 +1,47 @@
#ifndef __ADC_DRV_IF_H__
#define __ADC_DRV_IF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#define ADC0 (0x01 << 0)
#define ADC1 (0x01 << 1)
#define ADC2 (0x01 << 2)
#define ADC3 (0x01 << 3)
typedef enum
{
GAIN_0P625,
GAIN_1P000,
GAIN_1P200,
GAIN_1P250,
GAIN_1P500,
GAIN_2P000,
GAIN_2P500,
GAIN_3P000,
GAIN_6P000,
GAIN_12P000,
GAIN_24P000,
} adc_gain_t;
typedef struct
{
int (*init)(void);
int (*reset)(void);
int (*read)(uint32_t channel, int32_t *adc_val);
int (*read_milivolt)(uint32_t channel, float *p_val);
int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void (*preliminary_action));
int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
int (*gain)(adc_gain_t gain);
} adc_drv_if_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_IF_H__ */
View File
View File
+12 -15
View File
@@ -1,9 +1,4 @@
#include "app_config.h"
#include "ads8691.h"
#if (DEF_ADS8691_ENABLED)
#include "elite_board.h"
#include "nrf_delay.h"
@@ -13,6 +8,8 @@
#include <string.h>
#if (DEF_ADS8691_ENABLED)
/*
* ADS8691
* Features:
@@ -167,11 +164,11 @@ uint32_t read_dev_id(void)
return read_hword();
}
// static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
// {
// write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
// return 0;
// }
static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
{
write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
return 0;
}
static int read_dataout_ctrl(dataout_ctl_t *dataout_ctl)
{
@@ -217,7 +214,7 @@ static double adc_convert_volt(uint16_t range_sel, int32_t val_18bit)
#define FSR_VREF_P_1P500 6.144
#define FSR_VREF_P_1P250 5.12
double volt = 0;
double volt;
if (range_sel == VREF_NP_3P000)
volt = (double)val_18bit * LSB_VREF_NP_3P000 / 1000000 - FSR_VREF_NP_3P000 / 2;
@@ -329,10 +326,10 @@ static int ads8691_init(void)
}
const adc_drv_if_t ads8691 = {
.init = ads8691_init,
.reset = ads8691_reset,
.read = ads8691_read,
.gain = ads8691_gain,
.init = ads8691_init,
.reset = ads8691_reset,
.read = ads8691_read,
.gain = ads8691_gain,
.read_milivolt = ads8691_read_milivolt,
};
View File
+7 -4
View File
@@ -1,13 +1,16 @@
#include "app_config.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include "nrf_spim.h"
#if (DEF_APA102_2020_ENABLED)
#include "apa102_2020.h"
#include "elite_board.h"
#include "FreeRTOS.h"
#include "task.h"
#if (DEF_APA102_2020_ENABLED)
#define DISP_LED_COLOR 0
typedef struct
{
uint8_t brightness : 5;
+4 -5
View File
@@ -2,17 +2,16 @@
#define __APA102_2020_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include "app_config.h"
#include "elite_board.h"
#include "led_drv_if.h"
#if (DEF_APA102_2020_ENABLED)
#include "led_drv_if.h"
extern const led_drv_if_t apa102_drv;
extern const led_drv_if_t apa102_drv;
#endif /* ! DEF_APA102_2020_ENABLED */
-39
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#ifndef __ADC_DRV_H__
#define __ADC_DRV_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "adc_drv_if.h"
#if (DEF_ADC_DRV_ENABLED)
int adc_init(void);
int adc_reset(void);
int adc_gain(adc_gain_t gain);
int adc_read(uint32_t channel, int32_t *adc_val);
int adc_read_milivolt(uint32_t channel, float *mv);
int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
#else
#define adc_init()
#define adc_reset()
#define adc_gain(x)
#define adc_read(x, y)
#define adc_read_milivolt(x, y)
#define adc_read_mutiple_channels(x, y, z)
#define adc_read_mutiple_channels_ex(x, y, z, a)
#define adc_read_multiple_milivolt_ex(x, y, z, a)
#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
#endif /* ! DEF_ADC_DRV_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_H__ */
-46
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#ifndef __ADC_DRV_IF_H__
#define __ADC_DRV_IF_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#define ADC_DRV_ERROR (-1)
#define ADC_DRV_SUCCESS (0)
typedef enum
{
GAIN_0P625,
GAIN_1P000,
GAIN_1P200,
GAIN_1P250,
GAIN_1P500,
GAIN_2P000,
GAIN_2P500,
GAIN_3P000,
GAIN_6P000,
GAIN_12P000,
GAIN_24P000,
} adc_gain_t;
typedef struct
{
int (*init)(void);
int (*reset)(void);
int (*read)(uint32_t channel, int32_t *adc_val);
int (*read_milivolt)(uint32_t channel, float *p_val);
int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void(*preliminary_action));
int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
int (*gain)(adc_gain_t gain);
int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
} adc_drv_if_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_IF_H__ */
-32
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#ifndef __ELITE_H__
#define __ELITE_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "app_error.h"
void elite_init(void);
void elite_instr_send(void *p, size_t size);
ret_code_t le_data_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait);
typedef struct
{
void (*cis_func[256])(uint8_t *ins, uint16_t size);
void (*vis_func[256])(uint8_t *ins, uint16_t size);
void (*ris_func[256])(uint8_t *ins, uint16_t size);
} elite_instance_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_H__ */
-25
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#ifndef __CPG_H__
#define __CPG_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 4
#define VERSION_DATE_DAY 9
#define VERSION_DATE_HOUR 14
#define VERSION_DATE_MINUTE 45
const elite_instance_t *cpg_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG_H__ */
-98
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#ifndef __CPG10_IO_H__
#define __CPG10_IO_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define UNDEF_GPIO 0xFFFFFFFF
#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
#define VA1L_PIN NRF_GPIO_PIN_MAP(0, 25)
#define VB1H_PIN NRF_GPIO_PIN_MAP(0, 19)
#define VB1L_PIN NRF_GPIO_PIN_MAP(0, 21)
#define VA2H_PIN NRF_GPIO_PIN_MAP(0, 17)
#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
#define ADPT_CLK_PIN NRF_GPIO_PIN_MAP(0, 11)
#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define VB2H_PIN NRF_GPIO_PIN_MAP(0, 8)
#define VB2L_PIN NRF_GPIO_PIN_MAP(0, 6)
#define VA3H_PIN NRF_GPIO_PIN_MAP(0, 5)
#define VA3L_PIN NRF_GPIO_PIN_MAP(0, 27)
#define VB3H_PIN NRF_GPIO_PIN_MAP(0, 26)
#define VB3L_PIN NRF_GPIO_PIN_MAP(0, 4)
#define VA4H_PIN NRF_GPIO_PIN_MAP(0, 1)
#define VA4L_PIN NRF_GPIO_PIN_MAP(0, 0)
#define ADPT_LE_PIN NRF_GPIO_PIN_MAP(0, 31)
#define ADPT_CLR_PIN NRF_GPIO_PIN_MAP(1, 15)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 2)
#define AIN0_PIN NRF_GPIO_PIN_MAP(0, 30)
#define AIN1_PIN NRF_GPIO_PIN_MAP(0, 28)
#define ADPT0_S4_PIN NRF_GPIO_PIN_MAP(1, 12)
#define ADPT0_S3_PIN NRF_GPIO_PIN_MAP(1, 14)
#define ADPT0_S2_PIN NRF_GPIO_PIN_MAP(0, 3)
#define ADPT0_S1_PIN NRF_GPIO_PIN_MAP(1, 13)
#define ADPT1_S4_PIN NRF_GPIO_PIN_MAP(1, 3)
#define ADPT1_S3_PIN NRF_GPIO_PIN_MAP(1, 10)
#define ADPT1_S2_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ADPT1_S1_PIN NRF_GPIO_PIN_MAP(1, 11)
#define LED_R_PIN NRF_GPIO_PIN_MAP(0, 10)
#define LED_G_PIN NRF_GPIO_PIN_MAP(0, 9)
#define LED_B_PIN NRF_GPIO_PIN_MAP(1, 2)
#define VB4H_PIN NRF_GPIO_PIN_MAP(0, 24)
#define VB4L_PIN NRF_GPIO_PIN_MAP(0, 23)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define TW_SDI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define ADPT_DIN_PIN NRF_GPIO_PIN_MAP(0, 7)
#define UNCONNECTED_PIN NRF_GPIO_PIN_MAP(0, 2)
#define PULSE_ID_NULL 0
#define PULSE_ID_A 1
#define PULSE_ID_B 2
#define PULSE_ID_C 3
#define PULSE_ID_D 4
typedef struct
{
uint32_t VAxH;
uint32_t VAxL;
uint32_t VBxH;
uint32_t VBxL;
uint32_t idle_us; // min: 500us, max: 60sec
uint32_t point_us[7]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t pulse_id; // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
} pulse_gen_t;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void cpg11_io_init(void);
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
void cpg11_pulse_stop(uint32_t hw_idx);
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG10_IO_H__ */
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#ifndef __EDC_H__
#define __EDC_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "dac_drv.h"
#include "elite.h"
#include <stdbool.h>
#include <stdint.h>
typedef struct
{
void (*init)(void);
elite_instance_t *p_elite_instance;
} edc20_t;
typedef struct
{
struct
{
float coeff;
float offset;
} dac_c;
struct
{
float coeff;
float offset;
float Voffset;
} dac_f[3];
} edc20_dac_cal_data_t;
extern edc20_t edc;
#endif
#ifdef __cplusplus
}
#endif
#endif /* ! __EDC_H__ */
-18
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#ifndef __ELITE_MMM_H__
#define __ELITE_MMM_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
const elite_instance_t *mmm_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_MMM_H__ */
-70
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#ifndef __ELITE_PEL_V2_0_H__
#define __ELITE_PEL_V2_0_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 29
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 24
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
#define PEL_2P0R_MASK (0x01 << 2)
#define PEL_4P0R_MASK (0x01 << 3)
#define PEL_8P0R_MASK (0x01 << 4)
#define PEL_16P2R_MASK (0x01 << 5)
#define PEL_32P4R_MASK (0x01 << 6)
#define PEL_63P4R_MASK (0x01 << 7)
#define PEL_127R_MASK (0x01 << 8)
#define PEL_255R_MASK (0x01 << 9)
#define PEL_511R_MASK (0x01 << 10)
#define PEL_1000R_MASK (0x01 << 11)
typedef struct __PACKED
{
uint16_t mem_board_id;
uint16_t packet_seq;
uint32_t notify_time;
int32_t raw_output_r1;
int32_t raw_output_r2;
int32_t raw_output_vo;
int32_t raw_output_vc;
int32_t raw_output_ve;
float output_r1_mv;
float output_r2_mv;
float output_vo_mv;
float output_vc_mv;
float output_ve_mv;
float hold_r1_v;
float hold_r2_v;
float hold_out_v;
float hold_vcc_v;
float hold_vee_v;
float current;
uint16_t resis_pattern_id;
uint16_t resis_bitsmask;
float resis_g_value;
uint32_t mode_complete : 4;
uint32_t rsvd : 28;
uint32_t payload[9];
} scan_mode_notify_packet_t;
const elite_instance_t *pel_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_PEL_V2_0_H__ */
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#ifndef __PEL_V3_0_H__
#define __PEL_V3_0_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 28
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 46
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
#define PEL_2P0R_MASK (0x01 << 2)
#define PEL_4P0R_MASK (0x01 << 3)
#define PEL_8P0R_MASK (0x01 << 4)
#define PEL_16P2R_MASK (0x01 << 5)
#define PEL_32P4R_MASK (0x01 << 6)
#define PEL_63P4R_MASK (0x01 << 7)
#define PEL_127R_MASK (0x01 << 8)
#define PEL_255R_MASK (0x01 << 9)
#define PEL_511R_MASK (0x01 << 10)
#define PEL_1000R_MASK (0x01 << 11)
typedef struct __PACKED
{
uint16_t mem_board_id;
uint16_t packet_seq;
uint32_t notify_time;
int32_t raw_acs37030_vref;
int32_t raw_i_out;
int32_t raw_output_vo;
int32_t raw_output_vc;
int32_t raw_output_ve;
float acs37030_vref_mv;
float i_out_mv;
float output_vo_mv;
float output_vc_mv;
float output_ve_mv;
float acs37030_vref_v;
float hold_acs37030_out_v;
float hold_out_v;
float hold_vcc_v;
float hold_vee_v;
float acs37030_current_a;
uint16_t resis_pattern_id;
uint16_t resis_bitsmask;
float resis_g_value;
uint32_t mode_complete : 4;
uint32_t rsvd : 28;
uint32_t payload[9];
} scan_mode_notify_packet_t;
const elite_instance_t *pel_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL_V3_0_H__ */
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#ifndef __PEL_V3_0_IO_H__
#define __PEL_V3_0_IO_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_saadc.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#define INPUT_1_PIN NRF_GPIO_PIN_MAP(0, 15)
#define INPUT_2_PIN NRF_GPIO_PIN_MAP(0, 13)
#define INPUT_3_PIN NRF_GPIO_PIN_MAP(0, 20)
#define INPUT_4_PIN NRF_GPIO_PIN_MAP(1, 0)
#define INPUT_5_PIN NRF_GPIO_PIN_MAP(0, 25)
#define INPUT_6_PIN NRF_GPIO_PIN_MAP(0, 11)
#define INPUT_7_PIN NRF_GPIO_PIN_MAP(0, 14)
#define INPUT_8_PIN NRF_GPIO_PIN_MAP(0, 17)
#define INPUT_9_PIN NRF_GPIO_PIN_MAP(1, 8)
#define INPUT_10_PIN NRF_GPIO_PIN_MAP(0, 21)
#define INPUT_11_PIN NRF_GPIO_PIN_MAP(0, 19)
#define INPUT_12_PIN NRF_GPIO_PIN_MAP(0, 22)
#define RESET_PIN NRF_GPIO_PIN_MAP(0, 18)
#define TP1_PIN NRF_GPIO_PIN_MAP(0, 5)
#define TP2_PIN NRF_GPIO_PIN_MAP(0, 26)
#define SAMPLE_I_PIN NRF_GPIO_PIN_MAP(1, 11)
#define SAMPLE_V_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 7)
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 8)
#define HOT_SWAP_1_PIN NRF_GPIO_PIN_MAP(0, 1)
#define HOT_SWAP_SIGNAL_PIN NRF_GPIO_PIN_MAP(0, 0)
#define INA_HI_PIN NRF_GPIO_PIN_MAP(1, 12)
#define WP_MEM_PIN NRF_GPIO_PIN_MAP(0, 12)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 6)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 27)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 4)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define LED_IOPL_PIN NRF_GPIO_PIN_MAP(0, 24) // pin60
#define LED_IOPH_PIN NRF_GPIO_PIN_MAP(0, 16) // pin62
#define LED_R_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 13) \
}
#define LED_G_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 3) \
}
#define LED_B_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 10) \
}
#define OUTPUT_ACS37030_VREF_CHANNEL 7
#define OUTPUT_I_OUT_CHANNEL 4
#define OUTPUT_VO_CHANNEL 5
#define OUTPUT_VC_CHANNEL 0
#define OUTPUT_VE_CHANNEL 1
#define OUTPUT_ACS37030_REF_IDX 0
#define OUTPUT_I_OUT_IDX 1
#define OUTPUT_VO_IDX 2
#define OUTPUT_VC_IDX 3
#define OUTPUT_VE_IDX 4
typedef struct
{
uint32_t anode_pin;
uint32_t ina_hi_pin;
uint32_t smaple_i_pin;
uint32_t sample_v_pin;
uint32_t test_pin;
uint32_t point_us[5]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t mode; // 0: IOPL mode, 1: IOPH mode
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
int32_t adc_timing_shift;
void (*convt_new_arrival_cb)(void);
} pel_config_t;
typedef struct
{
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
uint32_t channels[5];
int16_t results[5];
float results_f[5];
void (*convt_new_arrival_cb)(void);
} pel_adc_t;
typedef struct
{
NRF_TIMER_Type *pulse_tmr;
uint32_t pulse_irq_n;
uint32_t pulse_cnt;
uint32_t pulse_is_running;
pel_adc_t adc;
} pel_hw_t;
extern pel_hw_t pel_hw;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void pel30_io_init(void);
void pel_pulse_gen_init(pel_config_t cfg);
void pel_pulse_gen_start(void);
void pel_pulse_gen_stop(void);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL_V3_0_IO_H__ */
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#ifndef __LE_UART_SRV_H__
#define __LE_UART_SRV_H__
#include "app_config.h"
#include "sdk_errors.h"
#define OPCODE_LENGTH 1
#define HANDLE_LENGTH 2
/**@brief Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
#if defined(NRF_SDH_BLE_GATT_MAX_MTU_SIZE) && (NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 0)
#define BLE_UART_MAX_DATA_LEN (NRF_SDH_BLE_GATT_MAX_MTU_SIZE - OPCODE_LENGTH - HANDLE_LENGTH)
#else
#define BLE_UART_MAX_DATA_LEN (BLE_GATT_MTU_SIZE_DEFAULT - OPCODE_LENGTH - HANDLE_LENGTH)
#warning NRF_SDH_BLE_GATT_MAX_MTU_SIZE is not defined.
#endif
void le_uart_srv_init(void);
ret_code_t le_uart_notify(uint8_t * p_value, uint16_t len);
#endif // !__LE_UART_SRV_H__
-26
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#ifndef __LED_RGB_H__
#define __LED_RGB_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "led_drv_if.h"
#if (DEF_RGB_ENABLED)
#if !(defined(LED_R_PINS) && defined(LED_G_PINS) && defined(LED_B_PINS))
#error "LED_R_PINS, LED_G_PINS and LED_B_PINS must all be defined"
#endif
extern const led_drv_if_t led_rgb_drv;
#endif /* ! DEF_RGB_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __LED_RGB_H__ */
-29
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#pragma once
#ifndef __UART_DRV_H__
#define __UART_DRV_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "sdk_errors.h"
#if (DEF_UARTE_ENABLED)
void uart_init(void);
int uart_send(void *p_data, uint32_t size);
int uart_recv(void *p_data, uint32_t max_size);
ret_code_t uart_set_baud(uint32_t baudrate);
#else
#define uart_init()
#define uart_send(...) ;
#define uart_recv(...) ;
#define uart_set_baud(...)
#endif /* ! DEF_UARTE_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __UART_DRV_H__ */
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#ifndef __USBD_H__
#define __USBD_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "app_config.h"
#if (DEF_USBD_ENABLED)
void usbd_init(void);
int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout);
int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout);
#else
#define usbd_init()
#define usbd_ser_write(...);
#define usbd_ser_read(...);
#endif /* ! DEF_FS_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __USBD_H__ */
-74
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/**
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef USBD_DFU_TRIGGER_H
#define USBD_DFU_TRIGGER_H
#include "sdk_errors.h"
/**
* @defgroup nrf_dfu_trigger_usb USB DFU trigger library
* @ingroup app_common
*
* @brief @tagAPI52840 USB DFU trigger library is used to enter the bootloader and read the firmware version.
*
* @details See @ref lib_dfu_trigger_usb for additional documentation.
* @{
*/
/**
* @brief Function for initializing the USB DFU trigger library.
*
* @note If the USB is also used for other purposes, then this function must be called after USB is
* initialized but before it is enabled. In this case, the configuration flag @ref
* NRF_DFU_TRIGGER_USB_USB_SHARED must be set to 1.
*
* @note Calling this again after the first success has no effect and returns @ref NRF_SUCCESS.
*
* @note If @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE is on (1), USB events must be handled manually.
* See @ref app_usbd_event_queue_process.
*
* @retval NRF_SUCCESS On successful initialization.
* @return An error code on failure, for example if called at a wrong time.
*/
ret_code_t nrf_dfu_trigger_usb_init(void);
/** @} */
#endif //NRF_DFU_TRIGGER_USB_H
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#include "app_config.h"
#include "elite_mmm_v1_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#include "nrf_gpio.h"
#include "nrf_log.h"
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 6
#define VERSION_DATE_DAY 4
#define VERSION_DATE_HOUR 16
#define VERSION_DATE_MINUTE 44
static void cis_version(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t cis_ver[] = {
CIS_VERSION,
VERSION_DATE_YEAR,
VERSION_DATE_MONTH,
VERSION_DATE_DAY,
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
static void vis_rst(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
}
#define UNDEF_GPIO 0xFFFFFFFF
// The GPIO corresponding to the pin
const uint32_t pin_to_gpio_table[] = {
[6] = NRF_GPIO_PIN_MAP(0, 22),
[8] = NRF_GPIO_PIN_MAP(0, 25),
[9] = NRF_GPIO_PIN_MAP(0, 19),
[10] = NRF_GPIO_PIN_MAP(0, 21),
[11] = NRF_GPIO_PIN_MAP(1, 00),
[12] = NRF_GPIO_PIN_MAP(0, 18),
[13] = NRF_GPIO_PIN_MAP(0, 17),
[14] = NRF_GPIO_PIN_MAP(0, 20),
[16] = NRF_GPIO_PIN_MAP(0, 14),
[17] = NRF_GPIO_PIN_MAP(0, 13),
[18] = NRF_GPIO_PIN_MAP(0, 11),
[20] = NRF_GPIO_PIN_MAP(0, 15),
[25] = NRF_GPIO_PIN_MAP(1, 8),
[26] = NRF_GPIO_PIN_MAP(0, 12),
[27] = NRF_GPIO_PIN_MAP(0, 7),
[28] = NRF_GPIO_PIN_MAP(1, 9),
[29] = NRF_GPIO_PIN_MAP(0, 8),
[30] = NRF_GPIO_PIN_MAP(0, 6),
[31] = NRF_GPIO_PIN_MAP(0, 5),
[32] = NRF_GPIO_PIN_MAP(0, 27),
[33] = NRF_GPIO_PIN_MAP(0, 26),
[34] = NRF_GPIO_PIN_MAP(0, 4),
[36] = NRF_GPIO_PIN_MAP(0, 1),
[37] = NRF_GPIO_PIN_MAP(0, 29),
[38] = NRF_GPIO_PIN_MAP(0, 0),
[39] = NRF_GPIO_PIN_MAP(0, 31),
[40] = NRF_GPIO_PIN_MAP(1, 15),
[41] = NRF_GPIO_PIN_MAP(0, 2),
[42] = NRF_GPIO_PIN_MAP(0, 30),
[43] = NRF_GPIO_PIN_MAP(0, 28),
[44] = NRF_GPIO_PIN_MAP(1, 12),
[45] = NRF_GPIO_PIN_MAP(1, 14),
[46] = NRF_GPIO_PIN_MAP(0, 3),
[47] = NRF_GPIO_PIN_MAP(1, 13),
[48] = NRF_GPIO_PIN_MAP(1, 3),
[49] = NRF_GPIO_PIN_MAP(1, 10),
[50] = NRF_GPIO_PIN_MAP(1, 6),
[51] = NRF_GPIO_PIN_MAP(1, 11),
[52] = NRF_GPIO_PIN_MAP(0, 10),
[53] = NRF_GPIO_PIN_MAP(0, 9),
[59] = NRF_GPIO_PIN_MAP(1, 2),
[60] = NRF_GPIO_PIN_MAP(0, 24),
[61] = NRF_GPIO_PIN_MAP(0, 23),
[62] = NRF_GPIO_PIN_MAP(0, 16),
};
static uint32_t bmd380pins_convert_to_gpio(uint32_t pin)
{
uint32_t gpio;
switch (pin)
{
case 6:
case 8:
case 9:
case 10:
case 11:
case 12:
case 13:
case 14:
case 16:
case 17:
case 18:
case 20:
case 25:
case 26:
case 27:
case 28:
case 29:
case 30:
case 31:
case 32:
case 33:
case 34:
case 36:
case 37:
case 38:
case 39:
case 40:
case 41:
case 42:
case 43:
case 44:
case 45:
case 46:
case 47:
case 48:
case 49:
case 50:
case 51:
case 52:
case 53:
case 59:
case 60:
case 61:
case 62:
gpio = pin_to_gpio_table[pin];
break;
default:
gpio = UNDEF_GPIO;
NRF_LOG_INFO("UNDEF_GPIO: pin %d can't convert to gpio number", pin);
break;
}
return gpio;
}
static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low)
{
uint32_t gpio = bmd380pins_convert_to_gpio(pin);
if (gpio != UNDEF_GPIO)
{
nrf_gpio_cfg_output(gpio);
nrf_gpio_pin_write(gpio, high_low);
NRF_LOG_INFO("set pin %d (gpio %d) = %d", pin, gpio, high_low);
}
}
/*
dev_mode_gpio_function
(1)0x3000FFA000ppss
-func: set_bmd380_pin_signal
-pp: pin number 06h-3Fh
06h: P0.22_GPIO
08h: P0.25_GPIO
......
3Eh: P0.16_GPIO
-ss: signal 00h-01h
00h: low
01h: high
(2)0x3000FFA001ss
-func: set_bmd380 all pin signal high/low
-ss: signal 00h-01h
00h: low
01h: high
*/
void dev_mode_gpio_function(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t dev_opcode;
uint8_t gpio_function_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->gpio_function_opcode)
{
case 0x00: {
uint32_t pin = p_ins->param[0];
uint32_t high_low = p_ins->param[1];
set_bmd380_pin_signal(pin, high_low);
break;
}
case 0x01: {
uint32_t high_low = p_ins->param[0];
uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
{
set_bmd380_pin_signal(set_pin[i], high_low);
}
break;
}
}
}
#define MAGIC_NUM 0xFF00
static void dev_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t opcode;
uint8_t param[];
} *p_ins = (void *)ins;
if (p_ins->magic != MAGIC_NUM)
{
return;
}
// TODO...
switch (p_ins->opcode)
{
case 0xA0:
dev_mode_gpio_function(ins);
break;
default:
break;
}
}
const elite_instance_t mmm_elite_instance = {
.cis_func = {
[CIS_VERSION] = cis_version,
},
.vis_func = {
[VIS_RST] = vis_rst,
},
.ris_func = {
[DEV_MODE] = dev_mode,
}
};
const elite_instance_t *mmm_init(void)
{
return &mmm_elite_instance;
}
#endif /* !DEF_ELITE_MODEL */
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#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "nrf_spim.h"
#include "nrf_timer.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
#include "SEGGER_RTT.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel_hw_t pel_hw = {
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
.adc.channels = {
[OUTPUT_R1_IDX] = OUTPUT_R1_CHANNEL,
[OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL },
.adc.gain = NRF_SAADC_GAIN1_6,
.adc.smaple_time = NRF_SAADC_ACQTIME_3US
};
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length)
{
__disable_irq();
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
switch (spi_mode)
{
default:
case NRF_SPIM_MODE_0:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_1:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_2:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_3:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
}
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
NRF_SPIM3->TXD.PTR = (uint32_t)p_tx_buffer;
NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
NRF_SPIM3->RXD.PTR = (uint32_t)p_rx_buf;
nrf_gpio_pin_clear(cs_pin);
NRF_SPIM3->EVENTS_END = 0;
NRF_SPIM3->TASKS_START = 1;
do {
} while (NRF_SPIM3->EVENTS_END == 0);
nrf_gpio_pin_set(cs_pin);
__enable_irq();
}
#define MIN_PULSE_WIDTH 2
#define MIN_PULSE_IDLE 2
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
NRF_SAADC->EVENTS_STOPPED = 0;
NRF_SAADC->TASKS_STOP = 1;
do {
} while (NRF_SAADC->EVENTS_STOPPED == 0);
/* disable ssadc */
NRF_SAADC->ENABLE = 0;
/*
ref: p.381, nrf52840_PS_v1.1.pdf
Note: Oversampling should only be used when a single input channel is enabled, as averaging is
performed over all enabled channels.
*/
NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
/* config analog inputs */
for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
{
if (i < COUNTOF(p_adc->channels))
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG =
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
(p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
(NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
(p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
(NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
(NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
}
else
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG = 0;
}
}
/* enable ssadc */
NRF_SAADC->INTENSET = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
NRF_SAADC->ENABLE = 1;
NRF_SAADC->RESULT.PTR = (uint32_t)p_adc->results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
}
void TIMER3_IRQHandler(void)
{
if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
{
pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
pel_hw.pulse_is_running = 1;
if (pel_hw.pulse_cnt)
{
pel_hw.pulse_cnt--;
}
}
}
void SAADC_IRQHandler(void)
{
if (NRF_SAADC->EVENTS_STARTED)
{
NRF_SAADC->EVENTS_STARTED = 0;
if (pel_hw.pulse_cnt == 0)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
}
return;
}
if (NRF_SAADC->EVENTS_END)
{
NRF_SAADC->EVENTS_END = 0;
NRF_SAADC->RESULT.PTR = (uint32_t)pel_hw.adc.results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
pel_hw.pulse_is_running = 0;
if (pel_hw.adc.convt_new_arrival_cb)
{
pel_hw.adc.convt_new_arrival_cb();
}
}
}
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
pel_hw.pulse_cnt = cfg.pulse_cnt;
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
for (int i = 0; i < 4; i++)
{
nrf_gpiote_task_disable(i);
}
// config gpiote task
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_r_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->CHENSET = (1 << (5));
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CHENSET = (1 << (6));
// enable gpio task
for (int i = 0; i < 3; i++)
{
nrf_gpiote_task_enable(i);
}
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
nrf_gpiote_task_enable(3);
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
pel_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
pel_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pel_hw.pulse_tmr->CC[0] = cfg.point_us[0] * 16;
pel_hw.pulse_tmr->CC[1] = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
pel_hw.pulse_tmr->CC[2] = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
pel_hw.pulse_tmr->CC[3] = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
pel_hw.pulse_tmr->CC[4] = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
pel_hw.pulse_tmr->CC[5] = pel_hw.pulse_tmr->CC[4];
pel_hw.pulse_tmr->SHORTS = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
pel_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE0_MASK;
sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(SAADC_IRQn);
sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
}
void pel_pulse_gen_start(void)
{
pel_hw.pulse_tmr->TASKS_START = 1;
}
void pel_pulse_gen_stop(void)
{
pel_hw.pulse_cnt = 0;
do {
} while (pel_hw.pulse_is_running == 1);
pel_hw.adc.convt_new_arrival_cb = NULL;
}
#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.smaple_r_pin = SAMPLE_R_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
.mode = BOARD_IOPx,
.point_us = {
10000,
3,
5,
2,
0,
},
.pulse_cnt = 0xFFFFFFFF,
.gain = NRF_SAADC_GAIN1_6,
.smaple_time = NRF_SAADC_ACQTIME_10US,
.adc_timing_shift = 0,
};
pel_pulse_gen_init(pel_cfg);
pel_pulse_gen_start();
for (;;)
{
static uint32_t i = 0;
vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
}
}
void pel_pulse_gen_demo(void)
{
}
#endif
void pel20_io_init(void)
{
// common gpio
const uint32_t config_output_and_set[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN
};
const uint32_t config_output_and_clear[] = {
TP1_PIN,
TP2_PIN,
SAMPLE_R_PIN,
SAMPLE_V_PIN,
};
for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
{
nrf_gpio_pin_set(config_output_and_set[i]);
nrf_gpio_cfg_output(config_output_and_set[i]);
}
for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
{
nrf_gpio_pin_clear(config_output_and_clear[i]);
nrf_gpio_cfg_output(config_output_and_clear[i]);
}
nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
// specific gpio
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_cfg_output(ANODE_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_cfg_output(ANODE_PIN);
}
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->ORC = 0x00000000;
NRF_SPIM3->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M32;
NRF_SPIM3->CSNPOL = SPIM_CSNPOL_CSNPOL_LOW;
NRF_SPIM3->IFTIMING.CSNDUR = 8;
NRF_SPIM3->PSEL.CSN = CS_MEM_PIN;
NRF_SPIM3->PSEL.SCK = SPIM_CLK_PIN;
NRF_SPIM3->PSEL.MOSI = SPIM_MOSI_PIN;
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
}
#endif
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-411
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@@ -1,411 +0,0 @@
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "nrf_spim.h"
#include "nrf_timer.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
#include "SEGGER_RTT.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
pel_hw_t pel_hw = {
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
.adc.channels = {
[OUTPUT_ACS37030_REF_IDX] = OUTPUT_ACS37030_VREF_CHANNEL,
[OUTPUT_I_OUT_IDX] = OUTPUT_I_OUT_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL },
.adc.gain = NRF_SAADC_GAIN1_6,
.adc.smaple_time = NRF_SAADC_ACQTIME_3US
};
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length)
{
__disable_irq();
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
switch (spi_mode)
{
default:
case NRF_SPIM_MODE_0:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_1:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_2:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_3:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
}
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
NRF_SPIM3->TXD.PTR = (uint32_t)p_tx_buffer;
NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
NRF_SPIM3->RXD.PTR = (uint32_t)p_rx_buf;
nrf_gpio_pin_clear(cs_pin);
NRF_SPIM3->EVENTS_END = 0;
NRF_SPIM3->TASKS_START = 1;
do {
} while (NRF_SPIM3->EVENTS_END == 0);
nrf_gpio_pin_set(cs_pin);
__enable_irq();
}
#define MIN_PULSE_WIDTH 2
#define MIN_PULSE_IDLE 2
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
NRF_SAADC->EVENTS_STOPPED = 0;
NRF_SAADC->TASKS_STOP = 1;
do {
} while (NRF_SAADC->EVENTS_STOPPED == 0);
/* disable ssadc */
NRF_SAADC->ENABLE = 0;
/*
ref: p.381, nrf52840_PS_v1.1.pdf
Note: Oversampling should only be used when a single input channel is enabled, as averaging is
performed over all enabled channels.
*/
NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
/* config analog inputs */
for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
{
if (i < COUNTOF(p_adc->channels))
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG =
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
(p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
(NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
(p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
(NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
(NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
}
else
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG = 0;
}
}
/* enable ssadc */
NRF_SAADC->INTENSET = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
NRF_SAADC->ENABLE = 1;
NRF_SAADC->RESULT.PTR = (uint32_t)p_adc->results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
}
void TIMER3_IRQHandler(void)
{
if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
{
pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
pel_hw.pulse_is_running = 1;
if (pel_hw.pulse_cnt)
{
pel_hw.pulse_cnt--;
}
}
}
void SAADC_IRQHandler(void)
{
if (NRF_SAADC->EVENTS_STARTED)
{
NRF_SAADC->EVENTS_STARTED = 0;
if (pel_hw.pulse_cnt == 0)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
}
return;
}
if (NRF_SAADC->EVENTS_END)
{
NRF_SAADC->EVENTS_END = 0;
NRF_SAADC->RESULT.PTR = (uint32_t)pel_hw.adc.results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
pel_hw.pulse_is_running = 0;
if (pel_hw.adc.convt_new_arrival_cb)
{
pel_hw.adc.convt_new_arrival_cb();
}
}
}
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
pel_hw.pulse_cnt = cfg.pulse_cnt;
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
for (int i = 0; i < 5; i++)
{
nrf_gpiote_task_disable(i);
}
// config gpiote task
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.ina_hi_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // ina_hi_pin
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // smaple_i_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // sample_v_pin
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->CHENSET = (1 << (5));
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CHENSET = (1 << (6));
// enable gpio task
for (int i = 0; i < 4; i++)
{
nrf_gpiote_task_enable(i);
}
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4]; // test_pin
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
nrf_gpiote_task_enable(4);
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
pel_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
pel_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pel_hw.pulse_tmr->CC[0] = cfg.point_us[0] * 16;
pel_hw.pulse_tmr->CC[1] = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
pel_hw.pulse_tmr->CC[2] = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
pel_hw.pulse_tmr->CC[3] = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
pel_hw.pulse_tmr->CC[4] = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
pel_hw.pulse_tmr->CC[5] = pel_hw.pulse_tmr->CC[4];
pel_hw.pulse_tmr->SHORTS = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
pel_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE0_MASK;
sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(SAADC_IRQn);
sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
}
void pel_pulse_gen_start(void)
{
pel_hw.pulse_tmr->TASKS_START = 1;
}
void pel_pulse_gen_stop(void)
{
pel_hw.pulse_cnt = 0;
do {
} while (pel_hw.pulse_is_running == 1);
pel_hw.adc.convt_new_arrival_cb = NULL;
}
#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.ina_hi_pin = INA_HI_PIN,
.smaple_i_pin = SAMPLE_I_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
.mode = BOARD_IOPx,
.point_us = {
10000,
3,
5,
2,
0,
},
.pulse_cnt = 0xFFFFFFFF,
.gain = NRF_SAADC_GAIN1_6,
.smaple_time = NRF_SAADC_ACQTIME_10US,
.adc_timing_shift = 0,
};
pel_pulse_gen_init(pel_cfg);
pel_pulse_gen_start();
for (;;)
{
static uint32_t i = 0;
vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
}
}
void pel_pulse_gen_demo(void)
{
}
#endif
void pel30_io_init(void)
{
const uint32_t config_output_and_set[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN
};
const uint32_t config_output_and_clear[] = {
TP1_PIN,
TP2_PIN,
SAMPLE_I_PIN,
SAMPLE_V_PIN,
HOT_SWAP_1_PIN
};
for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
{
nrf_gpio_pin_set(config_output_and_set[i]);
nrf_gpio_cfg_output(config_output_and_set[i]);
}
for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
{
nrf_gpio_pin_clear(config_output_and_clear[i]);
nrf_gpio_cfg_output(config_output_and_clear[i]);
}
nrf_gpio_cfg_input(RESET_PIN, NRF_GPIO_PIN_NOPULL);
nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
nrf_gpio_cfg_input(HOT_SWAP_SIGNAL_PIN, NRF_GPIO_PIN_PULLUP);
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_clear(INA_HI_PIN);
nrf_gpio_pin_set(LED_IOPL_PIN);
nrf_gpio_pin_clear(LED_IOPH_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_set(INA_HI_PIN);
nrf_gpio_pin_clear(LED_IOPL_PIN);
nrf_gpio_pin_set(LED_IOPH_PIN);
}
nrf_gpio_cfg_output(ANODE_PIN);
nrf_gpio_cfg_output(INA_HI_PIN);
nrf_gpio_cfg_output(LED_IOPL_PIN);
nrf_gpio_cfg_output(LED_IOPH_PIN);
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->ORC = 0x00000000;
NRF_SPIM3->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M32;
NRF_SPIM3->CSNPOL = SPIM_CSNPOL_CSNPOL_LOW;
NRF_SPIM3->IFTIMING.CSNDUR = 8;
NRF_SPIM3->PSEL.CSN = CS_MEM_PIN;
NRF_SPIM3->PSEL.SCK = SPIM_CLK_PIN;
NRF_SPIM3->PSEL.MOSI = SPIM_MOSI_PIN;
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
}
#endif
-58
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@@ -1,58 +0,0 @@
#ifdef __cplusplus
extern "C"
{
#endif
#include <string.h>
#include "app_config.h"
#include "app_error.h"
#include "ble_dis.h"
#include "ble_srv_common.h"
#include "le_uart_srv.h"
#ifdef __cplusplus
}
#endif
#define MANUFACTURER_NAME "Wisetop Technology Co." /**< Manufacturer. Will be passed to Device Information Service. */
#define SERIAL_NUMBER "0000-00-00-00001"
#define MODEL_NUMBER ELITE_HW_NAME
#define HARDWARE_REVISION STRINGIFY(MAJOR_PRODUCT_NUMBER) "." STRINGIFY(MINOR_PRODUCT_NUMBER) "." STRINGIFY(MAJOR_VERSION_NUMBER) "." STRINGIFY(MINOR_VERSION_NUMBER)
#define FIRMWARE_REVISION "0.1.0"
static void le_dis_init(void)
{
ble_dis_init_t dis_init;
ble_dis_sys_id_t sys_id;
memset(&dis_init, 0, sizeof(dis_init));
memset(&sys_id, 0, sizeof(sys_id));
ble_srv_ascii_to_utf8(&dis_init.manufact_name_str, MANUFACTURER_NAME);
ble_srv_ascii_to_utf8(&dis_init.fw_rev_str, FIRMWARE_REVISION);
ble_srv_ascii_to_utf8(&dis_init.hw_rev_str, HARDWARE_REVISION);
ble_srv_ascii_to_utf8(&dis_init.model_num_str, MODEL_NUMBER);
ble_srv_ascii_to_utf8(&dis_init.serial_num_str, SERIAL_NUMBER);
dis_init.p_sys_id = &sys_id;
dis_init.dis_char_rd_sec = SEC_OPEN;
ret_code_t err_code = ble_dis_init(&dis_init);
APP_ERROR_CHECK(err_code);
}
void le_srv_init(void)
{
le_dis_init();
extern void le_dfu_init(void);
le_dfu_init();
extern void le_elite_srv_init(void);
le_elite_srv_init(); // customer service
le_uart_srv_init(); // customer service
}
-243
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@@ -1,243 +0,0 @@
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "app_error.h"
#include "sdk_common.h"
#include "ble.h"
#include "ble_srv_common.h"
#include "le_uart_srv.h"
#include "uart_drv.h"
#include "nrf_log.h"
#include "nrf_sdh_ble.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "task.h"
#include <string.h>
#ifdef __cplusplus
}
#endif
#if NRF_MODULE_ENABLED(BLE_UART_SRV)
#define BLE_UUID_UART_SERVICE 0xFFF8 /**< The UUID of the Service. */
#define BLE_UUID_UART_RX_CHAR 0xFFF9 /**< The UUID of the RX Characteristic. */
#define BLE_UUID_UART_TX_CHAR 0xFFFA /**< The UUID of the TX Characteristic. */
#define BLE_UUID_UART_BAUD_CHAR 0xFFFB /**< The UUID of the Baud Characteristic. */
#define BLE_UART_BASE_UUID \
{ \
{ \
0x9E, 0xCA, 0xDC, 0x24, 0x0E, 0xE5, 0xA9, 0xE0, 0x93, 0xF3, 0xA3, 0xB5, 0x00, 0x00, 0x40, 0x6E \
} \
} /**< Used vendor specific UUID. */
#define DEF_BAUD_RATE 115200
typedef struct
{
uint16_t conn_handle;
uint16_t service_handle;
ble_gatts_char_handles_t rx_handle;
ble_gatts_char_handles_t tx_handle;
ble_gatts_char_handles_t baud_handle;
bool tx_notify_enable;
uint8_t rx_buf[BLE_UART_MAX_DATA_LEN];
uint8_t tx_buf[BLE_UART_MAX_DATA_LEN];
uint32_t baudrate;
} ble_uart_context_t;
static ble_uart_context_t ble_uart_context = {
.conn_handle = BLE_CONN_HANDLE_INVALID,
.tx_notify_enable = false,
.baudrate = DEF_BAUD_RATE
};
static void on_connect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
taskENTER_CRITICAL();
p_context->conn_handle = p_ble_evt->evt.common_evt.conn_handle;
taskEXIT_CRITICAL();
}
static void on_disconnect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
taskENTER_CRITICAL();
p_context->conn_handle = BLE_CONN_HANDLE_INVALID;
p_context->tx_notify_enable = false;
taskEXIT_CRITICAL();
}
static void ble_uart_ccc_update(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
if (p_evt_write->handle == p_context->tx_handle.cccd_handle)
{
p_context->tx_notify_enable = ble_srv_is_notification_enabled(p_evt_write->data);
NRF_LOG_INFO("data_notify:%s", p_context->tx_notify_enable ? "enable" : "disable");
}
}
static void on_write(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
ble_uuid_t uuid = p_ble_evt->evt.gatts_evt.params.write.uuid;
uint16_t handle = p_ble_evt->evt.gatts_evt.params.write.handle;
ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
switch (uuid.uuid)
{
case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG:
ble_uart_ccc_update(p_ble_evt, p_context);
break;
case BLE_UUID_UART_RX_CHAR:
NRF_LOG_INFO("RX:");
NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
uart_send((void *)p_evt_write->data, p_evt_write->len);
break;
case BLE_UUID_UART_BAUD_CHAR:
NRF_LOG_INFO("BAUD: %d", *(uint32_t *)p_evt_write->data);
uart_set_baud(*(uint32_t *)p_evt_write->data);
break;
default:
break;
}
}
static void on_hvx_tx_complete(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
// TODO...
}
static void on_ble_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
{
switch (p_ble_evt->header.evt_id)
{
case BLE_GAP_EVT_CONNECTED:
on_connect(p_ble_evt, p_context);
break;
case BLE_GAP_EVT_DISCONNECTED:
on_disconnect(p_ble_evt, p_context);
break;
case BLE_GATTS_EVT_WRITE:
on_write(p_ble_evt, p_context);
break;
case BLE_GATTS_EVT_HVN_TX_COMPLETE:
on_hvx_tx_complete(p_ble_evt, p_context);
default:
// No implementation needed.
break;
}
}
static ret_code_t add_rx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->rx_buf);
add_char_params.init_len = 0;
add_char_params.p_init_value = (void *)context->rx_buf;
add_char_params.is_var_len = true;
add_char_params.write_access = SEC_OPEN;
add_char_params.char_props.write = 1;
add_char_params.char_props.write_wo_resp = 1;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->rx_handle);
return err_code;
}
static ret_code_t add_tx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->tx_buf);
add_char_params.init_len = 0;
add_char_params.p_init_value = (void *)context->tx_buf;
add_char_params.is_value_user = true;
add_char_params.is_var_len = true;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
add_char_params.cccd_write_access = SEC_OPEN;
add_char_params.char_props.notify = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->tx_handle);
return err_code;
}
static ret_code_t add_baud_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->baudrate);
add_char_params.init_len = sizeof(context->baudrate);
add_char_params.p_init_value = (void *)&context->baudrate;
add_char_params.is_value_user = true;
add_char_params.is_var_len = false;
add_char_params.write_access = SEC_OPEN;
add_char_params.char_props.write = 1;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->baud_handle);
return err_code;
}
void le_uart_srv_init(void)
{
ret_code_t err_code;
uint8_t uuid_type = 0;
/**@snippet [Adding proprietary Service to the SoftDevice] */
ble_uuid_t ble_uuid = {
.type = BLE_UUID_TYPE_BLE,
.uuid = BLE_UUID_UART_SERVICE,
};
// Add the service.
err_code = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
&ble_uuid,
&ble_uart_context.service_handle);
APP_ERROR_CHECK(err_code);
// Add rx char
err_code = add_rx_characteristic(BLE_UUID_UART_RX_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Add tx char
err_code = add_tx_characteristic(BLE_UUID_UART_TX_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Add baud char
err_code = add_baud_characteristic(BLE_UUID_UART_BAUD_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Register a handler for BLE events.
NRF_SDH_BLE_OBSERVER(m_ble_uart_observer, BLE_UART_OBSERVER_PRIO, on_ble_evt_handler, &ble_uart_context);
}
ret_code_t le_uart_notify(uint8_t *p_value, uint16_t len)
{
ble_gatts_hvx_params_t hvx_params = {
.handle = ble_uart_context.tx_handle.value_handle,
.type = BLE_GATT_HVX_NOTIFICATION,
.offset = 0,
.p_len = &len,
.p_data = p_value,
};
return sd_ble_gatts_hvx(ble_uart_context.conn_handle, &hvx_params);
}
#endif
-47
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@@ -1,47 +0,0 @@
#include "app_config.h"
#if (DEF_RGB_ENABLED)
#include "led_rgb.h"
#include "elite_board.h"
#include "nrf_gpio.h"
static const uint32_t r_pins[DEF_LED_COUNT] = LED_R_PINS;
static const uint32_t g_pins[DEF_LED_COUNT] = LED_G_PINS;
static const uint32_t b_pins[DEF_LED_COUNT] = LED_B_PINS;
static uint32_t led_count = 0;
int32_t rgb_led_set(uint32_t idx, struct led_color color, uint8_t brightness)
{
if (idx >= led_count) return 1;
nrf_gpio_pin_write(r_pins[idx], color.R ? 0 : 1);
nrf_gpio_pin_write(g_pins[idx], color.G ? 0 : 1);
nrf_gpio_pin_write(b_pins[idx], color.B ? 0 : 1);
return 0;
}
int32_t rgb_init(uint32_t cnt)
{
led_count = cnt;
for (uint8_t i = 0; i < led_count; i++)
{
nrf_gpio_cfg_output(r_pins[i]);
nrf_gpio_cfg_output(g_pins[i]);
nrf_gpio_cfg_output(b_pins[i]);
/* all dark */
nrf_gpio_pin_set(r_pins[i]);
nrf_gpio_pin_set(g_pins[i]);
nrf_gpio_pin_set(b_pins[i]);
}
return 0;
}
const led_drv_if_t led_rgb_drv = {
.init = rgb_init,
.set = rgb_led_set,
};
#endif /* ! DEF_RGB_ENABLED */
File diff suppressed because one or more lines are too long
Binary file not shown.
-5
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@@ -1,5 +0,0 @@
-----BEGIN EC PRIVATE KEY-----
MHcCAQEEIEM6TVi/ofxCYEb2O9OYK4sNHlpwd0ZrW3yFOIeRJKqKoAoGCCqGSM49
AwEHoUQDQgAEYUIRVGOQwmOEfsuYSufu4hHxRsQSUzh9lMBkvc3ewrPkpbfiXfa/
vGyIM8HAY2Jemux9+FyFERXRjgj5RxOJAA==
-----END EC PRIVATE KEY-----
-243
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@@ -1,243 +0,0 @@
#include "nrf.h"
#include "nrf_gpio.h"
#include "nrf_uarte.h"
#include "le_uart_srv.h"
#include "uart_drv.h"
#include "nrf_error.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "semphr.h"
#include "task.h"
#include <string.h>
#if (DEF_UARTE_ENABLED)
#define UART_TX_PIN NRF_GPIO_PIN_MAP(0, 6)
#define UART_RX_PIN NRF_GPIO_PIN_MAP(0, 8)
static MessageBufferHandle_t rx_message = NULL;
static MessageBufferHandle_t tx_message = NULL;
static SemaphoreHandle_t tx_done_sem = NULL;
void UARTE0_UART0_IRQHandler(void)
{
if (NRF_UARTE0->EVENTS_ENDTX)
{
NRF_UARTE0->EVENTS_ENDTX = 0;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
xSemaphoreGiveFromISR(tx_done_sem, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
ret_code_t uart_set_baud(uint32_t baudrate)
{
ret_code_t ret = NRF_SUCCESS;
vTaskSuspendAll();
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
switch (baudrate)
{
case 4800:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud4800;
break;
case 9600:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud9600;
break;
case 19200:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud19200;
break;
case 38400:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud38400;
break;
case 56000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud56000;
break;
case 57600:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud57600;
break;
case 115200:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud115200;
break;
case 250000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud250000;
break;
case 1000000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;
break;
default:
ret = NRF_ERROR_INVALID_PARAM;
break;
}
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
xTaskResumeAll();
return ret;
}
void uart_tx_task(void *p_arg)
{
for (;;)
{
static uint8_t tx[2048];
size_t tx_size = xMessageBufferReceive(tx_message, tx, sizeof(tx), portMAX_DELAY);
if (tx_size)
{
NRF_UARTE0->TXD.PTR = (uint32_t)tx;
NRF_UARTE0->TXD.MAXCNT = tx_size;
NRF_UARTE0->EVENTS_ENDTX = 0;
NRF_UARTE0->EVENTS_TXSTOPPED = 0;
NRF_UARTE0->EVENTS_TXSTARTED = 0;
NRF_UARTE0->TASKS_STARTTX = 1;
NRF_UARTE0->INTENSET = UARTE_INTENSET_ENDTX_Msk;
if (xSemaphoreTake(tx_done_sem, pdMS_TO_TICKS(10000)) == pdFALSE)
{
NRF_UARTE0->TASKS_STOPTX = 1;
}
NRF_UARTE0->INTENCLR = UARTE_INTEN_ENDTX_Msk;
}
}
}
void uart_rx_task(void *p_arg)
{
static uint8_t rx[2][2048];
int idx = 0;
NRF_UARTE0->SHORTS = UARTE_SHORTS_ENDRX_STARTRX_Msk;
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx]);
NRF_UARTE0->TASKS_STOPRX = 1;
NRF_UARTE0->TASKS_STARTRX = 1;
do {
} while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx ^ 1];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx ^ 1]);
for (;;)
{
NRF_UARTE0->EVENTS_RXDRDY = 0;
do {
vTaskDelay(pdMS_TO_TICKS(5));
} while (NRF_UARTE0->EVENTS_RXDRDY == 0);
do {
NRF_UARTE0->EVENTS_RXDRDY = 0;
vTaskDelay(pdMS_TO_TICKS(5));
} while (NRF_UARTE0->EVENTS_RXDRDY == 1);
NRF_UARTE0->EVENTS_ENDRX = 0;
NRF_UARTE0->EVENTS_RXSTARTED = 0;
NRF_UARTE0->TASKS_STOPRX = 1;
do {
vTaskDelay(pdMS_TO_TICKS(1));
} while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx]);
xMessageBufferSend(rx_message, rx[idx], NRF_UARTE0->RXD.AMOUNT, portMAX_DELAY);
idx ^= 1;
}
}
void uart_rx_notify_task(void *p_arg)
{
for (;;)
{
static uint8_t buf[2048];
uint32_t recv_size = uart_recv(buf, sizeof(buf));
if (recv_size)
{
uint8_t *p = buf;
uint32_t loops = recv_size / BLE_UART_MAX_DATA_LEN;
uint32_t remain = recv_size % BLE_UART_MAX_DATA_LEN;
for (int i = 0; i < loops; i++)
{
for (int i = 0; i < 10; i++)
{
if (le_uart_notify((void *)p, BLE_UART_MAX_DATA_LEN) == NRF_SUCCESS)
{
p += BLE_UART_MAX_DATA_LEN;
break;
}
else
{
vTaskDelay(pdMS_TO_TICKS(5));
}
}
}
if (remain)
{
for (int i = 0; i < 10; i++)
{
if (le_uart_notify((void *)p, remain) == NRF_SUCCESS)
{
p += BLE_UART_MAX_DATA_LEN;
break;
}
else
{
vTaskDelay(pdMS_TO_TICKS(5));
}
}
}
}
}
}
void uart_init(void)
{
rx_message = xMessageBufferCreate(4096);
tx_message = xMessageBufferCreate(2048);
tx_done_sem = xSemaphoreCreateBinary();
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
NRF_UARTE0->PSEL.TXD = UART_TX_PIN | (UARTE_PSEL_TXD_CONNECT_Connected << UARTE_PSEL_TXD_CONNECT_Pos);
NRF_UARTE0->PSEL.RXD = UART_RX_PIN | (UARTE_PSEL_RXD_CONNECT_Connected << UARTE_PSEL_RXD_CONNECT_Pos);
NRF_UARTE0->PSEL.CTS = 0;
NRF_UARTE0->PSEL.RTS = 0;
NRF_UARTE0->CONFIG = 0;
NRF_UARTE0->BAUDRATE = UARTE_BAUDRATE_BAUDRATE_Baud115200;
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
// Config uart tx pin
nrf_gpio_cfg(
UART_TX_PIN,
NRF_GPIO_PIN_DIR_OUTPUT,
NRF_GPIO_PIN_INPUT_DISCONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_H0H1,
NRF_GPIO_PIN_NOSENSE);
// Config uart rx pin
nrf_gpio_cfg_input(UART_RX_PIN, NRF_GPIO_PIN_PULLUP);
sd_nvic_SetPriority(UARTE0_UART0_IRQn, _PRIO_APP_LOWEST);
sd_nvic_EnableIRQ(UARTE0_UART0_IRQn);
xTaskCreate(uart_tx_task, "uart tx", 64, NULL, 4, NULL);
xTaskCreate(uart_rx_task, "uart rx", 64, NULL, 4, NULL);
xTaskCreate(uart_rx_notify_task, "uart rx notify", 128, NULL, 3, NULL);
}
int uart_send(void *p_data, uint32_t size)
{
return xMessageBufferSend(tx_message, p_data, size, portMAX_DELAY);
}
int uart_recv(void *p_data, uint32_t max_size)
{
return xMessageBufferReceive(rx_message, p_data, max_size, portMAX_DELAY);
}
#endif
-256
View File
@@ -1,256 +0,0 @@
#include "nrf.h"
#include "app_usbd.h"
#include "app_usbd_cdc_acm.h"
#include "app_usbd_cdc_types.h"
#include "app_usbd_serial_num.h"
#include "nrf_log.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "semphr.h"
#include "stream_buffer.h"
#include "task.h"
#define DEBUG_ACM_CDC_READ 1
static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event);
#define CDC_ACM_COMM_EPIN NRF_DRV_USBD_EPIN1
#define CDC_ACM_DATA_EPIN NRF_DRV_USBD_EPIN2
#define CDC_ACM_DATA_EPOUT NRF_DRV_USBD_EPOUT2
APP_USBD_CDC_ACM_GLOBAL_DEF(cdc_acm_inst,
cdc_acm_user_ev_handler,
NRF_CDC_ACM_COMM_INTERFACE,
NRF_CDC_ACM_DATA_INTERFACE,
CDC_ACM_COMM_EPIN,
CDC_ACM_DATA_EPIN,
CDC_ACM_DATA_EPOUT,
APP_USBD_CDC_COMM_PROTOCOL_AT_V250);
static SemaphoreHandle_t usbd_ready_rx_done_sem = NULL;
static SemaphoreHandle_t usbd_ready_tx_done_sem = NULL;
static SemaphoreHandle_t usbd_evt_queue_sem = NULL;
static MessageBufferHandle_t usbd_tx_message = NULL;
static MessageBufferHandle_t usbd_rx_message = NULL;
static bool is_port_closed = true;
static void usbd_isr_handler(app_usbd_internal_evt_t const *const p_event, bool queued)
{
if (queued)
{
BaseType_t xHigherPriorityTaskWoken = false;
xSemaphoreGiveFromISR(usbd_evt_queue_sem, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
static void usbd_state_proc(app_usbd_event_type_t event)
{
switch (event)
{
case APP_USBD_EVT_DRV_SUSPEND:
break;
case APP_USBD_EVT_DRV_RESUME:
break;
case APP_USBD_EVT_STARTED:
NRF_LOG_INFO("APP_USBD_EVT_STARTED");
break;
case APP_USBD_EVT_STOPPED:
NRF_LOG_INFO("APP_USBD_EVT_STOPPED");
app_usbd_disable();
break;
case APP_USBD_EVT_POWER_DETECTED:
NRF_LOG_INFO("USB power detected");
if (!nrf_drv_usbd_is_enabled())
{
app_usbd_enable();
}
break;
case APP_USBD_EVT_POWER_REMOVED:
NRF_LOG_INFO("USB power removed");
app_usbd_stop();
break;
case APP_USBD_EVT_POWER_READY:
NRF_LOG_INFO("USB ready");
app_usbd_start();
break;
default:
break;
}
}
static void usbd_ser_send_task(void *p_arg)
{
static uint8_t buf[512];
for (;;)
{
size_t send_size = xStreamBufferReceive(usbd_tx_message, buf, sizeof(buf), portMAX_DELAY);
if (send_size && is_port_closed == false)
{
ret_code_t ret_code = app_usbd_cdc_acm_write(&cdc_acm_inst, buf, send_size);
switch (ret_code)
{
case NRF_SUCCESS:
xSemaphoreTake(usbd_ready_tx_done_sem, pdMS_TO_TICKS(1000));
break;
default:
break;
}
}
}
}
static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event)
{
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
switch (event)
{
case APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN:
is_port_closed = false;
xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
break;
case APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE:
is_port_closed = true;
break;
case APP_USBD_CDC_ACM_USER_EVT_TX_DONE:
xSemaphoreGiveFromISR(usbd_ready_tx_done_sem, &xHigherPriorityTaskWoken);
break;
case APP_USBD_CDC_ACM_USER_EVT_RX_DONE:
xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
break;
default:
break;
}
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
static void usbd_ser_recv_task(void *arg)
{
static uint8_t recv[NRFX_USBD_EPSIZE];
static uint32_t recv_size;
for (;;)
{
if (is_port_closed)
{
xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
}
taskENTER_CRITICAL();
xSemaphoreTake(usbd_ready_rx_done_sem, 0);
taskEXIT_CRITICAL();
ret_code_t ret_code = app_usbd_cdc_acm_read_any(&cdc_acm_inst, recv, NRFX_USBD_EPSIZE);
switch (ret_code)
{
case NRF_SUCCESS:
recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
break;
case NRF_ERROR_IO_PENDING:
xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
break;
default:
break;
}
#if (DEBUG_ACM_CDC_READ == 1)
{
static uint8_t str[256];
memcpy(str, recv, recv_size);
str[recv_size] = '\0';
NRF_LOG_INFO("%s", str);
}
#endif
}
}
static void usbd_evt_task(void *arg)
{
app_usbd_serial_num_generate();
app_usbd_config_t usbd_config = {
.ev_isr_handler = usbd_isr_handler,
.ev_state_proc = usbd_state_proc,
};
ret_code_t ret;
ret = app_usbd_init(&usbd_config);
APP_ERROR_CHECK(ret);
extern ret_code_t nrf_dfu_trigger_usb_init(void);
ret = nrf_dfu_trigger_usb_init();
APP_ERROR_CHECK(ret);
app_usbd_class_inst_t const *pxInst = app_usbd_cdc_acm_class_inst_get(&cdc_acm_inst);
ret = app_usbd_class_append(pxInst);
APP_ERROR_CHECK(ret);
app_usbd_enable();
app_usbd_start();
for (;;)
{
xSemaphoreTake(usbd_evt_queue_sem, portMAX_DELAY);
do {
} while (app_usbd_event_queue_process());
}
}
void usbd_init(void)
{
usbd_ready_rx_done_sem = xSemaphoreCreateBinary();
usbd_ready_tx_done_sem = xSemaphoreCreateBinary();
usbd_evt_queue_sem = xSemaphoreCreateBinary();
usbd_tx_message = xMessageBufferCreate(512);
usbd_rx_message = xMessageBufferCreate(512);
xTaskCreate(usbd_evt_task, "usb_evt", 1024, NULL, 3, NULL);
xTaskCreate(usbd_ser_recv_task, "usb_recv", 256, NULL, 3, NULL);
xTaskCreate(usbd_ser_send_task, "usb_send", 256, NULL, 3, NULL);
}
int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout)
{
int32_t ret = 0;
if (size)
{
if (timeout)
{
xMessageBufferSend(usbd_tx_message, p_data, size, timeout);
}
else
{
taskENTER_CRITICAL();
xMessageBufferSend(usbd_tx_message, p_data, size, 0);
taskEXIT_CRITICAL();
}
}
return ret;
}
int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout)
{
int32_t ret = 0;
if (size)
{
if (timeout)
{
ret = xMessageBufferReceive(usbd_rx_message, p_data, size, timeout);
}
else
{
taskENTER_CRITICAL();
ret = xMessageBufferReceive(usbd_rx_message, p_data, size, 0);
taskEXIT_CRITICAL();
}
}
return ret;
}
-132
View File
@@ -1,132 +0,0 @@
/**
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "usbd_dfu_trigger.h"
#include "app_usbd.h"
#include "app_usbd_nrf_dfu_trigger.h"
#include "nrf_drv_clock.h"
#include "nrf_gpio.h"
#include "nrf_log_ctrl.h"
#include "app_usbd_serial_num.h"
#include "app_util.h"
#include "nrf_bootloader_info.h"
#include "nrf_pwr_mgmt.h"
#define NRF_LOG_MODULE_NAME nrf_dfu_trigger_usb
#include "nrf_log.h"
NRF_LOG_MODULE_REGISTER();
#define DFU_FLASH_PAGE_SIZE (NRF_FICR->CODEPAGESIZE)
#define DFU_FLASH_PAGE_COUNT (NRF_FICR->CODESIZE)
#define APP_NAME ELITE_DEVICE_NAME
#define APP_VERSION_STRING "1.0.0"
static uint8_t m_version_string[] = APP_NAME " " APP_VERSION_STRING; ///< Human-readable version string.
static app_usbd_nrf_dfu_trigger_nordic_info_t m_dfu_info; ///< Struct with various information about the current firmware.
static void dfu_trigger_evt_handler(app_usbd_class_inst_t const *p_inst, app_usbd_nrf_dfu_trigger_user_event_t event)
{
UNUSED_PARAMETER(p_inst);
ret_code_t err_code;
switch (event)
{
case APP_USBD_NRF_DFU_TRIGGER_USER_EVT_DETACH:
NRF_LOG_INFO("DFU Detach request received. Triggering a pin reset.");
NRF_LOG_FINAL_FLUSH();
{
err_code = sd_power_gpregret_clr(0, 0xFFFFFFFF);
APP_ERROR_CHECK(err_code);
err_code = sd_power_gpregret_set(0, BOOTLOADER_DFU_START);
APP_ERROR_CHECK(err_code);
// Signal that DFU mode is to be enter to the power management module
nrf_pwr_mgmt_shutdown(NRF_PWR_MGMT_SHUTDOWN_GOTO_DFU);
}
break;
default:
break;
}
}
APP_USBD_NRF_DFU_TRIGGER_GLOBAL_DEF(m_app_dfu,
NRF_DFU_TRIGGER_USB_INTERFACE_NUM,
&m_dfu_info,
m_version_string,
dfu_trigger_evt_handler);
static void strings_create(void)
{
uint8_t prev_char = 'a'; // Arbitrary valid char, not '-'.
// Remove characters that are not supported in semantic version strings.
for (size_t i = strlen(APP_NAME) + 1; i < strlen((char *)m_version_string); i++)
{
if (((m_version_string[i] >= 'a') && (m_version_string[i] <= 'z')) || ((m_version_string[i] >= 'A') && (m_version_string[i] <= 'Z')) || ((m_version_string[i] >= '0') && (m_version_string[i] <= '9')) || (m_version_string[i] == '+') || (m_version_string[i] == '.') || (m_version_string[i] == '-'))
{
// Valid semantic version character.
}
else if (prev_char == '-')
{
m_version_string[i] = '0';
}
else
{
m_version_string[i] = '-';
}
prev_char = m_version_string[i];
}
}
ret_code_t nrf_dfu_trigger_usb_init(void)
{
m_dfu_info.wAddress = CODE_START;
m_dfu_info.wFirmwareSize = CODE_SIZE;
m_dfu_info.wVersionMajor = 1;
m_dfu_info.wVersionMinor = 0;
m_dfu_info.wFirmwareID = 0;
m_dfu_info.wFlashPageSize = DFU_FLASH_PAGE_SIZE;
m_dfu_info.wFlashSize = m_dfu_info.wFlashPageSize * DFU_FLASH_PAGE_COUNT;
strings_create();
app_usbd_class_inst_t const *class_dfu = app_usbd_nrf_dfu_trigger_class_inst_get(&m_app_dfu);
ret_code_t ret = app_usbd_class_append(class_dfu);
return ret;
}
+6 -179
View File
@@ -1,8 +1,6 @@
#ifndef __APP_CONFIG_H__
#define __APP_CONFIG_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
@@ -108,16 +106,11 @@ extern "C"
#define DEF_ELITE_DEV 0x00000000
#define DEF_ELITE_EDC_V2_0 0x00020109
#define DEF_ELITE_PEL_V2_0 0x00070001
#define DEF_ELITE_PEL_V3_0 0x00070002
#define DEF_ELITE_CPG_V1_1 0x00080001
#define DEF_ELITE_MMM_V1_0 0x00090001
#define DEF_ELITE_MODEL DEF_ELITE_DEV
#define DEF_ELITE_DEMO_W_SOFTDEVICE 0
#define DEF_ELITE_MODEL DEF_ELITE_CPG_V1_1
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#define ELITE_DEVICE_NAME "Elite-Dev"
#define ELITE_HW_NAME "Elite-Dev"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 0
#define MAJOR_VERSION_NUMBER 0
@@ -125,10 +118,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
@@ -149,13 +141,8 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define ELITE_DEVICE_NAME "Elite-EDC"
#define ELITE_HW_NAME "Elite-EDCv2.0"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 2
#define MAJOR_VERSION_NUMBER 1
@@ -163,10 +150,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 1
#define DEF_LED_COUNT 12
#define DEF_LED_DRV_ENABLED 1
#define DEF_APA102_2020_ENABLED 1
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 1
@@ -187,17 +173,8 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#define BOARD_IOPH 1
#define BOARD_IOPL 0
#define ELITE_DEVICE_NAME "Elite-PEL"
#define ELITE_HW_NAME "Elite-PELv2.0"
#define BOARD_IOPx BOARD_IOPH
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 7
#define MAJOR_VERSION_NUMBER 0
@@ -205,10 +182,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 0
@@ -229,55 +205,8 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#define BOARD_IOPH 1
#define BOARD_IOPL 0
#define ELITE_DEVICE_NAME "Elite-PEL"
#define ELITE_HW_NAME "Elite-PELv3.0"
#define BOARD_IOPx BOARD_IOPH
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 7
#define MAJOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 2
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 1
#define DEF_LED_COUNT 1
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 1
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 0
#define DEF_BULTIN_ADC_ENABED 1
#define DEF_DAC_DRV_ENABLED 0
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
#define DEF_FS_RTT_DIR 0
#define DEF_GD25D10C_ENABLED 0
#define DEF_BTN_ENABLED 0
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define ELITE_DEVICE_NAME "Elite-CPG"
#define ELITE_HW_NAME "Elite-CPGv1.1"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 8
#define MAJOR_VERSION_NUMBER 0
@@ -285,10 +214,9 @@ extern "C"
#define DEF_TW1508_ENABLED 1
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
@@ -309,48 +237,6 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#define ELITE_DEVICE_NAME "Elite-MMM"
#define ELITE_HW_NAME "Elite-MMM"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 9
#define MAJOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 1
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
#define DEF_BULTIN_ADC_ENABED 0
#define DEF_DAC_DRV_ENABLED 0
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
#define DEF_FS_RTT_DIR 0
#define DEF_GD25D10C_ENABLED 0
#define DEF_BTN_ENABLED 0
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 1
#endif
#define BLE_ELITE_SRV_ENABLED 1
@@ -383,12 +269,6 @@ extern "C"
// Enable ble device info module
#define BLE_DIS_ENABLED 1
// Enable ble uart module
#define BLE_NUS_ENABLED 1
#define BLE_UART_SRV_ENABLED 1
#define BLE_UART_OBSERVER_PRIO 3
#define NRF_UARTE_ENABLED 1
// DFU
#define NRF_DFU_TRANSPORT_BLE 1
#define BLE_DFU_BLE_OBSERVER_PRIO 2
@@ -415,60 +295,7 @@ extern "C"
#define COUNT_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#define COUNTOF(x) (sizeof(x) / sizeof(x[0]))
#define u8_to_u32(a, b, c, d) (((uint32_t)(a) << 24) | ((uint32_t)(b) << 16) | ((uint32_t)(c) << 8) | (d))
#define u8_to_u16(a, b) (((uint16_t)(a) << 8) | (b))
#define u8_to_i32(a, b, c, d) (((int32_t)(a) << 24) | ((int32_t)(b) << 16) | ((int32_t)(c) << 8) | ((int32_t)(d)))
#define u8_to_i16(a, b) (((int16_t)(a) << 8) | (int16_t)(b))
#define DEBUG_NRF 1
// USBD
#define APP_USBD_ENABLED 1
#define APP_USBD_VID 0x1915
#define APP_USBD_PID 0xC00A
#define APP_USBD_DEVICE_VER_MAJOR 1
#define APP_USBD_DEVICE_VER_MINOR 1
#define USBD_CONFIG_IRQ_PRIORITY _PRIO_APP_MID
#define APP_USBD_DEVICE_VER_SUB 0
#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor")
#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52 USB Product")
#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration")
#define APP_USBD_STRING_ID_MANUFACTURER 1
#define APP_USBD_STRING_ID_PRODUCT 2
#define APP_USBD_STRING_ID_SERIAL 3
#define APP_USBD_STRING_ID_CONFIGURATION 4
#define APP_USBD_STRING_SERIAL_EXTERN 1
#define APP_USBD_CONFIG_SELF_POWERED 1
#define APP_USBD_CONFIG_MAX_POWER 100
#define APP_USBD_CONFIG_DESC_STRING_SIZE 31
#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1
#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32
extern uint8_t g_extern_serial_number[];
#define APP_USBD_STRING_SERIAL g_extern_serial_number
// USBD CDC ACM
#define APP_USBD_CDC_ACM_ENABLED 1
#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1
// USBD DFU TRIGGER
#define APP_USBD_NRF_DFU_TRIGGER_ENABLED 1
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 1
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 4
#define NRF_DFU_TRIGGER_USB_USB_SHARED 1
// NRF_USBD
#define NRFX_USBD_ENABLED 1
#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
#define NRFX_USBD_CONFIG_IRQ_PRIORITY _PRIO_APP_LOW
#define NRF_DFU_TRIGGER_USB_INTERFACE_NUM 0
#define NRF_CDC_ACM_COMM_INTERFACE 1
#define NRF_CDC_ACM_DATA_INTERFACE 2
#define UNCONNECTED_PIN 0xFFFFFFFF
#ifdef __cplusplus
}
+1 -11
View File
@@ -25,7 +25,6 @@
<ProjectFile>bmd380_peripheral.vcxproj</ProjectFile>
<RemoteBuildEnvironment>
<Records />
<EnvironmentSetupFiles />
</RemoteBuildEnvironment>
<ParallelJobCount>1</ParallelJobCount>
<SuppressDirectoryChangeMessages>true</SuppressDirectoryChangeMessages>
@@ -107,17 +106,15 @@
<EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
<AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
<TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
<BacktraceFrameLimit>0</BacktraceFrameLimit>
<EnableNonStopMode>false</EnableNonStopMode>
<MaxBreakpointLimit>0</MaxBreakpointLimit>
<EnableVerboseMode>true</EnableVerboseMode>
<EnablePrettyPrinters>false</EnablePrettyPrinters>
<EnableAbsolutePathReporting>true</EnableAbsolutePathReporting>
</AdditionalGDBSettings>
<DebugMethod>
<ID>jlink-jtag</ID>
<Configuration xsi:type="com.visualgdb.edp.segger.settings">
<CommandLine>-select USB=682409936 -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
<CommandLine>-select USB -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
<ProgramMode>Enabled</ProgramMode>
<StartupCommands>
<string>target remote :$$SYS:GDB_PORT$$</string>
@@ -144,13 +141,6 @@
<TimestampProviderTicksPerSecond>64000000</TimestampProviderTicksPerSecond>
<KeepConsoleAfterExit>false</KeepConsoleAfterExit>
<UnusedStackFillPattern xsi:nil="true" />
<RelatedExecutables>
<RelatedExecutable>
<Program>false</Program>
<LoadSymbols>false</LoadSymbols>
<ShowInLiveWatch>false</ShowInLiveWatch>
</RelatedExecutable>
</RelatedExecutables>
<CheckInterfaceDrivers>true</CheckInterfaceDrivers>
</Debug>
</VisualGDBProjectSettings2>
+1 -9
View File
@@ -23,10 +23,7 @@
</Version>
</ToolchainID>
<ProjectFile>bmd380_peripheral.vcxproj</ProjectFile>
<RemoteBuildEnvironment>
<Records />
</RemoteBuildEnvironment>
<ParallelJobCount>1</ParallelJobCount>
<ParallelJobCount>0</ParallelJobCount>
<SuppressDirectoryChangeMessages>true</SuppressDirectoryChangeMessages>
<BuildAsRoot>false</BuildAsRoot>
</Build>
@@ -48,7 +45,6 @@
<ShowMessageAfterExecuting>true</ShowMessageAfterExecuting>
</CustomShortcuts>
<UserDefinedVariables />
<ImportedPropertySheets />
<CodeSense>
<Enabled>Unknown</Enabled>
<ExtraSettings>
@@ -61,8 +57,6 @@
<Enabled>false</Enabled>
</CodeAnalyzerSettings>
</CodeSense>
<Configurations />
<ProgramArgumentsSuggestions />
<Debug xsi:type="com.visualgdb.debug.embedded">
<AdditionalStartupCommands />
<AdditionalGDBSettings>
@@ -94,12 +88,10 @@
<EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
<AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
<TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
<BacktraceFrameLimit>0</BacktraceFrameLimit>
<EnableNonStopMode>false</EnableNonStopMode>
<MaxBreakpointLimit>0</MaxBreakpointLimit>
<EnableVerboseMode>true</EnableVerboseMode>
<EnablePrettyPrinters>false</EnablePrettyPrinters>
<EnableAbsolutePathReporting>true</EnableAbsolutePathReporting>
</AdditionalGDBSettings>
<DebugMethod>
<ID>jlink-jtag</ID>
-11
View File
@@ -1,11 +0,0 @@
{
"folders": [
{
"path": "."
},
{
"path": "../bmd380_sdk"
}
],
"settings": {}
}
+7 -66
View File
@@ -32,21 +32,21 @@
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
<GNUConfigurationType>Debug</GNUConfigurationType>
<ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
<ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
<ToolchainVersion>13.3.1/15.1/r2</ToolchainVersion>
<GenerateHexFile>true</GenerateHexFile>
<MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
</PropertyGroup>
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|VisualGDB'">
<ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
<ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
<ToolchainVersion>13.3.1/15.1/r2</ToolchainVersion>
<GenerateHexFile>true</GenerateHexFile>
<MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
</PropertyGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
<ClCompile>
<CLanguageStandard>GNU99</CLanguageStandard>
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<Filter Include="Header files\usbd\class\cdc">
<UniqueIdentifier>{d7485e51-66b3-40d5-95fb-fc0ae2cf995a}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\cdc\acm">
<UniqueIdentifier>{bf1f22a8-8609-45e9-b701-93abc62db085}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\dummy">
<UniqueIdentifier>{d5b73400-cbef-4759-b305-1b98ec4a48f0}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\hid">
<UniqueIdentifier>{c0f5969a-b240-4245-98dd-bbbf01c8ce7d}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\hid\generic">
<UniqueIdentifier>{518f50b5-4bf5-4a2c-88f1-c8804676ffb3}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\hid\kbd">
<UniqueIdentifier>{ccbf274a-f437-4779-ad06-c4a4d8e3a462}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\hid\mouse">
<UniqueIdentifier>{1229e16a-43c9-4efc-bfb5-e59c503f3a1b}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\msc">
<UniqueIdentifier>{e68fbc57-b424-4590-8ac9-7e5a1d78d600}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\usbd\class\nrf_dfu_trigger">
<UniqueIdentifier>{65e0c43e-e430-42db-8dce-59f9cfa1f595}</UniqueIdentifier>
</Filter>
<Filter Include="Source files\ble_nus">
<UniqueIdentifier>{1b8de2a3-45ae-44b2-b2f0-ea91c8a11f84}</UniqueIdentifier>
</Filter>
<Filter Include="Header files\ble_nus">
<UniqueIdentifier>{ca14490c-607f-4260-b6f5-2dece53e6531}</UniqueIdentifier>
</Filter>
</ItemGroup>
<ItemGroup>
<ClCompile Include="main.c">
@@ -1521,6 +1443,9 @@
<ClCompile Include="cpg.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="cpg11_dev_mode.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="cpg11_io.c">
<Filter>Source files</Filter>
</ClCompile>
@@ -1533,168 +1458,6 @@
<ClCompile Include="pel20_io.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.c">
<Filter>Source files\Device-specific files\Libraries</Filter>
</ClCompile>
<ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo.h">
<Filter>Header files\Device-specific files\Libraries</Filter>
</ClInclude>
<ClInclude Include="$(BSP_ROOT)\nRF5x\components\libraries\atomic_fifo\nrf_atfifo_internal.h">
<Filter>Header files\Device-specific files\Libraries</Filter>
</ClInclude>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.c">
<Filter>Source files\usbd</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.c">
<Filter>Source files\usbd</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.c">
<Filter>Source files\usbd</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.c">
<Filter>Source files\usbd</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.c">
<Filter>Source files\usbd\class\cdc\acm</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.c">
<Filter>Source files\usbd\class\nrf_dfu_trigger</Filter>
</ClCompile>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_class_base.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_core.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_descriptor.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_langid.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_request.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_serial_num.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_string_desc.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\app_usbd_types.h">
<Filter>Header files\usbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio.h">
<Filter>Header files\usbd\class\audio</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_desc.h">
<Filter>Header files\usbd\class\audio</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_internal.h">
<Filter>Header files\usbd\class\audio</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\audio\app_usbd_audio_types.h">
<Filter>Header files\usbd\class\audio</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_desc.h">
<Filter>Header files\usbd\class\cdc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\app_usbd_cdc_types.h">
<Filter>Header files\usbd\class\cdc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm.h">
<Filter>Header files\usbd\class\cdc\acm</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\cdc\acm\app_usbd_cdc_acm_internal.h">
<Filter>Header files\usbd\class\cdc\acm</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy.h">
<Filter>Header files\usbd\class\dummy</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_internal.h">
<Filter>Header files\usbd\class\dummy</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\dummy\app_usbd_dummy_types.h">
<Filter>Header files\usbd\class\dummy</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid.h">
<Filter>Header files\usbd\class\hid</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\app_usbd_hid_types.h">
<Filter>Header files\usbd\class\hid</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic.h">
<Filter>Header files\usbd\class\hid\generic</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_desc.h">
<Filter>Header files\usbd\class\hid\generic</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_internal.h">
<Filter>Header files\usbd\class\hid\generic</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_desc.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_internal.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_desc.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_internal.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_desc.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_internal.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_scsi.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_types.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_internal.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_types.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClCompile Include="usbd.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="usbd_dfu_trigger.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="le_uart_srv.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.c">
<Filter>Source files\ble_nus</Filter>
</ClCompile>
<ClInclude Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.h">
<Filter>Header files\ble_nus</Filter>
</ClInclude>
<ClCompile Include="uart.drv.c">
<Filter>Source files</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<None Include="nRF52840_XXAA_S140_reserve.lds">
@@ -2050,6 +1813,9 @@
<ClInclude Include="cpg.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="cpg11_dev_mode.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="cpg11_io.h">
<Filter>Header files</Filter>
</ClInclude>
@@ -2059,15 +1825,6 @@
<ClInclude Include="pel20_io.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="usbd.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="uart_drv.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="le_uart_srv.h">
<Filter>Header files</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<Text Include="..\bmd380_sdk\external\segger_rtt\license\license.txt">
+7 -13
View File
@@ -104,12 +104,8 @@ static BtnEvent_t btn_event(void)
static void btn_event_shortx1_cb(void)
{
NRF_LOG_INFO("BTN_EVENT_SHORTx1");
#if (DEF_APA102_2020_ENABLED)
const struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
#elif (DEF_RGB_ENABLED)
const struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
#endif
static int idx = 0;
static int idx = 0;
led_set(color[idx++ % COUNTOF(color)]);
}
@@ -123,7 +119,7 @@ static void btn_event_shortx2_cb(void)
led_set(LED_BLUE);
vTaskDelay(pdMS_TO_TICKS(250));
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_event_shortx3_cb(void)
@@ -135,25 +131,21 @@ static void btn_event_shortx3_cb(void)
vTaskDelay(pdMS_TO_TICKS(250));
led_set(LED_CYAN);
vTaskDelay(pdMS_TO_TICKS(250));
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_event_long(void)
{
NRF_LOG_INFO("BTN_EVENT_LONG");
#if (DEF_APA102_2020_ENABLED)
led_set(LED_ORANGE);
#elif (DEF_RGB_ENABLED)
led_set(LED_YELLOW);
#endif
if (!wait_released(TIME_PRESS_LONG))
{
led_set(LED_OFF);
elite_board_power_off();
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_task(void *pvArg)
@@ -198,3 +190,5 @@ void btn_init(void)
}
#endif /* ! DEF_BTN_ENABLED */
View File
+8 -22
View File
@@ -41,7 +41,7 @@ static int reset(void)
static float adc_convert_milivolt(uint16_t range_sel, int32_t val_14bit, bool is_diff)
{
float volt;
float gain = 1.0 / 6.0;
float gain;
float vref;
uint32_t m = is_diff ? 1 : 0;
@@ -330,26 +330,12 @@ static int read_multiple_milivolt_ex(uint32_t *p_channels, float *p_val, uint32_
return 0;
}
static int adc_convert_multiple_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
{
int32_t int_val[16];
for (int i = 0; i < count; i++)
{
int_val[i] = p_val_14bit[i]; // copy values
p_val_f[i] = adc_convert_milivolt(m_gain, int_val[i], false);
}
return 0;
}
const adc_drv_if_t builtin_saadc = {
.init = init,
.reset = reset,
.read = read,
.gain = gain,
.read_multiple_channels = read_channels,
.read_multiple_channels_ex = read_channels_ex,
.read_multiple_milivolt_ex = read_multiple_milivolt_ex,
.adc_convert_multiple_milivolt = adc_convert_multiple_milivolt,
.init = init,
.reset = reset,
.read = read,
.gain = gain,
.read_multiple_channels = read_channels,
.read_multiple_channels_ex = read_channels_ex,
.read_multiple_milivolt_ex = read_multiple_milivolt_ex,
};
-47
View File
@@ -1,47 +0,0 @@
# Call Cmake from the 'build' subfolder with the command below.
# For using Make:
# cmake -DCMAKE_MAKE_PROGRAM=make.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Unix Makefiles" ..
# followed by
# 'make' or 'cmake --build .' to build it
#
# For using Ninja:
# cmake -DCMAKE_MAKE_PROGRAM=ninja.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Ninja" ..
# followed by
# 'ninja' or 'cmake --build .' to build it
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR arm)
if(CMAKE_HOST_WIN32)
set(EXECUTESUFFIX ".exe")
set(ARM_TOOLCHAIN_DIR "C:/SysGCC/arm-eabi/bin")
elseif(CMAKE_HOST_UNIX)
set(EXECUTESUFFIX "")
if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Darwin")
message(STATUS "Running on macOS")
set(ARM_TOOLCHAIN_DIR "/opt/homebrew/bin")
elseif(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Linux")
message(STATUS "Running on Linux (likely Ubuntu)")
set(ARM_TOOLCHAIN_DIR "/opt/arm-none-eabi/bin")
endif()
else()
message(WARNING "Unknown host OS: ${CMAKE_HOST_SYSTEM_NAME}")
endif()
set(BINUTILS_PATH ${ARM_TOOLCHAIN_DIR})
set(TOOLCHAIN_PREFIX arm-none-eabi-)
set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
set(CMAKE_C_COMPILER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}gcc${EXECUTESUFFIX})
set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
set(CMAKE_CXX_COMPILER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}g++${EXECUTESUFFIX})
set(CMAKE_LINKER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}ld${EXECUTESUFFIX})
set(CMAKE_OBJCOPY ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}objcopy${EXECUTESUFFIX} CACHE INTERNAL "objcopy tool")
set(CMAKE_SIZE ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}size${EXECUTESUFFIX} CACHE INTERNAL "size tool")
set(CMAKE_FIND_ROOT_PATH ${BINUTILS_PATH})
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-21
View File
@@ -1,21 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
file(GLOB FREERTO_KERNEL_SOURCES "${NRF_SDK_DIR}/external/freertos/source/*.c")
add_library(freertos OBJECT
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52/port.c
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis.c
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis_systick.c
${NRF_SDK_DIR}/external/freertos/source/portable/MemMang/heap_4.c
${FREERTO_KERNEL_SOURCES}
)
target_include_directories(freertos PUBLIC
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52
${NRF_SDK_DIR}/external/freertos/source/include
)
target_link_libraries(freertos PRIVATE
prj_config
)
-14
View File
@@ -1,14 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
file(GLOB_RECURSE LFS_SOURCES "littlefs/*.c")
add_library(lfs OBJECT ${LFS_SOURCES})
target_include_directories(lfs PUBLIC
${CMAKE_SOURCE_DIR}/littlefs
)
target_link_libraries(lfs PRIVATE
prj_config
freertos
)
-22
View File
@@ -1,22 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
set(NRF_LOG_SRC
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_rtt.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_serial.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_default_backends.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_frontend.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_str_formatter.c
)
add_library(nrf_log OBJECT
${NRF_LOG_SRC}
)
target_include_directories(nrf_log PUBLIC
${NRF_SDK_DIR}/components/libraries/log
${NRF_SDK_DIR}/components/libraries/log/src
)
target_link_libraries(nrf_log PRIVATE
prj_config
)
-166
View File
@@ -1,166 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
# ==========================
# Source Files
# ==========================
set(STARTUP_SRC
${NRF_SDK_DIR}/modules/nrfx/mdk/gcc_startup_nrf52840.S
${NRF_SDK_DIR}/modules/nrfx/mdk/system_nrf52.c
)
set(LOGGING_SRC
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_rtt.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_serial.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_default_backends.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_frontend.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_str_formatter.c
)
set(UTILS_SRC
${NRF_SDK_DIR}/components/libraries/util/nrf_assert.c
${NRF_SDK_DIR}/components/libraries/util/app_error.c
${NRF_SDK_DIR}/components/libraries/util/app_error_handler_gcc.c
${NRF_SDK_DIR}/components/libraries/util/app_error_weak.c
${NRF_SDK_DIR}/components/libraries/util/app_util_platform.c
${NRF_SDK_DIR}/components/libraries/strerror/nrf_strerror.c
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
set(ATOMIC_SRC
${NRF_SDK_DIR}/components/libraries/atomic/nrf_atomic.c
${NRF_SDK_DIR}/components/libraries/atomic_fifo/nrf_atfifo.c
${NRF_SDK_DIR}/components/libraries/atomic_flags/nrf_atflags.c
${NRF_SDK_DIR}/components/libraries/memobj/nrf_memobj.c
${NRF_SDK_DIR}/components/libraries/balloc/nrf_balloc.c
${NRF_SDK_DIR}/components/libraries/ringbuf/nrf_ringbuf.c
)
set(USBD_SRC
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_core.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_serial_num.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_string_desc.c
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm/app_usbd_cdc_acm.c
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger/app_usbd_nrf_dfu_trigger.c
)
set(SOFTDEVICE_SRC
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_freertos.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_ble.c
)
set(BLE_SRC
${NRF_SDK_DIR}/components/ble/common/ble_advdata.c
${NRF_SDK_DIR}/components/ble/common/ble_conn_state.c
${NRF_SDK_DIR}/components/ble/common/ble_srv_common.c
${NRF_SDK_DIR}/components/ble/ble_advertising/ble_advertising.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis/ble_dis.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu_unbonded.c
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt/nrf_ble_gatt.c
)
set(PRINTF_SRC
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf.c
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf_format.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT_printf.c
)
set(NRFX_DRIVERS_SRC
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_clock.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_power.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_usbd.c
${NRF_SDK_DIR}/modules/nrfx/soc/nrfx_atomic.c
)
set(NRFX_LEGACY_SRC
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_clock.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_power.c
)
set(EXPERIMENTAL_SRC
${NRF_SDK_DIR}/components/libraries/experimental_section_vars/nrf_section_iter.c
)
set(PWR_MGMT_SRC
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
add_library(sdk OBJECT
${STARTUP_SRC}
${LOGGING_SRC}
${UTILS_SRC}
${ATOMIC_SRC}
${USBD_SRC}
${SOFTDEVICE_SRC}
${BLE_SRC}
${PRINTF_SRC}
${NRFX_DRIVERS_SRC}
${NRFX_LEGACY_SRC}
${EXPERIMENTAL_SRC}
${PWR_MGMT_SRC}
)
target_include_directories(sdk PUBLIC
${NRF_SDK_DIR}/components/ble/ble_db_discovery
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis_c
${NRF_SDK_DIR}/components/ble/common/
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt
${NRF_SDK_DIR}/components/ble/nrf_ble_gq
${NRF_SDK_DIR}/components/ble/nrf_ble_scan
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu
${NRF_SDK_DIR}/components/ble/ble_advertising
${NRF_SDK_DIR}/components/ble/peer_manager
${NRF_SDK_DIR}/components/libraries/atomic
${NRF_SDK_DIR}/components/libraries/atomic_flags
${NRF_SDK_DIR}/components/libraries/balloc
${NRF_SDK_DIR}/components/libraries/delay
${NRF_SDK_DIR}/components/libraries/experimental_section_vars
${NRF_SDK_DIR}/components/libraries/log
${NRF_SDK_DIR}/components/libraries/log/src
${NRF_SDK_DIR}/components/libraries/memobj
${NRF_SDK_DIR}/components/libraries/queue
${NRF_SDK_DIR}/components/libraries/ringbuf
${NRF_SDK_DIR}/components/libraries/strerror
${NRF_SDK_DIR}/components/libraries/util
${NRF_SDK_DIR}/components/libraries/block_dev
${NRF_SDK_DIR}/components/libraries/bootloader
${NRF_SDK_DIR}/components/libraries/bootloader/ble_dfu
${NRF_SDK_DIR}/components/libraries/bootloader/dfu
${NRF_SDK_DIR}/components/libraries/pwr_mgmt
${NRF_SDK_DIR}/components/libraries/usbd
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger
${NRF_SDK_DIR}/components/libraries/atomic_fifo
${NRF_SDK_DIR}/components/libraries/svc
${NRF_SDK_DIR}/components/libraries/mutex
${NRF_SDK_DIR}/components/softdevice/common
${NRF_SDK_DIR}/components/softdevice/mbr/headers
${NRF_SDK_DIR}/components/softdevice/s140/headers
${NRF_SDK_DIR}/components/toolchain/cmsis/include
${NRF_SDK_DIR}/modules/nrfx
${NRF_SDK_DIR}/modules/nrfx/hal
${NRF_SDK_DIR}/modules/nrfx/mdk
${NRF_SDK_DIR}/modules/nrfx/drivers/include
${NRF_SDK_DIR}/external/fprintf
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52
${NRF_SDK_DIR}/external/freertos/source/include
${NRF_SDK_DIR}/external/segger_rtt
${NRF_SDK_DIR}/external/utf_converter
${NRF_SDK_DIR}/integration/nrfx
${NRF_SDK_DIR}/integration/nrfx/legacy
)
target_link_libraries(sdk PRIVATE
prj_config
)
+114
View File
@@ -0,0 +1,114 @@
#include "cpg11_dev_mode.h"
#include "pel.h"
#include "elite_board.h"
#include "elite_def.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include "tw1508.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define VERSION_DATE_YEAR 24
#define VERSION_DATE_MONTH 9
#define VERSION_DATE_DAY 26
#define VERSION_DATE_HOUR 11
#define VERSION_DATE_MINUTE 04
static void cis_version(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t cis_ver[] = {
CIS_VERSION,
VERSION_DATE_YEAR,
VERSION_DATE_MONTH,
VERSION_DATE_DAY,
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)cis_ver, sizeof(cis_ver));
}
static void vis_rst(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
}
void dev_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t func_id;
uint8_t opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->func_id)
{
case 0x00:
dev_mode_electrode_switch(ins);
break;
case 0x01:
dev_mode_tw1508(ins);
break;
case 0x02:
dev_mode_ctrl_cpg11_electrodes_task(ins);
break;
case 0x03:
dev_mode_adapter_block_switch(ins);
break;
// 0xA0 to 0xBF are reserved for controlling the BMD380
case 0xA0:
dev_mode_gpio(ins);
break;
case 0xA1:
// spi
break;
case 0xA2:
// i2c
break;
// 0xF0 to 0xFF are reserved for calibration
case 0xF0:
// cali
break;
default:
break;
}
}
const elite_instance_t cpg_elite_instance = {
.cis_func = {
[CIS_VERSION] = cis_version,
},
.vis_func = {
[VIS_RST] = vis_rst,
},
.ris_func = {
[DEV_MODE] = dev_mode,
}
};
const elite_instance_t *cpg_init(void)
{
tw1508_init();
tw1508_set(5, 5); // 5*0.13= 0.65mA, formula:value*0.13=mA
return &cpg_elite_instance;
}
#endif
+15
View File
@@ -0,0 +1,15 @@
#ifndef __CPG_H__
#define __CPG_H__
#ifdef __cplusplus
extern "C"
{
#endif
const elite_instance_t *cpg_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG_H__ */
+1599
View File
File diff suppressed because it is too large Load Diff
+24
View File
@@ -0,0 +1,24 @@
#ifndef __CPG11_DEV_MODE_H__
#define __CPG11_DEV_MODE_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_button.h"
#include "elite_board.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
void dev_mode_electrode_switch(uint8_t *ins);
void dev_mode_tw1508(uint8_t *ins);
void dev_mode_ctrl_cpg11_electrodes_task(uint8_t *ins);
void dev_mode_adapter_block_switch(uint8_t *ins);
void dev_mode_gpio(uint8_t *ins);
#endif
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG11_DEV_MODE_H__ */
+57 -142
View File
@@ -19,8 +19,7 @@ typedef struct
const uint32_t gpiote_idx[4];
NRF_TIMER_Type *TMR_A;
NRF_TIMER_Type *TMR_B;
uint32_t TMR_A_IRQn;
uint32_t TMR_B_IRQn;
uint32_t IRQn;
pulse_gen_t *p_pulse_gen;
struct
{
@@ -31,46 +30,27 @@ typedef struct
} pulse_gen_hw_t;
pulse_gen_hw_t pulse_gen_hw[] = {
{ .gpiote_idx = { 0, 1, 2, 3 },
{.gpiote_idx = { 0, 1, 2, 3 },
.TMR_A = NRF_TIMER1,
.TMR_B = NRF_TIMER3,
.TMR_A_IRQn = TIMER1_IRQn,
.TMR_B_IRQn = TIMER3_IRQn,
.IRQn = TIMER3_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 } },
{ .gpiote_idx = { 4, 5, 6, 7 },
.private = { NULL, 0, 0 }},
{.gpiote_idx = { 4, 5, 6, 7 },
.TMR_A = NRF_TIMER2,
.TMR_B = NRF_TIMER4,
.TMR_A_IRQn = TIMER2_IRQn,
.TMR_B_IRQn = TIMER4_IRQn,
.IRQn = TIMER4_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 } },
.private = { NULL, 0, 0 }},
};
__STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
__STATIC_INLINE void cpg11_tmr_cb(uint32_t hw_idx)
{
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
}
__STATIC_INLINE void cpg11_tmrB_cb(uint32_t hw_idx)
{
if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3])
if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4])
{
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4] = 0;
pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3] = 0;
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
@@ -83,71 +63,21 @@ __STATIC_INLINE void cpg11_tmrB_cb(uint32_t hw_idx)
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
pulse_gen_hw[hw_idx].private.select = sel;
config_tmrB(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
return;
}
}
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
}
}
__STATIC_INLINE void config_tmrA(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
{
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1 + p_pulse_gen->idle_us * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
}
__STATIC_INLINE void cpg11_tmrA_cb(uint32_t hw_idx)
{
if (pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3])
{
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3] = 0;
for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
{
sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
config_tmrA(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
cpg11_pulse_start(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
return;
}
}
}
}
void TIMER1_IRQHandler(void)
{
cpg11_tmrA_cb(0);
}
void TIMER3_IRQHandler(void)
{
cpg11_tmrB_cb(0);
}
void TIMER2_IRQHandler(void)
{
cpg11_tmrA_cb(1);
cpg11_tmr_cb(0);
}
void TIMER4_IRQHandler(void)
{
cpg11_tmrB_cb(1);
cpg11_tmr_cb(1);
}
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id)
@@ -193,11 +123,8 @@ void cpg11_pulse_stop(uint32_t hw_idx)
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
@@ -210,11 +137,8 @@ void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
@@ -262,10 +186,9 @@ void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
NRF_PPI->CHENSET = (1 << (offs + 6));
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->FORK[offs + 7].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->TASKS_START;
NRF_PPI->CHENSET = (1 << (offs + 7));
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->CHENSET = (1 << (offs + 7));
pulse_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
@@ -274,18 +197,17 @@ void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
pulse_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
pulse_gen_hw[hw_idx].TMR_B->CC[4] = pulse_gen_hw[hw_idx].TMR_B->CC[3] + p_pulse_gen->idle_us * 16;
pulse_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE4_STOP_MASK | NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE4_MASK;
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1;
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
pulse_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_A->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1;
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
pulse_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].IRQn);
pulse_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
}
@@ -299,11 +221,8 @@ void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
@@ -313,13 +232,6 @@ void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
vPortFree(pulse_gen_hw[hw_idx].private.p_pulse_gen);
}
uint32_t swap_idle_us = p_pulse_gen[len - 1].idle_us;
for (int i = len - 1; i > 0; i--)
{
p_pulse_gen[i].idle_us = p_pulse_gen[i - 1].idle_us;
}
p_pulse_gen[0].idle_us = swap_idle_us;
pulse_gen_hw[hw_idx].p_pulse_gen = p_pulse_gen;
pulse_gen_hw[hw_idx].private.len = len;
pulse_gen_hw[hw_idx].private.select = 0;
@@ -362,13 +274,13 @@ void cpg_pulse_default_demo_ext(void)
.VAxH = VA2H_PIN,
.VAxL = VA2L_PIN,
.point_us[0] = 1,
.point_us[1] = 100,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 100,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 2000,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_B,
};
@@ -379,13 +291,13 @@ void cpg_pulse_default_demo_ext(void)
.VAxH = VA3H_PIN,
.VAxL = VA3L_PIN,
.point_us[0] = 1,
.point_us[1] = 150,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 150,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 3000,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_C,
};
@@ -396,18 +308,18 @@ void cpg_pulse_default_demo_ext(void)
.VAxH = VA4H_PIN,
.VAxL = VA4L_PIN,
.point_us[0] = 1,
.point_us[1] = 200,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 200,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 4000,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_D,
.pulse_id = PULSE_ID_B,
};
if (e1)
if(e1)
{
nrf_gpio_pin_clear(p_pulse_genA[0].VBxL);
nrf_gpio_pin_clear(p_pulse_genA[0].VBxH);
@@ -415,7 +327,7 @@ void cpg_pulse_default_demo_ext(void)
nrf_gpio_pin_clear(p_pulse_genA[0].VAxH);
}
if (e2)
if(e2)
{
nrf_gpio_pin_clear(p_pulse_genA[1].VBxL);
nrf_gpio_pin_clear(p_pulse_genA[1].VBxH);
@@ -423,7 +335,7 @@ void cpg_pulse_default_demo_ext(void)
nrf_gpio_pin_clear(p_pulse_genA[1].VAxH);
}
if (e3)
if(e3)
{
nrf_gpio_pin_clear(p_pulse_genB[0].VBxL);
nrf_gpio_pin_clear(p_pulse_genB[0].VBxH);
@@ -431,7 +343,7 @@ void cpg_pulse_default_demo_ext(void)
nrf_gpio_pin_clear(p_pulse_genB[0].VAxH);
}
if (e4)
if(e4)
{
nrf_gpio_pin_clear(p_pulse_genB[1].VBxL);
nrf_gpio_pin_clear(p_pulse_genB[1].VBxH);
@@ -439,17 +351,18 @@ void cpg_pulse_default_demo_ext(void)
nrf_gpio_pin_clear(p_pulse_genB[1].VAxH);
}
if (e1 && e2)
{
cpg11_pulse_init(0, p_pulse_genA, 2);
cpg11_pulse_start(0, p_pulse_genA);
}
else if (e1 && e2 == 0)
else if (e1 && e2==0)
{
cpg11_pulse_init(0, p_pulse_genA, 1);
cpg11_pulse_start(0, p_pulse_genA);
}
else if (e2 && e1 == 0)
else if (e2 && e1==0)
{
cpg11_pulse_init(0, &p_pulse_genA[1], 1);
cpg11_pulse_start(0, &p_pulse_genA[1]);
@@ -460,16 +373,17 @@ void cpg_pulse_default_demo_ext(void)
cpg11_pulse_init(1, p_pulse_genB, 2);
cpg11_pulse_start(1, p_pulse_genB);
}
else if (e3 && e4 == 0)
else if (e3 && e4==0)
{
cpg11_pulse_init(1, p_pulse_genB, 1);
cpg11_pulse_start(1, p_pulse_genB);
}
else if (e4 && e3 == 0)
else if (e4 && e3==0)
{
cpg11_pulse_init(1, &p_pulse_genB[1], 1);
cpg11_pulse_start(1, &p_pulse_genB[1]);
}
}
void cpg11_io_init(void)
@@ -478,8 +392,7 @@ void cpg11_io_init(void)
LED_R_PIN,
LED_G_PIN,
CS_MEM_PIN,
ADPT_CLR_PIN,
ADPT_LE_PIN
ADPT_CLR_PIN
};
const uint32_t pel_pins_default_low[] = {
@@ -491,6 +404,7 @@ void cpg11_io_init(void)
SPIM_CLK_PIN,
SPIM_MOSI_PIN,
SPIM_MISO_PIN,
ADPT_LE_PIN,
ADPT0_S4_PIN,
ADPT0_S3_PIN,
ADPT0_S2_PIN,
@@ -546,8 +460,7 @@ void cpg11_io_init(void)
pulse_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
pulse_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_B_IRQn, _PRIO_APP_HIGH);
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_A_IRQn, _PRIO_APP_HIGH);
sd_nvic_SetPriority(pulse_gen_hw[i].IRQn, _PRIO_APP_HIGH);
}
for (int i = 0; i < 2; i++)
@@ -569,6 +482,8 @@ void cpg11_io_init(void)
pulse_gen_hw[i].private.p_pulse_gen[1].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[1].VBxL = 0xFFFFFFFF;
}
cpg_pulse_default_demo_ext();
}
#endif
+97
View File
@@ -0,0 +1,97 @@
#ifndef __CPG10_IO_H__
#define __CPG10_IO_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define UNDEF_GPIO 0xFFFFFFFF
#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
#define VA1L_PIN NRF_GPIO_PIN_MAP(0, 25)
#define VB1H_PIN NRF_GPIO_PIN_MAP(0, 19)
#define VB1L_PIN NRF_GPIO_PIN_MAP(0, 21)
#define VA2H_PIN NRF_GPIO_PIN_MAP(0, 17)
#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
#define ADPT_CLK_PIN NRF_GPIO_PIN_MAP(0, 11)
#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define VB2H_PIN NRF_GPIO_PIN_MAP(0, 8)
#define VB2L_PIN NRF_GPIO_PIN_MAP(0, 6)
#define VA3H_PIN NRF_GPIO_PIN_MAP(0, 5)
#define VA3L_PIN NRF_GPIO_PIN_MAP(0, 27)
#define VB3H_PIN NRF_GPIO_PIN_MAP(0, 26)
#define VB3L_PIN NRF_GPIO_PIN_MAP(0, 4)
#define VA4H_PIN NRF_GPIO_PIN_MAP(0, 1)
#define VA4L_PIN NRF_GPIO_PIN_MAP(0, 0)
#define ADPT_LE_PIN NRF_GPIO_PIN_MAP(0, 31)
#define ADPT_CLR_PIN NRF_GPIO_PIN_MAP(1, 15)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 2)
#define AIN0_PIN NRF_GPIO_PIN_MAP(0, 30)
#define AIN1_PIN NRF_GPIO_PIN_MAP(0, 28)
#define ADPT0_S4_PIN NRF_GPIO_PIN_MAP(1, 12)
#define ADPT0_S3_PIN NRF_GPIO_PIN_MAP(1, 14)
#define ADPT0_S2_PIN NRF_GPIO_PIN_MAP(0, 3)
#define ADPT0_S1_PIN NRF_GPIO_PIN_MAP(1, 13)
#define ADPT1_S4_PIN NRF_GPIO_PIN_MAP(1, 3)
#define ADPT1_S3_PIN NRF_GPIO_PIN_MAP(1, 10)
#define ADPT1_S2_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ADPT1_S1_PIN NRF_GPIO_PIN_MAP(1, 11)
#define LED_R_PIN NRF_GPIO_PIN_MAP(0, 10)
#define LED_G_PIN NRF_GPIO_PIN_MAP(0, 9)
#define LED_B_PIN NRF_GPIO_PIN_MAP(1, 2)
#define VB4H_PIN NRF_GPIO_PIN_MAP(0, 24)
#define VB4L_PIN NRF_GPIO_PIN_MAP(0, 23)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define TW_SDI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define ADPT_DIN_PIN NRF_GPIO_PIN_MAP(0, 7)
#define PULSE_ID_NULL 0
#define PULSE_ID_A 1
#define PULSE_ID_B 2
#define PULSE_ID_C 3
#define PULSE_ID_D 4
typedef struct
{
uint32_t VAxH;
uint32_t VAxL;
uint32_t VBxH;
uint32_t VBxL;
uint32_t idle_us; // min: 500us, max: 60sec
uint32_t point_us[7]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t pulse_id; // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
} pulse_gen_t;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void cpg11_io_init(void);
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
void cpg11_pulse_stop(uint32_t hw_idx);
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG10_IO_H__ */
View File
View File
-28
View File
@@ -1,28 +0,0 @@
import os
import sys
import serial.tools.list_ports
def find_com_port(vid, pid):
ports = serial.tools.list_ports.comports()
for port in ports:
if port.vid == vid and port.pid == pid:
print(f"Found device: {port.device}")
print(f"Description: {port.description}")
print(f"HWID: {port.hwid}")
return port.device
print(f"No COM port found for VID={vid:04X}, PID={pid:04X}")
return None
def main(args):
os.chdir(os.path.dirname(os.path.realpath(__file__)))
portname = find_com_port(0x1915, 0x521F)
if portname is None:
return
else:
os.system('nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -b 115200 -p ' + portname)
if __name__ == '__main__':
main(sys.argv)
#nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -snr DC051F1F71DA
+142
View File
@@ -0,0 +1,142 @@
#ifndef __EDC_H__
#define __EDC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "dac_drv.h"
#include "elite_def.h"
#include <stdbool.h>
#include <stdint.h>
/** Iin, Vin, Vout **/
#define RIS_ADC_IIN 0x00
#define RIS_ADC_VIN 0x01
#define RIS_DAC_VOUT 0x02
#define RIS_HIGH_Z 0x03
#define RIS_ADC_VOUT 0x04
#define RIS_ADC_BAT 0x05
// ADC Iin gain level !!! move to ADC.h in future
#define I_GAIN_3M 0x00 // lv0,largest gain
#define I_GAIN_100K 0x01 // lv1
#define I_GAIN_3K 0x02 // lv2
#define I_GAIN_100R 0x03 // lv3,the least gain
#define I_GAIN_AUTO 0x04
// ADC Vin gain level !!! move to ADC.h in future
#define VIN_GAIN_1M 0x00
#define VIN_GAIN_30K 0x01
#define VIN_GAIN_1K 0x02
#define VIN_GAIN_AUTO 0x03
// DAC Vout gain level !!! move to DAC.h in future
#define VOUT_GAIN_240K 0x00
#define VOUT_GAIN_15K 0x01
#define VOUT_GAIN_AUTO 0x02
/* DAC reset parameter */
#define DAC_ZERO 25000 // DAC_ZERO is about 0V
// Step time macro
#define STEPTIME_HALF_SEC 5000
#define STEPTIME_ONE_SEC 10000
#define STEPTIME_TWO_SEC 20000
typedef struct
{
void (*init)(void);
elite_instance_t *p_elite_instance;
struct
{
uint32_t chip_id;
uint32_t eliteFxn;
// time relation
uint32_t VsetRateIndex;
uint32_t VsetRate;
uint32_t sampleRate;
uint32_t notifyRate;
uint32_t period;
int32_t Vset;
uint32_t VoltConstant;
uint32_t directionInit;
uint32_t step;
uint32_t Ve1;
uint32_t Ve2;
int32_t Vinit;
int32_t Vmax;
int32_t Vmin;
uint32_t steptime;
uint32_t IinADCAutoGainEn;
uint32_t VinADCAutoGainEn;
uint32_t VoutAutoGainEn;
uint32_t IinADCGainLv;
uint32_t VinADCGainLv;
uint32_t VoutGainLv;
uint32_t gain_switch_on;
uint32_t AdcChannel;
bool hign_z_en;
uint32_t cycleNumber;
uint32_t charge;
int32_t constantCurrent;
// uint32_t cc_resistance;
uint32_t cc_cp_speed;
// uni pulse mode
int32_t v0;
uint32_t t_pulse[4];
int32_t v_initial[4];
int32_t v_slope[4];
int32_t v_step[4];
uint32_t t_pulse_min[4];
uint32_t t_pulse_max[4];
int32_t v_stop;
int32_t v_up;
int32_t v_low;
bool v_invert_option;
bool v_stop_direction;
int32_t v_1;
int32_t v_2;
int32_t Vout;
// not use
int32_t Currentmax;
uint32_t VoViSwitch;
} instru;
} edc20_t;
typedef struct
{
float coeff;
float offset;
} edc20_cal_data_t;
typedef struct
{
struct
{
float coeff;
float offset;
} dac_c;
struct
{
float coeff;
float offset;
float Voffset;
} dac_f[3];
} edc20_dac_cal_data_t;
extern edc20_t edc;
#ifdef __cplusplus
}
#endif
#endif /* ! __EDC_H__ */
+52 -118
View File
@@ -1,72 +1,27 @@
#include "app_config.h"
#include "elite_board.h"
#include "elite_edc_v2_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc.h"
#include "elite.h"
#include "elite_adc.h"
#include "elite_correction.h"
#include "elite_dac.h"
#include "adc_drv.h"
#include "dac_drv.h"
#include "elite.h"
#include "elite_board.h"
#include "led_drv.h"
#include "sw_drv.h"
#include "nrf_log.h"
#include "timers.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
#define CURVE_IV 0x01 // I-V Curve
#define CURVE_IV_CY 0x02 // Cycle I-V
#define CURVE_VO 0x03 // Function Generator
#define CURVE_RT 0x04 // R-T Graph
#define CURVE_VT 0x05 // V-T Graph
#define CURVE_IT 0x06 // I-T Graph
#define CURVE_CC 0x07 // Constant Current (CC)
#define CURVE_OCP 0x08 // Open Circuit Potential (OCP)
#define CURVE_CV 0x09 // Cyclic Voltammetry (CV)
#define CURVE_LSV 0x0A // Linear Sweep Voltammetry (LSV)
#define CURVE_CA 0x0B // Chronoamperometric Graph (CA)
#define CURVE_CP 0x0C // Chronopotentiometry (CP)
#define CURVE_UNI_PULSE 0x0D // Pulse Sensing (universal pulse)
#define CURVE_DPV 0x0E // Differential Pulse Voltammetry (DPV)
#define CURVE_DPV_ADVANCE 0x0F
#define CURVE_DPV_SMPRATE 0x10
#define CURVE_DPV_ADVANCE_SMPRATE 0x11
#define CURVE_EIS 0x12
#define CURVE_CF 0x13 // Constant Frequency(CF)
#define CURVE_CALI 0xF1
#define SET_SAMPLE_RATE 0xE0
extern ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len);
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
// ADC Iin gain level !!! move to ADC.h in future
#define I_GAIN_3M 0x00 // lv0,largest gain
#define I_GAIN_100K 0x01 // lv1
#define I_GAIN_3K 0x02 // lv2
#define I_GAIN_100R 0x03 // lv3,the least gain
#define I_GAIN_AUTO 0x04
// ADC Vin gain level !!! move to ADC.h in future
#define VIN_GAIN_1M 0x00
#define VIN_GAIN_30K 0x01
#define VIN_GAIN_1K 0x02
#define VIN_GAIN_AUTO 0x03
#define DEV_SHINY_DELAY_MS 3000
static TimerHandle_t dev_shiny_timer_handle = NULL;
extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);
static void dummy(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
}
/*
dev_mode_set_led
@@ -440,7 +395,6 @@ static void dev_mode_read_output_pin(void)
output.cs_mem = nrf_gpio_pin_out_read(CS_MEM_PIN);
output.cs_adc = nrf_gpio_pin_out_read(CS_ADC_PIN);
output.cs_dac = nrf_gpio_pin_out_read(CS_DAC_PIN);
output.resvd = 0;
pin_out_status = (output.resvd << 21) |
(output.power_5v_en << 20) |
@@ -465,7 +419,7 @@ static void dev_mode_read_output_pin(void)
(output.cs_adc << 1) |
output.cs_dac;
le_event_update((uint8_t *)&pin_out_status, sizeof(pin_out_status));
le_event_upadate((uint8_t *)&pin_out_status, sizeof(pin_out_status));
NRF_LOG_INFO("pin_out_status = 0x%08X", pin_out_status);
NRF_LOG_INFO("| %-32s | %d |", "pin_out_status[31:21] resvd", output.resvd);
@@ -507,14 +461,13 @@ static void dev_mode_read_input_pin(void)
input.vbat = nrf_gpio_pin_read(VBAT_PIN);
input.shut_down = nrf_gpio_pin_read(SHUT_DOWN_PIN);
input.int9466 = nrf_gpio_pin_read(INT9466_PIN);
input.resvd = 0;
pin_input_status = (input.resvd << 3) |
(input.vbat << 2) |
(input.shut_down << 1) |
input.int9466;
le_event_update((uint8_t *)&pin_input_status, sizeof(pin_input_status));
le_event_upadate((uint8_t *)&pin_input_status, sizeof(pin_input_status));
NRF_LOG_INFO("pin_input_status = 0x%08X", pin_input_status);
NRF_LOG_INFO("| %-32s | %d |", "pin_input_status[31:3] resvd", input.resvd);
@@ -717,7 +670,7 @@ static void dev_mode_spi2_transfer(uint8_t *ins, uint16_t size)
if (miso_data_len > 0)
{
le_event_update(miso_data, miso_data_len);
le_event_upadate(miso_data, miso_data_len);
}
}
@@ -892,8 +845,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
.hh = 22,
.mm = 40,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update((void *)&cis_ver, sizeof(cis_ver));
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_ver, sizeof(cis_ver));
}
__WEAK uint16_t bat_volt_read(void)
@@ -914,8 +867,8 @@ static void cis_volt(uint8_t *ins, uint16_t size)
.opcode = CIS_VOLT,
.volt = bat_volt_read(),
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update((void *)&cis_volt, sizeof(cis_volt));
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_volt, sizeof(cis_volt));
}
__WEAK uint16_t temperature_read(void)
@@ -937,74 +890,52 @@ static void cis_temperature(uint8_t *ins, uint16_t size)
.opcode = CIS_TEMPERATURE,
.temperature = __REV(temperature_read()),
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update((void *)&cis_temperature, sizeof(cis_temperature));
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_temperature, sizeof(cis_temperature));
}
static void cis_cali(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static bool DACReset;
static void vis_rst(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
edc.instru.eliteFxn = VIS_RST;
edc.instru.VinADCGainLv = VIN_GAIN_1K;
VinADCGainCtrl(edc.instru.VinADCGainLv);
edc.instru.IinADCGainLv = I_GAIN_100R;
IinADCGainCtrl(edc.instru.IinADCGainLv);
edc.instru.VoutGainLv = VOUT_GAIN_15K;
VoutGainControl(edc.instru.VoutGainLv);
uint16_t volt = Usercode_Correction_to_DAC(edc.instru.VoutGainLv, 25000);
dac_write_through(DAC0, volt);
led_mode(NO_EVENT);
}
static void vis_sti(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void vis_int(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void dev_shiny_callback(TimerHandle_t xTimer)
{
extern bool is_ble_connected(void);
if (!is_ble_connected())
{
led_set(LED_IDLE_DISCONNECTED);
return;
}
extern bool is_mode_running(void);
if (is_mode_running())
{
led_set(LED_REC);
}
else
{
led_set(LED_IDLE_CONNECTED);
}
}
void start_dev_shiny_timer(void)
{
if (dev_shiny_timer_handle == NULL)
{
dev_shiny_timer_handle = xTimerCreate("dev_shiny_timer",
pdMS_TO_TICKS(DEV_SHINY_DELAY_MS),
pdFALSE,
NULL,
dev_shiny_callback);
if (dev_shiny_timer_handle == NULL)
{
NRF_LOG_ERROR("dev_shiny_timer creation failed");
return;
}
}
if (xTimerStart(dev_shiny_timer_handle, 0) != pdPASS)
{
NRF_LOG_ERROR("dev_shiny_timer start failed");
}
}
static void vis_dev_shiny(uint8_t *ins, uint16_t size)
static void vis_device_shiny(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
led_set(LED_IDENTIFY_DEV);
start_dev_shiny_timer();
led_set(LED_IDENTICY_DEV);
}
static void vis_shiny_dis(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
led_set(LED_IDEL_CONNECTED);
}
static void curve_iv(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void curve_iv_cy(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
extern void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size);
extern void edc20_cycle_iv_mode_start(uint8_t * ins, uint16_t size);
edc20_cycle_iv_mode_start(ins, size);
}
@@ -1037,7 +968,10 @@ elite_instance_t edc20_elite_instance = {
},
.vis_func = {
[VIS_RST] = vis_rst,
[VIS_DEVICE_SHINY] = vis_dev_shiny,
[VIS_STI] = vis_sti,
[VIS_INT] = vis_int,
[VIS_DEVICE_SHINY] = vis_device_shiny,
[VIS_SHINY_DIS] = vis_shiny_dis,
},
.ris_func = {
[CURVE_IV] = curve_iv,
@@ -1,12 +1,7 @@
#include "app_config.h"
#include "elite_edc_v2_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc.h"
#include "elite_board.h"
#include "dac_drv.h"
#include "elite.h"
#include "elite_board.h"
#include "nrf.h"
#include "nrf_log.h"
@@ -21,6 +16,8 @@
#include <stdlib.h>
#include <string.h>
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define OUT_0 DAC0
#define OUT_1 DAC1
@@ -314,7 +311,6 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
NRF_LOG_INFO("%s", info);
}
led_set(LED_REC);
dac_write_through(OUT_0, mV_out_0(&dac_param));
dac_param.mV_output = dac_param.mV_start;
@@ -354,7 +350,6 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
edc20_dac_tim_stop();
edc20_adc_tim_stop();
dac_init();
led_set(LED_IDLE_CONNECTED);
if (1)
{
@@ -366,9 +361,70 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
vTaskDelete(NULL);
}
void edc20_cycle_iv_mode_init(void)
{
}
#define VDIRECTION(v1, v2) ((v1 > v2) ? 0 : 1)
#define VMAX(v1, v2) ((v1 >= v2) ? v1 : v2)
#define VMIN(v1, v2) ((v1 < v2) ? v1 : v2)
// Step time macro
#define STEPTIME_HALF_SEC 5000
#define STEPTIME_ONE_SEC 10000
#define STEPTIME_TWO_SEC 20000
static uint32_t step2VsetRate(uint32_t step)
{
/*step = 100 mv, index = 0, n = 2
10 mv, index = 1, n = 10
1 mv, index = 2, n = 100
0.1 mv, index = 3, n = 1000
0.01mv, index = 4, n = 10000 */
if (step >= 10000)
{
return 0;
}
else if (step >= 1000)
{
return 1;
}
else if (step >= 100)
{
return 2;
}
else if (step >= 10)
{
return 3;
}
else if (step >= 1)
{
return 4;
}
else
{
return 5;
}
}
static uint32_t get_step_time(uint8_t StepTime)
{
switch (StepTime)
{
case 0: { // 0.5 sec
return STEPTIME_HALF_SEC;
}
case 1: { // 1 sec
return STEPTIME_ONE_SEC;
}
case 2: { // 2 sec
return STEPTIME_TWO_SEC;
}
default: { // 1 sec
return STEPTIME_ONE_SEC;
}
}
}
#define STEP_TO_VSETRATE(step) step2VsetRate(step)
const uint32_t VsetRateTable[5] = { 2, 10, 100, 1000, 10000 };
static uint32_t convt_uS_step(uint32_t idx)
{
@@ -389,24 +445,38 @@ static uint32_t convt_uS_step(uint32_t idx)
}
}
bool is_mode_running(void)
{
return running;
}
void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size)
{
/*
instru.eliteFxn = CURVE_IV_CY;
instru.Ve1 = ((uint16_t)(ins[3]) << 8) | (uint16_t)(ins[4]);
instru.Ve2 = ((uint16_t)(ins[5]) << 8) | (uint16_t)(ins[6]);
instru.Vinit = (int32_t)instru.Ve1;
instru.Vmax = (int32_t)VMAX(instru.Ve1,instru.Ve2);
instru.Vmin = (int32_t)VMIN(instru.Ve1,instru.Ve2);
instru.directionInit = VDIRECTION(instru.Ve1,instru.Ve2);
instru.steptime = get_step_time(ins[9]); //5000;10000;20000;
instru.step = ((uint32_t)(ins[7]) << 8) | (uint32_t)(ins[8]);//1~1000 = 0.1mv ~ 100mv
instru.step = instru.step * 100000 / instru.steptime;
STEP_TO_VSETRATE(instru.step);
instru.VsetRate = VsetRateTable[instru.VsetRateIndex];//N
instru.cycleNumber = ((uint16_t)(ins[10]) << 8) | (uint16_t)(ins[11]);
instru.hign_z_en = ins[13] & 0x0F;
instru.notifyRate = ((uint32_t)ins[14] << 8) | (uint32_t)ins[15];
instru.notifyRate = 10000 / instru.notifyRate * 10;
*/
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint8_t : 8;
uint8_t : 8;
uint16_t volt_start; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t volt_stop; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t step; // unit: 100uV
uint8_t step_time; // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
uint16_t cycles; // 0 ~ 500000
uint16_t volt_start; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t volt_stop; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t step; // unit: 100uV
uint8_t step_time; // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
uint16_t cycles; // 0 ~ 500000
uint8_t : 8;
uint8_t hi_z_en; // lower nibble
uint16_t sample_rate; // unit: 0.1Hz
+41 -43
View File
@@ -2,14 +2,12 @@
#define __EDC20_IO_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include <stdint.h>
#include "nrf_drv_spi.h"
#include "nrf_gpio.h"
#include <stdint.h>
#define ADCA2_PIN NRF_GPIO_PIN_MAP(0, 25)
#define ADCA1_PIN NRF_GPIO_PIN_MAP(0, 19)
@@ -47,51 +45,51 @@ extern "C"
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
typedef struct
{
float mV_start;
float mV_stop;
float mV_step;
uint32_t uS_step;
uint32_t cycles;
bool hi_z_en;
} elite_dac_config_t;
typedef struct
{
float mV_start;
float mV_stop;
float mV_step;
uint32_t uS_step;
uint32_t cycles;
bool hi_z_en;
} elite_dac_config_t;
void gpio_init(void);
void circuit_selection_vin_0(void);
void circuit_selection_vin_1(void);
void circuit_selection_vin_2(void);
void circuit_selection_Iin_0(void);
void circuit_selection_Iin_1(void);
void circuit_selection_Iin_2(void);
void circuit_selection_Iin_3(void);
void circuit_selection_Iin_4(void);
void circuit_selection_dac_coarse_tune_c(void);
void circuit_selection_dac_fine_tune_f0(void);
void circuit_selection_dac_fine_tune_f1(void);
void circuit_selection_dac_fine_tune_f2(void);
void circuit_selection_cv3_config(void);
void circuit_selection_cc_config(void);
void circuit_selection_dac_circuit_open(void);
void gpio_init(void);
void circuit_selection_vin_0(void);
void circuit_selection_vin_1(void);
void circuit_selection_vin_2(void);
void circuit_selection_Iin_0(void);
void circuit_selection_Iin_1(void);
void circuit_selection_Iin_2(void);
void circuit_selection_Iin_3(void);
void circuit_selection_Iin_4(void);
void circuit_selection_dac_coarse_tune_c(void);
void circuit_selection_dac_fine_tune_f0(void);
void circuit_selection_dac_fine_tune_f1(void);
void circuit_selection_dac_fine_tune_f2(void);
void circuit_selection_cv3_config(void);
void circuit_selection_cc_config(void);
void circuit_selection_dac_circuit_open(void);
void twi_init(void);
void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);
void twi_init(void);
void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);
void spi_init(void);
void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
void spi2_set_mode(nrf_drv_spi_mode_t mode);
void spi_init(void);
void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
void spi2_set_mode(nrf_drv_spi_mode_t mode);
void edc20_io_init(void);
void edc20_io_power_off(void);
void edc20_io_power_on(void);
void edc20_io_init(void);
void edc20_io_power_off(void);
void edc20_io_power_on(void);
void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
void edc20_dac_tim_stop(void);
void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
void edc20_dac_tim_stop(void);
void edc20_adc_tim_start(elite_dac_config_t *p_config);
void edc20_adc_tim_stop(void);
void edc20_adc_tim_start(elite_dac_config_t *p_config);
void edc20_adc_tim_stop(void);
#ifdef __cplusplus
}
+16
View File
@@ -0,0 +1,16 @@
#ifndef __EIS_H__
#define __EIS_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "elite_def.h"
extern elite_instance_t eis_2_0;
#ifdef __cplusplus
}
#endif
#endif /* ! __EIS_H__ */
+6 -21
View File
@@ -1,19 +1,13 @@
#include "app_config.h"
#include "elite.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#include "elite_dev_v1_0.h"
#include "elite_dev.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "elite_edc_v2_0.h"
#include "edc.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "elite_pel_v2_0.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#include "elite_pel_v3_0.h"
#include "pel.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "elite_cpg_v1_1.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#include "elite_mmm_v1_0.h"
#include "cpg.h"
#else
#error "Unknown DEF_ELITE_MODEL"
#endif
@@ -73,11 +67,6 @@ static void decode_cis_ins(uint8_t *ins, uint16_t size)
}
}
// define BT instruction
#define INS_TYPE_RIS 0x30
#define INS_TYPE_VIS 0xC0
#define INS_TYPE_CIS 0x70
static void elite_instr_task(void *p_arg)
{
static size_t instr_size = 0;
@@ -118,12 +107,8 @@ void elite_init(void)
p_instance = edc.p_elite_instance;
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
p_instance = pel_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
p_instance = pel_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
p_instance = cpg_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
p_instance = mmm_init();
#else
#error "Unknown DEF_ELITE_MODEL"
#endif
@@ -135,8 +120,8 @@ void elite_init(void)
void elite_instr_send(void *p, size_t size)
{
/* reply the instruction */
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update(p, size);
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate(p, size);
xMessageBufferSend(instr_msg, p, size, portMAX_DELAY);
}
+23
View File
@@ -0,0 +1,23 @@
#ifndef __ELITE_H__
#define __ELITE_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "elite_def.h"
#include "app_config.h"
#include <stdbool.h>
#include <stdint.h>
#include <stdlib.h>
void elite_init(void);
void elite_instr_send(void *p, size_t size);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_H__ */
+8
View File
@@ -0,0 +1,8 @@
#include "elite_adc.h"
#include "nrf_log.h"
void IinADCGainCtrl(uint8_t IinADCLevel) { NRF_LOG_INFO("%s", __FUNCTION__); }
void VinADCGainCtrl(uint8_t VinADCLevel) { NRF_LOG_INFO("%s", __FUNCTION__); }
void AutoGainChangeIin(int32_t RealCurrent, uint16_t plot_type, uint16_t *no_rec_time) { NRF_LOG_INFO("%s", __FUNCTION__); }
void AutoGainChangeVin(int32_t RealVin) { NRF_LOG_INFO("%s", __FUNCTION__); }
+19
View File
@@ -0,0 +1,19 @@
#ifndef __ELITE_ADC_H__
#define __ELITE_ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
void IinADCGainCtrl(uint8_t IinADCLevel);
void VinADCGainCtrl(uint8_t VinADCLevel);
void AutoGainChangeIin(int32_t RealCurrent, uint16_t plot_type, uint16_t *no_rec_time);
void AutoGainChangeVin(int32_t RealVin);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_ADC_H__ */
+1 -25
View File
@@ -6,38 +6,16 @@ void elite_board_init(void)
edc20_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel20_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
pel30_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg11_io_init();
#endif
}
void elite_board_demo(void)
{
#if (DEF_ELITE_DEMO_WO_SOFTDEVICE || DEF_ELITE_DEMO_W_SOFTDEVICE)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
extern void pel_pulse_gen_demo(void);
pel_pulse_gen_demo();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
extern void pel_pulse_gen_demo(void);
pel_pulse_gen_demo();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg_pulse_default_demo_ext();
#endif
#endif
}
void elite_board_power_off(void)
{
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
edc20_io_power_off();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#endif
}
@@ -46,13 +24,11 @@ void elite_drv_init(void)
{
btn_init();
led_init();
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
sw_init();
adc_init();
dac_init();
fs_init();
usbd_init();
uart_init();
#if (DEF_FS_ENABLED && DEF_FS_RTT_DIR)
if (1)
+3 -9
View File
@@ -13,19 +13,14 @@ extern "C"
#include "fs.h"
#include "led_drv.h"
#include "sw_drv.h"
#include "uart_drv.h"
#include "usbd.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "elite_edc_v2_0_io.h"
#include "edc20_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "elite_pel_v2_0_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#include "elite_pel_v3_0_io.h"
#include "pel20_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "elite_cpg_v1_1_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#include "cpg11_io.h"
#else
#error "Not implemented xxx_io.h"
#endif
@@ -33,7 +28,6 @@ extern "C"
void elite_board_init(void);
void elite_board_power_off(void);
void elite_drv_init(void);
void elite_board_demo(void);
#ifdef __cplusplus
}
+3349
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File diff suppressed because it is too large Load Diff
+36
View File
@@ -0,0 +1,36 @@
#ifndef __ELITE_CORRECTION_H__
#define __ELITE_CORRECTION_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#define BOARD_EE_EF 1
struct formula_ctx_t
{
long long coeff;
long long offset;
};
struct correction_ctx_t
{
struct formula_ctx_t ADC_volt[3];
struct formula_ctx_t ADC_current[4];
struct formula_ctx_t Usercode2DAC[2];
struct formula_ctx_t ADC_Vout_volt[1];
uint16_t Gain0Boundary[2];
uint16_t Gain1Boundary[4];
uint16_t Gain2Boundary[2];
};
int32_t DecodeADCValue(uint8_t adc_gain, uint8_t adc_channel, uint16_t adc_rxbuf);
uint16_t Usercode_Correction_to_DAC(uint8_t dac_gain, uint16_t usercode);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_CORRECTION_H__ */
+55
View File
@@ -0,0 +1,55 @@
#include "elite_dac.h"
#include "edc.h"
static bool DACReset;
void VoutGainControl(uint8_t VOUTLevel)
{
switch (VOUTLevel)
{
case 0:
// VOUT gain level = 0, using 240K resister
break;
case 1:
// VOUT gain level = 1, using 15K resister
break;
case 2:
// VOUT gain level = 2, using 15K resister
break;
default:
// default using 15K resister
break;
}
}
int32_t User2Real(uint16_t usr_code)
{
/* transfer usr_code to real voltage value (mV) */
return (int32_t)((usr_code - 25000) / 5);
}
void AutoGainChangeVout(uint32_t *p_VoutGainLv, int32_t usr_code)
{
int32_t RealVolt = (usr_code - 25000) * 200; // (usr_code - 25000) / 5 * 1000 [1uV]
// switch to 1 level volt(small) 15K
// switch to 2 level volt(large) 240K
if (*p_VoutGainLv == VOUT_GAIN_15K)
{
if (RealVolt > DAC_VOUT_GAIN_LARGE_BOUNDARY || RealVolt < -1 * DAC_VOUT_GAIN_LARGE_BOUNDARY)
{
// switch to 2 level volt(large)
*p_VoutGainLv = VOUT_GAIN_240K;
VoutGainControl(edc.instru.VoutGainLv);
}
}
else if (*p_VoutGainLv == VOUT_GAIN_240K)
{
if (RealVolt < DAC_VOUT_GAIN_SMALL_BOUNDARY && RealVolt > -1 * DAC_VOUT_GAIN_SMALL_BOUNDARY)
{
// switch to 1 level volt(small)
*p_VoutGainLv = VOUT_GAIN_15K;
VoutGainControl(edc.instru.VoutGainLv);
}
}
}
+28
View File
@@ -0,0 +1,28 @@
#ifndef __ELITE_DAC_H__
#define __ELITE_DAC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdbool.h>
#include <stdint.h>
#define DACCLS 0x02
#define DACOUT 0x31
// DAC Vout theoretical boundary <300, 100~ (mV)
#define DAC_VOUT_GAIN_SMALL_BOUNDARY 100000 // 25500(usercode) = 100 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY 300000 // 26500(usercode) = 300 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY_USERCODE 26500 // 26500(usercode) = 300 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY1_USERCODE 23500 // 23500(usercode) = -300 mV
void VoutGainControl(uint8_t VOUTLevel);
int32_t User2Real(uint16_t UserCode);
void AutoGainChangeVout(uint32_t *p_VoutGainLv, int32_t usr_code);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_DAC_H__ */
+120
View File
@@ -0,0 +1,120 @@
#ifndef __ELITE_DEF_H__
#define __ELITE_DEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
// define BT instruction
#define INS_TYPE_RIS 0x30
#define INS_TYPE_VIS 0xC0
#define INS_TYPE_CIS 0x70
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_ASK 0x30
#define VIS_STI 0xC0
#define VIS_INT 0x60
#define VIS_DEVICE_SHINY 0x10
#define VIS_SHINY_DIS 0x20
// RIS (real instruction)
enum all_mode_e
{
CURVE_IV = 0x01, // I-V Curve
CURVE_IV_CY = 0x02, // Cycle I-V
CURVE_VO = 0x03, // Function Generator
CURVE_RT = 0x04, // R-T Graph
CURVE_VT = 0x05, // V-T Graph
CURVE_IT = 0x06, // I-T Graph
CURVE_CC = 0x07, // Constant Current (CC)
CURVE_OCP = 0x08, // Open Circuit Potential (OCP)
CURVE_CV = 0x09, // Cyclic Voltammetry (CV)
CURVE_LSV = 0x0A, // Linear Sweep Voltammetry (LSV)
CURVE_CA = 0x0B, // Chronoamperometric Graph (CA)
CURVE_CP = 0x0C, // Chronopotentiometry (CP)
CURVE_UNI_PULSE = 0x0D, // Pulse Sensing (universal pulse)
CURVE_DPV = 0x0E, // Differential Pulse Voltammetry (DPV)
CURVE_DPV_ADVANCE = 0x0F,
CURVE_DPV_SMPRATE = 0x10,
CURVE_DPV_ADVANCE_SMPRATE = 0x11,
CURVE_EIS = 0x12,
CURVE_CF = 0x13, // Constant Frequency(CF)
CURVE_CALI = 0xF1,
SET_SAMPLE_RATE = 0xE0,
DEV_MODE = 0xFF, // Develop Mode
};
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_LED_TEST 0x70
#define CIS_CALI 0x30
#define CIS_CALI2 0x90
#define CTL_WRT 0x20
#define CTL_RD 0x21
#define CTL_RD_DFTR 0x78
#define CTL_RD_DFTI 0x7C
#define CTL_RD_ADC 0x7A
#define CTL_RESET 0x11
// mode parameter
#define VMAX(v1, v2) ((v1 >= v2) ? v1 : v2)
#define VMIN(v1, v2) ((v1 < v2) ? v1 : v2)
#define VDIRECTION(v1, v2) ((v1 > v2) ? 0 : 1)
#define AFTER_READ_I 0
#define AFTER_READ_V 1
#define PARA_1 0x01
#define PARA_2 0x02
#define PARA_3 0x03
#define PARA_4 0x04
#define PARA_5 0x05
#define PARA_6 0x06
#define PARA_7 0x07
#define PARA_8 0x08
#define PARA_9 0x09
#define PARA_10 0x0A
#define PARA_11 0x0B
#define PARA_12 0x0C
#define PARA_13 0x0D
#define PARA_14 0x0E
#define PARA_15 0x0F
#define PARA_16 0x10
#define PARA_17 0x11
// Elite LED
#define COLOR_BLACK 0x00
#define COLOR_RED 0x01
#define COLOR_ORANGE 0x02
#define COLOR_YELLOW 0x03
#define COLOR_GREEN 0x04
#define COLOR_BLUE 0x05
#define COLOR_CYAN 0x06
#define COLOR_MAGENTA 0x07
#define COLOR_PURPLE 0x08
#define COLOR_WHITE 0x09
#define COLOR_YELLOWGREEN 0x0A
#define BT_WAIT 0x01
#define NO_EVENT 0x02
#define PRE_WORK 0x03
#define WORKING 0x04
#define POST_WORK 0x05
typedef struct
{
void (*cis_func[256])(uint8_t *ins, uint16_t size);
void (*vis_func[256])(uint8_t *ins, uint16_t size);
void (*ris_func[256])(uint8_t *ins, uint16_t size);
} elite_instance_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_DEF_H__ */
+12 -26
View File
@@ -1,27 +1,9 @@
#include "app_config.h"
#include "elite_dev.h"
#include "elite_dev_v1_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#include "app_error.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include <stdint.h>
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#define VERSION_DATE_YEAR 24
#define VERSION_DATE_MONTH 7
@@ -39,8 +21,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)cis_ver, sizeof(cis_ver));
}
static void vis_rst(uint8_t *ins, uint16_t size)
@@ -48,7 +30,7 @@ static void vis_rst(uint8_t *ins, uint16_t size)
NRF_LOG_INFO("%s", __FUNCTION__);
}
#define UNDEF_GPIO 0xFFFFFFFF
#define UNDEF_GPIO 0xFFFFFFFF
// The GPIO corresponding to the pin
const uint32_t pin_to_gpio_table[] = {
@@ -212,10 +194,14 @@ void dev_mode_gpio_function(uint8_t *ins)
}
case 0x01: {
uint32_t high_low = p_ins->param[0];
uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
uint32_t high_low = p_ins->param[0];
uint32_t set_pin[44] = {6, 8, 9, 10, 11, 12, 13, 14, 16, 17,
18, 20, 25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 36, 37, 38, 39, 40, 41, 42, 43,
44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
59, 60, 61, 62};
for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
for (int i=0; i<sizeof(set_pin) / sizeof(set_pin[0]); i++)
{
set_bmd380_pin_signal(set_pin[i], high_low);
}
+2 -3
View File
@@ -2,14 +2,13 @@
#define __ELITE_DEV_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include "app_config.h"
#include "elite.h"
const elite_instance_t *dev_init(void);
const elite_instance_t *dev_init(void);
#ifdef __cplusplus
}
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+17 -2
View File
@@ -1,14 +1,29 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "app_error.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "ble_advertising.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "ble_advdata.h"
#include "ble_advertising.h"
#include "ble_srv_common.h"
#ifdef __cplusplus
}
+20 -4
View File
@@ -1,15 +1,31 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "app_error.h"
#include "ble_conn_state.h"
#include "ble_dfu.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "ble_conn_state.h"
#include "ble_dfu.h"
#include "ble_dis.h"
#include "nrf_ble_gatt.h"
#ifdef __cplusplus
}
+19 -83
View File
@@ -1,27 +1,22 @@
#ifdef __cplusplus
extern "C"
{
#endif
#include "sdk_common.h"
#include <string.h>
#include "app_config.h"
#include "app_error.h"
#include "ble_conn_state.h"
#include "ble_gatts.h"
#include "ble_srv_common.h"
#include "nrf_log.h"
#include "elite.h"
#include "nrf_sdh_ble.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "semphr.h"
#include "task.h"
#include "elite.h"
#ifdef __cplusplus
}
#endif
#include <stdlib.h>
#include <string.h>
#if NRF_MODULE_ENABLED(BLE_ELITE_SRV)
@@ -51,8 +46,6 @@ static elite_context_t elite_context = {
.event_notify_enable = false,
};
static MessageBufferHandle_t async_notify_msg = NULL;
static void on_connect(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
{
taskENTER_CRITICAL();
@@ -107,7 +100,6 @@ static void on_write(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
break;
case BLE_UUID_ELITE_INST_CHAR:
NRF_LOG_INFO("");
NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
elite_instr_send((void *)p_evt_write->data, p_evt_write->len);
break;
@@ -212,40 +204,17 @@ static uint32_t elite_srv_init(void)
// Register a handler for BLE events.
NRF_SDH_BLE_OBSERVER(m_ble_elite_observer, BLE_ELITE_OBSERVER_PRIO, on_ble_evt_handler, &elite_context);
return NRF_SUCCESS;
}
NRF_LOG_INFO("+---------------------+------+");
NRF_LOG_INFO("| data_char_handle | 0x%02x |", elite_context.data_char_handle.value_handle);
NRF_LOG_INFO("| inst_char_handle | 0x%02x |", elite_context.inst_char_handle.value_handle);
NRF_LOG_INFO("| event_char_handle | 0x%02x |", elite_context.event_char_handle.value_handle);
NRF_LOG_INFO("+---------------------+------+");
static void le_elite_srv_async_notify_task(void *p_arg)
{
static uint8_t buf[256];
for (;;)
{
uint32_t size = xMessageBufferReceive(async_notify_msg, buf, sizeof(buf), portMAX_DELAY);
if (size)
{
for (uint32_t i = 0; i < 10; i++)
{
ret_code_t ret = le_event_notify(buf, size);
if (ret == NRF_ERROR_BUSY)
{
vTaskDelay(pdMS_TO_TICKS(5));
}
else
{
break;
}
}
}
}
return NRF_SUCCESS;
}
void le_elite_srv_init(void)
{
async_notify_msg = xMessageBufferCreate(10 * 1024);
if (xTaskCreate(le_elite_srv_async_notify_task, "async_notify", 512, NULL, 4, NULL) == pdFALSE)
{
APP_ERROR_CHECK(NRF_ERROR_RESOURCES);
}
ret_code_t err_code = elite_srv_init();
APP_ERROR_CHECK(err_code);
@@ -264,7 +233,7 @@ ret_code_t le_data_notify(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
}
ret_code_t le_data_update(uint8_t *p_value, uint16_t len)
ret_code_t le_data_upadate(uint8_t *p_value, uint16_t len)
{
static uint8_t values[1 + NRF_SDH_BLE_GATT_MAX_MTU_SIZE - 3];
@@ -298,7 +267,7 @@ ret_code_t le_event_notify(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
}
ret_code_t le_event_update(uint8_t *p_value, uint16_t len)
ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len)
{
// update database.
ble_gatts_value_t gatts_value = {
@@ -309,37 +278,4 @@ ret_code_t le_event_update(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_value_set(BLE_CONN_HANDLE_INVALID, elite_context.event_char_handle.value_handle, &gatts_value);
}
ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait)
{
ret_code_t ret = NRF_SUCCESS;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0)
{
// not inside ISR (Thread mode)
if (ms_to_wait)
{
ret = xMessageBufferSend(async_notify_msg, p_value, len, pdMS_TO_TICKS(ms_to_wait)) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
}
else
{
taskENTER_CRITICAL();
ret = xMessageBufferSend(async_notify_msg, p_value, len, 0) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
taskEXIT_CRITICAL();
}
}
else
{
// inside ISR
ret = xMessageBufferSendFromISR(async_notify_msg, p_value, len, &xHigherPriorityTaskWoken) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
return ret;
}
bool is_ble_connected(void)
{
return (elite_context.conn_handle != BLE_CONN_HANDLE_INVALID);
}
#endif // NRF_MODULE_ENABLED(BLE_ELITE)

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