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Author SHA1 Message Date
Roy_01 5939c83e07 config: switch project configuration to MMM v1.0 2025-06-12 10:12:11 +08:00
113 changed files with 4488 additions and 3686 deletions
+3
View File
@@ -29,6 +29,7 @@ BinPackParameters: false
BreakBeforeBinaryOperators: None
BreakBeforeTernaryOperators: false
BreakAfterJavaFieldAnnotations: true
AlignConsecutiveAssignments: true
AlignTrailingComments: true
BreakConstructorInitializers: AfterColon
AlignConsecutiveMacros:
@@ -49,4 +50,6 @@ AlignConsecutiveBitFields:
AlignCompound: true
PadOperators: true
AlignEscapedNewlines: Right
BinPackArguments: false
BinPackParameters: false
...
-1
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@@ -4,4 +4,3 @@
*.vgdbsettings.*.user
*.zip
/build/
/output/
-74
View File
@@ -1,74 +0,0 @@
{
// Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": [
{
"cwd": "${workspaceRoot}",
"executable": "${command:cmake.launchTargetPath}",
"name": "(Ubuntu) launch & debug",
"request": "launch",
"type": "cortex-debug",
"servertype": "jlink",
"serverpath": "/opt/SEGGER/JLink/JLinkGDBServerCLExe",
"serverArgs": [
"-halt",
"-ir",
"-vd",
"-strict",
],
"rttConfig": {
"enabled": true,
"address": "auto",
"decoders": [
{
"label": "",
"port": 0,
"type": "console"
}
],
},
"armToolchainPath": "/opt/arm-none-eabi/bin",
"device": "NRF52840_XXAA",
"interface": "swd",
"rtos": "FreeRTOS",
"svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
"runToEntryPoint": "main",
"preLaunchTask": "CMake: build"
},
{
"cwd": "${workspaceRoot}",
"executable": "${command:cmake.launchTargetPath}",
"name": "(Windows) launch & debug",
"request": "launch",
"type": "cortex-debug",
"servertype": "jlink",
"serverpath": "C:/Program Files/SEGGER/JLink/JLinkGDBServerCL.exe",
"serverArgs": [
"-halt",
"-ir",
"-vd",
"-strict",
],
"rttConfig": {
"enabled": true,
"address": "auto",
"decoders": [
{
"label": "",
"port": 0,
"type": "console"
}
],
},
"armToolchainPath": "C:/sysgcc/arm-eabi/bin",
"device": "NRF52840_XXAA",
"interface": "swd",
"rtos": "FreeRTOS",
"svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
"runToEntryPoint": "main",
"preLaunchTask": "CMake: build"
},
]
}
-15
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@@ -1,15 +0,0 @@
{
"editor.formatOnSave": false,
"[c]": {
"editor.defaultFormatter": "xaver.clang-format",
"editor.formatOnSave": true
},
"[cpp]": {
"editor.defaultFormatter": "xaver.clang-format",
"editor.formatOnSave": true
},
"[python]": {
"editor.defaultFormatter": "ms-python.black-formatter",
"editor.formatOnSave": true
}
}
-29
View File
@@ -1,29 +0,0 @@
{
"version": "2.0.0",
"tasks": [
{
"type": "cmake",
"label": "CMake: build",
"command": "build",
"targets": [
"all"
],
"preset": "Debug",
"group": "build",
"problemMatcher": [],
"detail": "CMake template build task"
},
{
"type": "cmake",
"label": "CMake: clean rebuild",
"command": "cleanRebuild",
"targets": [
"all"
],
"preset": "Debug",
"group": "build",
"problemMatcher": [],
"detail": "CMake template clean rebuild task"
}
]
}
-261
View File
@@ -1,261 +0,0 @@
cmake_minimum_required(VERSION 3.10.0)
# ==========================
# Toolchain Setup
# ==========================
set(CMAKE_TOOLCHAIN_FILE ${CMAKE_SOURCE_DIR}/cmake/arm-none-eabi-gcc.cmake)
# ==========================
# Project Setup
# ==========================
project(elite VERSION 0.1.0 LANGUAGES C ASM)
set(CMAKE_C_STANDARD 99)
set(CMAKE_C_STANDARD_REQUIRED ON)
set(CMAKE_C_EXTENSIONS ON)
set(EXECUTABLE ${PROJECT_NAME}.elf)
set(NRF_SDK_DIR ${CMAKE_SOURCE_DIR}/../bmd380_sdk)
set(NRF_SDK_LINKER_DIR ${NRF_SDK_DIR}/modules/nrfx/mdk)
set(SD_LINKER_DIR ${CMAKE_SOURCE_DIR}/SoftdeviceLibraries/hard)
set(LINKER_DIR ${CMAKE_SOURCE_DIR}/linkscripts)
set(LINKER_FILE ${LINKER_DIR}/nRF52840_XXAA_S140_reserve.lds)
# ==========================
# Compiler Flags and Defines
# ==========================
set(COMMON_COMPILE_OPT
-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
-fdata-sections -ffunction-sections -Wall -Os -g3 -std=gnu99
-Wno-unused-variable -Wno-pointer-sign -Wno-array-bounds
)
set(COMMON_COMPILE_DEF
-DDEBUG=1 -DNRF52840_XXAA -DS140_reserve -DCONFIG_GPIO_AS_PIN
-DRESETHNRF_DFU_SETTINGS_VERSION=2 -DNRF_SD_BLE_API_VERSION=7
-D__STACK_SIZE=1024 -D__HEAP_SIZE=1024 -DARM_MATH_CM4
-DSOFTDEVICE_PRESENT -DUSE_APP_CONFIG
)
set(COMMON_COMPILE_INC
${ARM_TOOLCHAIN_DIR}/../arm-none-eabi/include
${CMAKE_SOURCE_DIR}/app/inc
${NRF_SDK_DIR}/components/ble/ble_db_discovery
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis_c
${NRF_SDK_DIR}/components/ble/common/
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt
${NRF_SDK_DIR}/components/ble/nrf_ble_gq
${NRF_SDK_DIR}/components/ble/nrf_ble_scan
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu
${NRF_SDK_DIR}/components/ble/ble_advertising
${NRF_SDK_DIR}/components/ble/peer_manager
${NRF_SDK_DIR}/components/libraries/atomic
${NRF_SDK_DIR}/components/libraries/atomic_flags
${NRF_SDK_DIR}/components/libraries/balloc
${NRF_SDK_DIR}/components/libraries/delay
${NRF_SDK_DIR}/components/libraries/experimental_section_vars
${NRF_SDK_DIR}/components/libraries/memobj
${NRF_SDK_DIR}/components/libraries/queue
${NRF_SDK_DIR}/components/libraries/ringbuf
${NRF_SDK_DIR}/components/libraries/strerror
${NRF_SDK_DIR}/components/libraries/util
${NRF_SDK_DIR}/components/libraries/block_dev
${NRF_SDK_DIR}/components/libraries/bootloader
${NRF_SDK_DIR}/components/libraries/bootloader/ble_dfu
${NRF_SDK_DIR}/components/libraries/bootloader/dfu
${NRF_SDK_DIR}/components/libraries/pwr_mgmt
${NRF_SDK_DIR}/components/libraries/usbd
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger
${NRF_SDK_DIR}/components/libraries/atomic_fifo
${NRF_SDK_DIR}/components/libraries/svc
${NRF_SDK_DIR}/components/libraries/mutex
${NRF_SDK_DIR}/components/softdevice/common
${NRF_SDK_DIR}/components/softdevice/mbr/headers
${NRF_SDK_DIR}/components/softdevice/s140/headers
${NRF_SDK_DIR}/components/toolchain/cmsis/include
${NRF_SDK_DIR}/modules/nrfx
${NRF_SDK_DIR}/modules/nrfx/hal
${NRF_SDK_DIR}/modules/nrfx/mdk
${NRF_SDK_DIR}/modules/nrfx/drivers/include
${NRF_SDK_DIR}/external/fprintf
${NRF_SDK_DIR}/external/segger_rtt
${NRF_SDK_DIR}/external/utf_converter
${NRF_SDK_DIR}/integration/nrfx
${NRF_SDK_DIR}/integration/nrfx/legacy
)
# ==========================
# Configuration Interface
# ==========================
add_library(prj_config INTERFACE)
target_include_directories(prj_config INTERFACE ${COMMON_COMPILE_INC})
target_compile_definitions(prj_config INTERFACE ${COMMON_COMPILE_DEF})
target_compile_options(prj_config INTERFACE ${COMMON_COMPILE_OPT})
# ==========================
# Subdirectories
# ==========================
include(cmake/littlefs.cmake)
include(cmake/freertos.cmake)
include(cmake/nrf_log.cmake)
# ==========================
# Source Files
# ==========================
set(STARTUP_SRC
${NRF_SDK_DIR}/modules/nrfx/mdk/gcc_startup_nrf52840.S
${NRF_SDK_DIR}/modules/nrfx/mdk/system_nrf52.c
)
set(UTILS_SRC
${NRF_SDK_DIR}/components/libraries/util/nrf_assert.c
${NRF_SDK_DIR}/components/libraries/util/app_error.c
${NRF_SDK_DIR}/components/libraries/util/app_error_handler_gcc.c
${NRF_SDK_DIR}/components/libraries/util/app_error_weak.c
${NRF_SDK_DIR}/components/libraries/util/app_util_platform.c
${NRF_SDK_DIR}/components/libraries/strerror/nrf_strerror.c
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
set(ATOMIC_SRC
${NRF_SDK_DIR}/components/libraries/atomic/nrf_atomic.c
${NRF_SDK_DIR}/components/libraries/atomic_fifo/nrf_atfifo.c
${NRF_SDK_DIR}/components/libraries/atomic_flags/nrf_atflags.c
${NRF_SDK_DIR}/components/libraries/memobj/nrf_memobj.c
${NRF_SDK_DIR}/components/libraries/balloc/nrf_balloc.c
${NRF_SDK_DIR}/components/libraries/ringbuf/nrf_ringbuf.c
)
set(USBD_SRC
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_core.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_serial_num.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_string_desc.c
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm/app_usbd_cdc_acm.c
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger/app_usbd_nrf_dfu_trigger.c
)
set(SOFTDEVICE_SRC
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_freertos.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_ble.c
)
set(BLE_SRC
${NRF_SDK_DIR}/components/ble/common/ble_advdata.c
${NRF_SDK_DIR}/components/ble/common/ble_conn_state.c
${NRF_SDK_DIR}/components/ble/common/ble_srv_common.c
${NRF_SDK_DIR}/components/ble/ble_advertising/ble_advertising.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis/ble_dis.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu_unbonded.c
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt/nrf_ble_gatt.c
)
set(PRINTF_SRC
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf.c
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf_format.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT_printf.c
)
set(NRFX_DRIVERS_SRC
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_clock.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_power.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_usbd.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_gpiote.c
${NRF_SDK_DIR}/modules/nrfx/soc/nrfx_atomic.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_spim.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_twim.c
)
set(NRFX_LEGACY_SRC
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_clock.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_power.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_spi.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_twi.c
)
set(EXPERIMENTAL_SRC
${NRF_SDK_DIR}/components/libraries/experimental_section_vars/nrf_section_iter.c
)
file(GLOB_RECURSE APP_SOURCES "app/*.c")
# ==========================
# Executable and Linker
# ==========================
add_executable(${EXECUTABLE}
$<TARGET_OBJECTS:lfs>
$<TARGET_OBJECTS:freertos>
$<TARGET_OBJECTS:nrf_log>
${APP_SOURCES}
${STARTUP_SRC}
${UTILS_SRC}
${ATOMIC_SRC}
${USBD_SRC}
${SOFTDEVICE_SRC}
${BLE_SRC}
${PRINTF_SRC}
${NRFX_DRIVERS_SRC}
${NRFX_LEGACY_SRC}
${EXPERIMENTAL_SRC}
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
target_link_options(${EXECUTABLE} PRIVATE
-T${LINKER_FILE}
-L${LINKER_DIR}
-L${SD_LINKER_DIR}
-L${NRF_SDK_LINKER_DIR}
-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
--specs=nano.specs --specs=nosys.specs -u _printf_float
-lc -lm
-Wl,-Map=${PROJECT_NAME}.map,--cref
-Wl,--gc-sections
-Xlinker -print-memory-usage -Xlinker
)
target_link_libraries(${EXECUTABLE} PRIVATE
prj_config
lfs
freertos
nrf_log
m
c
)
# Optional: Print executable size as part of the post build process
add_custom_command(TARGET ${EXECUTABLE}
POST_BUILD
COMMAND ${CMAKE_SIZE} ${EXECUTABLE})
string(TIMESTAMP BUILD_TIMESTAMP "%Y%m%d%H%M")
set(OTA_ZIP_NAME "ota_${PROJECT_NAME}_${BUILD_TIMESTAMP}.zip")
# Optional: Create hex, bin and S-Record files after the build
add_custom_command(TARGET ${EXECUTABLE}
POST_BUILD
COMMAND ${CMAKE_OBJCOPY} -O srec --srec-len=64 ${EXECUTABLE} ${PROJECT_NAME}.s19
COMMAND ${CMAKE_OBJCOPY} -O ihex ${EXECUTABLE} ${PROJECT_NAME}.hex
COMMAND ${CMAKE_OBJCOPY} -O binary ${EXECUTABLE} ${PROJECT_NAME}.bin
COMMAND nrfutil nrf5sdk-tools pkg generate
--hw-version 52
--sd-req 0x100
--application-version 0
--application ${PROJECT_NAME}.hex
--key-file ${CMAKE_SOURCE_DIR}/private.pem
${OTA_ZIP_NAME}
COMMAND ${CMAKE_COMMAND} -E make_directory "${CMAKE_SOURCE_DIR}/output"
COMMAND ${CMAKE_COMMAND} -E rename "${OTA_ZIP_NAME}" "${CMAKE_SOURCE_DIR}/output/${OTA_ZIP_NAME}"
)
-59
View File
@@ -1,59 +0,0 @@
{
"version": 3,
"configurePresets": [
{
"name": "default",
"hidden": true,
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"cacheVariables": {
}
},
{
"name": "Debug",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug"
}
},
{
"name": "RelWithDebInfo",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "RelWithDebInfo"
}
},
{
"name": "Release",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release"
}
},
{
"name": "MinSizeRel",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "MinSizeRel"
}
}
],
"buildPresets": [
{
"name": "Debug",
"configurePreset": "Debug"
},
{
"name": "RelWithDebInfo",
"configurePreset": "RelWithDebInfo"
},
{
"name": "Release",
"configurePreset": "Release"
},
{
"name": "MinSizeRel",
"configurePreset": "MinSizeRel"
}
]
}
+3 -4
View File
@@ -1,17 +1,16 @@
#include "adc_drv.h"
#if (DEF_ADC_DRV_ENABLED && DEF_ADS8691_ENABLED)
#if (DEF_ADS8691_ENABLED)
#include "ads8691.h"
extern const adc_drv_if_t ads8691;
static const adc_drv_if_t *p_inst = &ads8691;
#elif (DEF_ADC_DRV_ENABLED && DEF_BULTIN_ADC_ENABED)
#else
#include "builtin_saadc.h"
static const adc_drv_if_t *p_inst = &builtin_saadc;
#endif
#if (DEF_ADC_DRV_ENABLED)
#include <stdlib.h>
int adc_init(void)
{
if (p_inst == NULL)
+49
View File
@@ -0,0 +1,49 @@
#ifndef __ADC_DRV_H__
#define __ADC_DRV_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "app_config.h"
#include "adc_drv_if.h"
#define ADC_DRV_ERROR (-1)
#define ADC_DRV_SUCCESS (0)
#define AIN0 0
#define AIN1 1
#define AIN2 2
#define AIN3 3
#define AIN4 4
#define AIN5 5
#define AIN6 6
#define AIN7 7
#if (DEF_ADC_DRV_ENABLED)
int adc_init(void);
int adc_reset(void);
int adc_gain(adc_gain_t gain);
int adc_read(uint32_t channel, int32_t *adc_val);
int adc_read_milivolt(uint32_t channel, float *mv);
int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
#else
#define adc_init()
#define adc_reset()
#define adc_gain(x)
#define adc_read(x, y)
#define adc_read_milivolt(x, y)
#define adc_read_mutiple_channels(x, y, z)
#define adc_read_mutiple_channels_ex(x, y, z, a)
#define adc_read_multiple_milivolt_ex(x, y, z, a)
#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
#endif /* ! DEF_ADC_DRV_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_H__ */
+48
View File
@@ -0,0 +1,48 @@
#ifndef __ADC_DRV_IF_H__
#define __ADC_DRV_IF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#define ADC0 (0x01 << 0)
#define ADC1 (0x01 << 1)
#define ADC2 (0x01 << 2)
#define ADC3 (0x01 << 3)
typedef enum
{
GAIN_0P625,
GAIN_1P000,
GAIN_1P200,
GAIN_1P250,
GAIN_1P500,
GAIN_2P000,
GAIN_2P500,
GAIN_3P000,
GAIN_6P000,
GAIN_12P000,
GAIN_24P000,
} adc_gain_t;
typedef struct
{
int (*init)(void);
int (*reset)(void);
int (*read)(uint32_t channel, int32_t *adc_val);
int (*read_milivolt)(uint32_t channel, float *p_val);
int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void (*preliminary_action));
int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
int (*gain)(adc_gain_t gain);
int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
} adc_drv_if_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_IF_H__ */
View File
View File
+12 -15
View File
@@ -1,9 +1,4 @@
#include "app_config.h"
#include "ads8691.h"
#if (DEF_ADS8691_ENABLED)
#include "elite_board.h"
#include "nrf_delay.h"
@@ -13,6 +8,8 @@
#include <string.h>
#if (DEF_ADS8691_ENABLED)
/*
* ADS8691
* Features:
@@ -167,11 +164,11 @@ uint32_t read_dev_id(void)
return read_hword();
}
// static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
// {
// write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
// return 0;
// }
static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
{
write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
return 0;
}
static int read_dataout_ctrl(dataout_ctl_t *dataout_ctl)
{
@@ -217,7 +214,7 @@ static double adc_convert_volt(uint16_t range_sel, int32_t val_18bit)
#define FSR_VREF_P_1P500 6.144
#define FSR_VREF_P_1P250 5.12
double volt = 0;
double volt;
if (range_sel == VREF_NP_3P000)
volt = (double)val_18bit * LSB_VREF_NP_3P000 / 1000000 - FSR_VREF_NP_3P000 / 2;
@@ -329,10 +326,10 @@ static int ads8691_init(void)
}
const adc_drv_if_t ads8691 = {
.init = ads8691_init,
.reset = ads8691_reset,
.read = ads8691_read,
.gain = ads8691_gain,
.init = ads8691_init,
.reset = ads8691_reset,
.read = ads8691_read,
.gain = ads8691_gain,
.read_milivolt = ads8691_read_milivolt,
};
View File
+7 -4
View File
@@ -1,13 +1,16 @@
#include "app_config.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include "nrf_spim.h"
#if (DEF_APA102_2020_ENABLED)
#include "apa102_2020.h"
#include "elite_board.h"
#include "FreeRTOS.h"
#include "task.h"
#if (DEF_APA102_2020_ENABLED)
#define DISP_LED_COLOR 0
typedef struct
{
uint8_t brightness : 5;
+4 -5
View File
@@ -2,17 +2,16 @@
#define __APA102_2020_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include "app_config.h"
#include "elite_board.h"
#include "led_drv_if.h"
#if (DEF_APA102_2020_ENABLED)
#include "led_drv_if.h"
extern const led_drv_if_t apa102_drv;
extern const led_drv_if_t apa102_drv;
#endif /* ! DEF_APA102_2020_ENABLED */
-39
View File
@@ -1,39 +0,0 @@
#ifndef __ADC_DRV_H__
#define __ADC_DRV_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "adc_drv_if.h"
#if (DEF_ADC_DRV_ENABLED)
int adc_init(void);
int adc_reset(void);
int adc_gain(adc_gain_t gain);
int adc_read(uint32_t channel, int32_t *adc_val);
int adc_read_milivolt(uint32_t channel, float *mv);
int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
#else
#define adc_init()
#define adc_reset()
#define adc_gain(x)
#define adc_read(x, y)
#define adc_read_milivolt(x, y)
#define adc_read_mutiple_channels(x, y, z)
#define adc_read_mutiple_channels_ex(x, y, z, a)
#define adc_read_multiple_milivolt_ex(x, y, z, a)
#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
#endif /* ! DEF_ADC_DRV_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_H__ */
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#ifndef __ADC_DRV_IF_H__
#define __ADC_DRV_IF_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#define ADC_DRV_ERROR (-1)
#define ADC_DRV_SUCCESS (0)
typedef enum
{
GAIN_0P625,
GAIN_1P000,
GAIN_1P200,
GAIN_1P250,
GAIN_1P500,
GAIN_2P000,
GAIN_2P500,
GAIN_3P000,
GAIN_6P000,
GAIN_12P000,
GAIN_24P000,
} adc_gain_t;
typedef struct
{
int (*init)(void);
int (*reset)(void);
int (*read)(uint32_t channel, int32_t *adc_val);
int (*read_milivolt)(uint32_t channel, float *p_val);
int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void(*preliminary_action));
int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
int (*gain)(adc_gain_t gain);
int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
} adc_drv_if_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ADC_DRV_IF_H__ */
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#ifndef __EDC_H__
#define __EDC_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "dac_drv.h"
#include "elite.h"
#include <stdbool.h>
#include <stdint.h>
typedef struct
{
void (*init)(void);
elite_instance_t *p_elite_instance;
} edc20_t;
typedef struct
{
struct
{
float coeff;
float offset;
} dac_c;
struct
{
float coeff;
float offset;
float Voffset;
} dac_f[3];
} edc20_dac_cal_data_t;
extern edc20_t edc;
#endif
#ifdef __cplusplus
}
#endif
#endif /* ! __EDC_H__ */
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#ifndef __PEL_V3_0_H__
#define __PEL_V3_0_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 28
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 46
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
#define PEL_2P0R_MASK (0x01 << 2)
#define PEL_4P0R_MASK (0x01 << 3)
#define PEL_8P0R_MASK (0x01 << 4)
#define PEL_16P2R_MASK (0x01 << 5)
#define PEL_32P4R_MASK (0x01 << 6)
#define PEL_63P4R_MASK (0x01 << 7)
#define PEL_127R_MASK (0x01 << 8)
#define PEL_255R_MASK (0x01 << 9)
#define PEL_511R_MASK (0x01 << 10)
#define PEL_1000R_MASK (0x01 << 11)
typedef struct __PACKED
{
uint16_t mem_board_id;
uint16_t packet_seq;
uint32_t notify_time;
int32_t raw_acs37030_vref;
int32_t raw_i_out;
int32_t raw_output_vo;
int32_t raw_output_vc;
int32_t raw_output_ve;
float acs37030_vref_mv;
float i_out_mv;
float output_vo_mv;
float output_vc_mv;
float output_ve_mv;
float acs37030_vref_v;
float hold_acs37030_out_v;
float hold_out_v;
float hold_vcc_v;
float hold_vee_v;
float acs37030_current_a;
uint16_t resis_pattern_id;
uint16_t resis_bitsmask;
float resis_g_value;
uint32_t mode_complete : 4;
uint32_t rsvd : 28;
uint32_t payload[9];
} scan_mode_notify_packet_t;
const elite_instance_t *pel_init(void);
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL_V3_0_H__ */
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#ifndef __PEL_V3_0_IO_H__
#define __PEL_V3_0_IO_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_saadc.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#define INPUT_1_PIN NRF_GPIO_PIN_MAP(0, 15)
#define INPUT_2_PIN NRF_GPIO_PIN_MAP(0, 13)
#define INPUT_3_PIN NRF_GPIO_PIN_MAP(0, 20)
#define INPUT_4_PIN NRF_GPIO_PIN_MAP(1, 0)
#define INPUT_5_PIN NRF_GPIO_PIN_MAP(0, 25)
#define INPUT_6_PIN NRF_GPIO_PIN_MAP(0, 11)
#define INPUT_7_PIN NRF_GPIO_PIN_MAP(0, 14)
#define INPUT_8_PIN NRF_GPIO_PIN_MAP(0, 17)
#define INPUT_9_PIN NRF_GPIO_PIN_MAP(1, 8)
#define INPUT_10_PIN NRF_GPIO_PIN_MAP(0, 21)
#define INPUT_11_PIN NRF_GPIO_PIN_MAP(0, 19)
#define INPUT_12_PIN NRF_GPIO_PIN_MAP(0, 22)
#define RESET_PIN NRF_GPIO_PIN_MAP(0, 18)
#define TP1_PIN NRF_GPIO_PIN_MAP(0, 5)
#define TP2_PIN NRF_GPIO_PIN_MAP(0, 26)
#define SAMPLE_I_PIN NRF_GPIO_PIN_MAP(1, 11)
#define SAMPLE_V_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 7)
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 8)
#define HOT_SWAP_1_PIN NRF_GPIO_PIN_MAP(0, 1)
#define HOT_SWAP_SIGNAL_PIN NRF_GPIO_PIN_MAP(0, 0)
#define INA_HI_PIN NRF_GPIO_PIN_MAP(1, 12)
#define WP_MEM_PIN NRF_GPIO_PIN_MAP(0, 12)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 6)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 27)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 4)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define LED_IOPL_PIN NRF_GPIO_PIN_MAP(0, 24) // pin60
#define LED_IOPH_PIN NRF_GPIO_PIN_MAP(0, 16) // pin62
#define LED_R_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 13) \
}
#define LED_G_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 3) \
}
#define LED_B_PINS \
{ \
NRF_GPIO_PIN_MAP(1, 10) \
}
#define OUTPUT_ACS37030_VREF_CHANNEL 7
#define OUTPUT_I_OUT_CHANNEL 4
#define OUTPUT_VO_CHANNEL 5
#define OUTPUT_VC_CHANNEL 0
#define OUTPUT_VE_CHANNEL 1
#define OUTPUT_ACS37030_REF_IDX 0
#define OUTPUT_I_OUT_IDX 1
#define OUTPUT_VO_IDX 2
#define OUTPUT_VC_IDX 3
#define OUTPUT_VE_IDX 4
typedef struct
{
uint32_t anode_pin;
uint32_t ina_hi_pin;
uint32_t smaple_i_pin;
uint32_t sample_v_pin;
uint32_t test_pin;
uint32_t point_us[5]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t mode; // 0: IOPL mode, 1: IOPH mode
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
int32_t adc_timing_shift;
void (*convt_new_arrival_cb)(void);
} pel_config_t;
typedef struct
{
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
uint32_t channels[5];
int16_t results[5];
float results_f[5];
void (*convt_new_arrival_cb)(void);
} pel_adc_t;
typedef struct
{
NRF_TIMER_Type *pulse_tmr;
uint32_t pulse_irq_n;
uint32_t pulse_cnt;
uint32_t pulse_is_running;
pel_adc_t adc;
} pel_hw_t;
extern pel_hw_t pel_hw;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void pel30_io_init(void);
void pel_pulse_gen_init(pel_config_t cfg);
void pel_pulse_gen_start(void);
void pel_pulse_gen_stop(void);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL_V3_0_IO_H__ */
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#ifndef __LED_RGB_H__
#define __LED_RGB_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "led_drv_if.h"
#if (DEF_RGB_ENABLED)
#if !(defined(LED_R_PINS) && defined(LED_G_PINS) && defined(LED_B_PINS))
#error "LED_R_PINS, LED_G_PINS and LED_B_PINS must all be defined"
#endif
extern const led_drv_if_t led_rgb_drv;
#endif /* ! DEF_RGB_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __LED_RGB_H__ */
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#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "nrf_spim.h"
#include "nrf_timer.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
#include "SEGGER_RTT.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel_hw_t pel_hw = {
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
.adc.channels = {
[OUTPUT_R1_IDX] = OUTPUT_R1_CHANNEL,
[OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL },
.adc.gain = NRF_SAADC_GAIN1_6,
.adc.smaple_time = NRF_SAADC_ACQTIME_3US
};
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length)
{
__disable_irq();
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
switch (spi_mode)
{
default:
case NRF_SPIM_MODE_0:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_1:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_2:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_3:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
}
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
NRF_SPIM3->TXD.PTR = (uint32_t)p_tx_buffer;
NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
NRF_SPIM3->RXD.PTR = (uint32_t)p_rx_buf;
nrf_gpio_pin_clear(cs_pin);
NRF_SPIM3->EVENTS_END = 0;
NRF_SPIM3->TASKS_START = 1;
do {
} while (NRF_SPIM3->EVENTS_END == 0);
nrf_gpio_pin_set(cs_pin);
__enable_irq();
}
#define MIN_PULSE_WIDTH 2
#define MIN_PULSE_IDLE 2
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
NRF_SAADC->EVENTS_STOPPED = 0;
NRF_SAADC->TASKS_STOP = 1;
do {
} while (NRF_SAADC->EVENTS_STOPPED == 0);
/* disable ssadc */
NRF_SAADC->ENABLE = 0;
/*
ref: p.381, nrf52840_PS_v1.1.pdf
Note: Oversampling should only be used when a single input channel is enabled, as averaging is
performed over all enabled channels.
*/
NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
/* config analog inputs */
for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
{
if (i < COUNTOF(p_adc->channels))
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG =
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
(p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
(NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
(p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
(NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
(NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
}
else
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG = 0;
}
}
/* enable ssadc */
NRF_SAADC->INTENSET = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
NRF_SAADC->ENABLE = 1;
NRF_SAADC->RESULT.PTR = (uint32_t)p_adc->results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
}
void TIMER3_IRQHandler(void)
{
if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
{
pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
pel_hw.pulse_is_running = 1;
if (pel_hw.pulse_cnt)
{
pel_hw.pulse_cnt--;
}
}
}
void SAADC_IRQHandler(void)
{
if (NRF_SAADC->EVENTS_STARTED)
{
NRF_SAADC->EVENTS_STARTED = 0;
if (pel_hw.pulse_cnt == 0)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
}
return;
}
if (NRF_SAADC->EVENTS_END)
{
NRF_SAADC->EVENTS_END = 0;
NRF_SAADC->RESULT.PTR = (uint32_t)pel_hw.adc.results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
pel_hw.pulse_is_running = 0;
if (pel_hw.adc.convt_new_arrival_cb)
{
pel_hw.adc.convt_new_arrival_cb();
}
}
}
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
pel_hw.pulse_cnt = cfg.pulse_cnt;
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
for (int i = 0; i < 4; i++)
{
nrf_gpiote_task_disable(i);
}
// config gpiote task
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_r_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->CHENSET = (1 << (5));
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CHENSET = (1 << (6));
// enable gpio task
for (int i = 0; i < 3; i++)
{
nrf_gpiote_task_enable(i);
}
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
nrf_gpiote_task_enable(3);
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
pel_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
pel_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pel_hw.pulse_tmr->CC[0] = cfg.point_us[0] * 16;
pel_hw.pulse_tmr->CC[1] = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
pel_hw.pulse_tmr->CC[2] = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
pel_hw.pulse_tmr->CC[3] = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
pel_hw.pulse_tmr->CC[4] = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
pel_hw.pulse_tmr->CC[5] = pel_hw.pulse_tmr->CC[4];
pel_hw.pulse_tmr->SHORTS = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
pel_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE0_MASK;
sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(SAADC_IRQn);
sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
}
void pel_pulse_gen_start(void)
{
pel_hw.pulse_tmr->TASKS_START = 1;
}
void pel_pulse_gen_stop(void)
{
pel_hw.pulse_cnt = 0;
do {
} while (pel_hw.pulse_is_running == 1);
pel_hw.adc.convt_new_arrival_cb = NULL;
}
#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.smaple_r_pin = SAMPLE_R_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
.mode = BOARD_IOPx,
.point_us = {
10000,
3,
5,
2,
0,
},
.pulse_cnt = 0xFFFFFFFF,
.gain = NRF_SAADC_GAIN1_6,
.smaple_time = NRF_SAADC_ACQTIME_10US,
.adc_timing_shift = 0,
};
pel_pulse_gen_init(pel_cfg);
pel_pulse_gen_start();
for (;;)
{
static uint32_t i = 0;
vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
}
}
void pel_pulse_gen_demo(void)
{
}
#endif
void pel20_io_init(void)
{
// common gpio
const uint32_t config_output_and_set[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN
};
const uint32_t config_output_and_clear[] = {
TP1_PIN,
TP2_PIN,
SAMPLE_R_PIN,
SAMPLE_V_PIN,
};
for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
{
nrf_gpio_pin_set(config_output_and_set[i]);
nrf_gpio_cfg_output(config_output_and_set[i]);
}
for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
{
nrf_gpio_pin_clear(config_output_and_clear[i]);
nrf_gpio_cfg_output(config_output_and_clear[i]);
}
nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
// specific gpio
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_cfg_output(ANODE_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_cfg_output(ANODE_PIN);
}
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->ORC = 0x00000000;
NRF_SPIM3->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M32;
NRF_SPIM3->CSNPOL = SPIM_CSNPOL_CSNPOL_LOW;
NRF_SPIM3->IFTIMING.CSNDUR = 8;
NRF_SPIM3->PSEL.CSN = CS_MEM_PIN;
NRF_SPIM3->PSEL.SCK = SPIM_CLK_PIN;
NRF_SPIM3->PSEL.MOSI = SPIM_MOSI_PIN;
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
}
#endif
File diff suppressed because it is too large Load Diff
-47
View File
@@ -1,47 +0,0 @@
#include "app_config.h"
#if (DEF_RGB_ENABLED)
#include "led_rgb.h"
#include "elite_board.h"
#include "nrf_gpio.h"
static const uint32_t r_pins[DEF_LED_COUNT] = LED_R_PINS;
static const uint32_t g_pins[DEF_LED_COUNT] = LED_G_PINS;
static const uint32_t b_pins[DEF_LED_COUNT] = LED_B_PINS;
static uint32_t led_count = 0;
int32_t rgb_led_set(uint32_t idx, struct led_color color, uint8_t brightness)
{
if (idx >= led_count) return 1;
nrf_gpio_pin_write(r_pins[idx], color.R ? 0 : 1);
nrf_gpio_pin_write(g_pins[idx], color.G ? 0 : 1);
nrf_gpio_pin_write(b_pins[idx], color.B ? 0 : 1);
return 0;
}
int32_t rgb_init(uint32_t cnt)
{
led_count = cnt;
for (uint8_t i = 0; i < led_count; i++)
{
nrf_gpio_cfg_output(r_pins[i]);
nrf_gpio_cfg_output(g_pins[i]);
nrf_gpio_cfg_output(b_pins[i]);
/* all dark */
nrf_gpio_pin_set(r_pins[i]);
nrf_gpio_pin_set(g_pins[i]);
nrf_gpio_pin_set(b_pins[i]);
}
return 0;
}
const led_drv_if_t led_rgb_drv = {
.init = rgb_init,
.set = rgb_led_set,
};
#endif /* ! DEF_RGB_ENABLED */
-5
View File
@@ -1,5 +0,0 @@
-----BEGIN EC PRIVATE KEY-----
MHcCAQEEIEM6TVi/ofxCYEb2O9OYK4sNHlpwd0ZrW3yFOIeRJKqKoAoGCCqGSM49
AwEHoUQDQgAEYUIRVGOQwmOEfsuYSufu4hHxRsQSUzh9lMBkvc3ewrPkpbfiXfa/
vGyIM8HAY2Jemux9+FyFERXRjgj5RxOJAA==
-----END EC PRIVATE KEY-----
+9 -57
View File
@@ -108,10 +108,9 @@ extern "C"
#define DEF_ELITE_DEV 0x00000000
#define DEF_ELITE_EDC_V2_0 0x00020109
#define DEF_ELITE_PEL_V2_0 0x00070001
#define DEF_ELITE_PEL_V3_0 0x00070002
#define DEF_ELITE_CPG_V1_1 0x00080001
#define DEF_ELITE_MMM_V1_0 0x00090001
#define DEF_ELITE_MODEL DEF_ELITE_DEV
#define DEF_ELITE_MODEL DEF_ELITE_MMM_V1_0
#define DEF_ELITE_DEMO_W_SOFTDEVICE 0
@@ -125,10 +124,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
@@ -151,7 +149,7 @@ extern "C"
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#define DEF_UART_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define ELITE_DEVICE_NAME "Elite-EDC"
@@ -163,10 +161,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 1
#define DEF_LED_COUNT 12
#define DEF_LED_DRV_ENABLED 1
#define DEF_APA102_2020_ENABLED 1
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 1
@@ -189,7 +186,7 @@ extern "C"
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#define DEF_UART_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#define BOARD_IOPH 1
@@ -205,10 +202,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 0
@@ -231,49 +227,7 @@ extern "C"
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#define BOARD_IOPH 1
#define BOARD_IOPL 0
#define ELITE_DEVICE_NAME "Elite-PEL"
#define ELITE_HW_NAME "Elite-PELv3.0"
#define BOARD_IOPx BOARD_IOPH
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 7
#define MAJOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 2
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 1
#define DEF_LED_COUNT 1
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 1
#define DEF_ADC_DRV_ENABLED 1
#define DEF_ADS8691_ENABLED 0
#define DEF_BULTIN_ADC_ENABED 1
#define DEF_DAC_DRV_ENABLED 0
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
#define DEF_FS_RTT_DIR 0
#define DEF_GD25D10C_ENABLED 0
#define DEF_BTN_ENABLED 0
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#define DEF_UARTE_ENABLED 0
#define DEF_UART_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define ELITE_DEVICE_NAME "Elite-CPG"
@@ -285,10 +239,9 @@ extern "C"
#define DEF_TW1508_ENABLED 1
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
@@ -323,10 +276,9 @@ extern "C"
#define DEF_TW1508_ENABLED 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
#define DEF_RGB_ENABLED 0
#define DEF_ADC_DRV_ENABLED 0
#define DEF_ADS8691_ENABLED 0
-11
View File
@@ -1,11 +0,0 @@
{
"folders": [
{
"path": "."
},
{
"path": "../bmd380_sdk"
}
],
"settings": {}
}
+7 -13
View File
@@ -104,12 +104,8 @@ static BtnEvent_t btn_event(void)
static void btn_event_shortx1_cb(void)
{
NRF_LOG_INFO("BTN_EVENT_SHORTx1");
#if (DEF_APA102_2020_ENABLED)
const struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
#elif (DEF_RGB_ENABLED)
const struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
#endif
static int idx = 0;
static int idx = 0;
led_set(color[idx++ % COUNTOF(color)]);
}
@@ -123,7 +119,7 @@ static void btn_event_shortx2_cb(void)
led_set(LED_BLUE);
vTaskDelay(pdMS_TO_TICKS(250));
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_event_shortx3_cb(void)
@@ -135,25 +131,21 @@ static void btn_event_shortx3_cb(void)
vTaskDelay(pdMS_TO_TICKS(250));
led_set(LED_CYAN);
vTaskDelay(pdMS_TO_TICKS(250));
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_event_long(void)
{
NRF_LOG_INFO("BTN_EVENT_LONG");
#if (DEF_APA102_2020_ENABLED)
led_set(LED_ORANGE);
#elif (DEF_RGB_ENABLED)
led_set(LED_YELLOW);
#endif
if (!wait_released(TIME_PRESS_LONG))
{
led_set(LED_OFF);
elite_board_power_off();
}
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
}
static void btn_task(void *pvArg)
@@ -198,3 +190,5 @@ void btn_init(void)
}
#endif /* ! DEF_BTN_ENABLED */
View File
+1 -1
View File
@@ -41,7 +41,7 @@ static int reset(void)
static float adc_convert_milivolt(uint16_t range_sel, int32_t val_14bit, bool is_diff)
{
float volt;
float gain = 1.0 / 6.0;
float gain;
float vref;
uint32_t m = is_diff ? 1 : 0;
-47
View File
@@ -1,47 +0,0 @@
# Call Cmake from the 'build' subfolder with the command below.
# For using Make:
# cmake -DCMAKE_MAKE_PROGRAM=make.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Unix Makefiles" ..
# followed by
# 'make' or 'cmake --build .' to build it
#
# For using Ninja:
# cmake -DCMAKE_MAKE_PROGRAM=ninja.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Ninja" ..
# followed by
# 'ninja' or 'cmake --build .' to build it
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR arm)
if(CMAKE_HOST_WIN32)
set(EXECUTESUFFIX ".exe")
set(ARM_TOOLCHAIN_DIR "C:/SysGCC/arm-eabi/bin")
elseif(CMAKE_HOST_UNIX)
set(EXECUTESUFFIX "")
if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Darwin")
message(STATUS "Running on macOS")
set(ARM_TOOLCHAIN_DIR "/opt/homebrew/bin")
elseif(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Linux")
message(STATUS "Running on Linux (likely Ubuntu)")
set(ARM_TOOLCHAIN_DIR "/opt/arm-none-eabi/bin")
endif()
else()
message(WARNING "Unknown host OS: ${CMAKE_HOST_SYSTEM_NAME}")
endif()
set(BINUTILS_PATH ${ARM_TOOLCHAIN_DIR})
set(TOOLCHAIN_PREFIX arm-none-eabi-)
set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
set(CMAKE_C_COMPILER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}gcc${EXECUTESUFFIX})
set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
set(CMAKE_CXX_COMPILER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}g++${EXECUTESUFFIX})
set(CMAKE_LINKER ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}ld${EXECUTESUFFIX})
set(CMAKE_OBJCOPY ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}objcopy${EXECUTESUFFIX} CACHE INTERNAL "objcopy tool")
set(CMAKE_SIZE ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}size${EXECUTESUFFIX} CACHE INTERNAL "size tool")
set(CMAKE_FIND_ROOT_PATH ${BINUTILS_PATH})
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-21
View File
@@ -1,21 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
file(GLOB FREERTO_KERNEL_SOURCES "${NRF_SDK_DIR}/external/freertos/source/*.c")
add_library(freertos OBJECT
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52/port.c
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis.c
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis_systick.c
${NRF_SDK_DIR}/external/freertos/source/portable/MemMang/heap_4.c
${FREERTO_KERNEL_SOURCES}
)
target_include_directories(freertos PUBLIC
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52
${NRF_SDK_DIR}/external/freertos/source/include
)
target_link_libraries(freertos PRIVATE
prj_config
)
-14
View File
@@ -1,14 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
file(GLOB_RECURSE LFS_SOURCES "littlefs/*.c")
add_library(lfs OBJECT ${LFS_SOURCES})
target_include_directories(lfs PUBLIC
${CMAKE_SOURCE_DIR}/littlefs
)
target_link_libraries(lfs PRIVATE
prj_config
freertos
)
-22
View File
@@ -1,22 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
set(NRF_LOG_SRC
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_rtt.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_serial.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_default_backends.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_frontend.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_str_formatter.c
)
add_library(nrf_log OBJECT
${NRF_LOG_SRC}
)
target_include_directories(nrf_log PUBLIC
${NRF_SDK_DIR}/components/libraries/log
${NRF_SDK_DIR}/components/libraries/log/src
)
target_link_libraries(nrf_log PRIVATE
prj_config
)
-166
View File
@@ -1,166 +0,0 @@
cmake_minimum_required(VERSION 3.15.3)
# ==========================
# Source Files
# ==========================
set(STARTUP_SRC
${NRF_SDK_DIR}/modules/nrfx/mdk/gcc_startup_nrf52840.S
${NRF_SDK_DIR}/modules/nrfx/mdk/system_nrf52.c
)
set(LOGGING_SRC
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_rtt.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_backend_serial.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_default_backends.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_frontend.c
${NRF_SDK_DIR}/components/libraries/log/src/nrf_log_str_formatter.c
)
set(UTILS_SRC
${NRF_SDK_DIR}/components/libraries/util/nrf_assert.c
${NRF_SDK_DIR}/components/libraries/util/app_error.c
${NRF_SDK_DIR}/components/libraries/util/app_error_handler_gcc.c
${NRF_SDK_DIR}/components/libraries/util/app_error_weak.c
${NRF_SDK_DIR}/components/libraries/util/app_util_platform.c
${NRF_SDK_DIR}/components/libraries/strerror/nrf_strerror.c
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
set(ATOMIC_SRC
${NRF_SDK_DIR}/components/libraries/atomic/nrf_atomic.c
${NRF_SDK_DIR}/components/libraries/atomic_fifo/nrf_atfifo.c
${NRF_SDK_DIR}/components/libraries/atomic_flags/nrf_atflags.c
${NRF_SDK_DIR}/components/libraries/memobj/nrf_memobj.c
${NRF_SDK_DIR}/components/libraries/balloc/nrf_balloc.c
${NRF_SDK_DIR}/components/libraries/ringbuf/nrf_ringbuf.c
)
set(USBD_SRC
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_core.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_serial_num.c
${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_string_desc.c
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm/app_usbd_cdc_acm.c
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger/app_usbd_nrf_dfu_trigger.c
)
set(SOFTDEVICE_SRC
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_freertos.c
${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_ble.c
)
set(BLE_SRC
${NRF_SDK_DIR}/components/ble/common/ble_advdata.c
${NRF_SDK_DIR}/components/ble/common/ble_conn_state.c
${NRF_SDK_DIR}/components/ble/common/ble_srv_common.c
${NRF_SDK_DIR}/components/ble/ble_advertising/ble_advertising.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis/ble_dis.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu.c
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu_unbonded.c
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt/nrf_ble_gatt.c
)
set(PRINTF_SRC
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf.c
${NRF_SDK_DIR}/external/fprintf/nrf_fprintf_format.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT.c
${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT_printf.c
)
set(NRFX_DRIVERS_SRC
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_clock.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_power.c
${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_usbd.c
${NRF_SDK_DIR}/modules/nrfx/soc/nrfx_atomic.c
)
set(NRFX_LEGACY_SRC
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_clock.c
${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_power.c
)
set(EXPERIMENTAL_SRC
${NRF_SDK_DIR}/components/libraries/experimental_section_vars/nrf_section_iter.c
)
set(PWR_MGMT_SRC
${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
)
add_library(sdk OBJECT
${STARTUP_SRC}
${LOGGING_SRC}
${UTILS_SRC}
${ATOMIC_SRC}
${USBD_SRC}
${SOFTDEVICE_SRC}
${BLE_SRC}
${PRINTF_SRC}
${NRFX_DRIVERS_SRC}
${NRFX_LEGACY_SRC}
${EXPERIMENTAL_SRC}
${PWR_MGMT_SRC}
)
target_include_directories(sdk PUBLIC
${NRF_SDK_DIR}/components/ble/ble_db_discovery
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis
${NRF_SDK_DIR}/components/ble/ble_services/ble_dis_c
${NRF_SDK_DIR}/components/ble/common/
${NRF_SDK_DIR}/components/ble/nrf_ble_gatt
${NRF_SDK_DIR}/components/ble/nrf_ble_gq
${NRF_SDK_DIR}/components/ble/nrf_ble_scan
${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu
${NRF_SDK_DIR}/components/ble/ble_advertising
${NRF_SDK_DIR}/components/ble/peer_manager
${NRF_SDK_DIR}/components/libraries/atomic
${NRF_SDK_DIR}/components/libraries/atomic_flags
${NRF_SDK_DIR}/components/libraries/balloc
${NRF_SDK_DIR}/components/libraries/delay
${NRF_SDK_DIR}/components/libraries/experimental_section_vars
${NRF_SDK_DIR}/components/libraries/log
${NRF_SDK_DIR}/components/libraries/log/src
${NRF_SDK_DIR}/components/libraries/memobj
${NRF_SDK_DIR}/components/libraries/queue
${NRF_SDK_DIR}/components/libraries/ringbuf
${NRF_SDK_DIR}/components/libraries/strerror
${NRF_SDK_DIR}/components/libraries/util
${NRF_SDK_DIR}/components/libraries/block_dev
${NRF_SDK_DIR}/components/libraries/bootloader
${NRF_SDK_DIR}/components/libraries/bootloader/ble_dfu
${NRF_SDK_DIR}/components/libraries/bootloader/dfu
${NRF_SDK_DIR}/components/libraries/pwr_mgmt
${NRF_SDK_DIR}/components/libraries/usbd
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc
${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm
${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger
${NRF_SDK_DIR}/components/libraries/atomic_fifo
${NRF_SDK_DIR}/components/libraries/svc
${NRF_SDK_DIR}/components/libraries/mutex
${NRF_SDK_DIR}/components/softdevice/common
${NRF_SDK_DIR}/components/softdevice/mbr/headers
${NRF_SDK_DIR}/components/softdevice/s140/headers
${NRF_SDK_DIR}/components/toolchain/cmsis/include
${NRF_SDK_DIR}/modules/nrfx
${NRF_SDK_DIR}/modules/nrfx/hal
${NRF_SDK_DIR}/modules/nrfx/mdk
${NRF_SDK_DIR}/modules/nrfx/drivers/include
${NRF_SDK_DIR}/external/fprintf
${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52
${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52
${NRF_SDK_DIR}/external/freertos/source/include
${NRF_SDK_DIR}/external/segger_rtt
${NRF_SDK_DIR}/external/utf_converter
${NRF_SDK_DIR}/integration/nrfx
${NRF_SDK_DIR}/integration/nrfx/legacy
)
target_link_libraries(sdk PRIVATE
prj_config
)
+8 -22
View File
@@ -1,29 +1,15 @@
#include "app_config.h"
#include "elite_cpg_v1_1.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "elite.h"
#include "cpg.h"
#include "elite_board.h"
#include "elite_def.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include "tw1508.h"
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
// ExN: electrode x negative
// ExP: electrode x positive
@@ -169,8 +155,8 @@ static uint16_t current_mA_convert_tw1508_value(float current_mA)
uint16_t tw1508_value;
uint8_t dac_7bit;
uint8_t dac_3bit = 0b000;
float rext = 0.0;
uint8_t dac_3bit;
float rext;
if (current_mA > TW1508_BOUNDARY_GAIN7)
{
@@ -219,7 +205,7 @@ static uint16_t current_mA_convert_tw1508_value(float current_mA)
rext = TW1508_REXR;
}
dac_7bit = current_mA * 8 * rext / 1.25 / (dac_3bit + 1);
dac_7bit = current_mA * 8 * TW1508_REXR / 1.25 / (dac_3bit + 1);
tw1508_value = dac_3bit << 7 | dac_7bit;
return tw1508_value;
@@ -787,7 +773,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
View File
+4 -4
View File
@@ -31,20 +31,20 @@ typedef struct
} pulse_gen_hw_t;
pulse_gen_hw_t pulse_gen_hw[] = {
{ .gpiote_idx = { 0, 1, 2, 3 },
{.gpiote_idx = { 0, 1, 2, 3 },
.TMR_A = NRF_TIMER1,
.TMR_B = NRF_TIMER3,
.TMR_A_IRQn = TIMER1_IRQn,
.TMR_B_IRQn = TIMER3_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 } },
{ .gpiote_idx = { 4, 5, 6, 7 },
.private = { NULL, 0, 0 }},
{.gpiote_idx = { 4, 5, 6, 7 },
.TMR_A = NRF_TIMER2,
.TMR_B = NRF_TIMER4,
.TMR_A_IRQn = TIMER2_IRQn,
.TMR_B_IRQn = TIMER4_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 } },
.private = { NULL, 0, 0 }},
};
__STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
View File
View File
+142
View File
@@ -0,0 +1,142 @@
#ifndef __EDC_H__
#define __EDC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "dac_drv.h"
#include "elite_def.h"
#include <stdbool.h>
#include <stdint.h>
/** Iin, Vin, Vout **/
#define RIS_ADC_IIN 0x00
#define RIS_ADC_VIN 0x01
#define RIS_DAC_VOUT 0x02
#define RIS_HIGH_Z 0x03
#define RIS_ADC_VOUT 0x04
#define RIS_ADC_BAT 0x05
// ADC Iin gain level !!! move to ADC.h in future
#define I_GAIN_3M 0x00 // lv0,largest gain
#define I_GAIN_100K 0x01 // lv1
#define I_GAIN_3K 0x02 // lv2
#define I_GAIN_100R 0x03 // lv3,the least gain
#define I_GAIN_AUTO 0x04
// ADC Vin gain level !!! move to ADC.h in future
#define VIN_GAIN_1M 0x00
#define VIN_GAIN_30K 0x01
#define VIN_GAIN_1K 0x02
#define VIN_GAIN_AUTO 0x03
// DAC Vout gain level !!! move to DAC.h in future
#define VOUT_GAIN_240K 0x00
#define VOUT_GAIN_15K 0x01
#define VOUT_GAIN_AUTO 0x02
/* DAC reset parameter */
#define DAC_ZERO 25000 // DAC_ZERO is about 0V
// Step time macro
#define STEPTIME_HALF_SEC 5000
#define STEPTIME_ONE_SEC 10000
#define STEPTIME_TWO_SEC 20000
typedef struct
{
void (*init)(void);
elite_instance_t *p_elite_instance;
struct
{
uint32_t chip_id;
uint32_t eliteFxn;
// time relation
uint32_t VsetRateIndex;
uint32_t VsetRate;
uint32_t sampleRate;
uint32_t notifyRate;
uint32_t period;
int32_t Vset;
uint32_t VoltConstant;
uint32_t directionInit;
uint32_t step;
uint32_t Ve1;
uint32_t Ve2;
int32_t Vinit;
int32_t Vmax;
int32_t Vmin;
uint32_t steptime;
uint32_t IinADCAutoGainEn;
uint32_t VinADCAutoGainEn;
uint32_t VoutAutoGainEn;
uint32_t IinADCGainLv;
uint32_t VinADCGainLv;
uint32_t VoutGainLv;
uint32_t gain_switch_on;
uint32_t AdcChannel;
bool hign_z_en;
uint32_t cycleNumber;
uint32_t charge;
int32_t constantCurrent;
// uint32_t cc_resistance;
uint32_t cc_cp_speed;
// uni pulse mode
int32_t v0;
uint32_t t_pulse[4];
int32_t v_initial[4];
int32_t v_slope[4];
int32_t v_step[4];
uint32_t t_pulse_min[4];
uint32_t t_pulse_max[4];
int32_t v_stop;
int32_t v_up;
int32_t v_low;
bool v_invert_option;
bool v_stop_direction;
int32_t v_1;
int32_t v_2;
int32_t Vout;
// not use
int32_t Currentmax;
uint32_t VoViSwitch;
} instru;
} edc20_t;
typedef struct
{
float coeff;
float offset;
} edc20_cal_data_t;
typedef struct
{
struct
{
float coeff;
float offset;
} dac_c;
struct
{
float coeff;
float offset;
float Voffset;
} dac_f[3];
} edc20_dac_cal_data_t;
extern edc20_t edc;
#ifdef __cplusplus
}
#endif
#endif /* ! __EDC_H__ */
+46 -112
View File
@@ -1,73 +1,28 @@
#include "app_config.h"
#include "elite_board.h"
#include "elite_edc_v2_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc.h"
#include "elite.h"
#include "elite_adc.h"
#include "elite_correction.h"
#include "elite_dac.h"
#include "adc_drv.h"
#include "dac_drv.h"
#include "elite.h"
#include "elite_board.h"
#include "led_drv.h"
#include "sw_drv.h"
#include "nrf_log.h"
#include "timers.h"
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
#define CURVE_IV 0x01 // I-V Curve
#define CURVE_IV_CY 0x02 // Cycle I-V
#define CURVE_VO 0x03 // Function Generator
#define CURVE_RT 0x04 // R-T Graph
#define CURVE_VT 0x05 // V-T Graph
#define CURVE_IT 0x06 // I-T Graph
#define CURVE_CC 0x07 // Constant Current (CC)
#define CURVE_OCP 0x08 // Open Circuit Potential (OCP)
#define CURVE_CV 0x09 // Cyclic Voltammetry (CV)
#define CURVE_LSV 0x0A // Linear Sweep Voltammetry (LSV)
#define CURVE_CA 0x0B // Chronoamperometric Graph (CA)
#define CURVE_CP 0x0C // Chronopotentiometry (CP)
#define CURVE_UNI_PULSE 0x0D // Pulse Sensing (universal pulse)
#define CURVE_DPV 0x0E // Differential Pulse Voltammetry (DPV)
#define CURVE_DPV_ADVANCE 0x0F
#define CURVE_DPV_SMPRATE 0x10
#define CURVE_DPV_ADVANCE_SMPRATE 0x11
#define CURVE_EIS 0x12
#define CURVE_CF 0x13 // Constant Frequency(CF)
#define CURVE_CALI 0xF1
#define SET_SAMPLE_RATE 0xE0
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
// ADC Iin gain level !!! move to ADC.h in future
#define I_GAIN_3M 0x00 // lv0,largest gain
#define I_GAIN_100K 0x01 // lv1
#define I_GAIN_3K 0x02 // lv2
#define I_GAIN_100R 0x03 // lv3,the least gain
#define I_GAIN_AUTO 0x04
// ADC Vin gain level !!! move to ADC.h in future
#define VIN_GAIN_1M 0x00
#define VIN_GAIN_30K 0x01
#define VIN_GAIN_1K 0x02
#define VIN_GAIN_AUTO 0x03
#define DEV_SHINY_DELAY_MS 3000
static TimerHandle_t dev_shiny_timer_handle = NULL;
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);
static void dummy(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
}
/*
dev_mode_set_led
(1)0x3000FF0400
@@ -440,7 +395,6 @@ static void dev_mode_read_output_pin(void)
output.cs_mem = nrf_gpio_pin_out_read(CS_MEM_PIN);
output.cs_adc = nrf_gpio_pin_out_read(CS_ADC_PIN);
output.cs_dac = nrf_gpio_pin_out_read(CS_DAC_PIN);
output.resvd = 0;
pin_out_status = (output.resvd << 21) |
(output.power_5v_en << 20) |
@@ -507,7 +461,6 @@ static void dev_mode_read_input_pin(void)
input.vbat = nrf_gpio_pin_read(VBAT_PIN);
input.shut_down = nrf_gpio_pin_read(SHUT_DOWN_PIN);
input.int9466 = nrf_gpio_pin_read(INT9466_PIN);
input.resvd = 0;
pin_input_status = (input.resvd << 3) |
(input.vbat << 2) |
@@ -892,7 +845,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
.hh = 22,
.mm = 40,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_ver, sizeof(cis_ver));
}
@@ -914,7 +867,7 @@ static void cis_volt(uint8_t *ins, uint16_t size)
.opcode = CIS_VOLT,
.volt = bat_volt_read(),
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_volt, sizeof(cis_volt));
}
@@ -937,74 +890,52 @@ static void cis_temperature(uint8_t *ins, uint16_t size)
.opcode = CIS_TEMPERATURE,
.temperature = __REV(temperature_read()),
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_temperature, sizeof(cis_temperature));
}
static void cis_cali(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static bool DACReset;
static void vis_rst(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
edc.instru.eliteFxn = VIS_RST;
edc.instru.VinADCGainLv = VIN_GAIN_1K;
VinADCGainCtrl(edc.instru.VinADCGainLv);
edc.instru.IinADCGainLv = I_GAIN_100R;
IinADCGainCtrl(edc.instru.IinADCGainLv);
edc.instru.VoutGainLv = VOUT_GAIN_15K;
VoutGainControl(edc.instru.VoutGainLv);
uint16_t volt = Usercode_Correction_to_DAC(edc.instru.VoutGainLv, 25000);
dac_write_through(DAC0, volt);
led_mode(NO_EVENT);
}
static void vis_sti(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void vis_int(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void dev_shiny_callback(TimerHandle_t xTimer)
{
extern bool is_ble_connected(void);
if (!is_ble_connected())
{
led_set(LED_IDLE_DISCONNECTED);
return;
}
extern bool is_mode_running(void);
if (is_mode_running())
{
led_set(LED_REC);
}
else
{
led_set(LED_IDLE_CONNECTED);
}
}
void start_dev_shiny_timer(void)
{
if (dev_shiny_timer_handle == NULL)
{
dev_shiny_timer_handle = xTimerCreate("dev_shiny_timer",
pdMS_TO_TICKS(DEV_SHINY_DELAY_MS),
pdFALSE,
NULL,
dev_shiny_callback);
if (dev_shiny_timer_handle == NULL)
{
NRF_LOG_ERROR("dev_shiny_timer creation failed");
return;
}
}
if (xTimerStart(dev_shiny_timer_handle, 0) != pdPASS)
{
NRF_LOG_ERROR("dev_shiny_timer start failed");
}
}
static void vis_dev_shiny(uint8_t *ins, uint16_t size)
static void vis_device_shiny(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
led_set(LED_IDENTIFY_DEV);
start_dev_shiny_timer();
led_set(LED_IDENTICY_DEV);
}
static void vis_shiny_dis(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
led_set(LED_IDEL_CONNECTED);
}
static void curve_iv(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
static void curve_iv_cy(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
extern void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size);
extern void edc20_cycle_iv_mode_start(uint8_t * ins, uint16_t size);
edc20_cycle_iv_mode_start(ins, size);
}
@@ -1037,7 +968,10 @@ elite_instance_t edc20_elite_instance = {
},
.vis_func = {
[VIS_RST] = vis_rst,
[VIS_DEVICE_SHINY] = vis_dev_shiny,
[VIS_STI] = vis_sti,
[VIS_INT] = vis_int,
[VIS_DEVICE_SHINY] = vis_device_shiny,
[VIS_SHINY_DIS] = vis_shiny_dis,
},
.ris_func = {
[CURVE_IV] = curve_iv,
@@ -1,12 +1,7 @@
#include "app_config.h"
#include "elite_edc_v2_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc.h"
#include "elite_board.h"
#include "dac_drv.h"
#include "elite.h"
#include "elite_board.h"
#include "nrf.h"
#include "nrf_log.h"
@@ -21,6 +16,8 @@
#include <stdlib.h>
#include <string.h>
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define OUT_0 DAC0
#define OUT_1 DAC1
@@ -314,7 +311,6 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
NRF_LOG_INFO("%s", info);
}
led_set(LED_REC);
dac_write_through(OUT_0, mV_out_0(&dac_param));
dac_param.mV_output = dac_param.mV_start;
@@ -354,7 +350,6 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
edc20_dac_tim_stop();
edc20_adc_tim_stop();
dac_init();
led_set(LED_IDLE_CONNECTED);
if (1)
{
@@ -366,9 +361,70 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
vTaskDelete(NULL);
}
void edc20_cycle_iv_mode_init(void)
{
}
#define VDIRECTION(v1, v2) ((v1 > v2) ? 0 : 1)
#define VMAX(v1, v2) ((v1 >= v2) ? v1 : v2)
#define VMIN(v1, v2) ((v1 < v2) ? v1 : v2)
// Step time macro
#define STEPTIME_HALF_SEC 5000
#define STEPTIME_ONE_SEC 10000
#define STEPTIME_TWO_SEC 20000
static uint32_t step2VsetRate(uint32_t step)
{
/*step = 100 mv, index = 0, n = 2
10 mv, index = 1, n = 10
1 mv, index = 2, n = 100
0.1 mv, index = 3, n = 1000
0.01mv, index = 4, n = 10000 */
if (step >= 10000)
{
return 0;
}
else if (step >= 1000)
{
return 1;
}
else if (step >= 100)
{
return 2;
}
else if (step >= 10)
{
return 3;
}
else if (step >= 1)
{
return 4;
}
else
{
return 5;
}
}
static uint32_t get_step_time(uint8_t StepTime)
{
switch (StepTime)
{
case 0: { // 0.5 sec
return STEPTIME_HALF_SEC;
}
case 1: { // 1 sec
return STEPTIME_ONE_SEC;
}
case 2: { // 2 sec
return STEPTIME_TWO_SEC;
}
default: { // 1 sec
return STEPTIME_ONE_SEC;
}
}
}
#define STEP_TO_VSETRATE(step) step2VsetRate(step)
const uint32_t VsetRateTable[5] = { 2, 10, 100, 1000, 10000 };
static uint32_t convt_uS_step(uint32_t idx)
{
@@ -389,24 +445,38 @@ static uint32_t convt_uS_step(uint32_t idx)
}
}
bool is_mode_running(void)
{
return running;
}
void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size)
{
/*
instru.eliteFxn = CURVE_IV_CY;
instru.Ve1 = ((uint16_t)(ins[3]) << 8) | (uint16_t)(ins[4]);
instru.Ve2 = ((uint16_t)(ins[5]) << 8) | (uint16_t)(ins[6]);
instru.Vinit = (int32_t)instru.Ve1;
instru.Vmax = (int32_t)VMAX(instru.Ve1,instru.Ve2);
instru.Vmin = (int32_t)VMIN(instru.Ve1,instru.Ve2);
instru.directionInit = VDIRECTION(instru.Ve1,instru.Ve2);
instru.steptime = get_step_time(ins[9]); //5000;10000;20000;
instru.step = ((uint32_t)(ins[7]) << 8) | (uint32_t)(ins[8]);//1~1000 = 0.1mv ~ 100mv
instru.step = instru.step * 100000 / instru.steptime;
STEP_TO_VSETRATE(instru.step);
instru.VsetRate = VsetRateTable[instru.VsetRateIndex];//N
instru.cycleNumber = ((uint16_t)(ins[10]) << 8) | (uint16_t)(ins[11]);
instru.hign_z_en = ins[13] & 0x0F;
instru.notifyRate = ((uint32_t)ins[14] << 8) | (uint32_t)ins[15];
instru.notifyRate = 10000 / instru.notifyRate * 10;
*/
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint8_t : 8;
uint8_t : 8;
uint16_t volt_start; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t volt_stop; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t step; // unit: 100uV
uint8_t step_time; // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
uint16_t cycles; // 0 ~ 500000
uint16_t volt_start; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t volt_stop; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
uint16_t step; // unit: 100uV
uint8_t step_time; // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
uint16_t cycles; // 0 ~ 500000
uint8_t : 8;
uint8_t hi_z_en; // lower nibble
uint16_t sample_rate; // unit: 0.1Hz
+41 -43
View File
@@ -2,14 +2,12 @@
#define __EDC20_IO_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include <stdint.h>
#include "nrf_drv_spi.h"
#include "nrf_gpio.h"
#include <stdint.h>
#define ADCA2_PIN NRF_GPIO_PIN_MAP(0, 25)
#define ADCA1_PIN NRF_GPIO_PIN_MAP(0, 19)
@@ -47,51 +45,51 @@ extern "C"
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
typedef struct
{
float mV_start;
float mV_stop;
float mV_step;
uint32_t uS_step;
uint32_t cycles;
bool hi_z_en;
} elite_dac_config_t;
typedef struct
{
float mV_start;
float mV_stop;
float mV_step;
uint32_t uS_step;
uint32_t cycles;
bool hi_z_en;
} elite_dac_config_t;
void gpio_init(void);
void circuit_selection_vin_0(void);
void circuit_selection_vin_1(void);
void circuit_selection_vin_2(void);
void circuit_selection_Iin_0(void);
void circuit_selection_Iin_1(void);
void circuit_selection_Iin_2(void);
void circuit_selection_Iin_3(void);
void circuit_selection_Iin_4(void);
void circuit_selection_dac_coarse_tune_c(void);
void circuit_selection_dac_fine_tune_f0(void);
void circuit_selection_dac_fine_tune_f1(void);
void circuit_selection_dac_fine_tune_f2(void);
void circuit_selection_cv3_config(void);
void circuit_selection_cc_config(void);
void circuit_selection_dac_circuit_open(void);
void gpio_init(void);
void circuit_selection_vin_0(void);
void circuit_selection_vin_1(void);
void circuit_selection_vin_2(void);
void circuit_selection_Iin_0(void);
void circuit_selection_Iin_1(void);
void circuit_selection_Iin_2(void);
void circuit_selection_Iin_3(void);
void circuit_selection_Iin_4(void);
void circuit_selection_dac_coarse_tune_c(void);
void circuit_selection_dac_fine_tune_f0(void);
void circuit_selection_dac_fine_tune_f1(void);
void circuit_selection_dac_fine_tune_f2(void);
void circuit_selection_cv3_config(void);
void circuit_selection_cc_config(void);
void circuit_selection_dac_circuit_open(void);
void twi_init(void);
void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);
void twi_init(void);
void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);
void spi_init(void);
void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
void spi2_set_mode(nrf_drv_spi_mode_t mode);
void spi_init(void);
void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
void spi2_set_mode(nrf_drv_spi_mode_t mode);
void edc20_io_init(void);
void edc20_io_power_off(void);
void edc20_io_power_on(void);
void edc20_io_init(void);
void edc20_io_power_off(void);
void edc20_io_power_on(void);
void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
void edc20_dac_tim_stop(void);
void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
void edc20_dac_tim_stop(void);
void edc20_adc_tim_start(elite_dac_config_t *p_config);
void edc20_adc_tim_stop(void);
void edc20_adc_tim_start(elite_dac_config_t *p_config);
void edc20_adc_tim_stop(void);
#ifdef __cplusplus
}
+16
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@@ -0,0 +1,16 @@
#ifndef __EIS_H__
#define __EIS_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "elite_def.h"
extern elite_instance_t eis_2_0;
#ifdef __cplusplus
}
#endif
#endif /* ! __EIS_H__ */
+6 -17
View File
@@ -1,19 +1,15 @@
#include "app_config.h"
#include "elite.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#include "elite_dev_v1_0.h"
#include "elite_dev.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "elite_edc_v2_0.h"
#include "edc.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "elite_pel_v2_0.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#include "elite_pel_v3_0.h"
#include "pel.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "elite_cpg_v1_1.h"
#include "cpg.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#include "elite_mmm_v1_0.h"
#include "elite_mmm.h"
#else
#error "Unknown DEF_ELITE_MODEL"
#endif
@@ -73,11 +69,6 @@ static void decode_cis_ins(uint8_t *ins, uint16_t size)
}
}
// define BT instruction
#define INS_TYPE_RIS 0x30
#define INS_TYPE_VIS 0xC0
#define INS_TYPE_CIS 0x70
static void elite_instr_task(void *p_arg)
{
static size_t instr_size = 0;
@@ -118,8 +109,6 @@ void elite_init(void)
p_instance = edc.p_elite_instance;
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
p_instance = pel_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
p_instance = pel_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
p_instance = cpg_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
@@ -135,7 +124,7 @@ void elite_init(void)
void elite_instr_send(void *p, size_t size)
{
/* reply the instruction */
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update(p, size);
xMessageBufferSend(instr_msg, p, size, portMAX_DELAY);
+2 -10
View File
@@ -7,24 +7,16 @@ extern "C"
#endif
#include "app_config.h"
#include "elite.h"
#include "app_error.h"
#include "elite_def.h"
void elite_init(void);
void elite_instr_send(void *p, size_t size);
ret_code_t le_data_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait);
typedef struct
{
void (*cis_func[256])(uint8_t *ins, uint16_t size);
void (*vis_func[256])(uint8_t *ins, uint16_t size);
void (*ris_func[256])(uint8_t *ins, uint16_t size);
} elite_instance_t;
#ifdef __cplusplus
}
#endif
+8
View File
@@ -0,0 +1,8 @@
#include "elite_adc.h"
#include "nrf_log.h"
void IinADCGainCtrl(uint8_t IinADCLevel) { NRF_LOG_INFO("%s", __FUNCTION__); }
void VinADCGainCtrl(uint8_t VinADCLevel) { NRF_LOG_INFO("%s", __FUNCTION__); }
void AutoGainChangeIin(int32_t RealCurrent, uint16_t plot_type, uint16_t *no_rec_time) { NRF_LOG_INFO("%s", __FUNCTION__); }
void AutoGainChangeVin(int32_t RealVin) { NRF_LOG_INFO("%s", __FUNCTION__); }
+19
View File
@@ -0,0 +1,19 @@
#ifndef __ELITE_ADC_H__
#define __ELITE_ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
void IinADCGainCtrl(uint8_t IinADCLevel);
void VinADCGainCtrl(uint8_t VinADCLevel);
void AutoGainChangeIin(int32_t RealCurrent, uint16_t plot_type, uint16_t *no_rec_time);
void AutoGainChangeVin(int32_t RealVin);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_ADC_H__ */
+1 -7
View File
@@ -6,8 +6,6 @@ void elite_board_init(void)
edc20_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel20_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
pel30_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg11_io_init();
#endif
@@ -22,9 +20,6 @@ void elite_board_demo(void)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
extern void pel_pulse_gen_demo(void);
pel_pulse_gen_demo();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
extern void pel_pulse_gen_demo(void);
pel_pulse_gen_demo();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg_pulse_default_demo_ext();
#endif
@@ -37,7 +32,6 @@ void elite_board_power_off(void)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
edc20_io_power_off();
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#endif
}
@@ -46,7 +40,7 @@ void elite_drv_init(void)
{
btn_init();
led_init();
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
sw_init();
adc_init();
dac_init();
+3 -5
View File
@@ -18,13 +18,11 @@ extern "C"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "elite_edc_v2_0_io.h"
#include "edc20_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "elite_pel_v2_0_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#include "elite_pel_v3_0_io.h"
#include "pel20_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "elite_cpg_v1_1_io.h"
#include "cpg11_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#else
#error "Not implemented xxx_io.h"
+3349
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File diff suppressed because it is too large Load Diff
+36
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@@ -0,0 +1,36 @@
#ifndef __ELITE_CORRECTION_H__
#define __ELITE_CORRECTION_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#define BOARD_EE_EF 1
struct formula_ctx_t
{
long long coeff;
long long offset;
};
struct correction_ctx_t
{
struct formula_ctx_t ADC_volt[3];
struct formula_ctx_t ADC_current[4];
struct formula_ctx_t Usercode2DAC[2];
struct formula_ctx_t ADC_Vout_volt[1];
uint16_t Gain0Boundary[2];
uint16_t Gain1Boundary[4];
uint16_t Gain2Boundary[2];
};
int32_t DecodeADCValue(uint8_t adc_gain, uint8_t adc_channel, uint16_t adc_rxbuf);
uint16_t Usercode_Correction_to_DAC(uint8_t dac_gain, uint16_t usercode);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_CORRECTION_H__ */
+55
View File
@@ -0,0 +1,55 @@
#include "elite_dac.h"
#include "edc.h"
static bool DACReset;
void VoutGainControl(uint8_t VOUTLevel)
{
switch (VOUTLevel)
{
case 0:
// VOUT gain level = 0, using 240K resister
break;
case 1:
// VOUT gain level = 1, using 15K resister
break;
case 2:
// VOUT gain level = 2, using 15K resister
break;
default:
// default using 15K resister
break;
}
}
int32_t User2Real(uint16_t usr_code)
{
/* transfer usr_code to real voltage value (mV) */
return (int32_t)((usr_code - 25000) / 5);
}
void AutoGainChangeVout(uint32_t *p_VoutGainLv, int32_t usr_code)
{
int32_t RealVolt = (usr_code - 25000) * 200; // (usr_code - 25000) / 5 * 1000 [1uV]
// switch to 1 level volt(small) 15K
// switch to 2 level volt(large) 240K
if (*p_VoutGainLv == VOUT_GAIN_15K)
{
if (RealVolt > DAC_VOUT_GAIN_LARGE_BOUNDARY || RealVolt < -1 * DAC_VOUT_GAIN_LARGE_BOUNDARY)
{
// switch to 2 level volt(large)
*p_VoutGainLv = VOUT_GAIN_240K;
VoutGainControl(edc.instru.VoutGainLv);
}
}
else if (*p_VoutGainLv == VOUT_GAIN_240K)
{
if (RealVolt < DAC_VOUT_GAIN_SMALL_BOUNDARY && RealVolt > -1 * DAC_VOUT_GAIN_SMALL_BOUNDARY)
{
// switch to 1 level volt(small)
*p_VoutGainLv = VOUT_GAIN_15K;
VoutGainControl(edc.instru.VoutGainLv);
}
}
}
+28
View File
@@ -0,0 +1,28 @@
#ifndef __ELITE_DAC_H__
#define __ELITE_DAC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdbool.h>
#include <stdint.h>
#define DACCLS 0x02
#define DACOUT 0x31
// DAC Vout theoretical boundary <300, 100~ (mV)
#define DAC_VOUT_GAIN_SMALL_BOUNDARY 100000 // 25500(usercode) = 100 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY 300000 // 26500(usercode) = 300 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY_USERCODE 26500 // 26500(usercode) = 300 mV
#define DAC_VOUT_GAIN_LARGE_BOUNDARY1_USERCODE 23500 // 23500(usercode) = -300 mV
void VoutGainControl(uint8_t VOUTLevel);
int32_t User2Real(uint16_t UserCode);
void AutoGainChangeVout(uint32_t *p_VoutGainLv, int32_t usr_code);
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_DAC_H__ */
+120
View File
@@ -0,0 +1,120 @@
#ifndef __ELITE_DEF_H__
#define __ELITE_DEF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
// define BT instruction
#define INS_TYPE_RIS 0x30
#define INS_TYPE_VIS 0xC0
#define INS_TYPE_CIS 0x70
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_ASK 0x30
#define VIS_STI 0xC0
#define VIS_INT 0x60
#define VIS_DEVICE_SHINY 0x10
#define VIS_SHINY_DIS 0x20
// RIS (real instruction)
enum all_mode_e
{
CURVE_IV = 0x01, // I-V Curve
CURVE_IV_CY = 0x02, // Cycle I-V
CURVE_VO = 0x03, // Function Generator
CURVE_RT = 0x04, // R-T Graph
CURVE_VT = 0x05, // V-T Graph
CURVE_IT = 0x06, // I-T Graph
CURVE_CC = 0x07, // Constant Current (CC)
CURVE_OCP = 0x08, // Open Circuit Potential (OCP)
CURVE_CV = 0x09, // Cyclic Voltammetry (CV)
CURVE_LSV = 0x0A, // Linear Sweep Voltammetry (LSV)
CURVE_CA = 0x0B, // Chronoamperometric Graph (CA)
CURVE_CP = 0x0C, // Chronopotentiometry (CP)
CURVE_UNI_PULSE = 0x0D, // Pulse Sensing (universal pulse)
CURVE_DPV = 0x0E, // Differential Pulse Voltammetry (DPV)
CURVE_DPV_ADVANCE = 0x0F,
CURVE_DPV_SMPRATE = 0x10,
CURVE_DPV_ADVANCE_SMPRATE = 0x11,
CURVE_EIS = 0x12,
CURVE_CF = 0x13, // Constant Frequency(CF)
CURVE_CALI = 0xF1,
SET_SAMPLE_RATE = 0xE0,
DEV_MODE = 0xFF, // Develop Mode
};
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_LED_TEST 0x70
#define CIS_CALI 0x30
#define CIS_CALI2 0x90
#define CTL_WRT 0x20
#define CTL_RD 0x21
#define CTL_RD_DFTR 0x78
#define CTL_RD_DFTI 0x7C
#define CTL_RD_ADC 0x7A
#define CTL_RESET 0x11
// mode parameter
#define VMAX(v1, v2) ((v1 >= v2) ? v1 : v2)
#define VMIN(v1, v2) ((v1 < v2) ? v1 : v2)
#define VDIRECTION(v1, v2) ((v1 > v2) ? 0 : 1)
#define AFTER_READ_I 0
#define AFTER_READ_V 1
#define PARA_1 0x01
#define PARA_2 0x02
#define PARA_3 0x03
#define PARA_4 0x04
#define PARA_5 0x05
#define PARA_6 0x06
#define PARA_7 0x07
#define PARA_8 0x08
#define PARA_9 0x09
#define PARA_10 0x0A
#define PARA_11 0x0B
#define PARA_12 0x0C
#define PARA_13 0x0D
#define PARA_14 0x0E
#define PARA_15 0x0F
#define PARA_16 0x10
#define PARA_17 0x11
// Elite LED
#define COLOR_BLACK 0x00
#define COLOR_RED 0x01
#define COLOR_ORANGE 0x02
#define COLOR_YELLOW 0x03
#define COLOR_GREEN 0x04
#define COLOR_BLUE 0x05
#define COLOR_CYAN 0x06
#define COLOR_MAGENTA 0x07
#define COLOR_PURPLE 0x08
#define COLOR_WHITE 0x09
#define COLOR_YELLOWGREEN 0x0A
#define BT_WAIT 0x01
#define NO_EVENT 0x02
#define PRE_WORK 0x03
#define WORKING 0x04
#define POST_WORK 0x05
typedef struct
{
void (*cis_func[256])(uint8_t *ins, uint16_t size);
void (*vis_func[256])(uint8_t *ins, uint16_t size);
void (*ris_func[256])(uint8_t *ins, uint16_t size);
} elite_instance_t;
#ifdef __cplusplus
}
#endif
#endif /* ! __ELITE_DEF_H__ */
+3 -21
View File
@@ -1,27 +1,9 @@
#include "app_config.h"
#include "elite_dev.h"
#include "elite_dev_v1_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#include "app_error.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include <stdint.h>
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#define VERSION_DATE_YEAR 24
#define VERSION_DATE_MONTH 7
@@ -39,7 +21,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
+2 -3
View File
@@ -2,14 +2,13 @@
#define __ELITE_DEV_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include "app_config.h"
#include "elite.h"
const elite_instance_t *dev_init(void);
const elite_instance_t *dev_init(void);
#ifdef __cplusplus
}
+3 -18
View File
@@ -1,24 +1,9 @@
#include "app_config.h"
#include "elite_mmm_v1_0.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#include "elite_mmm.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
// RIS (real instruction)
#define DEV_MODE 0xFF // Develop Mode
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 6
@@ -36,7 +21,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
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@@ -337,9 +337,4 @@ ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_
return ret;
}
bool is_ble_connected(void)
{
return (elite_context.conn_handle != BLE_CONN_HANDLE_INVALID);
}
#endif // NRF_MODULE_ENABLED(BLE_ELITE)
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+50 -14
View File
@@ -1,5 +1,3 @@
#include "app_config.h"
#if (DEF_LED_DRV_ENABLED)
#include "led_drv.h"
#include "nrf_log.h"
@@ -11,15 +9,60 @@
#if (DEF_APA102_2020_ENABLED)
#include "apa102_2020.h"
static const led_drv_if_t *p_inst = &apa102_drv;
#elif (DEF_RGB_ENABLED)
#include "led_rgb.h"
static const led_drv_if_t *p_inst = &led_rgb_drv;
#else
static led_drv_if_t *p_inst = NULL;
#endif
#if (DEF_LED_DRV_ENABLED)
static bool btWaitLedFlag = 0;
static bool noEventLedFlag = 0;
static bool preWorkLedFlag = 0;
static bool workingLedFlag = 0;
static bool postWorkLedFlag = 0;
int32_t led_mode(uint16_t mode_status)
{
btWaitLedFlag = 0;
noEventLedFlag = 0;
preWorkLedFlag = 0;
workingLedFlag = 0;
postWorkLedFlag = 0;
switch (mode_status)
{
case BT_WAIT:
btWaitLedFlag = 1;
NRF_LOG_INFO("%s(BT_WAIT) is unimplemented.", __FUNCTION__);
break;
case NO_EVENT:
noEventLedFlag = 1;
NRF_LOG_INFO("%s(NO_EVENT) is unimplemented.", __FUNCTION__);
break;
case PRE_WORK:
preWorkLedFlag = 1;
NRF_LOG_INFO("%s(PRE_WORK) is unimplemented.", __FUNCTION__);
break;
case WORKING:
workingLedFlag = 1;
NRF_LOG_INFO("%s(WORKING) is unimplemented.", __FUNCTION__);
break;
case POST_WORK:
postWorkLedFlag = 1;
NRF_LOG_INFO("%s(POST_WORK) is unimplemented.", __FUNCTION__);
break;
default:
NRF_LOG_INFO("%s(default) is unimplemented.", __FUNCTION__);
break;
}
return 0;
}
int32_t led_set(struct led_color color)
{
if (p_inst == NULL)
@@ -68,14 +111,7 @@ int32_t led_init(void)
int32_t led_as_rainbow(void)
{
uint8_t color_idx;
#if (DEF_APA102_2020_ENABLED)
struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
#endif
#if (DEF_RGB_ENABLED)
struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
#endif
for (int i = 0; i < DEF_LED_COUNT; i++)
{
+27 -33
View File
@@ -2,8 +2,7 @@
#define __LED_DRV_H__
#ifdef __cplusplus
extern "C"
{
extern "C" {
#endif
#include "app_config.h"
@@ -12,7 +11,6 @@ extern "C"
#define LED_DRV_ERROR (-1)
#define LED_DRV_SUCCESS (0)
#if (DEF_APA102_2020_ENABLED)
#define LED_NONE \
(struct led_color) \
{ \
@@ -53,45 +51,41 @@ extern "C"
{ \
.R = 0xFF, .G = 0x00, .B = 0xFF \
}
#define LED_ORANGE \
(struct led_color) \
{ \
.R = 0xFF, .G = 0x58, .B = 0x09 \
}
#elif (DEF_RGB_ENABLED)
#define LED_NONE \
(struct led_color) { .R = 0, .G = 0, .B = 0 }
#define LED_RED \
(struct led_color) { .R = 1, .G = 0, .B = 0 }
#define LED_YELLOW \
(struct led_color) { .R = 1, .G = 1, .B = 0 }
#define LED_WHITE \
(struct led_color) { .R = 1, .G = 1, .B = 1 }
#define LED_GREEN \
(struct led_color) { .R = 0, .G = 1, .B = 0 }
#define LED_CYAN \
(struct led_color) { .R = 0, .G = 1, .B = 1 }
#define LED_BLUE \
(struct led_color) { .R = 0, .G = 0, .B = 1 }
#define LED_PURPLE \
(struct led_color) { .R = 1, .G = 0, .B = 1 }
#endif
#define LED_OFF LED_NONE
#define LED_ON LED_GREEN
#define LED_ERROR LED_RED
#define LED_IDEL_DISCONNECT LED_YELLOW
#define LED_IDEL_CONNECTED LED_GREEN
#define LED_REC LED_CYAN
#define LED_IDENTICY_DEV LED_PURPLE
#define LED_BUTTON_PRESS LED_YELLOW
#define LED_OFF LED_NONE
#define LED_ON LED_GREEN
#define LED_ERROR LED_RED
#define LED_IDLE_DISCONNECTED LED_YELLOW
#define LED_IDLE_CONNECTED LED_GREEN
#define LED_REC LED_CYAN
#define LED_IDENTIFY_DEV LED_PURPLE
#define LED_BUTTON_PRESS LED_YELLOW
#define BT_WAIT 0x01
#define NO_EVENT 0x02
#define PRE_WORK 0x03
#define WORKING 0x04
#define POST_WORK 0x05
#if (DEF_LED_DRV_ENABLED)
int32_t led_init(void);
int32_t led_set(struct led_color color);
int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
int32_t led_as_rainbow(void);
int32_t
led_init(void);
int32_t led_set(struct led_color color);
int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
int32_t led_mode(uint16_t mode_status);
int32_t led_as_rainbow(void);
#else
#define led_init()
#define led_set(x)
#define led_single_led_set(x, y, z)
#define led_mode(x)
#define led_as_rainbow(x)
#endif /* ! DEF_LED_DRV_ENABLED */
-128
View File
@@ -1,128 +0,0 @@
SECTIONS
{
}
SECTIONS
{
. = ALIGN(4);
.mem_section_dummy_ram :
{
}
.cli_sorted_cmd_ptrs :
{
PROVIDE(__start_cli_sorted_cmd_ptrs = .);
KEEP(*(.cli_sorted_cmd_ptrs))
PROVIDE(__stop_cli_sorted_cmd_ptrs = .);
} > RAM
.fs_data :
{
PROVIDE(__start_fs_data = .);
KEEP(*(.fs_data))
PROVIDE(__stop_fs_data = .);
} > RAM
.log_dynamic_data :
{
PROVIDE(__start_log_dynamic_data = .);
KEEP(*(SORT(.log_dynamic_data*)))
PROVIDE(__stop_log_dynamic_data = .);
} > RAM
.log_filter_data :
{
PROVIDE(__start_log_filter_data = .);
KEEP(*(SORT(.log_filter_data*)))
PROVIDE(__stop_log_filter_data = .);
} > RAM
} INSERT AFTER .data;
SECTIONS
{
.mem_section_dummy_rom :
{
}
.sdh_soc_observers :
{
PROVIDE(__start_sdh_soc_observers = .);
KEEP(*(SORT(.sdh_soc_observers*)))
PROVIDE(__stop_sdh_soc_observers = .);
} > FLASH
.sdh_ble_observers :
{
PROVIDE(__start_sdh_ble_observers = .);
KEEP(*(SORT(.sdh_ble_observers*)))
PROVIDE(__stop_sdh_ble_observers = .);
} > FLASH
.pwr_mgmt_data :
{
PROVIDE(__start_pwr_mgmt_data = .);
KEEP(*(SORT(.pwr_mgmt_data*)))
PROVIDE(__stop_pwr_mgmt_data = .);
} > FLASH
.sdh_req_observers :
{
PROVIDE(__start_sdh_req_observers = .);
KEEP(*(SORT(.sdh_req_observers*)))
PROVIDE(__stop_sdh_req_observers = .);
} > FLASH
.sdh_state_observers :
{
PROVIDE(__start_sdh_state_observers = .);
KEEP(*(SORT(.sdh_state_observers*)))
PROVIDE(__stop_sdh_state_observers = .);
} > FLASH
.sdh_stack_observers :
{
PROVIDE(__start_sdh_stack_observers = .);
KEEP(*(SORT(.sdh_stack_observers*)))
PROVIDE(__stop_sdh_stack_observers = .);
} > FLASH
.nrf_queue :
{
PROVIDE(__start_nrf_queue = .);
KEEP(*(.nrf_queue))
PROVIDE(__stop_nrf_queue = .);
} > FLASH
.nrf_balloc :
{
PROVIDE(__start_nrf_balloc = .);
KEEP(*(.nrf_balloc))
PROVIDE(__stop_nrf_balloc = .);
} > FLASH
.cli_command :
{
PROVIDE(__start_cli_command = .);
KEEP(*(.cli_command))
PROVIDE(__stop_cli_command = .);
} > FLASH
.crypto_data :
{
PROVIDE(__start_crypto_data = .);
KEEP(*(SORT(.crypto_data*)))
PROVIDE(__stop_crypto_data = .);
} > FLASH
.log_const_data :
{
PROVIDE(__start_log_const_data = .);
KEEP(*(SORT(.log_const_data*)))
PROVIDE(__stop_log_const_data = .);
} > FLASH
.log_backends :
{
PROVIDE(__start_log_backends = .);
KEEP(*(SORT(.log_backends*)))
PROVIDE(__stop_log_backends = .);
} > FLASH
} INSERT AFTER .text
INCLUDE "nrf_common.ld"
PROVIDE(_sbss = __bss_start__);
PROVIDE(_ebss = __bss_end__);
PROVIDE(_sdata = __data_start__);
PROVIDE(_sidata = __etext);
PROVIDE(_estack = __StackTop);
PROVIDE(_edata = __data_end__);
PROVIDE(__isr_vector = __StackTop);
PROVIDE(_etext = __etext);
+2 -2
View File
@@ -42,13 +42,13 @@ static void le_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
NRF_LOG_INFO("Connect to peer.");
err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_CONN, p_ble_evt->evt.gap_evt.conn_handle, 8);
APP_ERROR_CHECK(err_code);
led_set(LED_IDLE_CONNECTED);
led_set(LED_IDEL_CONNECTED);
break;
case BLE_GAP_EVT_DISCONNECTED:
NRF_LOG_INFO("Disconnect from peer.");
err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_ADV, p_ble_evt->evt.gap_evt.conn_handle, 0);
APP_ERROR_CHECK(err_code);
led_set(LED_IDLE_DISCONNECTED);
led_set(LED_IDEL_DISCONNECT);
break;
case BLE_GAP_EVT_PHY_UPDATE_REQUEST: {
NRF_LOG_INFO("PHY update response. (AUTO)");
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+176 -324
View File
@@ -1,41 +1,25 @@
#include "app_config.h"
#include "app_error.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "adc_drv.h"
#include "elite.h"
#include "elite_board.h"
#include "elite_pel_v2_0.h"
#include "pel.h"
#include "message_buffer.h"
#include "semphr.h"
#include "task.h"
#include "elite_def.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#include <stdbool.h>
#include <stdint.h>
#include <stdlib.h>
#include "adc_drv.h"
// RIS (real instruction)
#define MANUAL_SCAN_MODE 0x01
#define AUTO_SCAN_MODE 0x02
#define R_EXTERNAL_CALIBRATION_MODE 0x03
#define DEV_MODE 0xFF
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "queue.h"
#include "semphr.h"
#include "stream_buffer.h"
#include "task.h"
// VIS (virtual instruction)
#define VIS_RST 0xF0
#define VIS_DEVICE_SHINY 0x10
// CIS (control instruction)
#define CIS_VERSION 0x40
#define CIS_VOLT 0x10
#define CIS_TEMPERATURE 0x80
#define CIS_CALI 0x30
#define DUMP_DATA 0
static bool running = false;
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
typedef struct
{
@@ -62,18 +46,18 @@ static float _load_set(uint32_t mask)
} input_pin_t;
const input_pin_t input_pin_tab[] = {
{ 0.5, INPUT_1_PIN, PEL_0P5R_MASK },
{ 1.0, INPUT_2_PIN, PEL_1P0R_MASK },
{ 2.0, INPUT_3_PIN, PEL_2P0R_MASK },
{ 4.0, INPUT_4_PIN, PEL_4P0R_MASK },
{ 8.3, INPUT_5_PIN, PEL_8P0R_MASK },
{ 16.2, INPUT_6_PIN, PEL_16P2R_MASK },
{ 32.4, INPUT_7_PIN, PEL_32P4R_MASK },
{ 62.5, INPUT_8_PIN, PEL_63P4R_MASK },
{ 130.0, INPUT_9_PIN, PEL_127R_MASK },
{ 270.0, INPUT_10_PIN, PEL_255R_MASK },
{ 510.0, INPUT_11_PIN, PEL_511R_MASK },
{ 1000.0, INPUT_12_PIN, PEL_1000R_MASK },
{ 0.5, INPUT_1_PIN, PEL_0P5R_MASK},
{ 1.0, INPUT_2_PIN, PEL_1P0R_MASK},
{ 2.0, INPUT_3_PIN, PEL_2P0R_MASK},
{ 4.0, INPUT_4_PIN, PEL_4P0R_MASK},
{ 8.3, INPUT_5_PIN, PEL_8P0R_MASK},
{ 16.2, INPUT_6_PIN, PEL_16P2R_MASK},
{ 32.4, INPUT_7_PIN, PEL_32P4R_MASK},
{ 62.5, INPUT_8_PIN, PEL_63P4R_MASK},
{ 130.0, INPUT_9_PIN, PEL_127R_MASK},
{ 270.0, INPUT_10_PIN, PEL_255R_MASK},
{ 510.0, INPUT_11_PIN, PEL_511R_MASK},
{1000.0, INPUT_12_PIN, PEL_1000R_MASK},
};
float ohms = 0;
@@ -93,11 +77,6 @@ static float _load_set(uint32_t mask)
nrf_gpio_pin_set(input_pin_tab[i].pin);
}
}
if (mask == 0)
{
NRF_LOG_INFO("disable R1~R12");
}
return sum_of_conductances;
}
@@ -112,49 +91,49 @@ static void set_resistor_load_bits(uint32_t mask)
static void set_resistor_load_pattern(uint32_t index)
{
const resistor_t pattern_tab[] = {
{ 1, 0b0000000000000111 },
{ 2, 0b0000000000000011 },
{ 3, 0b0000000000000101 },
{ 4, 0b0000000000000001 },
{ 5, 0b0000000000001110 },
{ 6, 0b0000000000000110 },
{ 7, 0b0000000000001010 },
{ 8, 0b0000000000000010 },
{ 9, 0b0000000000011100 },
{ 10, 0b0000000000001100 },
{ 11, 0b0000000000010100 },
{ 12, 0b0000000000000100 },
{ 13, 0b0000000000111000 },
{ 14, 0b0000000000011000 },
{ 15, 0b0000000000101000 },
{ 16, 0b0000000000001000 },
{ 17, 0b0000000001110000 },
{ 18, 0b0000000000110000 },
{ 19, 0b0000000001010000 },
{ 20, 0b0000000000010000 },
{ 21, 0b0000000011100000 },
{ 22, 0b0000000001100000 },
{ 23, 0b0000000010100000 },
{ 24, 0b0000000000100000 },
{ 25, 0b0000000111000000 },
{ 26, 0b0000000011000000 },
{ 27, 0b0000000101000000 },
{ 28, 0b0000000001000000 },
{ 29, 0b0000001110000000 },
{ 30, 0b0000000110000000 },
{ 31, 0b0000001010000000 },
{ 32, 0b0000000010000000 },
{ 33, 0b0000011100000000 },
{ 34, 0b0000001100000000 },
{ 35, 0b0000010100000000 },
{ 36, 0b0000000100000000 },
{ 37, 0b0000111000000000 },
{ 38, 0b0000011000000000 },
{ 39, 0b0000101000000000 },
{ 40, 0b0000001000000000 },
{ 41, 0b0000110000000000 },
{ 42, 0b0000010000000000 },
{ 43, 0b0000100000000000 },
{ 1, 0b0000000000000111},
{ 2, 0b0000000000000011},
{ 3, 0b0000000000000101},
{ 4, 0b0000000000000001},
{ 5, 0b0000000000001110},
{ 6, 0b0000000000000110},
{ 7, 0b0000000000001010},
{ 8, 0b0000000000000010},
{ 9, 0b0000000000011100},
{10, 0b0000000000001100},
{11, 0b0000000000010100},
{12, 0b0000000000000100},
{13, 0b0000000000111000},
{14, 0b0000000000011000},
{15, 0b0000000000101000},
{16, 0b0000000000001000},
{17, 0b0000000001110000},
{18, 0b0000000000110000},
{19, 0b0000000001010000},
{20, 0b0000000000010000},
{21, 0b0000000011100000},
{22, 0b0000000001100000},
{23, 0b0000000010100000},
{24, 0b0000000000100000},
{25, 0b0000000111000000},
{26, 0b0000000011000000},
{27, 0b0000000101000000},
{28, 0b0000000001000000},
{29, 0b0000001110000000},
{30, 0b0000000110000000},
{31, 0b0000001010000000},
{32, 0b0000000010000000},
{33, 0b0000011100000000},
{34, 0b0000001100000000},
{35, 0b0000010100000000},
{36, 0b0000000100000000},
{37, 0b0000111000000000},
{38, 0b0000011000000000},
{39, 0b0000101000000000},
{40, 0b0000001000000000},
{41, 0b0000110000000000},
{42, 0b0000010000000000},
{43, 0b0000100000000000},
};
for (int32_t i = 0; i < ARRAY_SIZE(pattern_tab); i++)
@@ -227,35 +206,32 @@ static void cis_version(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t cis_ver[] = {
ins[1],
CIS_VERSION,
VERSION_DATE_YEAR,
VERSION_DATE_MONTH,
VERSION_DATE_DAY,
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
static void send_start_package(void *packet_buf, uint32_t packet_len)
{
NRF_LOG_INFO(__FUNCTION__);
for (uint32_t i = 0; i < 4; i++)
{
ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_notify(uint8_t * p_value, uint16_t len);
nrf_gpio_pin_set(TP2_PIN);
ret_code_t ret = le_event_notify(packet_buf, packet_len);
nrf_gpio_pin_clear(TP2_PIN);
if (DUMP_DATA)
{
for (uint32_t i = 0; i < packet_len; i++)
{
NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
}
NRF_LOG_RAW_INFO("\r\n");
}
vTaskDelay(pdMS_TO_TICKS(10));
NRF_LOG_HEXDUMP_INFO(packet_buf, packet_len);
NRF_LOG_INFO("\n");
}
}
@@ -272,60 +248,97 @@ static void pel_scan_mode_notify(scan_mode_notify_packet_t *packet_buf, uint32_t
packet_buf->mem_board_id = global_memoryboard_id;
packet_buf->packet_seq++;
packet_buf->notify_time = xTaskGetTickCount();
packet_buf->raw_output_r1 = pel_hw.adc.results[0];
packet_buf->raw_output_r2 = pel_hw.adc.results[1];
packet_buf->raw_output_vo = pel_hw.adc.results[2];
packet_buf->raw_output_vc = pel_hw.adc.results[3];
packet_buf->raw_output_ve = pel_hw.adc.results[4];
packet_buf->output_r1_mv = pel_hw.adc.results_f[0];
packet_buf->output_r2_mv = pel_hw.adc.results_f[1];
packet_buf->output_vo_mv = pel_hw.adc.results_f[2];
packet_buf->output_vc_mv = pel_hw.adc.results_f[3];
packet_buf->output_ve_mv = pel_hw.adc.results_f[4];
packet_buf->hold_r1_v = pel_hw.adc.results_f[0] * 10 / 1000;
packet_buf->hold_r2_v = pel_hw.adc.results_f[1] * 10 / 1000;
packet_buf->hold_out_v = pel_hw.adc.results_f[2] * 10 / 1000;
packet_buf->hold_vcc_v = pel_hw.adc.results_f[3] * 10 / 1000;
packet_buf->hold_vee_v = pel_hw.adc.results_f[4] * 10 / 1000;
packet_buf->current = 0;
packet_buf->notify_time = xTaskGetTickCount();
packet_buf->output_vo_raw = pel_hw.adc.results[2];
packet_buf->output_vc_raw = pel_hw.adc.results[3];
packet_buf->output_ve_raw = pel_hw.adc.results[4];
packet_buf->hold_OUT_v = pel_hw.adc.results_f[2] * 10 / 1000;
packet_buf->hold_VCC_v = pel_hw.adc.results_f[3] * 10 / 1000;
packet_buf->hold_VEE_v = pel_hw.adc.results_f[4] * 10 / 1000;
packet_buf->resis_pattern_id = load_config.resistor.pattern_index;
packet_buf->resis_bitsmask = load_config.resistor.resistor_mask;
packet_buf->resis_g_value = load_config.resistor.resistor_conductance;
for (int i = 0; i < ARRAY_SIZE(packet_buf->payload); i++)
packet_buf->val_1 = 0xFFFFFFFF;
packet_buf->val_2 = 0xFFFFFFFF;
packet_buf->val_3 = 0xFFFF;
ret_code_t ret = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
// NRF_LOG_HEXDUMP_INFO(packet_buf,packet_len);
{
packet_buf->payload[i] = 0xFFFFFFFF;
char str[128];
snprintf(str, sizeof(str), "{%3d, %3d, %10lu, %10lu, %10lu, %10lu, %2.7f, %2.7f, %2.7f, %5d, 0x%04X, %.7f, %d}", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time, packet_buf->output_vo_raw, packet_buf->output_vc_raw, packet_buf->output_ve_raw, packet_buf->hold_OUT_v, packet_buf->hold_VCC_v, packet_buf->hold_VEE_v, packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
NRF_LOG_INFO("%s", str);
}
}
ret_code_t ret = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
void test_gpio_task(void *pArg)
{
const uint32_t pel_pins[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN,
ANODE_PIN,
CATHODE_PIN,
SAMPLE_R_PIN,
SAMPLE_V_PIN
};
if (DUMP_DATA)
for (;;)
{
for (uint32_t i = 0; i < packet_len; i++)
NRF_LOG_INFO("[test] all output pin set low");
for (int i = 0; i < COUNTOF(pel_pins); i++)
{
NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
nrf_gpio_pin_clear(pel_pins[i]);
}
NRF_LOG_RAW_INFO("\r\n");
vTaskDelay(1000);
NRF_LOG_INFO("[test] all output pin set high");
for (int i = 0; i < COUNTOF(pel_pins); i++)
{
char str[128];
snprintf(str, sizeof(str), "{%10d, %10d, %10lu,", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time);
NRF_LOG_INFO("%s", str);
snprintf(str, sizeof(str), " %10lu, %10lu, %10lu, %10lu, %10lu, %7.3f, %7.3f, %7.3f, %7.3f, %7.3f,", packet_buf->raw_output_r1, packet_buf->raw_output_r2, packet_buf->raw_output_vo, packet_buf->raw_output_vc, packet_buf->raw_output_ve, packet_buf->output_r1_mv, packet_buf->output_r2_mv, packet_buf->output_vo_mv, packet_buf->output_vc_mv, packet_buf->output_ve_mv);
NRF_LOG_INFO("%s", str);
snprintf(str, sizeof(str), " %4.6f, %4.6f, %4.6f, %4.6f, %4.6f, %4.6f,", packet_buf->hold_r1_v, packet_buf->hold_r2_v, packet_buf->hold_out_v, packet_buf->hold_vcc_v, packet_buf->hold_vee_v, packet_buf->current);
NRF_LOG_INFO("%s", str);
snprintf(str, sizeof(str), " %10d, 0x%04X, %3.7f, %d}", packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
NRF_LOG_INFO("%s", str);
nrf_gpio_pin_set(pel_pins[i]);
}
vTaskDelay(1000);
NRF_LOG_INFO("[test] alternating high and low signals on all output pins");
for (int i = 0; i < COUNTOF(pel_pins); i++)
{
nrf_gpio_pin_clear(pel_pins[i]);
}
vTaskDelay(1000);
for (int i = 0; i < COUNTOF(pel_pins); i++)
{
nrf_gpio_pin_set(pel_pins[i]);
vTaskDelay(100);
nrf_gpio_pin_clear(pel_pins[i]);
}
vTaskDelay(1000);
}
}
static void decode_and_set_resistor_pattern(uint8_t *param)
{
uint16_t pattern_id = u8_to_u16(param[0], param[1]);
set_resistor_load_pattern(pattern_id);
}
static void decode_and_set_manual_resistor(uint8_t *param)
{
uint16_t manual_val = u8_to_u16(param[0], param[1]);
set_resistor_load_bits(manual_val);
}
static void dev_mode_input_resistor(uint8_t *ins)
{
NRF_LOG_INFO("[DEV MODE] %s", __FUNCTION__);
@@ -336,182 +349,30 @@ static void dev_mode_input_resistor(uint8_t *ins)
uint8_t ins_type : 4;
uint8_t pkg_size;
uint8_t mode;
uint8_t mode_opcode; // dev mode could ignore
uint8_t dev_feat;
uint8_t dev_feat_opcode;
uint8_t func_id;
uint8_t opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
switch (p_ins->opcode)
{
case 0x0100:
// 3000FFFF 0100
case 0x00:
set_resistor_to_high_z();
break;
case 0x0101: {
// 3000FFFF 0101 0001
uint16_t pattern_id = u8_to_u16(p_ins->param[0], p_ins->param[1]);
set_resistor_load_pattern(pattern_id);
case 0x01:
decode_and_set_resistor_pattern(p_ins->param);
break;
}
case 0x0102: {
// 3000FFFF 0102 000F
uint16_t manual_val = u8_to_u16(p_ins->param[0], p_ins->param[1]);
set_resistor_load_bits(manual_val);
case 0x02:
decode_and_set_manual_resistor(p_ins->param);
break;
}
default:
break;
}
}
typedef struct
{
uint32_t gpio;
const char *gpio_desc;
} pin_map_entry_t;
#define UNDEF_GPIO 0xFFFFFFFF
static const pin_map_entry_t pin_to_gpio_table[64] = {
[1] = { UNDEF_GPIO, "UNDEF_GPIO" },
[2] = { UNDEF_GPIO, "UNDEF_GPIO" },
[3] = { UNDEF_GPIO, "UNDEF_GPIO" },
[4] = { UNDEF_GPIO, "UNDEF_GPIO" },
[5] = { UNDEF_GPIO, "UNDEF_GPIO" },
[6] = { NRF_GPIO_PIN_MAP(0, 22), "GPIO(0, 22)" },
[7] = { UNDEF_GPIO, "UNDEF_GPIO" },
[8] = { NRF_GPIO_PIN_MAP(0, 25), "GPIO(0, 25)" },
[9] = { NRF_GPIO_PIN_MAP(0, 19), "GPIO(0, 19)" },
[10] = { NRF_GPIO_PIN_MAP(0, 21), "GPIO(0, 21)" },
[11] = { NRF_GPIO_PIN_MAP(1, 0), "GPIO(1, 0)" },
[12] = { NRF_GPIO_PIN_MAP(0, 18), "GPIO(0, 18)" },
[13] = { NRF_GPIO_PIN_MAP(0, 17), "GPIO(0, 17)" },
[14] = { NRF_GPIO_PIN_MAP(0, 20), "GPIO(0, 20)" },
[15] = { UNDEF_GPIO, "UNDEF_GPIO" },
[16] = { NRF_GPIO_PIN_MAP(0, 14), "GPIO(0, 14)" },
[17] = { NRF_GPIO_PIN_MAP(0, 13), "GPIO(0, 13)" },
[18] = { NRF_GPIO_PIN_MAP(0, 11), "GPIO(0, 11)" },
[19] = { UNDEF_GPIO, "UNDEF_GPIO" },
[20] = { NRF_GPIO_PIN_MAP(0, 15), "GPIO(0, 15)" },
[21] = { UNDEF_GPIO, "UNDEF_GPIO" },
[22] = { UNDEF_GPIO, "UNDEF_GPIO" },
[23] = { UNDEF_GPIO, "UNDEF_GPIO" },
[24] = { UNDEF_GPIO, "UNDEF_GPIO" },
[25] = { NRF_GPIO_PIN_MAP(1, 8), "GPIO(1, 8)" },
[26] = { NRF_GPIO_PIN_MAP(0, 12), "GPIO(0, 12)" },
[27] = { NRF_GPIO_PIN_MAP(0, 7), "GPIO(0, 7)" },
[28] = { NRF_GPIO_PIN_MAP(1, 9), "GPIO(1, 9)" },
[29] = { NRF_GPIO_PIN_MAP(0, 8), "GPIO(0, 8)" },
[30] = { NRF_GPIO_PIN_MAP(0, 6), "GPIO(0, 6)" },
[31] = { NRF_GPIO_PIN_MAP(0, 5), "GPIO(0, 5)" },
[32] = { NRF_GPIO_PIN_MAP(0, 27), "GPIO(0, 27)" },
[33] = { NRF_GPIO_PIN_MAP(0, 26), "GPIO(0, 26)" },
[34] = { NRF_GPIO_PIN_MAP(0, 4), "GPIO(0, 4)" },
[35] = { UNDEF_GPIO, "UNDEF_GPIO" },
[36] = { NRF_GPIO_PIN_MAP(0, 1), "GPIO(0, 1)" },
[37] = { NRF_GPIO_PIN_MAP(0, 29), "GPIO(0, 29)" },
[38] = { NRF_GPIO_PIN_MAP(0, 0), "GPIO(0, 0)" },
[39] = { NRF_GPIO_PIN_MAP(0, 31), "GPIO(0, 31)" },
[40] = { NRF_GPIO_PIN_MAP(1, 15), "GPIO(1, 15)" },
[41] = { NRF_GPIO_PIN_MAP(0, 2), "GPIO(0, 2)" },
[42] = { NRF_GPIO_PIN_MAP(0, 30), "GPIO(0, 30)" },
[43] = { NRF_GPIO_PIN_MAP(0, 28), "GPIO(0, 28)" },
[44] = { NRF_GPIO_PIN_MAP(1, 12), "GPIO(1, 12)" },
[45] = { NRF_GPIO_PIN_MAP(1, 14), "GPIO(1, 14)" },
[46] = { NRF_GPIO_PIN_MAP(0, 3), "GPIO(0, 3)" },
[47] = { NRF_GPIO_PIN_MAP(1, 13), "GPIO(1, 13)" },
[48] = { NRF_GPIO_PIN_MAP(1, 3), "GPIO(1, 3)" },
[49] = { NRF_GPIO_PIN_MAP(1, 10), "GPIO(1, 10)" },
[50] = { NRF_GPIO_PIN_MAP(1, 6), "GPIO(1, 6)" },
[51] = { NRF_GPIO_PIN_MAP(1, 11), "GPIO(1, 11)" },
[52] = { NRF_GPIO_PIN_MAP(0, 10), "GPIO(0, 10)" },
[53] = { NRF_GPIO_PIN_MAP(0, 9), "GPIO(0, 9)" },
[54] = { UNDEF_GPIO, "UNDEF_GPIO" },
[55] = { UNDEF_GPIO, "UNDEF_GPIO" },
[56] = { UNDEF_GPIO, "UNDEF_GPIO" },
[57] = { UNDEF_GPIO, "UNDEF_GPIO" },
[58] = { UNDEF_GPIO, "UNDEF_GPIO" },
[59] = { NRF_GPIO_PIN_MAP(1, 2), "GPIO(1, 2)" },
[60] = { NRF_GPIO_PIN_MAP(0, 24), "GPIO(0, 24)" },
[61] = { NRF_GPIO_PIN_MAP(0, 23), "GPIO(0, 23)" },
[62] = { NRF_GPIO_PIN_MAP(0, 16), "GPIO(0, 16)" },
[63] = { UNDEF_GPIO, "UNDEF_GPIO" },
};
static void set_single_pin_as_output(uint16_t pin_number, uint16_t high_low)
{
const pin_map_entry_t *pin_entry = &pin_to_gpio_table[pin_number];
if (pin_entry->gpio == UNDEF_GPIO)
{
NRF_LOG_INFO("pin_number(%d) is not used", pin_number);
return;
}
if (high_low > 1) high_low = 1;
nrf_gpio_cfg_output(pin_entry->gpio);
nrf_gpio_pin_write(pin_entry->gpio, high_low);
NRF_LOG_INFO("pin_number(%d) = %d // pin_function_name: %s",
pin_number,
high_low,
pin_entry->gpio_desc);
}
static void set_all_pins_as_output(uint16_t high_low)
{
if (high_low > 1) high_low = 1;
for (uint16_t i = 1; i < ARRAY_SIZE(pin_to_gpio_table); i++)
{
if (pin_to_gpio_table[i].gpio != UNDEF_GPIO)
{
set_single_pin_as_output(i, high_low);
}
}
}
static void dev_mode_gpio(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t ins_type : 4;
uint8_t pkg_size;
uint8_t mode;
uint8_t mode_opcode; // dev mode could ignore
uint8_t dev_feat;
uint8_t dev_feat_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
{
case 0xA000: {
// 3000FFFF A000
// pelv30_default_gpio();
break;
}
case 0xA001: {
// 3000FFFF A001 0008 0001
uint16_t pin_number = uint16_big_decode(&p_ins->param[0]);
uint16_t high_low = uint16_big_decode(&p_ins->param[2]);
set_single_pin_as_output(pin_number, high_low);
break;
}
case 0xA002: {
// 3000FFFF A002 0001
uint16_t high_low = uint16_big_decode(&p_ins->param[0]);
set_all_pins_as_output(high_low);
break;
}
}
}
static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
{
pel_config_t pel_cfg = {
@@ -563,14 +424,20 @@ static void pel_pulse_start(void *p_arg)
if (p_setting->is_pattern == true)
{
nrf_gpio_pin_set(RELAY1_PIN);
set_resistor_load_pattern(p_setting->pattern);
nrf_gpio_pin_clear(RELAY1_PIN);
}
else
{
nrf_gpio_pin_set(RELAY1_PIN);
set_resistor_load_bits(p_setting->bitmask);
nrf_gpio_pin_clear(RELAY1_PIN);
}
nrf_gpio_pin_set(TP2_PIN); // For testing
start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
nrf_gpio_pin_clear(TP2_PIN); // For testing
}
static void pel_pulse_stop(void *p_arg)
@@ -661,29 +528,25 @@ static void pel_scan_mode_task(void *pvArg)
static void dev_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
struct __PACKED
{
uint8_t id : 4;
uint8_t ins_type : 4;
uint8_t pkg_size;
uint8_t mode;
uint8_t mode_opcode; // dev mode could ignore
uint8_t dev_feat;
uint8_t dev_feat_opcode;
uint8_t func_id;
uint8_t opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->dev_feat)
global_memoryboard_id = p_ins->id;
switch (p_ins->func_id)
{
case 0x01:
dev_mode_input_resistor(ins);
break;
case 0xA0:
dev_mode_gpio(ins);
break;
default:
break;
}
@@ -691,7 +554,6 @@ static void dev_mode(uint8_t *ins, uint16_t size)
static void manual_scan_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
struct __PACKED
{
uint8_t id : 4;
@@ -714,7 +576,6 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
// 30 00 01 00
pel_scan_msg.opcode = PEL_STOP;
ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
running = false;
break;
}
@@ -732,7 +593,6 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
pel_scan_msg.notify_setting.drop = u8_to_u16(p_ins->param[4], p_ins->param[5]);
pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
running = true;
break;
}
@@ -825,14 +685,11 @@ static void auto_scan_start_task(void *p_arg)
auto_scan_start_handle = NULL;
running = false;
vTaskDelete(NULL);
}
static void auto_scan_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
struct __PACKED
{
uint8_t id : 4;
@@ -863,7 +720,6 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
vTaskDelete(auto_scan_start_handle);
auto_scan_start_handle = NULL;
}
running = false;
taskEXIT_CRITICAL();
break;
}
@@ -879,18 +735,11 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
uint8_t payload[256];
} param;
param.size = MIN(size, sizeof(param.payload));
param.size = MIN(size, sizeof(param.payload)),
memcpy(param.payload, ins, param.size);
BaseType_t ret = xTaskCreate(auto_scan_start_task, "auto_start", 320, &param, 4, &auto_scan_start_handle);
if (ret != pdPASS)
{
NRF_LOG_ERROR("auto_scan_start_task task not created.");
}
ASSERT(xTaskCreate(auto_scan_start_task, "auto_start", 256, &param, 4, &auto_scan_start_handle));
// using a 100ms delay to ensure the parameter is copied to to auto_scan_start_task()
vTaskDelay(pdMS_TO_TICKS(100));
running = true;
}
break;
}
@@ -902,7 +751,6 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
{
NRF_LOG_INFO("%s", __FUNCTION__);
#define R1 PEL_0P5R_MASK
#define R2 PEL_1P0R_MASK
#define R3 PEL_2P0R_MASK
@@ -994,6 +842,10 @@ static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
}
}
#define MANUAL_SCAN_MODE 0x01
#define AUTO_SCAN_MODE 0x02
#define R_EXTERNAL_CALIBRATION_MODE 0x03
const elite_instance_t pel_elite_instance = {
.cis_func = {
[CIS_VERSION] = cis_version,
+18 -29
View File
@@ -1,5 +1,5 @@
#ifndef __ELITE_PEL_V2_0_H__
#define __ELITE_PEL_V2_0_H__
#ifndef __PEL_H__
#define __PEL_H__
#ifdef __cplusplus
extern "C"
@@ -11,10 +11,10 @@ extern "C"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 29
#define VERSION_DATE_HOUR 17
#define VERSION_DATE_MINUTE 24
#define VERSION_DATE_MONTH 3
#define VERSION_DATE_DAY 31
#define VERSION_DATE_HOUR 10
#define VERSION_DATE_MINUTE 45
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
@@ -31,34 +31,23 @@ extern "C"
typedef struct __PACKED
{
uint16_t mem_board_id;
uint16_t packet_seq;
uint16_t mem_board_id : 8;
uint16_t packet_seq : 8;
uint32_t notify_time;
int32_t raw_output_r1;
int32_t raw_output_r2;
int32_t raw_output_vo;
int32_t raw_output_vc;
int32_t raw_output_ve;
float output_r1_mv;
float output_r2_mv;
float output_vo_mv;
float output_vc_mv;
float output_ve_mv;
float hold_r1_v;
float hold_r2_v;
float hold_out_v;
float hold_vcc_v;
float hold_vee_v;
float current;
int32_t output_vo_raw;
int32_t output_vc_raw;
int32_t output_ve_raw;
float hold_OUT_v;
float hold_VCC_v;
float hold_VEE_v;
uint16_t resis_pattern_id;
uint16_t resis_bitsmask;
float resis_g_value;
uint32_t mode_complete : 4;
uint32_t rsvd : 28;
uint32_t payload[9];
uint32_t val_1;
uint32_t val_2;
uint16_t val_3;
} scan_mode_notify_packet_t;
const elite_instance_t *pel_init(void);
@@ -67,4 +56,4 @@ extern "C"
}
#endif
#endif /* ! __ELITE_PEL_V2_0_H__ */
#endif /* ! __PEL_H__ */
+89 -77
View File
@@ -1,4 +1,3 @@
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
@@ -13,18 +12,18 @@
#include "SEGGER_RTT.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel_hw_t pel_hw = {
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
.adc.channels = {
[OUTPUT_ACS37030_REF_IDX] = OUTPUT_ACS37030_VREF_CHANNEL,
[OUTPUT_I_OUT_IDX] = OUTPUT_I_OUT_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL },
[OUTPUT_R1_IDX] = OUTPUT_R1_CHANNEL,
[OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL},
.adc.gain = NRF_SAADC_GAIN1_6,
.adc.smaple_time = NRF_SAADC_ACQTIME_3US
};
@@ -93,6 +92,30 @@ void spim_xfer(uint32_t cs_pin,
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
void set_anode_cathode_to_default(void)
{
if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_clear(CATHODE_PIN);
nrf_gpio_pin_clear(SAMPLE_R_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
nrf_gpio_pin_clear(RELAY1_PIN);
}
else if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_set(CATHODE_PIN);
nrf_gpio_pin_clear(SAMPLE_R_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
nrf_gpio_pin_clear(RELAY1_PIN);
}
}
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
@@ -184,8 +207,10 @@ void SAADC_IRQHandler(void)
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
@@ -193,6 +218,7 @@ void pel_pulse_gen_init(pel_config_t cfg)
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
@@ -201,20 +227,44 @@ void pel_pulse_gen_init(pel_config_t cfg)
nrf_gpiote_task_disable(i);
}
set_anode_cathode_to_default();
// config gpiote task
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.ina_hi_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
switch (cfg.mode)
{
default:
case 1:
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
break;
case 0:
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
break;
}
nrf_gpiote_task_configure(2, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
}
// enable gpio task
for (int i = 0; i < 5; i++)
{
nrf_gpiote_task_enable(i);
}
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // ina_hi_pin
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // smaple_i_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // sample_v_pin
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
@@ -231,25 +281,15 @@ void pel_pulse_gen_init(pel_config_t cfg)
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->CHENSET = (1 << (5));
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CHENSET = (1 << (6));
// enable gpio task
for (int i = 0; i < 4; i++)
{
nrf_gpiote_task_enable(i);
}
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4]; // test_pin
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
nrf_gpiote_task_enable(4);
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
NRF_PPI->CHENSET = (1 << (6));
NRF_PPI->CH[7].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CH[7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
NRF_PPI->CHENSET = (1 << (7));
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
@@ -289,8 +329,8 @@ static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.ina_hi_pin = INA_HI_PIN,
.smaple_i_pin = SAMPLE_I_PIN,
.cathode_pin = CATHODE_PIN,
.smaple_r_pin = SAMPLE_R_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
.mode = BOARD_IOPx,
@@ -324,9 +364,9 @@ void pel_pulse_gen_demo(void)
}
#endif
void pel30_io_init(void)
void pel20_io_init(void)
{
const uint32_t config_output_and_set[] = {
const uint32_t pel_pins_default_high[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
@@ -341,58 +381,30 @@ void pel30_io_init(void)
INPUT_12_PIN
};
const uint32_t config_output_and_clear[] = {
TP1_PIN,
TP2_PIN,
SAMPLE_I_PIN,
SAMPLE_V_PIN,
HOT_SWAP_1_PIN
};
for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
{
nrf_gpio_pin_set(config_output_and_set[i]);
nrf_gpio_cfg_output(config_output_and_set[i]);
}
for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
{
nrf_gpio_pin_clear(config_output_and_clear[i]);
nrf_gpio_cfg_output(config_output_and_clear[i]);
}
nrf_gpio_cfg_input(RESET_PIN, NRF_GPIO_PIN_NOPULL);
nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
nrf_gpio_cfg_input(HOT_SWAP_SIGNAL_PIN, NRF_GPIO_PIN_PULLUP);
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_clear(INA_HI_PIN);
nrf_gpio_pin_set(LED_IOPL_PIN);
nrf_gpio_pin_clear(LED_IOPH_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_set(INA_HI_PIN);
nrf_gpio_pin_clear(LED_IOPL_PIN);
nrf_gpio_pin_set(LED_IOPH_PIN);
nrf_gpio_pin_set(pel_pins_default_high[i]);
nrf_gpio_cfg_output(pel_pins_default_high[i]);
}
set_anode_cathode_to_default();
nrf_gpio_cfg_output(ANODE_PIN);
nrf_gpio_cfg_output(INA_HI_PIN);
nrf_gpio_cfg_output(LED_IOPL_PIN);
nrf_gpio_cfg_output(LED_IOPH_PIN);
nrf_gpio_cfg_output(CATHODE_PIN);
nrf_gpio_cfg_output(SAMPLE_R_PIN);
nrf_gpio_cfg_output(SAMPLE_V_PIN);
nrf_gpio_cfg_output(TP1_PIN);
nrf_gpio_cfg_output(TP2_PIN);
nrf_gpio_cfg_output(RELAY1_PIN);
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);

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