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161 Commits

Author SHA1 Message Date
chain40 8120daf7b0 feat: ble uart feature 2025-05-21 20:55:35 +08:00
chain40 21c28450e1 Merge branch 'usb_drv' into develop 2025-05-08 16:54:24 +08:00
chain40 623beec9e8 feat: support usb feature 2025-05-08 16:54:03 +08:00
Roy_01 b9aa376585 Merge branch 'dev/CPGv1.1/adapter' into develp 2025-04-09 17:20:11 +08:00
Roy_01 99803ee00f config: switch project configuration to DEF_ELITE_DEV 2025-04-09 17:19:53 +08:00
Roy_01 14fcc96a25 fix: ADPT_LE_PIN signal 2025-04-09 14:45:14 +08:00
Roy_01 1b994253e9 config: switch project configuration to cpg v1.1 2025-04-09 14:44:08 +08:00
chain40 75973e1580 Merge branch 'pel' into develop 2025-04-01 22:28:55 +08:00
chain40 4602d1d3e6 config: switch project configuration to DEF_ELITE_DEV 2025-04-01 22:28:39 +08:00
chain40 031b97657b feat: Implement 'auto_scan_mode stop' 2025-04-01 22:28:35 +08:00
Roy_01 3acb80f23f config: switch project configuration to pel v2.0 2025-04-01 20:56:37 +08:00
Roy_01 0fc565086e Merge branch 'dev/pel2.0/pattern_table' into develp 2025-03-31 10:46:06 +08:00
Roy_01 bdd96edaf8 config: switch project configuration to DEF_ELITE_DEV 2025-03-31 10:45:38 +08:00
Roy_01 38faa5f8ba feat: pel_pulse_stop should end in High-Z 2025-03-31 10:45:08 +08:00
Roy_01 a96cc2feb2 feat: update pattern_tab 2025-03-28 16:04:22 +08:00
Roy_01 a0245e4e46 config: switch project configuration to pel v2.0 2025-03-28 16:01:46 +08:00
Roy_01 55b86b8d8e Merge branch 'dev/CPGv1.1/update_dev_mode' into develp 2025-03-28 15:55:48 +08:00
Roy_01 e2bfd77ffb config: switch project configuration to DEF_ELITE_DEV 2025-03-28 15:55:06 +08:00
Roy_01 1ca945f900 style: organize code 2025-03-28 15:35:02 +08:00
Roy_01 0f3048ba31 refactor: refactor dev_mode_ctrl_electrodes_task 2025-03-28 15:24:21 +08:00
Roy_01 b561b86f3b feat: 1. add a 1ms delay before and after controlling the ADPT GPIO in max14802_write
2. dev mode commands (except those already available to users) start with 3xxxFFFF
2025-03-28 09:45:14 +08:00
Roy_01 d62fc6dfc1 feat: update the gpio instruction in dev_mode 2025-03-25 16:36:06 +08:00
Roy_01 b976d5e21e feat: update the electrode_switch instruction in dev_mode 2025-03-25 14:07:18 +08:00
Roy_01 872138137a refactor: merge cpg.c and cpg11_dev_mode.c 2025-03-25 13:15:44 +08:00
Roy_01 832a5fc35b fix: fix the error in exclude_io 2025-03-21 17:42:09 +08:00
Roy_01 d374045c8f fix: fix error head file 2025-03-21 14:34:04 +08:00
Roy_01 c81bfcf250 config: switch project configuration to cpg v1.1 2025-03-21 14:32:45 +08:00
Roy_01 e9f0418f01 Merge branch 'dev/pel20/mode_done_flag' into develp 2025-03-18 15:38:58 +08:00
Roy_01 8c3cbd738f config: switch project configuration to DEF_ELITE_DEV 2025-03-18 15:38:47 +08:00
Roy_01 ee99ff121b feat: add mode_complete to allow mode to stop automatically for controller 2025-03-18 11:41:05 +08:00
Roy_01 92859cd662 feat: update scan_mode_notify_packet_t data 2025-03-17 16:36:13 +08:00
Roy_01 689c76acf5 config: switch project configuration to pel v2.0 2025-03-14 11:54:24 +08:00
Roy_01 7025f4973e Merge branch 'dev/pel2.0/cali_mode_v2' into develp 2025-03-13 13:04:21 +08:00
Roy_01 efafe2b0ad config: switch project configuration to DEF_ELITE_DEV 2025-03-13 13:04:11 +08:00
Roy_01 9cb18c7cea feat: auto_scan_mode updated to scan based on pattern_id in descending order 2025-03-13 13:00:14 +08:00
Roy_01 a37f3b3dd7 config: switch project configuration to pel v2.0 2025-03-13 12:59:10 +08:00
Roy_01 31f3d051ca Merge branch 'dev/pel2.0/cali_mode_v2' into develp 2025-03-13 10:00:55 +08:00
Roy_01 cb3e92b8c0 config: switch project configuration to DEF_ELITE_DEV 2025-03-13 10:00:38 +08:00
Roy_01 9f1f933b97 feat: updated all mode instruction 2025-03-13 10:00:12 +08:00
Roy_01 10d2cb6058 feat: new implementation for R_external_calibration_mode 2025-03-12 13:45:11 +08:00
Roy_01 0a690e5fe5 feat: update data transmission for auto scan mode and manual scan mode
packet_buf->val_1_f = 0
packet_buf->val_2_f = resistor_conductance
packet_buf->val_3_f = OUT value (V)
packet_buf->val_4_f = VCC value (V)
packet_buf->val_5_f = VEE value (V)
2025-03-11 17:22:01 +08:00
Roy_01 d96689fe2a feat: modify the value of input_pin_tab 2025-03-11 17:03:02 +08:00
Roy_01 87b3e3a5a8 config: switch project configuration to pel v2.0 2025-03-10 10:55:13 +08:00
chain40 a18b58dd6f Merge branch 'pel2.0/auto-scan-mode' into develop 2025-03-06 01:09:10 +08:00
Roy_01 5b3ef452e1 config: switch project configuration to DEF_ELITE_DEV 2025-03-06 01:08:50 +08:00
chain40 f3a746a6f4 update: optimize pel procedure 2025-03-06 01:08:39 +08:00
chain40 a8b4cb30af update: refactor Auto-Scan mode and Manual-Scan mode. 2025-03-05 07:51:07 +08:00
chain40 f5789d10ce feat: add asynchronous BLE event notification feature. 2025-03-05 07:00:14 +08:00
chain40 80d53d31df fix: use pel_adc_convt_new_arrival() in auto_scan_mode_task() to control notification timing. 2025-03-05 07:00:13 +08:00
chain40 692635c37e feat: add convt_new_arrival to pel_hw_t to indicate ADC conversion update 2025-03-05 07:00:13 +08:00
chain40 8fef7db9cd config: switch project configuration to pel v2.0 2025-03-05 07:00:13 +08:00
chain40 7c10a0657d Merge branch 'bsp' into develop 2025-03-05 06:59:40 +08:00
chain40 0c938f1f31 fix: Set DEBUG_NRF = 1 to enable additional debug information. 2025-03-05 06:59:27 +08:00
chain40 05d31476ba feat: GCC GDB 14.2.1/15.2/r2 2025-03-05 06:59:22 +08:00
Roy_01 35c6d81c08 Merge branch 'pel2.0/auto-scan-mode' into develp 2025-02-21 17:49:00 +08:00
Roy_01 027fd4684f config: switch project configuration to DEF_ELITE_DEV 2025-02-21 17:48:41 +08:00
Roy_01 52e6b57dd9 updated: PELv2.0 manual_scan_mode and auto_scan_mode instruction 2025-02-21 10:19:02 +08:00
Roy_01 ac392bf9f9 update: 1. update auto scan mode code
2. remove unnecessary dev_mode
2025-02-14 19:12:13 +08:00
Roy_01 fe799794bf pel: 先暫存 auto scan mode 小程式 2025-02-13 17:59:38 +08:00
Roy_01 628ba0aef1 new implementation for auto scan mode 2025-02-07 17:36:49 +08:00
Roy_01 0c2ae5fa2a note: update some log information of device 2025-02-06 15:44:40 +08:00
Roy_01 bf32c1fb1c demo: 快速demo版本 v1.0 [IOPH] 2025-02-05 13:40:45 +08:00
Roy_01 21a332a93f Merge branch 'pel2.0/demo_pattern_id_scan' into dev/pel2.0 2025-02-05 10:24:05 +08:00
chain40 fc6f783145 fix: 使用 SAADC 中斷, 修正 pulse 沒結束就被停止造成的波型異常
1. 當 SAADC EVENTS_STARTED 觸發中斷時代表 pulse 已輸出完成並開始 ADC 轉換
2. 當 SAADC EVENTS_RESULTDONE 觸發中斷時代表 ADC 已轉換完成並寫入ram, 同時進入 pulse idle 的狀態.
2025-02-04 23:44:27 +08:00
Roy_01 203a0c0c87 fix: fix warning 2025-01-23 16:28:16 +08:00
Roy_01 bcf9bf46e2 demo: 快速demo版本 [IOPH] 2025-01-22 13:15:28 +08:00
Roy_01 0f6c308570 快速demo使用, 未來不再使用這個版本 2025-01-16 17:47:30 +08:00
Roy_01 d96895e554 fix: resolve incorrect pulse behavior after start/stop at pel v2.0 [IOPH] 2025-01-06 15:47:06 +08:00
Roy_01 5b02748726 fix: resolve incorrect pulse behavior after start/stop at pel v2.0 [IOPL] 2025-01-06 15:46:31 +08:00
Roy_01 28e1ecf514 feat: new TP1_PIN and TP2_PIN 2025-01-06 15:39:52 +08:00
Roy_01 23d4a95e0f config: switch project configuration to pel v2.0 2025-01-06 15:31:08 +08:00
Roy_01 e7602f5f42 Merge branch 'dev/pel2.0' into develp 2024-12-27 13:41:30 +08:00
Roy_01 107add3dda config: switch project configuration to DEF_ELITE_DEV 2024-12-27 13:40:41 +08:00
Roy_01 c531b97992 define: define BOARD_IOPx = BOARD_IOPL 2024-12-25 17:50:20 +08:00
Roy_01 61627329dc updated: start_sample_and_hold_pulse_task will generate pulses based on BOARD_IOPx 2024-12-25 17:47:54 +08:00
Roy_01 bad053a562 updated: event_char_notify_param->notify_period can be modified by a command (for RD use) 2024-12-25 17:43:42 +08:00
Roy_01 2efd292b53 updated: print IOPx board info 2024-12-25 17:39:55 +08:00
Roy_01 0accebbe25 fix: correct the set_manual_resistor() command 2024-12-24 10:34:16 +08:00
Roy_01 d48113c092 updated: the val_x_f in start_sample_and_hold_pulse_task() uses the converted value from the internal ADC (in mV) 2024-12-12 17:44:07 +08:00
Roy_01 7e3df873fa updated: the val_x in start_sample_and_hold_pulse_task() uses the raw value from the internal ADC 2024-12-12 14:32:12 +08:00
Roy_01 ab5eb93a29 feat: add the start_sample_and_hold_pulse_task() & stop_sample_and_hold_pulse_task() function for dev_mode 2024-12-12 10:57:03 +08:00
Roy_01 0d33fa36c4 updated: add global_memoryboard_id 2024-12-11 11:02:15 +08:00
Roy_01 e162b6f7e8 feat: add the event_char_update_once() & decode_start_event_char_notify() & stop_event_char_notify() function for dev_mode 2024-12-11 10:17:00 +08:00
Roy_01 d6fa983da5 feat: add the decode_start_data_char_notify() & stop_data_char_notify() function for dev_mode 2024-12-10 10:08:04 +08:00
Roy_01 4abf04c08d feat: add the data_char_update_once() function for dev_mode 2024-12-04 11:33:34 +08:00
Roy_01 4c778c79c5 updated: cancel the demo 2024-12-02 11:13:28 +08:00
Roy_01 4a51b3f753 fix: modify the command of dev_mode_input_resistor 2024-11-29 16:46:02 +08:00
Roy_01 77f255776a update: update _load_set code 2024-11-29 10:41:06 +08:00
Roy_01 66ef5479b4 remove: remove unnecessary #include directives 2024-11-27 16:51:11 +08:00
Roy_01 1e9b70aa0c update: the content of the device information service 2024-11-27 13:40:10 +08:00
Roy_01 3fadfef77f fix: fix parameter name typo 2024-11-25 14:49:04 +08:00
Roy_01 9305cfd2a3 fix: fix parameter name typo 2024-11-25 11:08:57 +08:00
Roy_01 1ac9ff0276 updated: change Inputx to Rx 2024-11-21 17:09:09 +08:00
Roy_01 c0706573bb pel_cfg.sample_time ≥ NRF_SAADC_ACQTIME_10US to avoid an additional 10µs 2024-11-19 15:00:15 +08:00
Roy_01 0b0f7328c0 fix: fix pel_cfg config 2024-11-19 14:40:26 +08:00
Roy_01 b18c9ea13e fix:
cfg.mode=1(IOPH mode)
cfg.mode=0(IOPL mode)
2024-11-19 14:38:31 +08:00
chain40 67562165ae feat: use PPI and TMR to trigger GPIO toggle and ADC conversion (V3) 2024-11-19 10:20:23 +08:00
chain40 0d02ffddee feat: use PPI and TMR to trigger GPIO toggle and ADC conversion 2024-11-19 09:49:51 +08:00
Roy_01 fc52bba19b comment: comment out pel_pulse_gen_demo() 2024-11-15 14:17:45 +08:00
Roy_01 ab2af93ed8 feat: update <ToolchainVersion>13.3.1/15.1/r3</ToolchainVersion> 2024-11-13 10:38:17 +08:00
Roy_01 889cece2e0 config: switch project configuration to pel v2.0 2024-11-07 13:53:47 +08:00
Roy_01 78669bdc7c Merge branch 'dev/cpg1.1' into develp 2024-11-04 11:54:19 +08:00
Roy_01 1ffc4301ce feat: 將專案設定切換回 DEF_ELITE_DEV 2024-11-04 11:54:05 +08:00
Roy_01 f904bded31 fix: 修正dev_mode打e1~e4的api 2024-11-01 16:48:12 +08:00
Roy_01 917bff3c20 fix: 修正e1&e2 idle對調問題, 修正e3&e4 idle對調問題 2024-11-01 14:24:24 +08:00
chain40 6c971a9e3e feat: 實作 elite_board_demo() 以及 DEF_ELITE_DEMO_WO_SOFTDEVICE, DEF_ELITE_DEMO_W_SOFTDEVICE 定義, 驗證電路設計 2024-10-31 12:32:40 +08:00
chain40 1e416fd795 fix: PPI 使用與 softdevice 衝突導致第三/四電極動作異常的問題 2024-10-31 11:38:22 +08:00
Roy_01 de7403ed52 feat: 修改cpg_pulse_default_demo_ext(), 可設定e1,e2,e3,e4來輸出脈波 2024-10-30 14:39:04 +08:00
Roy_01 973cc07871 updated: idle訊號改成highZ訊號 2024-10-30 11:16:22 +08:00
Roy_01 87a10d3377 feat: 將專案設定切換到 cpg1.1 2024-10-29 10:16:21 +08:00
chain40 a7fa78cc16 Merge branch 'dev/cpg1.1' into develop 2024-10-28 21:25:30 +08:00
chain40 34231ef6ae feat: 將專案設定切換回 DEF_ELITE_DEV 2024-10-28 21:25:10 +08:00
chain40 dac62c0ca6 fix: 修正同時啟用四組電極時, 動作異常的問題
原因: 啟用 3, 4 組電極時 ppi 設定錯誤
2024-10-28 21:24:47 +08:00
chain40 2cbffc2c3b feat: 將專案設定切換到 cpg1.1 2024-10-28 21:22:07 +08:00
Roy_01 59988e2610 Merge branch 'dev/cpg1.1' into develp 2024-10-23 15:54:31 +08:00
Roy_01 a8a62c2a40 feat: 將專案設定切換回 DEF_ELITE_DEV 2024-10-23 15:54:20 +08:00
Roy_01 2a1122fccb fix: fix log 2024-10-23 15:51:30 +08:00
Roy_01 e14265fa3b feat: 將專案設定切換到 cpg1.1 2024-10-21 13:44:54 +08:00
chain40 c2bd84119b Merge branch 'dev/cpg1.1' into develop 2024-10-20 12:23:54 +08:00
chain40 44de31924f feat: 將專案設定切換回 DEF_ELITE_DEV 2024-10-20 12:22:58 +08:00
chain40 08bb79a262 feat: enable highly precise pulse generation 2024-10-20 00:43:53 +08:00
chain40 5e72244b69 feat: 將專案設定切換到 cpg1.1 2024-10-20 00:43:45 +08:00
Roy_01 e0c7280cfd Merge branch 'dev/pel2.0' into develp 2024-10-09 16:43:23 +08:00
Roy_01 19a6e9856f feat: 將專案設定切換回 DEF_ELITE_DEV 2024-10-09 16:43:15 +08:00
Roy_01 537e48dde0 fix: 1. replace 'pel1.0' with 'pel2.0' code
2. fix anode and cathode ilde time: 1ms
2024-10-08 12:31:08 +08:00
Roy_01 a28ad39b14 feat: 將專案設定切換到 pel2.0 2024-10-07 13:18:29 +08:00
Roy_01 63f457b5af Merge branch 'dev/pel2.0' into develp 2024-10-07 13:17:07 +08:00
Roy_01 8761c5b8c7 feat: 將專案設定切換回 DEF_ELITE_DEV 2024-10-07 13:16:51 +08:00
Roy_01 34f3f79267 fix: fix adc channel idx (OUTPUT_VC_CHANNEL = 0, OUTPUT_VE_CHANNEL = 1) 2024-10-04 14:42:03 +08:00
Roy_01 584e6f76a2 fix: fix pin define 2024-10-04 13:11:17 +08:00
Roy_01 f650299c37 fix: replace 'pel1.0' with 'pel2.0' code 2024-10-01 16:56:41 +08:00
Roy_01 ae34ff9efe fix: fix header file link 2024-10-01 16:49:00 +08:00
Roy_01 c2a747ae6a feat: 將專案設定切換到 pel2.0 2024-10-01 16:33:47 +08:00
Roy_01 3562b5dfb8 fix: replace 'DEF_ELITE_PEL_V1_0' with 'DEF_ELITE_PEL_V2_0' 2024-10-01 16:31:26 +08:00
Roy_01 9b9c710f63 update: redefine elite model 2024-10-01 16:10:30 +08:00
Roy_01 090fee4014 Merge branch 'dev/cpg1.1' into develp 2024-09-30 15:13:10 +08:00
Roy_01 b2c63bcd5a feat: 將專案設定切換回 DEF_ELITE_DEV 2024-09-30 15:12:51 +08:00
Roy_01 8f507a9522 feat: updated dev_mode_adapter_block_switch() in dev_mode 2024-09-26 11:04:15 +08:00
Roy_01 682f8d4a9b fix: fix exclude_io 2024-09-25 17:35:09 +08:00
Roy_01 d57d946c4f feat: new dev_mode_adapter_block_switch() in dev_mode 2024-09-25 17:24:09 +08:00
Roy_01 5576a6ea20 update: updated dev_mode_tw1508() code in dev_mode 2024-09-25 11:57:11 +08:00
Roy_01 70312cf1f5 note: updated comments 2024-09-25 10:45:15 +08:00
Roy_01 03d53ed0a3 update: updated dev_mode_gpio() code in dev_mode 2024-09-25 10:34:14 +08:00
Roy_01 412c08b995 feat: 將專案設定切換到 cpg1.1 2024-09-24 11:30:32 +08:00
Roy_01 78ab5c2a29 Merge commit 'cc66858615bb2c153e5580560b3d8591bc4dd754' into develp 2024-09-24 10:20:17 +08:00
Roy_01 cc66858615 feat: 將專案設定切換回 DEF_ELITE_DEV 2024-09-24 10:19:50 +08:00
Roy_01 a6bcf5f8e2 fix: add max14802 definition and fix app_config.h 2024-09-24 10:18:56 +08:00
Roy_01 df280027f0 update: updated dev_mode_electrode_switch() code in dev_mode 2024-09-24 09:45:36 +08:00
Roy_01 1a844b0c30 feat: new u8_to_someting_data_type 2024-09-23 13:43:27 +08:00
Roy_01 19d212253d fix: fix preprocessor 2024-09-23 09:46:18 +08:00
Roy_01 9d11067e1d fix: using NFC pins P0.09 and P0.10 as GPIOs 2024-09-23 09:43:05 +08:00
chain40 2f21efd1b2 feat: add customized max14802 driver for cpg1.1 2024-09-17 21:02:22 +08:00
chain40 ccb15f4cba feat: update <ToolchainVersion>13.3.1/15.1/r3</ToolchainVersion> 2024-09-17 16:36:28 +08:00
Roy_01 d8b82b6edf fix: replace 'pusle' with 'pulse' 2024-09-12 09:23:24 +08:00
Roy_01 ba55256b91 fix: freq is wrong when use only one electrode 2024-09-11 17:45:52 +08:00
Roy_01 0f105e6166 feat: new start_electrodes_api & stop_electrodes_api 2024-09-10 17:45:03 +08:00
Roy_01 516970a6a5 feat: new current_convert_tw1508() 2024-09-06 16:45:11 +08:00
Roy_01 694c3c4289 update: modify the commands related to controlling the electrodes 2024-09-05 15:53:04 +08:00
Roy_01 17587ae873 bugfix: 小波已修正 2024-09-03 22:45:02 +08:00
Roy_01 6e72b2cac2 bug: 這版本單獨打電極2 & 電極4 都會有小波出現
依序用小工具輸入指令測試:
1. 設定電極1~4參數值, 把電極1~電極4設一樣
3000FF0206F00000004B00000889

2. 設pulse_cnt=3, 把電極1~電極4的pulse_cnt=3
3000FF0209F000000003

3. 打波形(電極1/電極2/電極3/電極4 單獨測)
3000FF020780
3000FF020740
3000FF020720
3000FF020710
2024-09-03 14:38:41 +08:00
chain40 906d684db0 feat: support pulse suspend & resume feature 2024-08-31 15:36:36 +08:00
54 changed files with 4748 additions and 2340 deletions
+1
View File
@@ -3,3 +3,4 @@
/VisualGDB/
*.vgdbsettings.*.user
*.zip
/build/
+1 -1
View File
@@ -62,7 +62,7 @@
#define configTICK_RATE_HZ 1024
#define configMAX_PRIORITIES (6)
#define configMINIMAL_STACK_SIZE (192)
#define configTOTAL_HEAP_SIZE (32 * 1024)
#define configTOTAL_HEAP_SIZE (48 * 1024)
#define configMAX_TASK_NAME_LEN (16)
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
+9
View File
@@ -83,4 +83,13 @@ int adc_read_milivolt(uint32_t channel, float *mv)
return p_inst->read_milivolt(channel, mv);
}
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
{
if (p_inst == NULL)
{
return ADC_DRV_ERROR;
}
return p_inst->adc_convert_multiple_milivolt(p_val_14bit, p_val_f, count);
}
#endif /* ! DEF_ADC_DRV_ENABLED */
+2
View File
@@ -29,6 +29,7 @@ int adc_read_milivolt(uint32_t channel, float *mv);
int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
#else
#define adc_init()
#define adc_reset()
@@ -38,6 +39,7 @@ int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cn
#define adc_read_mutiple_channels(x, y, z)
#define adc_read_mutiple_channels_ex(x, y, z, a)
#define adc_read_multiple_milivolt_ex(x, y, z, a)
#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
#endif /* ! DEF_ADC_DRV_ENABLED */
#ifdef __cplusplus
+1
View File
@@ -38,6 +38,7 @@ typedef struct
int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
int (*gain)(adc_gain_t gain);
int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
} adc_drv_if_t;
#ifdef __cplusplus
+100 -9
View File
@@ -1,6 +1,8 @@
#ifndef __APP_CONFIG_H__
#define __APP_CONFIG_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
@@ -104,18 +106,23 @@ extern "C"
// BLE device name
#define DEF_ELITE_DEV 0x00000000
#define DEF_ELITE_EDC_20 0x00020109
#define DEF_PULSE_E_LOAD_10 0x00070000
#define DEF_CURRENT_PULSE_GANERATOR_11 0x00080001
#define DEF_ELITE_MODEL DEF_CURRENT_PULSE_GANERATOR_11
#define DEF_ELITE_EDC_V2_0 0x00020109
#define DEF_ELITE_PEL_V2_0 0x00070001
#define DEF_ELITE_CPG_V1_1 0x00080001
#define DEF_ELITE_MODEL DEF_ELITE_DEV
#define DEF_ELITE_DEMO_W_SOFTDEVICE 0
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#define ELITE_DEVICE_NAME "Elite-Dev"
#define ELITE_HW_NAME "Elite-Dev"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 0
#define MAJOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 0
#define DEF_TW1508_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
#define DEF_APA102_2020_ENABLED 0
@@ -128,6 +135,7 @@ extern "C"
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
@@ -138,13 +146,18 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#define DEF_USBD_ENABLED 1
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define ELITE_DEVICE_NAME "Elite-EDC"
#define ELITE_HW_NAME "Elite-EDCv2.0"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 2
#define MAJOR_VERSION_NUMBER 1
#define MINOR_VERSION_NUMBER 9
#define DEF_TW1508_ENABLED 0
#define DEF_LED_COUNT 12
#define DEF_LED_DRV_ENABLED 1
#define DEF_APA102_2020_ENABLED 1
@@ -157,6 +170,7 @@ extern "C"
#define DEF_MAX5136_ENABLED 1
#define DEF_SW_DRV_ENABLED 1
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 1
#define DEF_FS_ENABLED 0
@@ -167,12 +181,21 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#define DEF_USBD_ENABLED 1
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#define BOARD_IOPH 1
#define BOARD_IOPL 0
#define ELITE_DEVICE_NAME "Elite-PEL"
#define ELITE_HW_NAME "Elite-PELv2.0"
#define BOARD_IOPx BOARD_IOPH
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 7
#define MAJOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 0
#define MINOR_VERSION_NUMBER 1
#define DEF_TW1508_ENABLED 0
#define DEF_LED_COUNT 0
#define DEF_LED_DRV_ENABLED 0
@@ -186,6 +209,7 @@ extern "C"
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_MAX14802_ENABLED 0
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
@@ -196,8 +220,11 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#define DEF_USBD_ENABLED 1
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define ELITE_DEVICE_NAME "Elite-CPG"
#define ELITE_HW_NAME "Elite-CPGv1.1"
#define MAJOR_PRODUCT_NUMBER 0
#define MINOR_PRODUCT_NUMBER 8
#define MAJOR_VERSION_NUMBER 0
@@ -216,7 +243,8 @@ extern "C"
#define DEF_DAC_DRV_ENABLED 0
#define DEF_MAX5136_ENABLED 0
#define DEF_SW_DRV_ENABLED 0
#define DEF_SW_DRV_ENABLED 1
#define DEF_MAX14802_ENABLED 1
#define DEF_ADGS1412_ENABLED 0
#define DEF_FS_ENABLED 0
@@ -227,6 +255,8 @@ extern "C"
#define DEF_RTT_JSCOP_ENABLED 0
#define DEF_USBD_ENABLED 1
#endif
#define BLE_ELITE_SRV_ENABLED 1
@@ -259,6 +289,13 @@ extern "C"
// Enable ble device info module
#define BLE_DIS_ENABLED 1
// Enable ble uart module
#define BLE_NUS_ENABLED 1
#define BLE_UART_SRV_ENABLED 1
#define BLE_UART_OBSERVER_PRIO 3
#define NRF_UARTE_ENABLED 1
#define DEF_UARTE_ENABLED 1
// DFU
#define NRF_DFU_TRANSPORT_BLE 1
#define BLE_DFU_BLE_OBSERVER_PRIO 2
@@ -286,6 +323,60 @@ extern "C"
#define COUNT_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#define COUNTOF(x) (sizeof(x) / sizeof(x[0]))
#define u8_to_u32(a, b, c, d) (((uint32_t)(a) << 24) | ((uint32_t)(b) << 16) | ((uint32_t)(c) << 8) | (d))
#define u8_to_u16(a, b) (((uint16_t)(a) << 8) | (b))
#define u8_to_i32(a, b, c, d) (((int32_t)(a) << 24) | ((int32_t)(b) << 16) | ((int32_t)(c) << 8) | ((int32_t)(d)))
#define u8_to_i16(a, b) (((int16_t)(a) << 8) | (int16_t)(b))
#define DEBUG_NRF 1
// USBD
#define APP_USBD_ENABLED 1
#define APP_USBD_VID 0x1915
#define APP_USBD_PID 0xC00A
#define APP_USBD_DEVICE_VER_MAJOR 1
#define APP_USBD_DEVICE_VER_MINOR 1
#define USBD_CONFIG_IRQ_PRIORITY _PRIO_APP_MID
#define APP_USBD_DEVICE_VER_SUB 0
#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor")
#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52 USB Product")
#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration")
#define APP_USBD_STRING_ID_MANUFACTURER 1
#define APP_USBD_STRING_ID_PRODUCT 2
#define APP_USBD_STRING_ID_SERIAL 3
#define APP_USBD_STRING_ID_CONFIGURATION 4
#define APP_USBD_STRING_SERIAL_EXTERN 1
#define APP_USBD_CONFIG_SELF_POWERED 1
#define APP_USBD_CONFIG_MAX_POWER 100
#define APP_USBD_CONFIG_DESC_STRING_SIZE 31
#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1
#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32
extern uint8_t g_extern_serial_number[];
#define APP_USBD_STRING_SERIAL g_extern_serial_number
// USBD CDC ACM
#define APP_USBD_CDC_ACM_ENABLED 1
#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1
// USBD DFU TRIGGER
#define APP_USBD_NRF_DFU_TRIGGER_ENABLED 1
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 1
#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 4
#define NRF_DFU_TRIGGER_USB_USB_SHARED 1
// NRF_USBD
#define NRFX_USBD_ENABLED 1
#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
#define NRFX_USBD_CONFIG_IRQ_PRIORITY _PRIO_APP_LOW
#define NRF_DFU_TRIGGER_USB_INTERFACE_NUM 0
#define NRF_CDC_ACM_COMM_INTERFACE 1
#define NRF_CDC_ACM_DATA_INTERFACE 2
#ifdef __cplusplus
}
#endif
+2 -3
View File
@@ -107,6 +107,7 @@
<EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
<AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
<TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
<BacktraceFrameLimit>0</BacktraceFrameLimit>
<EnableNonStopMode>false</EnableNonStopMode>
<MaxBreakpointLimit>0</MaxBreakpointLimit>
<EnableVerboseMode>true</EnableVerboseMode>
@@ -115,10 +116,8 @@
</AdditionalGDBSettings>
<DebugMethod>
<ID>jlink-jtag</ID>
<InterfaceID>com.sysprogs.debug.jlink.jlinksw</InterfaceID>
<InterfaceSerialNumber>000801018887</InterfaceSerialNumber>
<Configuration xsi:type="com.visualgdb.edp.segger.settings">
<CommandLine>-select USB -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
<CommandLine>-select USB=682409936 -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
<ProgramMode>Enabled</ProgramMode>
<StartupCommands>
<string>target remote :$$SYS:GDB_PORT$$</string>
+9 -1
View File
@@ -23,7 +23,10 @@
</Version>
</ToolchainID>
<ProjectFile>bmd380_peripheral.vcxproj</ProjectFile>
<ParallelJobCount>0</ParallelJobCount>
<RemoteBuildEnvironment>
<Records />
</RemoteBuildEnvironment>
<ParallelJobCount>1</ParallelJobCount>
<SuppressDirectoryChangeMessages>true</SuppressDirectoryChangeMessages>
<BuildAsRoot>false</BuildAsRoot>
</Build>
@@ -45,6 +48,7 @@
<ShowMessageAfterExecuting>true</ShowMessageAfterExecuting>
</CustomShortcuts>
<UserDefinedVariables />
<ImportedPropertySheets />
<CodeSense>
<Enabled>Unknown</Enabled>
<ExtraSettings>
@@ -57,6 +61,8 @@
<Enabled>false</Enabled>
</CodeAnalyzerSettings>
</CodeSense>
<Configurations />
<ProgramArgumentsSuggestions />
<Debug xsi:type="com.visualgdb.debug.embedded">
<AdditionalStartupCommands />
<AdditionalGDBSettings>
@@ -88,10 +94,12 @@
<EnableAsyncExecutionMode>false</EnableAsyncExecutionMode>
<AsyncModeSupportsBreakpoints>true</AsyncModeSupportsBreakpoints>
<TemporaryBreakConsolidationTimeout>0</TemporaryBreakConsolidationTimeout>
<BacktraceFrameLimit>0</BacktraceFrameLimit>
<EnableNonStopMode>false</EnableNonStopMode>
<MaxBreakpointLimit>0</MaxBreakpointLimit>
<EnableVerboseMode>true</EnableVerboseMode>
<EnablePrettyPrinters>false</EnablePrettyPrinters>
<EnableAbsolutePathReporting>true</EnableAbsolutePathReporting>
</AdditionalGDBSettings>
<DebugMethod>
<ID>jlink-jtag</ID>
+68 -9
View File
@@ -32,21 +32,21 @@
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
<GNUConfigurationType>Debug</GNUConfigurationType>
<ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
<ToolchainVersion>13.3.1/15.1/r2</ToolchainVersion>
<ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
<GenerateHexFile>true</GenerateHexFile>
<MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
</PropertyGroup>
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|VisualGDB'">
<ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
<ToolchainVersion>13.3.1/15.1/r2</ToolchainVersion>
<ToolchainVersion>14.2.1/15.2/r2</ToolchainVersion>
<GenerateHexFile>true</GenerateHexFile>
<MCUPropertyListFile>$(ProjectDir)nrf5x.props</MCUPropertyListFile>
</PropertyGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|VisualGDB'">
<ClCompile>
<CLanguageStandard>GNU99</CLanguageStandard>
<AdditionalIncludeDirectories>.;../bmd380_sdk/components/softdevice/s140/headers;../bmd380_sdk/components/softdevice/s140/headers/nrf52;../bmd380_sdk/external/segger_rtt;../bmd380_sdk/components/libraries/log;../bmd380_sdk/components/libraries/log/src;../bmd380_sdk/components/libraries/memobj;../bmd380_sdk/components/libraries/ringbuf;../bmd380_sdk/components/libraries/atomic;../bmd380_sdk/components/libraries/balloc;../bmd380_sdk/external/freertos/portable/CMSIS/nrf52;../bmd380_sdk/external/freertos/portable/GCC/nrf52;../bmd380_sdk/integration/nrfx;../bmd380_sdk/integration/nrfx/legacy;../bmd380_sdk/components/libraries/experimental_section_vars;../bmd380_sdk/components/libraries/strerror;../bmd380_sdk/external/freertos/source/include;../bmd380_sdk/components/softdevice/common;../bmd380_sdk/components/ble/common;../bmd380_sdk/components/ble/ble_advertising;../bmd380_sdk/components/libraries/atomic_flags;../bmd380_sdk/components/ble/ble_db_discovery;../bmd380_sdk/components/ble/ble_dtm;../bmd380_sdk/components/ble/ble_link_ctx_manager;../bmd380_sdk/components/ble/ble_racp;../bmd380_sdk/components/ble/ble_radio_notification;../bmd380_sdk/components/ble/ble_services/ble_ancs_c;../bmd380_sdk/components/ble/ble_services/ble_ans_c;../bmd380_sdk/components/ble/ble_services/ble_bas;../bmd380_sdk/components/ble/ble_services/ble_bas_c;../bmd380_sdk/components/ble/ble_services/ble_bps;../bmd380_sdk/components/ble/ble_services/ble_cscs;../bmd380_sdk/components/ble/ble_services/ble_cts_c;../bmd380_sdk/components/ble/ble_services/ble_dfu;../bmd380_sdk/components/ble/ble_services/ble_dis;../bmd380_sdk/components/ble/ble_services/ble_dis_c;../bmd380_sdk/components/ble/ble_services/ble_escs;../bmd380_sdk/components/ble/ble_services/ble_gls;../bmd380_sdk/components/ble/ble_services/ble_hids;../bmd380_sdk/components/ble/ble_services/ble_hrs;../bmd380_sdk/components/ble/ble_services/ble_hrs_c;../bmd380_sdk/components/ble/ble_services/ble_hts;../bmd380_sdk/components/ble/ble_services/ble_ias;../bmd380_sdk/components/ble/ble_services/ble_ias_c;../bmd380_sdk/components/ble/ble_services/ble_ipsp;../bmd380_sdk/components/ble/ble_services/ble_lbs;../bmd380_sdk/components/ble/ble_services/ble_lbs_c;../bmd380_sdk/components/ble/ble_services/ble_lls;../bmd380_sdk/components/ble/ble_services/ble_nus;../bmd380_sdk/components/ble/ble_services/ble_nus_c;../bmd380_sdk/components/ble/ble_services/ble_rscs;../bmd380_sdk/components/ble/ble_services/ble_rscs_c;../bmd380_sdk/components/ble/ble_services/ble_tps;../bmd380_sdk/components/ble/ble_services/eddystone;../bmd380_sdk/components/ble/ble_services/experimental_ble_lns;../bmd380_sdk/components/ble/ble_services/experimental_ble_ots;../bmd380_sdk/components/ble/ble_services/experimental_gatts_c;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_cgms;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_ots_c;../bmd380_sdk/components/ble/ble_services/nrf_ble_bms;../bmd380_sdk/components/ble/nrf_ble_gatt;../bmd380_sdk/components/ble/nrf_ble_gq;../bmd380_sdk/components/ble/nrf_ble_qwr;../bmd380_sdk/components/ble/nrf_ble_scan;../bmd380_sdk/components/ble/peer_manager;../bmd380_sdk/components/libraries/pwr_mgmt;littlefs;%(ClCompile.AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
<PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
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<PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;CONFIG_NFCT_PINS_AS_GPIOS;NRF52840_XXAA;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
<AdditionalOptions />
<CPPLanguageStandard />
<Optimization>O0</Optimization>
@@ -73,7 +73,7 @@
<ClCompile>
<CLanguageStandard>GNU99</CLanguageStandard>
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<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_desc.h">
<Filter>Header files\usbd\class\hid\generic</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\generic\app_usbd_hid_generic_internal.h">
<Filter>Header files\usbd\class\hid\generic</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_desc.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\kbd\app_usbd_hid_kbd_internal.h">
<Filter>Header files\usbd\class\hid\kbd</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_desc.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\hid\mouse\app_usbd_hid_mouse_internal.h">
<Filter>Header files\usbd\class\hid\mouse</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_desc.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_internal.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_scsi.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\msc\app_usbd_msc_types.h">
<Filter>Header files\usbd\class\msc</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_internal.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClInclude Include="..\bmd380_sdk\components\libraries\usbd\class\nrf_dfu_trigger\app_usbd_nrf_dfu_trigger_types.h">
<Filter>Header files\usbd\class\nrf_dfu_trigger</Filter>
</ClInclude>
<ClCompile Include="usbd.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="usbd_dfu_trigger.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="le_uart_srv.c">
<Filter>Source files</Filter>
</ClCompile>
<ClCompile Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.c">
<Filter>Source files\ble_nus</Filter>
</ClCompile>
<ClInclude Include="..\bmd380_sdk\components\ble\ble_services\ble_nus\ble_nus.h">
<Filter>Header files\ble_nus</Filter>
</ClInclude>
<ClCompile Include="uart.drv.c">
<Filter>Source files</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<None Include="nRF52840_XXAA_S140_reserve.lds">
@@ -1795,9 +2035,6 @@
<ClInclude Include="elite_def.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="pel10_io.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="btn.h">
<Filter>Header files</Filter>
</ClInclude>
@@ -1813,10 +2050,22 @@
<ClInclude Include="cpg.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="cpg11_dev_mode.h">
<ClInclude Include="cpg11_io.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="cpg11_io.h">
<ClInclude Include="max14802.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="pel20_io.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="usbd.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="uart_drv.h">
<Filter>Header files</Filter>
</ClInclude>
<ClInclude Include="le_uart_srv.h">
<Filter>Header files</Filter>
</ClInclude>
</ItemGroup>
+21 -7
View File
@@ -330,12 +330,26 @@ static int read_multiple_milivolt_ex(uint32_t *p_channels, float *p_val, uint32_
return 0;
}
static int adc_convert_multiple_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count)
{
int32_t int_val[16];
for (int i = 0; i < count; i++)
{
int_val[i] = p_val_14bit[i]; // copy values
p_val_f[i] = adc_convert_milivolt(m_gain, int_val[i], false);
}
return 0;
}
const adc_drv_if_t builtin_saadc = {
.init = init,
.reset = reset,
.read = read,
.gain = gain,
.read_multiple_channels = read_channels,
.read_multiple_channels_ex = read_channels_ex,
.read_multiple_milivolt_ex = read_multiple_milivolt_ex,
.init = init,
.reset = reset,
.read = read,
.gain = gain,
.read_multiple_channels = read_channels,
.read_multiple_channels_ex = read_channels_ex,
.read_multiple_milivolt_ex = read_multiple_milivolt_ex,
.adc_convert_multiple_milivolt = adc_convert_multiple_milivolt,
};
+1000 -26
View File
File diff suppressed because it is too large Load Diff
+10
View File
@@ -6,6 +6,16 @@ extern "C"
{
#endif
#include "app_config.h"
#include "elite.h"
#include "elite_board.h"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 4
#define VERSION_DATE_DAY 9
#define VERSION_DATE_HOUR 14
#define VERSION_DATE_MINUTE 45
const elite_instance_t *cpg_init(void);
#ifdef __cplusplus
-967
View File
@@ -1,967 +0,0 @@
#include "cpg11_dev_mode.h"
#include "tw1508.h"
#include "nrf_gpio.h"
#include "nrf_log.h"
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
// The GPIO corresponding to the pin
const uint32_t pin_to_gpio_table[] = {
[6] = NRF_GPIO_PIN_MAP(0, 22),
[8] = NRF_GPIO_PIN_MAP(0, 25),
[9] = NRF_GPIO_PIN_MAP(0, 19),
[10] = NRF_GPIO_PIN_MAP(0, 21),
[11] = NRF_GPIO_PIN_MAP(1, 0),
[12] = NRF_GPIO_PIN_MAP(0, 18),
[13] = NRF_GPIO_PIN_MAP(0, 17),
[14] = NRF_GPIO_PIN_MAP(0, 20),
[16] = NRF_GPIO_PIN_MAP(0, 14),
[17] = NRF_GPIO_PIN_MAP(0, 13),
[18] = NRF_GPIO_PIN_MAP(0, 11),
[20] = NRF_GPIO_PIN_MAP(0, 15),
[25] = NRF_GPIO_PIN_MAP(1, 8),
[26] = NRF_GPIO_PIN_MAP(0, 12),
[27] = NRF_GPIO_PIN_MAP(0, 7),
[28] = NRF_GPIO_PIN_MAP(1, 9),
[29] = NRF_GPIO_PIN_MAP(0, 8),
[30] = NRF_GPIO_PIN_MAP(0, 6),
[31] = NRF_GPIO_PIN_MAP(0, 5),
[32] = NRF_GPIO_PIN_MAP(0, 27),
[33] = NRF_GPIO_PIN_MAP(0, 26),
[34] = NRF_GPIO_PIN_MAP(0, 4),
[36] = NRF_GPIO_PIN_MAP(0, 1),
[37] = NRF_GPIO_PIN_MAP(0, 29),
[38] = NRF_GPIO_PIN_MAP(0, 0),
[39] = NRF_GPIO_PIN_MAP(0, 31),
[40] = NRF_GPIO_PIN_MAP(1, 15),
[41] = NRF_GPIO_PIN_MAP(0, 2),
[42] = NRF_GPIO_PIN_MAP(0, 30),
[43] = NRF_GPIO_PIN_MAP(0, 28),
[44] = NRF_GPIO_PIN_MAP(1, 12),
[45] = NRF_GPIO_PIN_MAP(1, 14),
[46] = NRF_GPIO_PIN_MAP(0, 3),
[47] = NRF_GPIO_PIN_MAP(1, 13),
[48] = NRF_GPIO_PIN_MAP(1, 3),
[49] = NRF_GPIO_PIN_MAP(1, 10),
[50] = NRF_GPIO_PIN_MAP(1, 6),
[51] = NRF_GPIO_PIN_MAP(1, 11),
[52] = NRF_GPIO_PIN_MAP(0, 10),
[53] = NRF_GPIO_PIN_MAP(0, 9),
[59] = NRF_GPIO_PIN_MAP(1, 2),
[60] = NRF_GPIO_PIN_MAP(0, 24),
[61] = NRF_GPIO_PIN_MAP(0, 23),
[62] = NRF_GPIO_PIN_MAP(0, 16),
};
#define PULSE_GEN_A_NUMB 2
#define PULSE_GEN_B_NUMB 2
static pusle_gen_t p_pusle_genA[PULSE_GEN_A_NUMB];
static pusle_gen_t p_pusle_genB[PULSE_GEN_B_NUMB];
static pusle_gen_t pusle_gen[PULSE_GEN_A_NUMB+PULSE_GEN_B_NUMB];
static uint32_t bmd380pins_convert_to_gpio(uint32_t pin)
{
uint32_t gpio;
switch (pin)
{
case 6:
case 8:
case 9:
case 10:
case 11:
case 12:
case 13:
case 14:
case 16:
case 17:
case 18:
case 20:
case 25:
case 26:
case 27:
case 28:
case 29:
case 30:
case 31:
case 32:
case 33:
case 34:
case 36:
case 37:
case 38:
case 39:
case 40:
case 41:
case 42:
case 43:
case 44:
case 45:
case 46:
case 47:
case 48:
case 49:
case 50:
case 51:
case 52:
case 53:
case 59:
case 60:
case 61:
case 62:
gpio = pin_to_gpio_table[pin];
break;
default:
gpio = UNDEF_GPIO;
NRF_LOG_INFO("UNDEF_GPIO: pin number %02d can't convert to gpio number", pin);
break;
}
return gpio;
}
static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low)
{
uint32_t gpio = bmd380pins_convert_to_gpio(pin);
if (gpio != UNDEF_GPIO)
{
nrf_gpio_pin_write(gpio, high_low);
NRF_LOG_INFO("set pin number %02d (gpio %02d) = %d", pin, gpio, high_low);
}
}
#define ELECTRODE_A1B1_IDLE 0x09
#define ELECTRODE_A2B2_IDLE 0x0A
#define ELECTRODE_A3B3_IDLE 0x0B
#define ELECTRODE_A4B4_IDLE 0x0C
#define ELECTRODE_ALL_HIGHZ 0x0D
#define ELECTRODE_E1P_ENABLE 0x0E
#define ELECTRODE_E1P_DISABLE 0x0F
#define ELECTRODE_E1N_ENABLE 0x10
#define ELECTRODE_E1N_DISABLE 0x11
#define ELECTRODE_E2P_ENABLE 0x12
#define ELECTRODE_E2P_DISABLE 0x13
#define ELECTRODE_E2N_ENABLE 0x14
#define ELECTRODE_E2N_DISABLE 0x15
#define ELECTRODE_E3P_ENABLE 0x16
#define ELECTRODE_E3P_DISABLE 0x17
#define ELECTRODE_E3N_ENABLE 0x18
#define ELECTRODE_E3N_DISABLE 0x19
#define ELECTRODE_E4P_ENABLE 0x1A
#define ELECTRODE_E4P_DISABLE 0x1B
#define ELECTRODE_E4N_ENABLE 0x1C
#define ELECTRODE_E4N_DISABLE 0x1D
static void cpg11_electrodes(uint32_t electrodes_mode)
{
switch (electrodes_mode)
{
case ELECTRODE_A1B1_IDLE:
NRF_LOG_INFO("ELECTRODE_A1B1_IDLE()");
nrf_gpio_pin_write(VB1L_PIN, 0);
nrf_gpio_pin_write(VB1H_PIN, 1);
nrf_gpio_pin_write(VA1L_PIN, 0);
nrf_gpio_pin_write(VA1H_PIN, 1);
break;
case ELECTRODE_A2B2_IDLE:
NRF_LOG_INFO("ELECTRODE_A2B2_IDLE()");
nrf_gpio_pin_write(VB2L_PIN, 0);
nrf_gpio_pin_write(VB2H_PIN, 1);
nrf_gpio_pin_write(VA2L_PIN, 0);
nrf_gpio_pin_write(VA2H_PIN, 1);
break;
case ELECTRODE_A3B3_IDLE:
NRF_LOG_INFO("ELECTRODE_A3B3_IDLE()");
nrf_gpio_pin_write(VB3L_PIN, 0);
nrf_gpio_pin_write(VB3H_PIN, 1);
nrf_gpio_pin_write(VA3L_PIN, 0);
nrf_gpio_pin_write(VA3H_PIN, 1);
break;
case ELECTRODE_A4B4_IDLE:
NRF_LOG_INFO("ELECTRODE_A4B4_IDLE()");
nrf_gpio_pin_write(VB4L_PIN, 0);
nrf_gpio_pin_write(VB4H_PIN, 1);
nrf_gpio_pin_write(VA4L_PIN, 0);
nrf_gpio_pin_write(VA4H_PIN, 1);
break;
case ELECTRODE_ALL_HIGHZ:
NRF_LOG_INFO("ELECTRODE_ALL_HIGHZ()");
nrf_gpio_pin_write(VB1L_PIN, 0);
nrf_gpio_pin_write(VB1H_PIN, 0);
nrf_gpio_pin_write(VA1L_PIN, 0);
nrf_gpio_pin_write(VA1H_PIN, 0);
nrf_gpio_pin_write(VB2L_PIN, 0);
nrf_gpio_pin_write(VB2H_PIN, 0);
nrf_gpio_pin_write(VA2L_PIN, 0);
nrf_gpio_pin_write(VA2H_PIN, 0);
nrf_gpio_pin_write(VB3L_PIN, 0);
nrf_gpio_pin_write(VB3H_PIN, 0);
nrf_gpio_pin_write(VA3L_PIN, 0);
nrf_gpio_pin_write(VA3H_PIN, 0);
nrf_gpio_pin_write(VB4L_PIN, 0);
nrf_gpio_pin_write(VB4H_PIN, 0);
nrf_gpio_pin_write(VA4L_PIN, 0);
nrf_gpio_pin_write(VA4H_PIN, 0);
break;
case ELECTRODE_E1P_ENABLE:
NRF_LOG_INFO("ELECTRODE_E1P_ENABLE()");
nrf_gpio_pin_write(VB1H_PIN, 0);
nrf_gpio_pin_write(VB1L_PIN, 1);
break;
case ELECTRODE_E1P_DISABLE:
NRF_LOG_INFO("ELECTRODE_E1P_DISABLE()");
nrf_gpio_pin_write(VB1L_PIN, 0);
nrf_gpio_pin_write(VB1H_PIN, 1);
break;
case ELECTRODE_E1N_ENABLE:
NRF_LOG_INFO("ELECTRODE_E1N_ENABLE()");
nrf_gpio_pin_write(VA1H_PIN, 0);
nrf_gpio_pin_write(VA1L_PIN, 1);
break;
case ELECTRODE_E1N_DISABLE:
NRF_LOG_INFO("ELECTRODE_E1N_DISABLE()");
nrf_gpio_pin_write(VA1L_PIN, 0);
nrf_gpio_pin_write(VA1H_PIN, 1);
break;
case ELECTRODE_E2P_ENABLE:
NRF_LOG_INFO("ELECTRODE_E2P_ENABLE()");
nrf_gpio_pin_write(VB2H_PIN, 0);
nrf_gpio_pin_write(VB2L_PIN, 1);
break;
case ELECTRODE_E2P_DISABLE:
NRF_LOG_INFO("ELECTRODE_E2P_DISABLE()");
nrf_gpio_pin_write(VB2L_PIN, 0);
nrf_gpio_pin_write(VB2H_PIN, 1);
break;
case ELECTRODE_E2N_ENABLE:
NRF_LOG_INFO("ELECTRODE_E2N_ENABLE()");
nrf_gpio_pin_write(VA2H_PIN, 0);
nrf_gpio_pin_write(VA2L_PIN, 1);
break;
case ELECTRODE_E2N_DISABLE:
NRF_LOG_INFO("ELECTRODE_E2N_DISABLE()");
nrf_gpio_pin_write(VA2L_PIN, 0);
nrf_gpio_pin_write(VA2H_PIN, 1);
break;
case ELECTRODE_E3P_ENABLE:
NRF_LOG_INFO("ELECTRODE_E3P_ENABLE()");
nrf_gpio_pin_write(VB3H_PIN, 0);
nrf_gpio_pin_write(VB3L_PIN, 1);
break;
case ELECTRODE_E3P_DISABLE:
NRF_LOG_INFO("ELECTRODE_E3P_DISABLE()");
nrf_gpio_pin_write(VB3L_PIN, 0);
nrf_gpio_pin_write(VB3H_PIN, 1);
break;
case ELECTRODE_E3N_ENABLE:
NRF_LOG_INFO("ELECTRODE_E3N_ENABLE()");
nrf_gpio_pin_write(VA3H_PIN, 0);
nrf_gpio_pin_write(VA3L_PIN, 1);
break;
case ELECTRODE_E3N_DISABLE:
NRF_LOG_INFO("ELECTRODE_E3N_DISABLE()");
nrf_gpio_pin_write(VA3L_PIN, 0);
nrf_gpio_pin_write(VA3H_PIN, 1);
break;
case ELECTRODE_E4P_ENABLE:
NRF_LOG_INFO("ELECTRODE_E4P_ENABLE()");
nrf_gpio_pin_write(VB4H_PIN, 0);
nrf_gpio_pin_write(VB4L_PIN, 1);
break;
case ELECTRODE_E4P_DISABLE:
NRF_LOG_INFO("ELECTRODE_E4P_DISABLE()");
nrf_gpio_pin_write(VB4L_PIN, 0);
nrf_gpio_pin_write(VB4H_PIN, 1);
break;
case ELECTRODE_E4N_ENABLE:
NRF_LOG_INFO("ELECTRODE_E4N_ENABLE()");
nrf_gpio_pin_write(VA4H_PIN, 0);
nrf_gpio_pin_write(VA4L_PIN, 1);
break;
case ELECTRODE_E4N_DISABLE:
NRF_LOG_INFO("ELECTRODE_E4N_DISABLE()");
nrf_gpio_pin_write(VA4L_PIN, 0);
nrf_gpio_pin_write(VA4H_PIN, 1);
break;
}
}
static void set_cpg_pulse_parameter(uint8_t *ins)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t electrodes1_pulse_gen_sel = (ins[5] & 0b10000000) >> 7;
uint8_t electrodes2_pulse_gen_sel = (ins[5] & 0b01000000) >> 6;
uint8_t electrodes3_pulse_gen_sel = (ins[5] & 0b00100000) >> 5;
uint8_t electrodes4_pulse_gen_sel = (ins[5] & 0b00010000) >> 4;
uint32_t pulse_width_us = (uint32_t)ins[6] << 24 | (uint32_t)ins[7] << 16 | (uint32_t)ins[8] << 8 | (uint32_t)ins[9];
uint32_t freq_hz = (uint32_t)ins[10] << 24 | (uint32_t)ins[11] << 16 | (uint32_t)ins[12] << 8 | (uint32_t)ins[13];
if (electrodes1_pulse_gen_sel) {
pusle_gen[0] = (pusle_gen_t) {
.VBxH = VB1H_PIN,
.VBxL = VB1L_PIN,
.VAxH = VA1H_PIN,
.VAxL = VA1L_PIN,
.point_us[0] = 1,
.point_us[1] = pulse_width_us,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = pulse_width_us,
.point_us[6] = 1,
.idle_us = 0,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_NULL,
};
pusle_gen[0].idle_us = (1000000 / freq_hz) - (pusle_gen[0].point_us[0] +
pusle_gen[0].point_us[1] +
pusle_gen[0].point_us[2] +
pusle_gen[0].point_us[3] +
pusle_gen[0].point_us[4] +
pusle_gen[0].point_us[5] +
pusle_gen[0].point_us[6]);
NRF_LOG_INFO("[%d]a = %d us", 1, pusle_gen[0].point_us[0]);
NRF_LOG_INFO("[%d]b = %d us", 1, pusle_gen[0].point_us[1]);
NRF_LOG_INFO("[%d]c = %d us", 1, pusle_gen[0].point_us[2]);
NRF_LOG_INFO("[%d]d = %d us", 1, pusle_gen[0].point_us[3]);
NRF_LOG_INFO("[%d]e = %d us", 1, pusle_gen[0].point_us[4]);
NRF_LOG_INFO("[%d]f = %d us", 1, pusle_gen[0].point_us[5]);
NRF_LOG_INFO("[%d]g = %d us", 1, pusle_gen[0].point_us[6]);
NRF_LOG_INFO("[%d]idle = %d us", 1, pusle_gen[0].idle_us);
}
if (electrodes2_pulse_gen_sel) {
pusle_gen[1] = (pusle_gen_t) {
.VBxH = VB2H_PIN,
.VBxL = VB2L_PIN,
.VAxH = VA2H_PIN,
.VAxL = VA2L_PIN,
.point_us[0] = 1,
.point_us[1] = pulse_width_us,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = pulse_width_us,
.point_us[6] = 1,
.idle_us = 0,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_NULL,
};
pusle_gen[1].idle_us = (1000000 / freq_hz) - (pusle_gen[1].point_us[0] +
pusle_gen[1].point_us[1] +
pusle_gen[1].point_us[2] +
pusle_gen[1].point_us[3] +
pusle_gen[1].point_us[4] +
pusle_gen[1].point_us[5] +
pusle_gen[1].point_us[6]);
NRF_LOG_INFO("[%d]a = %d us", 2, pusle_gen[1].point_us[0]);
NRF_LOG_INFO("[%d]b = %d us", 2, pusle_gen[1].point_us[1]);
NRF_LOG_INFO("[%d]c = %d us", 2, pusle_gen[1].point_us[2]);
NRF_LOG_INFO("[%d]d = %d us", 2, pusle_gen[1].point_us[3]);
NRF_LOG_INFO("[%d]e = %d us", 2, pusle_gen[1].point_us[4]);
NRF_LOG_INFO("[%d]f = %d us", 2, pusle_gen[1].point_us[5]);
NRF_LOG_INFO("[%d]g = %d us", 2, pusle_gen[1].point_us[6]);
NRF_LOG_INFO("[%d]idle = %d us", 2, pusle_gen[1].idle_us);
}
if (electrodes3_pulse_gen_sel) {
pusle_gen[2] = (pusle_gen_t) {
.VBxH = VB3H_PIN,
.VBxL = VB3L_PIN,
.VAxH = VA3H_PIN,
.VAxL = VA3L_PIN,
.point_us[0] = 1,
.point_us[1] = pulse_width_us,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = pulse_width_us,
.point_us[6] = 1,
.idle_us = 0,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_NULL,
};
pusle_gen[2].idle_us = (1000000 / freq_hz) - (pusle_gen[2].point_us[0] +
pusle_gen[2].point_us[1] +
pusle_gen[2].point_us[2] +
pusle_gen[2].point_us[3] +
pusle_gen[2].point_us[4] +
pusle_gen[2].point_us[5] +
pusle_gen[2].point_us[6]);
NRF_LOG_INFO("[%d]a = %d us", 3, pusle_gen[2].point_us[0]);
NRF_LOG_INFO("[%d]b = %d us", 3, pusle_gen[2].point_us[1]);
NRF_LOG_INFO("[%d]c = %d us", 3, pusle_gen[2].point_us[2]);
NRF_LOG_INFO("[%d]d = %d us", 3, pusle_gen[2].point_us[3]);
NRF_LOG_INFO("[%d]e = %d us", 3, pusle_gen[2].point_us[4]);
NRF_LOG_INFO("[%d]f = %d us", 3, pusle_gen[2].point_us[5]);
NRF_LOG_INFO("[%d]g = %d us", 3, pusle_gen[2].point_us[6]);
NRF_LOG_INFO("[%d]idle = %d us", 3, pusle_gen[2].idle_us);
}
if (electrodes4_pulse_gen_sel) {
pusle_gen[3] = (pusle_gen_t) {
.VBxH = VB4H_PIN,
.VBxL = VB4L_PIN,
.VAxH = VA4H_PIN,
.VAxL = VA4L_PIN,
.point_us[0] = 1,
.point_us[1] = pulse_width_us,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = pulse_width_us,
.point_us[6] = 1,
.idle_us = 0,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_NULL,
};
pusle_gen[3].idle_us = (1000000 / freq_hz) - (pusle_gen[3].point_us[0] +
pusle_gen[3].point_us[1] +
pusle_gen[3].point_us[2] +
pusle_gen[3].point_us[3] +
pusle_gen[3].point_us[4] +
pusle_gen[3].point_us[5] +
pusle_gen[3].point_us[6]);
NRF_LOG_INFO("[%d]a = %d us", 4, pusle_gen[3].point_us[0]);
NRF_LOG_INFO("[%d]b = %d us", 4, pusle_gen[3].point_us[1]);
NRF_LOG_INFO("[%d]c = %d us", 4, pusle_gen[3].point_us[2]);
NRF_LOG_INFO("[%d]d = %d us", 4, pusle_gen[3].point_us[3]);
NRF_LOG_INFO("[%d]e = %d us", 4, pusle_gen[3].point_us[4]);
NRF_LOG_INFO("[%d]f = %d us", 4, pusle_gen[3].point_us[5]);
NRF_LOG_INFO("[%d]g = %d us", 4, pusle_gen[3].point_us[6]);
NRF_LOG_INFO("[%d]idle = %d us", 4, pusle_gen[3].idle_us);
}
NRF_LOG_INFO("set ok......");
}
static void start_which_electrodes(uint8_t *ins)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t electrodes1_pulse_gen_en = (ins[5] & 0b10000000) >> 7;
uint8_t electrodes2_pulse_gen_en = (ins[5] & 0b01000000) >> 6;
uint8_t electrodes3_pulse_gen_en = (ins[5] & 0b00100000) >> 5;
uint8_t electrodes4_pulse_gen_en = (ins[5] & 0b00010000) >> 4;
uint32_t inum=0;
if (electrodes1_pulse_gen_en)
{
p_pusle_genA[0] = pusle_gen[0];
p_pusle_genA[0].pulse_id = PULSE_ID_A;
inum=0;
nrf_gpio_pin_clear(p_pusle_genA[inum].VBxL);
nrf_gpio_pin_set(p_pusle_genA[inum].VBxH);
nrf_gpio_pin_clear(p_pusle_genA[inum].VAxL);
nrf_gpio_pin_set(p_pusle_genA[inum].VAxH);
NRF_LOG_INFO("p_pusle_genA[%d].VBxL=%d", inum, p_pusle_genA[inum].VBxL);
NRF_LOG_INFO("p_pusle_genA[%d].VBxH=%d", inum, p_pusle_genA[inum].VBxH);
NRF_LOG_INFO("p_pusle_genA[%d].VAxL=%d", inum, p_pusle_genA[inum].VAxL);
NRF_LOG_INFO("p_pusle_genA[%d].VAxH=%d", inum, p_pusle_genA[inum].VAxH);
NRF_LOG_INFO("start electrodes1_pulse_gen");
}
if (electrodes2_pulse_gen_en)
{
p_pusle_genA[1] = pusle_gen[1];
p_pusle_genA[1].pulse_id = PULSE_ID_B;
inum=1;
nrf_gpio_pin_clear(p_pusle_genA[inum].VBxL);
nrf_gpio_pin_set(p_pusle_genA[inum].VBxH);
nrf_gpio_pin_clear(p_pusle_genA[inum].VAxL);
nrf_gpio_pin_set(p_pusle_genA[inum].VAxH);
NRF_LOG_INFO("p_pusle_genA[%d].VBxL=%d", inum, p_pusle_genA[inum].VBxL);
NRF_LOG_INFO("p_pusle_genA[%d].VBxH=%d", inum, p_pusle_genA[inum].VBxH);
NRF_LOG_INFO("p_pusle_genA[%d].VAxL=%d", inum, p_pusle_genA[inum].VAxL);
NRF_LOG_INFO("p_pusle_genA[%d].VAxH=%d", inum, p_pusle_genA[inum].VAxH);
NRF_LOG_INFO("start electrodes2_pulse_gen");
}
if (electrodes1_pulse_gen_en || electrodes2_pulse_gen_en) {
cpg11_pulse_init(0, &p_pusle_genA[0], 2);
cpg11_pulse_start(0, &p_pusle_genA[0]);
}
if (electrodes3_pulse_gen_en)
{
p_pusle_genB[0] = pusle_gen[2];
p_pusle_genB[0].pulse_id = PULSE_ID_C;
inum=0;
nrf_gpio_pin_clear(p_pusle_genB[inum].VBxL);
nrf_gpio_pin_set(p_pusle_genB[inum].VBxH);
nrf_gpio_pin_clear(p_pusle_genB[inum].VAxL);
nrf_gpio_pin_set(p_pusle_genB[inum].VAxH);
NRF_LOG_INFO("p_pusle_genB[%d].VBxL=%d", inum, p_pusle_genB[inum].VBxL);
NRF_LOG_INFO("p_pusle_genB[%d].VBxH=%d", inum, p_pusle_genB[inum].VBxH);
NRF_LOG_INFO("p_pusle_genB[%d].VAxL=%d", inum, p_pusle_genB[inum].VAxL);
NRF_LOG_INFO("p_pusle_genB[%d].VAxH=%d", inum, p_pusle_genB[inum].VAxH);
NRF_LOG_INFO("start electrodes3_pulse_gen");
}
if (electrodes4_pulse_gen_en)
{
p_pusle_genB[1] = pusle_gen[3];
p_pusle_genB[1].pulse_id = PULSE_ID_D;
inum=1;
nrf_gpio_pin_clear(p_pusle_genB[inum].VBxL);
nrf_gpio_pin_set(p_pusle_genB[inum].VBxH);
nrf_gpio_pin_clear(p_pusle_genB[inum].VAxL);
nrf_gpio_pin_set(p_pusle_genB[inum].VAxH);
NRF_LOG_INFO("p_pusle_genB[%d].VBxL=%d", inum, p_pusle_genB[inum].VBxL);
NRF_LOG_INFO("p_pusle_genB[%d].VBxH=%d", inum, p_pusle_genB[inum].VBxH);
NRF_LOG_INFO("p_pusle_genB[%d].VAxL=%d", inum, p_pusle_genB[inum].VAxL);
NRF_LOG_INFO("p_pusle_genB[%d].VAxH=%d", inum, p_pusle_genB[inum].VAxH);
NRF_LOG_INFO("start electrodes4_pulse_gen");
}
if (electrodes3_pulse_gen_en || electrodes4_pulse_gen_en) {
cpg11_pulse_init(1, &p_pusle_genB[0], 2);
cpg11_pulse_start(1, &p_pusle_genB[0]);
}
for (int i=0; i<2; i++) {
NRF_LOG_INFO("pusle_genA[%d]pulse_id: %d", i, p_pusle_genA[i].pulse_id);
}
for (int i=0; i<2; i++) {
NRF_LOG_INFO("pusle_genB[%d]pulse_id: %d", i, p_pusle_genB[i].pulse_id);
}
}
static void stop_which_electrodes(uint8_t *ins)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t electrodes1_pulse_gen_dis = (ins[5] & 0b10000000) >> 7;
uint8_t electrodes2_pulse_gen_dis = (ins[5] & 0b01000000) >> 6;
uint8_t electrodes3_pulse_gen_dis = (ins[5] & 0b00100000) >> 5;
uint8_t electrodes4_pulse_gen_dis = (ins[5] & 0b00010000) >> 4;
if (electrodes1_pulse_gen_dis)
{
cpg11_pulse_stop_by_pulse_id(p_pusle_genA[0].pulse_id);
p_pusle_genA[0].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes1_pulse_gen");
}
if (electrodes2_pulse_gen_dis)
{
cpg11_pulse_stop_by_pulse_id(p_pusle_genA[1].pulse_id);
p_pusle_genA[1].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes2_pulse_gen");
}
if (electrodes3_pulse_gen_dis)
{
cpg11_pulse_stop_by_pulse_id(p_pusle_genB[0].pulse_id);
p_pusle_genB[0].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes3_pulse_gen");
}
if (electrodes4_pulse_gen_dis)
{
cpg11_pulse_stop_by_pulse_id(p_pusle_genB[1].pulse_id);
p_pusle_genB[1].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes4_pulse_gen");
}
for (int i=0; i<2; i++) {
NRF_LOG_INFO("pusle_genA[%d]pulse_id: %d", i, p_pusle_genA[i].pulse_id);
}
for (int i=0; i<2; i++) {
NRF_LOG_INFO("pusle_genB[%d]pulse_id: %d", i, p_pusle_genB[i].pulse_id);
}
NRF_LOG_INFO("\n\n")
}
static void set_cpg_pulse_cnt(uint8_t *ins)
{
NRF_LOG_INFO("%s", __FUNCTION__);
uint8_t electrodes1_pulse_gen_sel = (ins[5] & 0b10000000) >> 7;
uint8_t electrodes2_pulse_gen_sel = (ins[5] & 0b01000000) >> 6;
uint8_t electrodes3_pulse_gen_sel = (ins[5] & 0b00100000) >> 5;
uint8_t electrodes4_pulse_gen_sel = (ins[5] & 0b00010000) >> 4;
uint32_t pulse_cnt = (uint32_t)ins[6] << 24 | (uint32_t)ins[7] << 16 | (uint32_t)ins[8] << 8 | (uint32_t)ins[9];
if (electrodes1_pulse_gen_sel)
{
pusle_gen[0].pulse_cnt = pulse_cnt;
NRF_LOG_INFO("[1] pulse_cnt = %d cnt", pusle_gen[0].pulse_cnt);
}
if (electrodes2_pulse_gen_sel)
{
pusle_gen[1].pulse_cnt = pulse_cnt;
NRF_LOG_INFO("[2] pulse_cnt = %d cnt", pusle_gen[1].pulse_cnt);
}
if (electrodes3_pulse_gen_sel)
{
pusle_gen[2].pulse_cnt = pulse_cnt;
NRF_LOG_INFO("[3] pulse_cnt = %d cnt", pusle_gen[2].pulse_cnt);
}
if (electrodes4_pulse_gen_sel)
{
pusle_gen[3].pulse_cnt = pulse_cnt;
NRF_LOG_INFO("[4] pulse_cnt = %d cnt", pusle_gen[3].pulse_cnt);
}
}
void cpg_pulse_default_demo(void)
{
NRF_LOG_INFO("%s", __FUNCTION__);
pusle_gen_t pusle_gen_demo[PULSE_GEN_A_NUMB+PULSE_GEN_B_NUMB];
cpg11_pulse_stop_by_pulse_id(p_pusle_genA[0].pulse_id);
p_pusle_genA[0].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes1_pulse_gen");
cpg11_pulse_stop_by_pulse_id(p_pusle_genA[1].pulse_id);
p_pusle_genA[1].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes2_pulse_gen");
cpg11_pulse_stop_by_pulse_id(p_pusle_genB[0].pulse_id);
p_pusle_genB[0].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes3_pulse_gen");
cpg11_pulse_stop_by_pulse_id(p_pusle_genB[1].pulse_id);
p_pusle_genB[1].pulse_id = PULSE_ID_NULL;
NRF_LOG_INFO("stop electrodes4_pulse_gen");
pusle_gen_demo[2] = (pusle_gen_t) {
.VBxH = VB3H_PIN,
.VBxL = VB3L_PIN,
.VAxH = VA3H_PIN,
.VAxL = VA3L_PIN,
.point_us[0] = 1,
.point_us[1] = 250,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 250,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_NULL,
};
p_pusle_genB[0] = pusle_gen_demo[2];
p_pusle_genB[0].pulse_id = PULSE_ID_C;
cpg11_pulse_init(1, &p_pusle_genB[0], 1);
cpg11_pulse_start(1, &p_pusle_genB[0]);
NRF_LOG_INFO("start electrodes3_pulse_gen");
}
/*
dev_mode_set_cpg11_electrodes
(1) 0x3000FF0009
- func: ELECTRODE_A1B1_IDLE
(2) 0x3000FF000A
- func: ELECTRODE_A2B2_IDLE
(3) 0x3000FF000B
- func: ELECTRODE_A3B3_IDLE
(4) 0x3000FF000C
- func: ELECTRODE_A4B4_IDLE
(5) 0x3000FF000D
- func: ELECTRODE_ALL_HIGHZ
(6) 0x3000FF000E
- func: ELECTRODE_E1P_ENABLE (electrode 1 positive)
(7) 0x3000FF000F
- func: ELECTRODE_E1P_DISABLE (electrode 1 positive)
(8) 0x3000FF0010
- func: ELECTRODE_E1N_ENABLE (electrode 1 negative)
(9) 0x3000FF0011
- func: ELECTRODE_E1N_DISABLE (electrode 1 negative)
(10) 0x3000FF0012
- func: ELECTRODE_E2P_ENABLE (electrode 2 positive)
(11) 0x3000FF0013
- func: ELECTRODE_E2P_DISABLE (electrode 2 positive)
(12) 0x3000FF0014
- func: ELECTRODE_E2N_ENABLE (electrode 2 negative)
(13) 0x3000FF0015
- func: ELECTRODE_E2N_DISABLE (electrode 2 negative)
(14) 0x3000FF0016
- func: ELECTRODE_E3P_ENABLE (electrode 3 positive)
(15) 0x3000FF0017
- func: ELECTRODE_E3P_DISABLE (electrode 3 positive)
(16) 0x3000FF0018
- func: ELECTRODE_E3N_ENABLE (electrode 3 negative)
(17) 0x3000FF0019
- func: ELECTRODE_E3N_DISABLE (electrode 3 negative)
(18) 0x3000FF001A
- func: ELECTRODE_E4P_ENABLE (electrode 4 positive)
(19) 0x3000FF001B
- func: ELECTRODE_E4P_DISABLE (electrode 4 positive)
(20) 0x3000FF001C
- func: ELECTRODE_E4N_ENABLE (electrode 4 negative)
(21) 0x3000FF001D
- func: ELECTRODE_E4N_DISABLE (electrode 4 negative)
*/
void dev_mode_set_cpg11_electrodes(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t dev_opcode;
uint8_t electrodes_opcode;
} *p_ins = (void *)ins;
cpg11_electrodes(p_ins->electrodes_opcode);
}
/*
dev_mode_set_cpg11_tw1508
(1) 0x3000FF0100
- func: tw1508_init() out_0 = 0, out_1 = 0
(2) 0x3000FF0101aaaabbbb
- func: tw1508_set()
- aaaa: out_0 value (0x0000 to 0x03FF [LSB])
- bbbb: out_1 value (0x0000 to 0x03FF [LSB])
*/
void dev_mode_set_cpg11_tw1508(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t dev_opcode;
uint8_t tw1508_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->tw1508_opcode)
{
case 0x00: {
tw1508_init();
NRF_LOG_INFO("tw1508_init()");
break;
}
case 0x01: {
uint16_t out_0;
uint16_t out_1;
memcpy(&out_0, &p_ins->param[0], sizeof(out_0));
memcpy(&out_1, &p_ins->param[2], sizeof(out_1));
NRF_LOG_INFO("tw1508_set(%d, %d)", out_0, out_1);
tw1508_set(out_0, out_1);
break;
}
}
}
/*
dev_mode_ctrl_cpg11_electrodes_task
(1) 0x3000FF0205
- func: start the cpg_pulse_default_demo()
- electrode 1:
pulse_width_us: 250 us
freq_hz: 665 Hz
idle: 1000 us
- electrode 2:
pulse_width_us: 250 us
freq_hz: 665 Hz
idle: 1000 us
(2) 0x3000FF0206nnwwwwwwwwffffffff
- func: set_cpg_pulse_parameter value
- nn: set which group of electrodes (0x00 to 0xF0)
0x80 = 0b10000000: select electrode 1
0x40 = 0b01000000: select electrode 2
0x20 = 0b00100000: select electrode 3
0x10 = 0b00010000: select electrode 4
......
0xF0 = 0b11110000: select electrode 1~4
- wwwwwwww: pulse_width_us (0x00000000 to 0xFFFFFFFF)
- ffffffff: freq_hz (0x00000000 to 0xFFFFFFFF)
(3) 0x3000FF0207nn
- func: select which electrode's pulse to enable
- nn: which electrodes (0x00 to 0xF0)
0x80 = 0b10000000: electrode 1 enable pulse
0x40 = 0b01000000: electrode 2 enable pulse
0x20 = 0b00100000: electrode 3 enable pulse
0x10 = 0b00010000: electrode 4 enable pulse
......
0xF0 = 0b11110000: electrode 1~4 enable pulse
(4) 0x3000FF0208nn
- func: select which electrode's pulse to stop
- nn: which electrodes (0x00 to 0xF0)
0x80 = 0b10000000: electrode 1 stops pulsing
0x40 = 0b01000000: electrode 2 stops pulsing
0x20 = 0b00100000: electrode 3 stops pulsing
0x10 = 0b00010000: electrode 4 stops pulsing
......
0xF0 = 0b11110000: electrode 1~4 stops pulsing
(5) 0x3000FF0209nncccccccc
- func: set_cpg_pulse_cnt
- nn: set which group of electrodes (0x00 to 0xF0)
0x80 = 0b10000000: select electrode 1
0x40 = 0b01000000: select electrode 2
0x20 = 0b00100000: select electrode 3
0x10 = 0b00010000: select electrode 4
......
0xF0 = 0b11110000: select electrode 1~4
- cccccccc: pulse_cnt (0x00000001 to 0xFFFFFFFF)
*/
void dev_mode_ctrl_cpg11_electrodes_task(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t dev_opcode;
uint8_t electrodes_task_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->electrodes_task_opcode)
{
case 0x05: {
cpg_pulse_default_demo();
break;
}
case 0x06: {
set_cpg_pulse_parameter(ins);
break;
}
case 0x07: {
start_which_electrodes(ins);
break;
}
case 0x08: {
stop_which_electrodes(ins);
break;
}
case 0x09: {
set_cpg_pulse_cnt(ins);
break;
}
}
}
/*
dev_mode_gpio_function
(1) 0x3000FFA000ppss
- func: set_bmd380_pin_signal
- pp: pin number (0x06 to 0x3E)
0x06: P0.22_GPIO
0x08: P0.25_GPIO
......
0x3E: P0.16_GPIO
- ss: signal (0x00 or 0x01)
0x00: low
0x01: high
(2) 0x3000FFA001ss
- func: set all BMD380 PINs to high or low (except for HV_EN, SPI, and input GPIOs)
- pin_number[] = {
6, 8, 9, 10, 13, 14, 29, 30, 31, 32, 33, 34, 36, 38, 39,
40, 41, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61
}
- ss: signal (0x00 or 0x01)
0x00: low
0x01: high
*/
void dev_mode_gpio_function(uint8_t *ins)
{
struct __PACKED
{
uint8_t id : 4;
uint8_t : 4;
uint16_t magic : 16;
uint8_t dev_opcode;
uint8_t gpio_function_opcode;
uint8_t param[];
} *p_ins = (void *)ins;
switch (p_ins->gpio_function_opcode)
{
case 0x00: {
uint32_t pin = p_ins->param[0];
uint32_t high_low = p_ins->param[1];
set_bmd380_pin_signal(pin, high_low);
break;
}
case 0x01: {
uint32_t high_low = p_ins->param[0];
uint32_t pin_number[] = { 6, 8, 9, 10, 13, 14, 29, 30, 31, 32, 33, 34, 36, 38, 39, 40, 41, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61 };
for (int i = 0; i < sizeof(pin_number) / sizeof(pin_number[0]); i++)
{
set_bmd380_pin_signal(pin_number[i], high_low);
}
break;
}
}
}
#endif
-23
View File
@@ -1,23 +0,0 @@
#ifndef __CPG10_DEV_MODE_H__
#define __CPG10_DEV_MODE_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_button.h"
#include "elite_board.h"
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
void dev_mode_set_cpg11_electrodes(uint8_t *ins);
void dev_mode_set_cpg11_tw1508(uint8_t *ins);
void dev_mode_ctrl_cpg11_electrodes_task(uint8_t *ins);
void dev_mode_gpio_function(uint8_t *ins);
#endif
#ifdef __cplusplus
}
#endif
#endif /* ! __CPG10_DEV_MODE_H__ */
+386 -227
View File
@@ -12,312 +12,463 @@
#pragma GCC optimize("O2")
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
typedef struct
{
const uint32_t gpiote_idx[4];
NRF_TIMER_Type *TMR_A;
NRF_TIMER_Type *TMR_B;
uint32_t IRQn;
pusle_gen_t *p_pusle_gen;
uint32_t pusle_gen_len;
uint32_t pusle_gen_sel;
} pusle_gen_hw_t;
uint32_t TMR_A_IRQn;
uint32_t TMR_B_IRQn;
pulse_gen_t *p_pulse_gen;
struct
{
pulse_gen_t *p_pulse_gen;
uint32_t len;
uint32_t select;
} private;
} pulse_gen_hw_t;
pusle_gen_hw_t pusle_gen_hw[] = {
{{ 0, 1, 2, 3 },
NRF_TIMER1,
NRF_TIMER3,
TIMER3_IRQn,
NULL,
0,
0},
{{ 4, 5, 6, 7 },
NRF_TIMER2,
NRF_TIMER4,
TIMER4_IRQn,
NULL,
0,
0},
pulse_gen_hw_t pulse_gen_hw[] = {
{.gpiote_idx = { 0, 1, 2, 3 },
.TMR_A = NRF_TIMER1,
.TMR_B = NRF_TIMER3,
.TMR_A_IRQn = TIMER1_IRQn,
.TMR_B_IRQn = TIMER3_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 }},
{.gpiote_idx = { 4, 5, 6, 7 },
.TMR_A = NRF_TIMER2,
.TMR_B = NRF_TIMER4,
.TMR_A_IRQn = TIMER2_IRQn,
.TMR_B_IRQn = TIMER4_IRQn,
.p_pulse_gen = NULL,
.private = { NULL, 0, 0 }},
};
__STATIC_INLINE void cpg11_tmr_cb(uint32_t hw_idx)
__STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
{
if (pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4])
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
}
__STATIC_INLINE void cpg11_tmrB_cb(uint32_t hw_idx)
{
if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3])
{
pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4] = 0;
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
uint32_t sel = pusle_gen_hw[hw_idx].pusle_gen_sel;
pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3] = 0;
if (pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt > 0)
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt--;
pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt--;
}
for (uint32_t i = 0; i < pusle_gen_hw[hw_idx].pusle_gen_len; i++)
for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
{
sel = (sel + 1) % pusle_gen_hw[hw_idx].pusle_gen_len;
if (pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt > 0)
sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
pusle_gen_hw[hw_idx].pusle_gen_sel = sel;
cpg11_pulse_start(hw_idx, &pusle_gen_hw[hw_idx].p_pusle_gen[sel]);
pulse_gen_hw[hw_idx].private.select = sel;
config_tmrB(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
return;
}
}
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
}
}
__STATIC_INLINE void config_tmrA(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
{
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1 + p_pulse_gen->idle_us * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
}
__STATIC_INLINE void cpg11_tmrA_cb(uint32_t hw_idx)
{
if (pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3])
{
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3] = 0;
for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
{
sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
{
config_tmrA(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
return;
}
}
}
}
void TIMER1_IRQHandler(void)
{
cpg11_tmrA_cb(0);
}
void TIMER3_IRQHandler(void)
{
cpg11_tmr_cb(0);
cpg11_tmrB_cb(0);
}
void TIMER2_IRQHandler(void)
{
cpg11_tmrA_cb(1);
}
void TIMER4_IRQHandler(void)
{
cpg11_tmr_cb(1);
cpg11_tmrB_cb(1);
}
void cpg11_pulse_stop_by_pulse_id(uint32_t pulse_id)
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id)
{
for (uint32_t i = 0; i < COUNTOF(pusle_gen_hw); i++)
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
{
for (uint32_t j = 0; j < pusle_gen_hw[i].pusle_gen_len; j++)
for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
{
if (pusle_gen_hw[i].p_pusle_gen[j].pulse_id == pulse_id)
if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
{
taskENTER_CRITICAL();
pusle_gen_hw[i].p_pusle_gen[j].VAxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[j].VBxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[j].VAxL = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[j].VBxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = 0xFFFFFFFF;
taskEXIT_CRITICAL();
}
}
}
}
void cpg11_pulse_start(uint32_t hw_idx, pusle_gen_t *p_pusle_gen)
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id)
{
pusle_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pusle_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
{
for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
{
if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
{
taskENTER_CRITICAL();
pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = pulse_gen_hw[i].p_pulse_gen[j].VAxH;
pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = pulse_gen_hw[i].p_pulse_gen[j].VBxH;
pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = pulse_gen_hw[i].p_pulse_gen[j].VAxL;
pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = pulse_gen_hw[i].p_pulse_gen[j].VBxL;
taskEXIT_CRITICAL();
}
}
}
}
sd_nvic_DisableIRQ(pusle_gen_hw[hw_idx].IRQn);
sd_nvic_ClearPendingIRQ(pusle_gen_hw[hw_idx].IRQn);
void cpg11_pulse_stop(uint32_t hw_idx)
{
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[0], p_pusle_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[1], p_pusle_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[2], p_pusle_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[3], p_pusle_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
}
void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
{
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
uint32_t offs = 8 * hw_idx;
NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[0]];
NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
NRF_PPI->CHENSET = (1 << (offs + 0));
NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[1]];
NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
NRF_PPI->CHENSET = (1 << (offs + 1));
NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[1]];
NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
NRF_PPI->CHENSET = (1 << (offs + 2));
NRF_PPI->CH[offs + 3].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[0]];
NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->TASKS_START;
NRF_PPI->CH[offs + 3].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->TASKS_START;
NRF_PPI->CHENSET = (1 << (offs + 3));
NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->CHENSET = (1 << (offs + 4));
NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[3]];
NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
NRF_PPI->CHENSET = (1 << (offs + 5));
NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[3]];
NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
NRF_PPI->CHENSET = (1 << (offs + 6));
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->CHENSET = (1 << (offs + 7));
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
NRF_PPI->FORK[offs + 7].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->TASKS_START;
NRF_PPI->CHENSET = (1 << (offs + 7));
pusle_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
pusle_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
pulse_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
pusle_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pusle_gen->point_us[3] * 16;
pusle_gen_hw[hw_idx].TMR_B->CC[1] = pusle_gen_hw[hw_idx].TMR_B->CC[0] + p_pusle_gen->point_us[4] * 16;
pusle_gen_hw[hw_idx].TMR_B->CC[2] = pusle_gen_hw[hw_idx].TMR_B->CC[1] + p_pusle_gen->point_us[5] * 16;
pusle_gen_hw[hw_idx].TMR_B->CC[3] = pusle_gen_hw[hw_idx].TMR_B->CC[2] + p_pusle_gen->point_us[6] * 16;
pusle_gen_hw[hw_idx].TMR_B->CC[4] = pusle_gen_hw[hw_idx].TMR_B->CC[3] + p_pusle_gen->idle_us * 16;
pusle_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE4_STOP_MASK | NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK;
pusle_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE4_MASK;
pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
pulse_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
pusle_gen_hw[hw_idx].TMR_A->CC[0] = 1;
pusle_gen_hw[hw_idx].TMR_A->CC[1] = pusle_gen_hw[hw_idx].TMR_A->CC[0] + p_pusle_gen->point_us[0] * 16;
pusle_gen_hw[hw_idx].TMR_A->CC[2] = pusle_gen_hw[hw_idx].TMR_A->CC[1] + p_pusle_gen->point_us[1] * 16;
pusle_gen_hw[hw_idx].TMR_A->CC[3] = pusle_gen_hw[hw_idx].TMR_A->CC[2] + p_pusle_gen->point_us[2] * 16;
pusle_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1;
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
pulse_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
pulse_gen_hw[hw_idx].TMR_A->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
sd_nvic_EnableIRQ(pusle_gen_hw[hw_idx].IRQn);
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
pusle_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
}
void cpg11_pulse_init(uint32_t hw_idx, pusle_gen_t *p_pusle_gen, uint32_t len)
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
{
taskENTER_CRITICAL();
NRF_LOG_INFO("%s", __FUNCTION__);
if (pusle_gen_hw[hw_idx].p_pusle_gen)
if (pulse_gen_hw[hw_idx].private.p_pulse_gen != NULL)
{
pusle_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pusle_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pusle_gen_hw[hw_idx].IRQn);
sd_nvic_ClearPendingIRQ(pusle_gen_hw[hw_idx].IRQn);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
vPortFree(pulse_gen_hw[hw_idx].private.p_pulse_gen);
}
pusle_gen_hw[hw_idx].p_pusle_gen = p_pusle_gen;
pusle_gen_hw[hw_idx].pusle_gen_len = len;
pusle_gen_hw[hw_idx].pusle_gen_sel = 0;
uint32_t swap_idle_us = p_pulse_gen[len - 1].idle_us;
for (int i = len - 1; i > 0; i--)
{
p_pulse_gen[i].idle_us = p_pulse_gen[i - 1].idle_us;
}
p_pulse_gen[0].idle_us = swap_idle_us;
NRF_LOG_INFO("hw_idx=%d", hw_idx);
NRF_LOG_INFO("len=%d", len);
pulse_gen_hw[hw_idx].p_pulse_gen = p_pulse_gen;
pulse_gen_hw[hw_idx].private.len = len;
pulse_gen_hw[hw_idx].private.select = 0;
pulse_gen_hw[hw_idx].private.p_pulse_gen = pvPortMalloc(sizeof(pulse_gen_t) * len);
memcpy(pulse_gen_hw[hw_idx].private.p_pulse_gen, pulse_gen_hw[hw_idx].p_pulse_gen, sizeof(*p_pulse_gen) * len);
taskEXIT_CRITICAL();
};
void cpg_pulse_default_demo_ext(void)
{
uint32_t pusle_gen_numb = 2;
bool e1 = 1;
bool e2 = 1;
bool e3 = 1;
bool e4 = 1;
pulse_gen_t p_pulse_genA[2];
pulse_gen_t p_pulse_genB[2];
pusle_gen_t *p_pusle_genA = pvPortMalloc(sizeof(pusle_gen_t) * pusle_gen_numb);
pusle_gen_t *p_pusle_genB = pvPortMalloc(sizeof(pusle_gen_t) * pusle_gen_numb);
p_pulse_genA[0] = (pulse_gen_t) {
.VBxH = VB1H_PIN,
.VBxL = VB1L_PIN,
.VAxH = VA1H_PIN,
.VAxL = VA1L_PIN,
.point_us[0] = 1,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_A,
};
memset(p_pusle_genA, 0x00, sizeof(pusle_gen_t) * pusle_gen_numb);
memset(p_pusle_genB, 0x00, sizeof(pusle_gen_t) * pusle_gen_numb);
p_pulse_genA[1] = (pulse_gen_t) {
.VBxH = VB2H_PIN,
.VBxL = VB2L_PIN,
.VAxH = VA2H_PIN,
.VAxL = VA2L_PIN,
.point_us[0] = 1,
.point_us[1] = 100,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 100,
.point_us[6] = 1,
.idle_us = 2000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_B,
};
if (pusle_gen_numb > 0)
p_pulse_genB[0] = (pulse_gen_t) {
.VBxH = VB3H_PIN,
.VBxL = VB3L_PIN,
.VAxH = VA3H_PIN,
.VAxL = VA3L_PIN,
.point_us[0] = 1,
.point_us[1] = 150,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 150,
.point_us[6] = 1,
.idle_us = 3000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_C,
};
p_pulse_genB[1] = (pulse_gen_t) {
.VBxH = VB4H_PIN,
.VBxL = VB4L_PIN,
.VAxH = VA4H_PIN,
.VAxL = VA4L_PIN,
.point_us[0] = 1,
.point_us[1] = 200,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 200,
.point_us[6] = 1,
.idle_us = 4000,
.pulse_cnt = UINT32_MAX,
.pulse_id = PULSE_ID_D,
};
if (e1)
{
p_pusle_genA[0] = (pusle_gen_t) {
.VBxH = VB1H_PIN,
.VBxL = VB1L_PIN,
.VAxH = VA1H_PIN,
.VAxL = VA1L_PIN,
.point_us[0] = 1,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = 0,
};
nrf_gpio_pin_clear(p_pulse_genA[0].VBxL);
nrf_gpio_pin_clear(p_pulse_genA[0].VBxH);
nrf_gpio_pin_clear(p_pulse_genA[0].VAxL);
nrf_gpio_pin_clear(p_pulse_genA[0].VAxH);
}
if (pusle_gen_numb > 1)
if (e2)
{
p_pusle_genA[1] = (pusle_gen_t) {
.VBxH = VB2H_PIN,
.VBxL = VB2L_PIN,
.VAxH = VA2H_PIN,
.VAxL = VA2L_PIN,
.point_us[0] = 1,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = 1,
};
nrf_gpio_pin_clear(p_pulse_genA[1].VBxL);
nrf_gpio_pin_clear(p_pulse_genA[1].VBxH);
nrf_gpio_pin_clear(p_pulse_genA[1].VAxL);
nrf_gpio_pin_clear(p_pulse_genA[1].VAxH);
}
if (pusle_gen_numb > 0)
if (e3)
{
p_pusle_genB[0] = (pusle_gen_t) {
.VBxH = VB3H_PIN,
.VBxL = VB3L_PIN,
.VAxH = VA3H_PIN,
.VAxL = VA3L_PIN,
.point_us[0] = 1,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = 2,
};
nrf_gpio_pin_clear(p_pulse_genB[0].VBxL);
nrf_gpio_pin_clear(p_pulse_genB[0].VBxH);
nrf_gpio_pin_clear(p_pulse_genB[0].VAxL);
nrf_gpio_pin_clear(p_pulse_genB[0].VAxH);
}
if (pusle_gen_numb > 1)
if (e4)
{
p_pusle_genB[1] = (pusle_gen_t) {
.VBxH = VB4H_PIN,
.VBxL = VB4L_PIN,
.VAxH = VA4H_PIN,
.VAxL = VA4L_PIN,
.point_us[0] = 1,
.point_us[1] = 50,
.point_us[2] = 1,
.point_us[3] = 0,
.point_us[4] = 1,
.point_us[5] = 50,
.point_us[6] = 1,
.idle_us = 1000,
.pulse_cnt = UINT32_MAX,
.pulse_id = 3,
};
nrf_gpio_pin_clear(p_pulse_genB[1].VBxL);
nrf_gpio_pin_clear(p_pulse_genB[1].VBxH);
nrf_gpio_pin_clear(p_pulse_genB[1].VAxL);
nrf_gpio_pin_clear(p_pulse_genB[1].VAxH);
}
cpg11_pulse_init(0, p_pusle_genA, pusle_gen_numb);
cpg11_pulse_init(1, p_pusle_genB, pusle_gen_numb);
cpg11_pulse_start(0, p_pusle_genA);
cpg11_pulse_start(1, p_pusle_genB);
vTaskDelay(10);
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[0].pulse_id);
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[1].pulse_id);
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[2].pulse_id);
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[3].pulse_id);
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[4].pulse_id);
vPortFree(p_pusle_genA);
vPortFree(p_pusle_genB);
for (;;)
if (e1 && e2)
{
cpg11_pulse_init(0, p_pulse_genA, 2);
cpg11_pulse_start(0, p_pulse_genA);
}
else if (e1 && e2 == 0)
{
cpg11_pulse_init(0, p_pulse_genA, 1);
cpg11_pulse_start(0, p_pulse_genA);
}
else if (e2 && e1 == 0)
{
cpg11_pulse_init(0, &p_pulse_genA[1], 1);
cpg11_pulse_start(0, &p_pulse_genA[1]);
}
if (e3 && e4)
{
cpg11_pulse_init(1, p_pulse_genB, 2);
cpg11_pulse_start(1, p_pulse_genB);
}
else if (e3 && e4 == 0)
{
cpg11_pulse_init(1, p_pulse_genB, 1);
cpg11_pulse_start(1, p_pulse_genB);
}
else if (e4 && e3 == 0)
{
cpg11_pulse_init(1, &p_pulse_genB[1], 1);
cpg11_pulse_start(1, &p_pulse_genB[1]);
}
}
@@ -326,20 +477,20 @@ void cpg11_io_init(void)
const uint32_t pel_pins_default_high[] = {
LED_R_PIN,
LED_G_PIN,
LED_B_PIN,
CS_MEM_PIN
CS_MEM_PIN,
ADPT_CLR_PIN,
ADPT_LE_PIN
};
const uint32_t pel_pins_default_low[] = {
LED_B_PIN,
TW_SCKI_0_PIN,
TW_SCKI_1_PIN,
ADPT_CLK,
ADPT_CLK_PIN,
HV_EN_PIN,
SPIM_CLK_PIN,
SPIM_MOSI_PIN,
SPIM_MISO_PIN,
ADPT_LE_PIN,
ADPT_CLR_PIN,
ADPT0_S4_PIN,
ADPT0_S3_PIN,
ADPT0_S2_PIN,
@@ -385,31 +536,39 @@ void cpg11_io_init(void)
nrf_gpio_cfg_input(AIN0_PIN, NRF_GPIO_PIN_NOPULL);
nrf_gpio_cfg_input(AIN1_PIN, NRF_GPIO_PIN_NOPULL);
for (uint32_t i = 0; i < COUNTOF(pusle_gen_hw); i++)
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
{
pusle_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
pusle_gen_hw[i].TMR_B->MODE = NRF_TIMER_MODE_TIMER;
pusle_gen_hw[i].TMR_B->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pulse_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
pulse_gen_hw[i].TMR_B->MODE = NRF_TIMER_MODE_TIMER;
pulse_gen_hw[i].TMR_B->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pusle_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
pusle_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
pusle_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pulse_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
pulse_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
pulse_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
sd_nvic_SetPriority(pusle_gen_hw[i].IRQn, _PRIO_APP_HIGH);
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_B_IRQn, _PRIO_APP_HIGH);
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_A_IRQn, _PRIO_APP_HIGH);
}
for (int i=0; i<2; i++) {
pusle_gen_hw[i].p_pusle_gen[0].VAxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[0].VBxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[0].VAxL = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[0].VBxL = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[1].VAxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[1].VBxH = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[1].VAxL = 0xFFFFFFFF;
pusle_gen_hw[i].p_pusle_gen[1].VBxL = 0xFFFFFFFF;
for (int i = 0; i < 2; i++)
{
pulse_gen_hw[i].p_pulse_gen[0].VAxH = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[0].VBxH = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[0].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[0].VBxL = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[1].VAxH = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[1].VBxH = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[1].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].p_pulse_gen[1].VBxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[0].VAxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[0].VBxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[0].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[0].VBxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[1].VAxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[1].VBxH = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[1].VAxL = 0xFFFFFFFF;
pulse_gen_hw[i].private.p_pulse_gen[1].VBxL = 0xFFFFFFFF;
}
//cpg_pulse_default_demo_ext();
}
#endif
+56 -52
View File
@@ -11,56 +11,57 @@ extern "C"
#include "nrf_gpio.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#define UNDEF_GPIO 0xFFFFFFFF
#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
#define VA1L_PIN NRF_GPIO_PIN_MAP(0, 25)
#define VB1H_PIN NRF_GPIO_PIN_MAP(0, 19)
#define VB1L_PIN NRF_GPIO_PIN_MAP(0, 21)
#define VA2H_PIN NRF_GPIO_PIN_MAP(0, 17)
#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
#define ADPT_CLK NRF_GPIO_PIN_MAP(0, 11)
#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define VB2H_PIN NRF_GPIO_PIN_MAP(0, 8)
#define VB2L_PIN NRF_GPIO_PIN_MAP(0, 6)
#define VA3H_PIN NRF_GPIO_PIN_MAP(0, 5)
#define VA3L_PIN NRF_GPIO_PIN_MAP(0, 27)
#define VB3H_PIN NRF_GPIO_PIN_MAP(0, 26)
#define VB3L_PIN NRF_GPIO_PIN_MAP(0, 4)
#define VA4H_PIN NRF_GPIO_PIN_MAP(0, 1)
#define VA4L_PIN NRF_GPIO_PIN_MAP(0, 0)
#define ADPT_LE_PIN NRF_GPIO_PIN_MAP(0, 31)
#define ADPT_CLR_PIN NRF_GPIO_PIN_MAP(1, 15)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 2)
#define AIN0_PIN NRF_GPIO_PIN_MAP(0, 30)
#define AIN1_PIN NRF_GPIO_PIN_MAP(0, 28)
#define ADPT0_S4_PIN NRF_GPIO_PIN_MAP(1, 12)
#define ADPT0_S3_PIN NRF_GPIO_PIN_MAP(1, 14)
#define ADPT0_S2_PIN NRF_GPIO_PIN_MAP(0, 3)
#define ADPT0_S1_PIN NRF_GPIO_PIN_MAP(1, 13)
#define ADPT1_S4_PIN NRF_GPIO_PIN_MAP(1, 3)
#define ADPT1_S3_PIN NRF_GPIO_PIN_MAP(1, 10)
#define ADPT1_S2_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ADPT1_S1_PIN NRF_GPIO_PIN_MAP(1, 11)
#define LED_R_PIN NRF_GPIO_PIN_MAP(0, 10)
#define LED_G_PIN NRF_GPIO_PIN_MAP(0, 9)
#define LED_B_PIN NRF_GPIO_PIN_MAP(1, 2)
#define VB4H_PIN NRF_GPIO_PIN_MAP(0, 24)
#define VB4L_PIN NRF_GPIO_PIN_MAP(0, 23)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define TW_SDI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define ADPT_DIN_PIN NRF_GPIO_PIN_MAP(0, 7)
#define UNDEF_GPIO 0xFFFFFFFF
#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
#define VA1L_PIN NRF_GPIO_PIN_MAP(0, 25)
#define VB1H_PIN NRF_GPIO_PIN_MAP(0, 19)
#define VB1L_PIN NRF_GPIO_PIN_MAP(0, 21)
#define VA2H_PIN NRF_GPIO_PIN_MAP(0, 17)
#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
#define ADPT_CLK_PIN NRF_GPIO_PIN_MAP(0, 11)
#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
#define VB2H_PIN NRF_GPIO_PIN_MAP(0, 8)
#define VB2L_PIN NRF_GPIO_PIN_MAP(0, 6)
#define VA3H_PIN NRF_GPIO_PIN_MAP(0, 5)
#define VA3L_PIN NRF_GPIO_PIN_MAP(0, 27)
#define VB3H_PIN NRF_GPIO_PIN_MAP(0, 26)
#define VB3L_PIN NRF_GPIO_PIN_MAP(0, 4)
#define VA4H_PIN NRF_GPIO_PIN_MAP(0, 1)
#define VA4L_PIN NRF_GPIO_PIN_MAP(0, 0)
#define ADPT_LE_PIN NRF_GPIO_PIN_MAP(0, 31)
#define ADPT_CLR_PIN NRF_GPIO_PIN_MAP(1, 15)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 2)
#define AIN0_PIN NRF_GPIO_PIN_MAP(0, 30)
#define AIN1_PIN NRF_GPIO_PIN_MAP(0, 28)
#define ADPT0_S4_PIN NRF_GPIO_PIN_MAP(1, 12)
#define ADPT0_S3_PIN NRF_GPIO_PIN_MAP(1, 14)
#define ADPT0_S2_PIN NRF_GPIO_PIN_MAP(0, 3)
#define ADPT0_S1_PIN NRF_GPIO_PIN_MAP(1, 13)
#define ADPT1_S4_PIN NRF_GPIO_PIN_MAP(1, 3)
#define ADPT1_S3_PIN NRF_GPIO_PIN_MAP(1, 10)
#define ADPT1_S2_PIN NRF_GPIO_PIN_MAP(1, 6)
#define ADPT1_S1_PIN NRF_GPIO_PIN_MAP(1, 11)
#define LED_R_PIN NRF_GPIO_PIN_MAP(0, 10)
#define LED_G_PIN NRF_GPIO_PIN_MAP(0, 9)
#define LED_B_PIN NRF_GPIO_PIN_MAP(1, 2)
#define VB4H_PIN NRF_GPIO_PIN_MAP(0, 24)
#define VB4L_PIN NRF_GPIO_PIN_MAP(0, 23)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define TW_SDI_PIN NRF_GPIO_PIN_MAP(0, 7)
#define ADPT_DIN_PIN NRF_GPIO_PIN_MAP(0, 7)
#define UNCONNECTED_PIN NRF_GPIO_PIN_MAP(0, 2)
#define PULSE_ID_NULL 0
#define PULSE_ID_A 1
#define PULSE_ID_B 2
#define PULSE_ID_C 3
#define PULSE_ID_D 4
#define PULSE_ID_NULL 0
#define PULSE_ID_A 1
#define PULSE_ID_B 2
#define PULSE_ID_C 3
#define PULSE_ID_D 4
typedef struct
{
@@ -72,7 +73,7 @@ extern "C"
uint32_t point_us[7]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t pulse_id; // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
} pusle_gen_t;
} pulse_gen_t;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
@@ -82,9 +83,12 @@ extern "C"
uint16_t rx_buffer_length);
void cpg11_io_init(void);
void cpg11_pulse_init(uint32_t hw_idx, pusle_gen_t *p_pusle_gen, uint32_t len);
void cpg11_pulse_start(uint32_t idx, pusle_gen_t *p_pusle_gen);
void cpg11_pulse_stop_by_pulse_id(uint32_t pulse_id);
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
void cpg11_pulse_stop(uint32_t hw_idx);
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
+28
View File
@@ -0,0 +1,28 @@
import os
import sys
import serial.tools.list_ports
def find_com_port(vid, pid):
ports = serial.tools.list_ports.comports()
for port in ports:
if port.vid == vid and port.pid == pid:
print(f"Found device: {port.device}")
print(f"Description: {port.description}")
print(f"HWID: {port.hwid}")
return port.device
print(f"No COM port found for VID={vid:04X}, PID={pid:04X}")
return None
def main(args):
os.chdir(os.path.dirname(os.path.realpath(__file__)))
portname = find_com_port(0x1915, 0x521F)
if portname is None:
return
else:
os.system('nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -b 115200 -p ' + portname)
if __name__ == '__main__':
main(sys.argv)
#nrfutil dfu usb-serial -pkg OTA_bmd380_peripheral.zip -snr DC051F1F71DA
+11 -11
View File
@@ -14,9 +14,9 @@
#include "nrf_log.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
extern ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len);
extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);
static void dummy(uint8_t *ins, uint16_t size)
{
@@ -419,7 +419,7 @@ static void dev_mode_read_output_pin(void)
(output.cs_adc << 1) |
output.cs_dac;
le_event_upadate((uint8_t *)&pin_out_status, sizeof(pin_out_status));
le_event_update((uint8_t *)&pin_out_status, sizeof(pin_out_status));
NRF_LOG_INFO("pin_out_status = 0x%08X", pin_out_status);
NRF_LOG_INFO("| %-32s | %d |", "pin_out_status[31:21] resvd", output.resvd);
@@ -467,7 +467,7 @@ static void dev_mode_read_input_pin(void)
(input.shut_down << 1) |
input.int9466;
le_event_upadate((uint8_t *)&pin_input_status, sizeof(pin_input_status));
le_event_update((uint8_t *)&pin_input_status, sizeof(pin_input_status));
NRF_LOG_INFO("pin_input_status = 0x%08X", pin_input_status);
NRF_LOG_INFO("| %-32s | %d |", "pin_input_status[31:3] resvd", input.resvd);
@@ -670,7 +670,7 @@ static void dev_mode_spi2_transfer(uint8_t *ins, uint16_t size)
if (miso_data_len > 0)
{
le_event_upadate(miso_data, miso_data_len);
le_event_update(miso_data, miso_data_len);
}
}
@@ -845,8 +845,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
.hh = 22,
.mm = 40,
};
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_ver, sizeof(cis_ver));
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_ver, sizeof(cis_ver));
}
__WEAK uint16_t bat_volt_read(void)
@@ -867,8 +867,8 @@ static void cis_volt(uint8_t *ins, uint16_t size)
.opcode = CIS_VOLT,
.volt = bat_volt_read(),
};
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_volt, sizeof(cis_volt));
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_volt, sizeof(cis_volt));
}
__WEAK uint16_t temperature_read(void)
@@ -890,8 +890,8 @@ static void cis_temperature(uint8_t *ins, uint16_t size)
.opcode = CIS_TEMPERATURE,
.temperature = __REV(temperature_read()),
};
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)&cis_temperature, sizeof(cis_temperature));
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)&cis_temperature, sizeof(cis_temperature));
}
static void cis_cali(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
+1 -1
View File
@@ -16,7 +16,7 @@
#include <stdlib.h>
#include <string.h>
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#define OUT_0 DAC0
#define OUT_1 DAC1
+1 -1
View File
@@ -14,7 +14,7 @@
#include "dac_drv.h"
#include "sw_drv.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
//==========================================================
// gpio
+8 -8
View File
@@ -2,11 +2,11 @@
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#include "elite_dev.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc.h"
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "pel.h"
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "cpg.h"
#else
#error "Unknown DEF_ELITE_MODEL"
@@ -102,12 +102,12 @@ void elite_init(void)
{
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
p_instance = dev_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
edc.init();
p_instance = edc.p_elite_instance;
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
p_instance = pel_init();
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
p_instance = cpg_init();
#else
#error "Unknown DEF_ELITE_MODEL"
@@ -120,8 +120,8 @@ void elite_init(void)
void elite_instr_send(void *p, size_t size)
{
/* reply the instruction */
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate(p, size);
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update(p, size);
xMessageBufferSend(instr_msg, p, size, portMAX_DELAY);
}
+10 -9
View File
@@ -2,19 +2,20 @@
#define __ELITE_H__
#ifdef __cplusplus
extern "C" {
extern "C"
{
#endif
#include "app_config.h"
#include "app_error.h"
#include "elite_def.h"
#include "app_config.h"
#include <stdbool.h>
#include <stdint.h>
#include <stdlib.h>
void elite_init(void);
void elite_instr_send(void *p, size_t size);
void elite_init(void);
void elite_instr_send(void *p, size_t size);
ret_code_t le_data_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait);
#ifdef __cplusplus
}
+25 -7
View File
@@ -2,21 +2,37 @@
void elite_board_init(void)
{
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
edc20_io_init();
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
pel10_io_init();
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel20_io_init();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg11_io_init();
#endif
}
void elite_board_demo(void)
{
#if (DEF_ELITE_DEMO_WO_SOFTDEVICE || DEF_ELITE_DEMO_W_SOFTDEVICE)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
extern void pel_pulse_gen_demo(void);
pel_pulse_gen_demo();
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
cpg_pulse_default_demo_ext();
#endif
#endif
}
void elite_board_power_off(void)
{
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
edc20_io_power_off();
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#endif
}
@@ -29,6 +45,8 @@ void elite_drv_init(void)
adc_init();
dac_init();
fs_init();
usbd_init();
uart_init();
#if (DEF_FS_ENABLED && DEF_FS_RTT_DIR)
if (1)
+7 -4
View File
@@ -13,13 +13,15 @@ extern "C"
#include "fs.h"
#include "led_drv.h"
#include "sw_drv.h"
#include "uart_drv.h"
#include "usbd.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
#include "edc20_io.h"
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#include "pel10_io.h"
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#include "pel20_io.h"
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
#include "cpg11_io.h"
#else
#error "Not implemented xxx_io.h"
@@ -28,6 +30,7 @@ extern "C"
void elite_board_init(void);
void elite_board_power_off(void);
void elite_drv_init(void);
void elite_board_demo(void);
#ifdef __cplusplus
}
+6 -10
View File
@@ -21,8 +21,8 @@ static void cis_version(uint8_t *ins, uint16_t size)
VERSION_DATE_HOUR,
VERSION_DATE_MINUTE,
};
extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
le_data_upadate((void *)cis_ver, sizeof(cis_ver));
extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
le_data_update((void *)cis_ver, sizeof(cis_ver));
}
static void vis_rst(uint8_t *ins, uint16_t size)
@@ -30,7 +30,7 @@ static void vis_rst(uint8_t *ins, uint16_t size)
NRF_LOG_INFO("%s", __FUNCTION__);
}
#define UNDEF_GPIO 0xFFFFFFFF
#define UNDEF_GPIO 0xFFFFFFFF
// The GPIO corresponding to the pin
const uint32_t pin_to_gpio_table[] = {
@@ -194,14 +194,10 @@ void dev_mode_gpio_function(uint8_t *ins)
}
case 0x01: {
uint32_t high_low = p_ins->param[0];
uint32_t set_pin[44] = {6, 8, 9, 10, 11, 12, 13, 14, 16, 17,
18, 20, 25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 36, 37, 38, 39, 40, 41, 42, 43,
44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
59, 60, 61, 62};
uint32_t high_low = p_ins->param[0];
uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
for (int i=0; i<sizeof(set_pin) / sizeof(set_pin[0]); i++)
for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
{
set_bmd380_pin_signal(set_pin[i], high_low);
}
+3 -18
View File
@@ -1,29 +1,14 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "app_error.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "ble_advdata.h"
#include "ble_advertising.h"
#include "ble_srv_common.h"
#include "nrf_sdh_ble.h"
#ifdef __cplusplus
}
+3 -19
View File
@@ -1,31 +1,15 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "app_error.h"
#include "ble_conn_state.h"
#include "ble_dfu.h"
#include "ble_dis.h"
#include "nrf_ble_gatt.h"
#include "nrf_log.h"
#ifdef __cplusplus
}
+77 -18
View File
@@ -1,22 +1,27 @@
#include "sdk_common.h"
#ifdef __cplusplus
extern "C"
{
#endif
#include <string.h>
#include "app_config.h"
#include "app_error.h"
#include "ble_conn_state.h"
#include "ble_gatts.h"
#include "ble_srv_common.h"
#include "elite.h"
#include "nrf_sdh_ble.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_sdh_ble.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "message_buffer.h"
#include "task.h"
#include <stdlib.h>
#include <string.h>
#include "elite.h"
#ifdef __cplusplus
}
#endif
#if NRF_MODULE_ENABLED(BLE_ELITE_SRV)
@@ -46,6 +51,8 @@ static elite_context_t elite_context = {
.event_notify_enable = false,
};
static MessageBufferHandle_t async_notify_msg = NULL;
static void on_connect(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
{
taskENTER_CRITICAL();
@@ -100,6 +107,7 @@ static void on_write(elite_context_t *p_context, ble_evt_t const *p_ble_evt)
break;
case BLE_UUID_ELITE_INST_CHAR:
NRF_LOG_INFO("");
NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
elite_instr_send((void *)p_evt_write->data, p_evt_write->len);
break;
@@ -204,17 +212,40 @@ static uint32_t elite_srv_init(void)
// Register a handler for BLE events.
NRF_SDH_BLE_OBSERVER(m_ble_elite_observer, BLE_ELITE_OBSERVER_PRIO, on_ble_evt_handler, &elite_context);
NRF_LOG_INFO("+---------------------+------+");
NRF_LOG_INFO("| data_char_handle | 0x%02x |", elite_context.data_char_handle.value_handle);
NRF_LOG_INFO("| inst_char_handle | 0x%02x |", elite_context.inst_char_handle.value_handle);
NRF_LOG_INFO("| event_char_handle | 0x%02x |", elite_context.event_char_handle.value_handle);
NRF_LOG_INFO("+---------------------+------+");
return NRF_SUCCESS;
}
static void le_elite_srv_async_notify_task(void *p_arg)
{
static uint8_t buf[256];
for (;;)
{
uint32_t size = xMessageBufferReceive(async_notify_msg, buf, sizeof(buf), portMAX_DELAY);
if (size)
{
for (uint32_t i = 0; i < 10; i++)
{
ret_code_t ret = le_event_notify(buf, size);
if (ret == NRF_ERROR_BUSY)
{
vTaskDelay(pdMS_TO_TICKS(5));
}
else
{
break;
}
}
}
}
}
void le_elite_srv_init(void)
{
async_notify_msg = xMessageBufferCreate(10 * 1024);
if (xTaskCreate(le_elite_srv_async_notify_task, "async_notify", 512, NULL, 4, NULL) == pdFALSE)
{
APP_ERROR_CHECK(NRF_ERROR_RESOURCES);
}
ret_code_t err_code = elite_srv_init();
APP_ERROR_CHECK(err_code);
@@ -233,7 +264,7 @@ ret_code_t le_data_notify(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
}
ret_code_t le_data_upadate(uint8_t *p_value, uint16_t len)
ret_code_t le_data_update(uint8_t *p_value, uint16_t len)
{
static uint8_t values[1 + NRF_SDH_BLE_GATT_MAX_MTU_SIZE - 3];
@@ -267,7 +298,7 @@ ret_code_t le_event_notify(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_hvx(elite_context.conn_handle, &hvx_params);
}
ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len)
ret_code_t le_event_update(uint8_t *p_value, uint16_t len)
{
// update database.
ble_gatts_value_t gatts_value = {
@@ -278,4 +309,32 @@ ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len)
return sd_ble_gatts_value_set(BLE_CONN_HANDLE_INVALID, elite_context.event_char_handle.value_handle, &gatts_value);
}
ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait)
{
ret_code_t ret = NRF_SUCCESS;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0)
{
// not inside ISR (Thread mode)
if (ms_to_wait)
{
ret = xMessageBufferSend(async_notify_msg, p_value, len, pdMS_TO_TICKS(ms_to_wait)) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
}
else
{
taskENTER_CRITICAL();
ret = xMessageBufferSend(async_notify_msg, p_value, len, 0) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
taskEXIT_CRITICAL();
}
}
else
{
// inside ISR
ret = xMessageBufferSendFromISR(async_notify_msg, p_value, len, &xHigherPriorityTaskWoken) == len ? NRF_SUCCESS : NRF_ERROR_BUSY;
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
return ret;
}
#endif // NRF_MODULE_ENABLED(BLE_ELITE)
+8 -12
View File
@@ -1,22 +1,18 @@
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include <string.h>
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "app_config.h"
#include "app_error.h"
#include "app_util.h"
#include "ble_gap.h"
#include "nrf_log.h"
#include "app_error.h"
#include "nrf_sdh_ble.h"
#ifdef __cplusplus
}
@@ -64,4 +60,4 @@ void le_gap_disconnect(uint16_t conn_handle, void *p_context)
{
NRF_LOG_DEBUG("Disconnected connection handle %d", conn_handle);
}
}
}
+2 -17
View File
@@ -1,28 +1,13 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "app_error.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "ble_gatt.h"
#include "nrf_ble_gatt.h"
#include "nrf_sdh_ble.h"
#ifdef __cplusplus
}
+17 -28
View File
@@ -1,41 +1,28 @@
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C"
{
#endif
#include <string.h>
#include "app_config.h"
#include "apply_old_config.h"
#include "sdk_config.h"
#include "app_error.h"
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#include "nrf_log_default_backends.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_sdh.h"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "ble_conn_state.h"
#include "ble_dfu.h"
#include "ble_dis.h"
#include "nrf_ble_gatt.h"
#include "ble_srv_common.h"
#include "le_uart_srv.h"
#ifdef __cplusplus
}
#endif
#define MANUFACTURER_NAME "MEMCHIP" /**< Manufacturer. Will be passed to Device Information Service. */
#define HW_REV STRINGIFY(MAJOR_PRODUCT_NUMBER) "." STRINGIFY(MINOR_PRODUCT_NUMBER) "." STRINGIFY(MAJOR_VERSION_NUMBER) "." STRINGIFY(MINOR_VERSION_NUMBER)
#define FW_REV "0.1.0"
#define SER_NUM "0000-00-00-00001"
#define MODULE_NAME ELITE_DEVICE_NAME
#define MANUFACTURER_NAME "Wisetop Technology Co." /**< Manufacturer. Will be passed to Device Information Service. */
#define SERIAL_NUMBER "0000-00-00-00001"
#define MODEL_NUMBER ELITE_HW_NAME
#define HARDWARE_REVISION STRINGIFY(MAJOR_PRODUCT_NUMBER) "." STRINGIFY(MINOR_PRODUCT_NUMBER) "." STRINGIFY(MAJOR_VERSION_NUMBER) "." STRINGIFY(MINOR_VERSION_NUMBER)
#define FIRMWARE_REVISION "0.1.0"
static void le_dis_init(void)
{
@@ -46,10 +33,10 @@ static void le_dis_init(void)
memset(&sys_id, 0, sizeof(sys_id));
ble_srv_ascii_to_utf8(&dis_init.manufact_name_str, MANUFACTURER_NAME);
ble_srv_ascii_to_utf8(&dis_init.fw_rev_str, FW_REV);
ble_srv_ascii_to_utf8(&dis_init.hw_rev_str, HW_REV);
ble_srv_ascii_to_utf8(&dis_init.model_num_str, MODULE_NAME);
ble_srv_ascii_to_utf8(&dis_init.serial_num_str, SER_NUM);
ble_srv_ascii_to_utf8(&dis_init.fw_rev_str, FIRMWARE_REVISION);
ble_srv_ascii_to_utf8(&dis_init.hw_rev_str, HARDWARE_REVISION);
ble_srv_ascii_to_utf8(&dis_init.model_num_str, MODEL_NUMBER);
ble_srv_ascii_to_utf8(&dis_init.serial_num_str, SERIAL_NUMBER);
dis_init.p_sys_id = &sys_id;
dis_init.dis_char_rd_sec = SEC_OPEN;
@@ -66,4 +53,6 @@ void le_srv_init(void)
extern void le_elite_srv_init(void);
le_elite_srv_init(); // customer service
le_uart_srv_init(); // customer service
}
+246
View File
@@ -0,0 +1,246 @@
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "app_error.h"
#include "sdk_common.h"
#include "ble.h"
#include "ble_srv_common.h"
#include "le_uart_srv.h"
#include "uart_drv.h"
#include "nrf_log.h"
#include "nrf_sdh_ble.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "task.h"
#include <string.h>
#ifdef __cplusplus
}
#endif
#if NRF_MODULE_ENABLED(BLE_UART_SRV)
#define BLE_UUID_UART_SERVICE 0x0001 /**< The UUID of the Service. */
#define BLE_UUID_UART_RX_CHAR 0x0002 /**< The UUID of the RX Characteristic. */
#define BLE_UUID_UART_TX_CHAR 0x0003 /**< The UUID of the TX Characteristic. */
#define BLE_UUID_UART_BAUD_CHAR 0x0004 /**< The UUID of the Baud Characteristic. */
#define BLE_UART_BASE_UUID \
{ \
{ \
0x9E, 0xCA, 0xDC, 0x24, 0x0E, 0xE5, 0xA9, 0xE0, 0x93, 0xF3, 0xA3, 0xB5, 0x00, 0x00, 0x40, 0x6E \
} \
} /**< Used vendor specific UUID. */
#define DEF_BAUD_RATE 115200
typedef struct
{
uint16_t conn_handle;
uint16_t service_handle;
ble_gatts_char_handles_t rx_handle;
ble_gatts_char_handles_t tx_handle;
ble_gatts_char_handles_t baud_handle;
bool tx_notify_enable;
uint8_t rx_buf[BLE_UART_MAX_DATA_LEN];
uint8_t tx_buf[BLE_UART_MAX_DATA_LEN];
uint32_t baudrate;
} ble_uart_context_t;
static ble_uart_context_t ble_uart_context = {
.conn_handle = BLE_CONN_HANDLE_INVALID,
.tx_notify_enable = false,
.baudrate = DEF_BAUD_RATE
};
static void on_connect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
taskENTER_CRITICAL();
p_context->conn_handle = p_ble_evt->evt.common_evt.conn_handle;
taskEXIT_CRITICAL();
}
static void on_disconnect(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
taskENTER_CRITICAL();
p_context->conn_handle = BLE_CONN_HANDLE_INVALID;
p_context->tx_notify_enable = false;
taskEXIT_CRITICAL();
}
static void ble_uart_ccc_update(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
if (p_evt_write->handle == p_context->tx_handle.cccd_handle)
{
p_context->tx_notify_enable = ble_srv_is_notification_enabled(p_evt_write->data);
NRF_LOG_INFO("data_notify:%s", p_context->tx_notify_enable ? "enable" : "disable");
}
}
static void on_write(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
ble_uuid_t uuid = p_ble_evt->evt.gatts_evt.params.write.uuid;
uint16_t handle = p_ble_evt->evt.gatts_evt.params.write.handle;
ble_gatts_evt_write_t const *p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
switch (uuid.uuid)
{
case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG:
ble_uart_ccc_update(p_ble_evt, p_context);
break;
case BLE_UUID_UART_RX_CHAR:
NRF_LOG_INFO("RX:");
NRF_LOG_HEXDUMP_INFO(p_evt_write->data, p_evt_write->len);
uart_send((void *)p_evt_write->data, p_evt_write->len);
break;
case BLE_UUID_UART_BAUD_CHAR:
NRF_LOG_INFO("BAUD: %d", *(uint32_t *)p_evt_write->data);
uart_set_baud(*(uint32_t *)p_evt_write->data);
break;
default:
break;
}
}
static void on_hvx_tx_complete(ble_evt_t const *p_ble_evt, ble_uart_context_t *p_context)
{
// TODO...
}
static void on_ble_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
{
switch (p_ble_evt->header.evt_id)
{
case BLE_GAP_EVT_CONNECTED:
on_connect(p_ble_evt, p_context);
break;
case BLE_GAP_EVT_DISCONNECTED:
on_disconnect(p_ble_evt, p_context);
break;
case BLE_GATTS_EVT_WRITE:
on_write(p_ble_evt, p_context);
break;
case BLE_GATTS_EVT_HVN_TX_COMPLETE:
on_hvx_tx_complete(p_ble_evt, p_context);
default:
// No implementation needed.
break;
}
}
static ret_code_t add_rx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->rx_buf);
add_char_params.init_len = 0;
add_char_params.p_init_value = (void *)context->rx_buf;
add_char_params.is_var_len = true;
add_char_params.write_access = SEC_OPEN;
add_char_params.char_props.write = 1;
add_char_params.char_props.write_wo_resp = 1;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->rx_handle);
return err_code;
}
static ret_code_t add_tx_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->tx_buf);
add_char_params.init_len = 0;
add_char_params.p_init_value = (void *)context->tx_buf;
add_char_params.is_value_user = true;
add_char_params.is_var_len = true;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
add_char_params.cccd_write_access = SEC_OPEN;
add_char_params.char_props.notify = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->tx_handle);
return err_code;
}
static ret_code_t add_baud_characteristic(uint16_t uuid, uint8_t uuid_type, ble_uart_context_t *context)
{
ble_add_char_params_t add_char_params;
memset(&add_char_params, 0, sizeof(add_char_params));
add_char_params.uuid = uuid;
add_char_params.uuid_type = uuid_type;
add_char_params.max_len = sizeof(context->baudrate);
add_char_params.init_len = sizeof(context->baudrate);
add_char_params.p_init_value = (void *)&context->baudrate;
add_char_params.is_value_user = true;
add_char_params.is_var_len = false;
add_char_params.write_access = SEC_OPEN;
add_char_params.char_props.write = 1;
add_char_params.read_access = SEC_OPEN;
add_char_params.char_props.read = 1;
ret_code_t err_code = characteristic_add(context->service_handle, &add_char_params, &context->baud_handle);
return err_code;
}
void le_uart_srv_init(void)
{
ret_code_t err_code;
ble_uuid128_t nus_base_uuid = BLE_UART_BASE_UUID;
uint8_t uuid_type = 0;
ble_uuid_t ble_uuid;
/**@snippet [Adding proprietary Service to the SoftDevice] */
// Add a custom base UUID.
err_code = sd_ble_uuid_vs_add(&nus_base_uuid, &uuid_type);
APP_ERROR_CHECK(err_code);
// Add the service.
ble_uuid.type = uuid_type;
ble_uuid.uuid = BLE_UUID_UART_SERVICE;
err_code = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
&ble_uuid,
&ble_uart_context.service_handle);
APP_ERROR_CHECK(err_code);
// Add rx char
err_code = add_rx_characteristic(BLE_UUID_UART_RX_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Add tx char
err_code = add_tx_characteristic(BLE_UUID_UART_TX_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Add baud char
err_code = add_baud_characteristic(BLE_UUID_UART_BAUD_CHAR, ble_uuid.type, &ble_uart_context);
APP_ERROR_CHECK(err_code);
// Register a handler for BLE events.
NRF_SDH_BLE_OBSERVER(m_ble_uart_observer, BLE_UART_OBSERVER_PRIO, on_ble_evt_handler, &ble_uart_context);
}
ret_code_t le_uart_notify(uint8_t *p_value, uint16_t len)
{
ble_gatts_hvx_params_t hvx_params = {
.handle = ble_uart_context.tx_handle.value_handle,
.type = BLE_GATT_HVX_NOTIFICATION,
.offset = 0,
.p_len = &len,
.p_data = p_value,
};
return sd_ble_gatts_hvx(ble_uart_context.conn_handle, &hvx_params);
}
#endif
+21
View File
@@ -0,0 +1,21 @@
#ifndef __LE_UART_SRV_H__
#define __LE_UART_SRV_H__
#include "app_config.h"
#include "sdk_errors.h"
#define OPCODE_LENGTH 1
#define HANDLE_LENGTH 2
/**@brief Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
#if defined(NRF_SDH_BLE_GATT_MAX_MTU_SIZE) && (NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 0)
#define BLE_UART_MAX_DATA_LEN (NRF_SDH_BLE_GATT_MAX_MTU_SIZE - OPCODE_LENGTH - HANDLE_LENGTH)
#else
#define BLE_UART_MAX_DATA_LEN (BLE_GATT_MTU_SIZE_DEFAULT - OPCODE_LENGTH - HANDLE_LENGTH)
#warning NRF_SDH_BLE_GATT_MAX_MTU_SIZE is not defined.
#endif
void le_uart_srv_init(void);
ret_code_t le_uart_notify(uint8_t * p_value, uint16_t len);
#endif // !__LE_UART_SRV_H__
+18
View File
@@ -17,6 +17,9 @@ extern "C"
#include "nrf_sdh_ble.h"
#include "nrf_sdh_freertos.h"
#include "nrf_drv_clock.h"
#include "nrf_drv_power.h"
#ifdef __cplusplus
}
#endif
@@ -101,6 +104,13 @@ static void nrf_sdh_freertos_task_hook(void *p_context)
elite_board_init();
#if DEF_ELITE_DEMO_WO_SOFTDEVICE
elite_board_demo();
for (;;)
{
}
#endif
elite_drv_init();
le_stack_Init(); // enable ble stack, but unscannable!! register "le_evt_handler" handle(CB)
@@ -116,6 +126,10 @@ static void nrf_sdh_freertos_task_hook(void *p_context)
extern void le_adv_init(uint8_t ble_conn_cfg_tag);
le_adv_init(APP_BLE_CONN_CFG_TAG); // could be scanned
#if DEF_ELITE_DEMO_W_SOFTDEVICE
elite_board_demo();
#endif
}
int main(void)
@@ -123,6 +137,10 @@ int main(void)
NRF_LOG_INIT(NULL, 0);
NRF_LOG_DEFAULT_BACKENDS_INIT();
NRF_LOG_INFO("%s Build: %s %s", ELITE_DEVICE_NAME, __TIME__, __DATE__);
NRF_LOG_INFO("[Board] HW ver: %d.%d.%d.%d(%s)", MAJOR_PRODUCT_NUMBER, MINOR_PRODUCT_NUMBER, MAJOR_VERSION_NUMBER, MINOR_VERSION_NUMBER, ELITE_HW_NAME);
nrf_drv_power_init(NULL);
nrf_drv_clock_init();
nrf_sdh_freertos_init(nrf_sdh_freertos_task_hook, NULL); // create event: softdevice_task - wireless protocal stack
+190
View File
@@ -0,0 +1,190 @@
#include "max14802.h"
#include "elite_board.h"
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "string.h"
#pragma GCC optimize("O2")
#if (DEF_MAX14802_ENABLED)
static sw_t m_sw = { .val = UINT64_MAX };
#define EXCLUDE_IO_ENABLE 1
#define EXCLUDE_IO_DISABLE 0
static const uint32_t exclude_io[64] = {
ADPT0_S1_PIN,
ADPT0_S2_PIN,
ADPT0_S3_PIN,
ADPT0_S4_PIN,
ADPT1_S1_PIN,
ADPT1_S2_PIN,
ADPT1_S3_PIN,
ADPT1_S4_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
UNCONNECTED_PIN,
};
static void shift_out(uint8_t *p, uint32_t len)
{
nrf_gpio_pin_set(ADPT_LE_PIN);
for (int32_t j = len; j > 0; j--)
{
uint32_t val = p[j - 1];
for (uint32_t i = 0x01 << (SW_PER_BYTE - 1); i > 0; i >>= 1)
{
nrf_gpio_pin_clear(ADPT_CLK_PIN);
nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
nrf_gpio_pin_set(ADPT_CLK_PIN);
nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
}
}
nrf_gpio_pin_clear(ADPT_CLK_PIN);
nrf_gpio_pin_clear(ADPT_DIN_PIN);
nrf_gpio_pin_clear(ADPT_LE_PIN);
nrf_gpio_pin_set(ADPT_LE_PIN);
}
int max14802_reset(void)
{
m_sw.val = 0;
shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
return 0;
}
int max14802_write(sw_t sw_mask)
{
if (m_sw.val != sw_mask.val)
{
m_sw = sw_mask;
// Disable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT
for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
{
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
}
nrf_delay_ms(1);
// Set max14082
shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
// Enable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT are all disable when all max14082 off
if (m_sw.val == 0)
{
nrf_delay_ms(1);
for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
{
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_ENABLE);
}
}
}
return 0;
}
int max14802_read(sw_t *p_sw_mask)
{
*p_sw_mask = m_sw;
return 0;
}
int max14802_get_sw_count(uint32_t *p_sw_count)
{
*p_sw_count = SW_TOTAL_COUNT;
return 0;
}
int max14802_init(void)
{
nrf_gpio_pin_set(ADPT_CLR_PIN);
nrf_gpio_pin_set(ADPT_LE_PIN);
nrf_gpio_pin_clear(ADPT_CLK_PIN);
nrf_gpio_pin_clear(ADPT_DIN_PIN);
nrf_gpio_cfg_output(ADPT_CLR_PIN);
nrf_gpio_cfg_output(ADPT_LE_PIN);
nrf_gpio_cfg_output(ADPT_CLK_PIN);
nrf_gpio_cfg_output(ADPT_DIN_PIN);
for (uint32_t i = 0; i < COUNTOF(exclude_io); i++)
{
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
}
max14802_write((sw_t) { .val = 0 });
nrf_gpio_pin_clear(ADPT_CLR_PIN);
return 0;
}
const sw_drv_if_t max14802 = {
.init = max14802_init,
.reset = max14802_reset,
.write = max14802_write,
.read = max14802_read,
.get_sw_count = max14802_get_sw_count,
};
#endif
+31
View File
@@ -0,0 +1,31 @@
#ifndef __MAX14802_H__
#define __MAX14802_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "sw_drv_if.h"
#if (DEF_MAX14802_ENABLED)
#define MAX14802_COUNT 1
#define SW_PER_MAX14802 16
#define SW_TOTAL_COUNT (SW_PER_MAX14802 * MAX14802_COUNT)
#define SW_PER_BYTE 8
#if (SW_TOTAL_COUNT > 64)
#error "unsupport"
#endif /* ! SW_TOTAL_COUNT */
extern const sw_drv_if_t max14802;
#endif /* ! DEF_MAX14802_ENABLED */
#ifdef __cplusplus
}
#endif
#endif // !__MAX14802_H__
+1 -1
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File diff suppressed because one or more lines are too long
+32 -30
View File
@@ -2,8 +2,8 @@
<EmbeddedProfile xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<ToolchainID>com.visualgdb.arm-eabi</ToolchainID>
<ToolchainVersion>
<GCC>13.3.1</GCC>
<GDB>15.1</GDB>
<GCC>14.2.1</GCC>
<GDB>15.2</GDB>
<Revision>2</Revision>
</ToolchainVersion>
<BspID>com.sysprogs.arm.nordic.nrf5x</BspID>
@@ -53,32 +53,33 @@
<BSPSourceFolderName>Device-specific files</BSPSourceFolderName>
<MCUMakFile>nrf5x.mak</MCUMakFile>
<ReferencedFrameworks>
<string>com.sysprogs.arm.nordic.nrf5x.periph_legacy</string>
<string>com.sysprogs.arm.nordic.nrf5x.util</string>
<string>com.sysprogs.arm.nordic.nrf5x.drivers_nrf</string>
<string>com.sysprogs.arm.nordic.nrf5x.libraries</string>
<string>com.sysprogs.arm.nordic.nrf5x.modules_nrfx</string>
<string>com.sysprogs.arm.nordic.nrf5x.periph_legacy</string>
<string>com.sysprogs.arm.nordic.nrf5x.drivers_nrf</string>
</ReferencedFrameworks>
<FrameworkProperties>
<Entries>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.nrf_soc_nosd</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.radio_config</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.sdio</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.spi_master</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.twi_master</Key>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.spi</Key>
<Value>none</Value>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.swi</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.twi</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.uart</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.clock</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.libraries.atomic_fifo</Key>
<Value>yes</Value>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.libraries.atomic_flags</Key>
@@ -246,27 +247,28 @@
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.libraries.usbd</Key>
<Value />
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.libraries.fprintf</Key>
<Value>yes</Value>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.spi</Key>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.nrf_soc_nosd</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.radio_config</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.sdio</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.spi_master</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.drivers_nrf.twi_master</Key>
<Value>none</Value>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.swi</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.twi</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.uart</Key>
</KeyValue>
<KeyValue>
<Key>com.sysprogs.bspoptions.nrf5x.legacy_drivers.clock</Key>
</KeyValue>
</Entries>
</FrameworkProperties>
<TestFrameworkProperties>
BIN
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+726 -461
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+42 -25
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@@ -2,38 +2,55 @@
#define __PEL_H__
#ifdef __cplusplus
extern "C" {
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "elite.h"
#include "elite_board.h"
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
#define PEL_2P0R_MASK (0x01 << 2)
#define PEL_4P0R_MASK (0x01 << 3)
#define PEL_8P0R_MASK (0x01 << 4)
#define PEL_16P2R_MASK (0x01 << 5)
#define PEL_32P4R_MASK (0x01 << 6)
#define PEL_63P4R_MASK (0x01 << 7)
#define PEL_127R_MASK (0x01 << 8)
#define PEL_255R_MASK (0x01 << 9)
#define PEL_511R_MASK (0x01 << 10)
#define PEL_1000R_MASK (0x01 << 11)
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 3
#define VERSION_DATE_DAY 31
#define VERSION_DATE_HOUR 10
#define VERSION_DATE_MINUTE 45
typedef struct
{
int32_t output_r1;
int32_t output_r2;
int32_t output_vo;
int32_t output_vc;
int32_t output_ve;
} pel_output_t;
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
#define PEL_2P0R_MASK (0x01 << 2)
#define PEL_4P0R_MASK (0x01 << 3)
#define PEL_8P0R_MASK (0x01 << 4)
#define PEL_16P2R_MASK (0x01 << 5)
#define PEL_32P4R_MASK (0x01 << 6)
#define PEL_63P4R_MASK (0x01 << 7)
#define PEL_127R_MASK (0x01 << 8)
#define PEL_255R_MASK (0x01 << 9)
#define PEL_511R_MASK (0x01 << 10)
#define PEL_1000R_MASK (0x01 << 11)
void pel_relays_set(uint32_t measure_out);
pel_output_t pel_smaple_and_convt_all(uint32_t measure_out, uint32_t load_mask);
const elite_instance_t *pel_init(void);
typedef struct __PACKED
{
uint16_t mem_board_id : 8;
uint16_t packet_seq : 8;
uint32_t notify_time;
int32_t output_vo_raw;
int32_t output_vc_raw;
int32_t output_ve_raw;
float hold_OUT_v;
float hold_VCC_v;
float hold_VEE_v;
uint16_t resis_pattern_id;
uint16_t resis_bitsmask;
float resis_g_value;
uint32_t mode_complete : 4;
uint32_t rsvd : 28;
uint32_t val_1;
uint32_t val_2;
uint16_t val_3;
} scan_mode_notify_packet_t;
const elite_instance_t *pel_init(void);
#ifdef __cplusplus
}
-248
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@@ -1,248 +0,0 @@
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "nrf_spim.h"
#include "nrf_timer.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length)
{
__disable_irq();
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
switch (spi_mode)
{
default:
case NRF_SPIM_MODE_0:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_1:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_2:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_3:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
}
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
NRF_SPIM3->TXD.PTR = (uint32_t)p_tx_buffer;
NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
NRF_SPIM3->RXD.PTR = (uint32_t)p_rx_buf;
nrf_gpio_pin_clear(cs_pin);
NRF_SPIM3->EVENTS_END = 0;
NRF_SPIM3->TASKS_START = 1;
do {
} while (NRF_SPIM3->EVENTS_END == 0);
nrf_gpio_pin_set(cs_pin);
__enable_irq();
}
#define MIN_PULSE_WIDTH 2
#define MIN_PULSE_IDLE 2
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
typedef struct
{
uint32_t anode_pin;
uint32_t cathode_pin;
uint32_t pulse_idle; // min: 2, max: 32767, unit: us
uint32_t pulse_width; // min: 2, max: 32767, unit: us,
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
} pusle_gen_t;
typedef struct
{
uint32_t gpiote_idx[2];
NRF_TIMER_Type *pulse_tmr;
uint32_t pulse_irq_n;
uint32_t pulse_cnt;
} pusle_gen_hw_t;
pusle_gen_hw_t pusle_gen_hw = {
.gpiote_idx = {0, 1},
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
};
void TIMER3_IRQHandler(void)
{
if (pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1])
{
pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1] = 0;
pusle_gen_hw.pulse_cnt--;
if (pusle_gen_hw.pulse_cnt == 1)
{
pusle_gen_hw.pulse_tmr->SHORTS |= NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
}
}
}
bool pel10_pulse_gen(pusle_gen_t *p_pusle_gen)
{
/* hardware limitation */
if (p_pusle_gen->pulse_cnt == 0 ||
p_pusle_gen->pulse_idle < MIN_PULSE_IDLE ||
p_pusle_gen->pulse_width < MIN_PULSE_WIDTH ||
p_pusle_gen->pulse_idle > MAX_PULSE_IDLE ||
p_pusle_gen->pulse_width > MAX_PULSE_WIDTH)
{
return false;
}
pusle_gen_hw.pulse_cnt = p_pusle_gen->pulse_cnt;
pusle_gen_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pusle_gen_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pusle_gen_hw.pulse_irq_n);
nrf_gpiote_task_configure(pusle_gen_hw.gpiote_idx[0], p_pusle_gen->anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
nrf_gpiote_task_configure(pusle_gen_hw.gpiote_idx[1], p_pusle_gen->cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_enable(pusle_gen_hw.gpiote_idx[0]);
nrf_gpiote_task_enable(pusle_gen_hw.gpiote_idx[1]);
NRF_PPI->CH[0].EEP = (uint32_t)&pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[0]];
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[1]];
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[0]];
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[1]];
NRF_PPI->CHENSET = (1 << (1));
pusle_gen_hw.pulse_tmr->TASKS_CLEAR = 1;
pusle_gen_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
pusle_gen_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
pusle_gen_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pusle_gen_hw.pulse_tmr->CC[0] = p_pusle_gen->pulse_idle * 16;
pusle_gen_hw.pulse_tmr->CC[1] = pusle_gen_hw.pulse_tmr->CC[0] + p_pusle_gen->pulse_width * 16;
pusle_gen_hw.pulse_tmr->SHORTS = pusle_gen_hw.pulse_cnt > 1 ? NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK : NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
pusle_gen_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE1_MASK;
sd_nvic_SetPriority(pusle_gen_hw.pulse_irq_n, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(pusle_gen_hw.pulse_irq_n);
pusle_gen_hw.pulse_tmr->TASKS_START = 1;
return true;
}
void pel10_pulse_gen_demo(void)
{
pusle_gen_t pusle_gen = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.pulse_width = 10,
.pulse_idle = 10,
.pulse_cnt = 0xFFFFFFFF
};
if (pel10_pulse_gen(&pusle_gen) == false)
{
// fail handling
}
}
void pel10_io_init(void)
{
const uint32_t pel_pins_default_high[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN
};
const uint32_t pel_pins_default_low[] = {
ANODE_PIN,
CATHODE_PIN,
SAMPLE_R_PIN,
SAMPLE_V_PIN,
RELAY1_PIN,
RELAY2_PIN
};
for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
{
nrf_gpio_pin_set(pel_pins_default_high[i]);
nrf_gpio_cfg_output(pel_pins_default_high[i]);
}
for (int i = 0; i < COUNTOF(pel_pins_default_low); i++)
{
nrf_gpio_pin_clear(pel_pins_default_low[i]);
nrf_gpio_cfg_output(pel_pins_default_low[i]);
}
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->ORC = 0x00000000;
NRF_SPIM3->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M32;
NRF_SPIM3->CSNPOL = SPIM_CSNPOL_CSNPOL_LOW;
NRF_SPIM3->IFTIMING.CSNDUR = 8;
NRF_SPIM3->PSEL.CSN = CS_MEM_PIN;
NRF_SPIM3->PSEL.SCK = SPIM_CLK_PIN;
NRF_SPIM3->PSEL.MOSI = SPIM_MOSI_PIN;
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
pel10_pulse_gen_demo();
}
#endif
-76
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@@ -1,76 +0,0 @@
#ifndef __PEL10_IO_H__
#define __PEL10_IO_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
#define RELAY1_PIN NRF_GPIO_PIN_MAP(1, 10)
#define RELAY2_PIN NRF_GPIO_PIN_MAP(1, 15)
#define SAMPLE_R_PIN NRF_GPIO_PIN_MAP(1, 11)
#define SAMPLE_V_PIN NRF_GPIO_PIN_MAP(1, 6)
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 7)
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 8)
#define OUTPUT_R1_PIN NRF_GPIO_PIN_MAP(0, 31)
#define OUTPUT_R2_PIN NRF_GPIO_PIN_MAP(0, 28)
#define OUTPUT_VO_PIN NRF_GPIO_PIN_MAP(0, 29)
#define OUTPUT_VC_PIN NRF_GPIO_PIN_MAP(0, 3)
#define OUTPUT_VE_PIN NRF_GPIO_PIN_MAP(0, 2)
#define OUTPUT_R1_CHANNEL 7
#define OUTPUT_R2_CHANNEL 4
#define OUTPUT_VO_CHANNEL 5
#define OUTPUT_VC_CHANNEL 1
#define OUTPUT_VE_CHANNEL 0
#define OUTPUT_R1_IDX 0
#define OUTPUT_R2_IDX 1
#define OUTPUT_VO_IDX 2
#define OUTPUT_VC_IDX 3
#define OUTPUT_VE_IDX 4
#define INPUT_1_PIN NRF_GPIO_PIN_MAP(0, 15)
#define INPUT_2_PIN NRF_GPIO_PIN_MAP(0, 13)
#define INPUT_3_PIN NRF_GPIO_PIN_MAP(0, 20)
#define INPUT_4_PIN NRF_GPIO_PIN_MAP(1, 0)
#define INPUT_5_PIN NRF_GPIO_PIN_MAP(0, 25)
#define INPUT_6_PIN NRF_GPIO_PIN_MAP(0, 11)
#define INPUT_7_PIN NRF_GPIO_PIN_MAP(0, 14)
#define INPUT_8_PIN NRF_GPIO_PIN_MAP(0, 17)
#define INPUT_9_PIN NRF_GPIO_PIN_MAP(0, 18)
#define INPUT_10_PIN NRF_GPIO_PIN_MAP(0, 21)
#define INPUT_11_PIN NRF_GPIO_PIN_MAP(0, 19)
#define INPUT_12_PIN NRF_GPIO_PIN_MAP(0, 22)
#define WP_MEM_PIN NRF_GPIO_PIN_MAP(0, 12)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 6)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 27)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 4)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void pel10_io_init(void);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL10_IO_H__ */
+423
View File
@@ -0,0 +1,423 @@
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "nrf_spim.h"
#include "nrf_timer.h"
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
#include "SEGGER_RTT.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
pel_hw_t pel_hw = {
.pulse_tmr = NRF_TIMER3,
.pulse_irq_n = TIMER3_IRQn,
.pulse_cnt = 0,
.adc.channels = {
[OUTPUT_R1_IDX] = OUTPUT_R1_CHANNEL,
[OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
[OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
[OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
[OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL},
.adc.gain = NRF_SAADC_GAIN1_6,
.adc.smaple_time = NRF_SAADC_ACQTIME_3US
};
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length)
{
__disable_irq();
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
switch (spi_mode)
{
default:
case NRF_SPIM_MODE_0:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_1:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_2:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
break;
case NRF_SPIM_MODE_3:
NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
(SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
(SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
break;
}
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
NRF_SPIM3->TXD.PTR = (uint32_t)p_tx_buffer;
NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
NRF_SPIM3->RXD.PTR = (uint32_t)p_rx_buf;
nrf_gpio_pin_clear(cs_pin);
NRF_SPIM3->EVENTS_END = 0;
NRF_SPIM3->TASKS_START = 1;
do {
} while (NRF_SPIM3->EVENTS_END == 0);
nrf_gpio_pin_set(cs_pin);
__enable_irq();
}
#define MIN_PULSE_WIDTH 2
#define MIN_PULSE_IDLE 2
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
void set_anode_cathode_to_default(void)
{
if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_clear(CATHODE_PIN);
nrf_gpio_pin_clear(SAMPLE_R_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
nrf_gpio_pin_clear(RELAY1_PIN);
}
else if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_set(CATHODE_PIN);
nrf_gpio_pin_clear(SAMPLE_R_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
nrf_gpio_pin_clear(RELAY1_PIN);
}
}
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
NRF_SAADC->EVENTS_STOPPED = 0;
NRF_SAADC->TASKS_STOP = 1;
do {
} while (NRF_SAADC->EVENTS_STOPPED == 0);
/* disable ssadc */
NRF_SAADC->ENABLE = 0;
/*
ref: p.381, nrf52840_PS_v1.1.pdf
Note: Oversampling should only be used when a single input channel is enabled, as averaging is
performed over all enabled channels.
*/
NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
/* config analog inputs */
for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
{
if (i < COUNTOF(p_adc->channels))
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG =
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
(NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
(p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
(NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
(p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
(NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
(NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
}
else
{
NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
NRF_SAADC->CH[i].CONFIG = 0;
}
}
/* enable ssadc */
NRF_SAADC->INTENSET = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
NRF_SAADC->ENABLE = 1;
NRF_SAADC->RESULT.PTR = (uint32_t)p_adc->results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
}
void TIMER3_IRQHandler(void)
{
if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
{
pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
pel_hw.pulse_is_running = 1;
if (pel_hw.pulse_cnt)
{
pel_hw.pulse_cnt--;
}
}
}
void SAADC_IRQHandler(void)
{
if (NRF_SAADC->EVENTS_STARTED)
{
NRF_SAADC->EVENTS_STARTED = 0;
if (pel_hw.pulse_cnt == 0)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
}
return;
}
if (NRF_SAADC->EVENTS_END)
{
NRF_SAADC->EVENTS_END = 0;
NRF_SAADC->RESULT.PTR = (uint32_t)pel_hw.adc.results;
NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
pel_hw.pulse_is_running = 0;
if (pel_hw.adc.convt_new_arrival_cb)
{
pel_hw.adc.convt_new_arrival_cb();
}
}
}
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
pel_hw.pulse_cnt = cfg.pulse_cnt;
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
for (int i = 0; i < 5; i++)
{
nrf_gpiote_task_disable(i);
}
set_anode_cathode_to_default();
// config gpiote task
switch (cfg.mode)
{
default:
case 1:
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
break;
case 0:
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
break;
}
nrf_gpiote_task_configure(2, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
}
// enable gpio task
for (int i = 0; i < 5; i++)
{
nrf_gpiote_task_enable(i);
}
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
if (cfg.test_pin != 0xFFFFFFFF)
{
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
NRF_PPI->CHENSET = (1 << (6));
NRF_PPI->CH[7].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CH[7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
NRF_PPI->CHENSET = (1 << (7));
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
pel_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
pel_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
pel_hw.pulse_tmr->CC[0] = cfg.point_us[0] * 16;
pel_hw.pulse_tmr->CC[1] = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
pel_hw.pulse_tmr->CC[2] = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
pel_hw.pulse_tmr->CC[3] = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
pel_hw.pulse_tmr->CC[4] = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
pel_hw.pulse_tmr->CC[5] = pel_hw.pulse_tmr->CC[4];
pel_hw.pulse_tmr->SHORTS = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
pel_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE0_MASK;
sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(SAADC_IRQn);
sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
}
void pel_pulse_gen_start(void)
{
pel_hw.pulse_tmr->TASKS_START = 1;
}
void pel_pulse_gen_stop(void)
{
pel_hw.pulse_cnt = 0;
do {
} while (pel_hw.pulse_is_running == 1);
pel_hw.adc.convt_new_arrival_cb = NULL;
}
#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.smaple_r_pin = SAMPLE_R_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
.mode = BOARD_IOPx,
.point_us = {
10000,
3,
5,
2,
0,
},
.pulse_cnt = 0xFFFFFFFF,
.gain = NRF_SAADC_GAIN1_6,
.smaple_time = NRF_SAADC_ACQTIME_10US,
.adc_timing_shift = 0,
};
pel_pulse_gen_init(pel_cfg);
pel_pulse_gen_start();
for (;;)
{
static uint32_t i = 0;
vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
}
}
void pel_pulse_gen_demo(void)
{
}
#endif
void pel20_io_init(void)
{
const uint32_t pel_pins_default_high[] = {
INPUT_1_PIN,
INPUT_2_PIN,
INPUT_3_PIN,
INPUT_4_PIN,
INPUT_5_PIN,
INPUT_6_PIN,
INPUT_7_PIN,
INPUT_8_PIN,
INPUT_9_PIN,
INPUT_10_PIN,
INPUT_11_PIN,
INPUT_12_PIN
};
for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
{
nrf_gpio_pin_set(pel_pins_default_high[i]);
nrf_gpio_cfg_output(pel_pins_default_high[i]);
}
set_anode_cathode_to_default();
nrf_gpio_cfg_output(ANODE_PIN);
nrf_gpio_cfg_output(CATHODE_PIN);
nrf_gpio_cfg_output(SAMPLE_R_PIN);
nrf_gpio_cfg_output(SAMPLE_V_PIN);
nrf_gpio_cfg_output(TP1_PIN);
nrf_gpio_cfg_output(TP2_PIN);
nrf_gpio_cfg_output(RELAY1_PIN);
// Config spi module
nrf_gpio_pin_set(WP_MEM_PIN);
nrf_gpio_cfg_output(WP_MEM_PIN);
nrf_gpio_pin_set(CS_MEM_PIN);
nrf_gpio_cfg_output(CS_MEM_PIN);
nrf_gpio_pin_clear(SPIM_MOSI_PIN);
nrf_gpio_cfg_output(SPIM_MOSI_PIN);
nrf_gpio_pin_clear(SPIM_CLK_PIN);
nrf_gpio_cfg_output(SPIM_CLK_PIN);
nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
NRF_SPIM3->ORC = 0x00000000;
NRF_SPIM3->FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M32;
NRF_SPIM3->CSNPOL = SPIM_CSNPOL_CSNPOL_LOW;
NRF_SPIM3->IFTIMING.CSNDUR = 8;
NRF_SPIM3->PSEL.CSN = CS_MEM_PIN;
NRF_SPIM3->PSEL.SCK = SPIM_CLK_PIN;
NRF_SPIM3->PSEL.MOSI = SPIM_MOSI_PIN;
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
}
#endif
+121
View File
@@ -0,0 +1,121 @@
#ifndef __PEL20_IO_H__
#define __PEL20_IO_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "elite_board.h"
#include "nrf_gpio.h"
#include "nrf_saadc.h"
#include "nrf_spim.h"
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
#define RELAY1_PIN NRF_GPIO_PIN_MAP(1, 10)
#define RELAY2_PIN NRF_GPIO_PIN_MAP(1, 15)
#define TP1_PIN NRF_GPIO_PIN_MAP(0, 5)
#define TP2_PIN NRF_GPIO_PIN_MAP(0, 26)
#define SAMPLE_R_PIN NRF_GPIO_PIN_MAP(1, 11)
#define SAMPLE_V_PIN NRF_GPIO_PIN_MAP(1, 6)
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 8)
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 7)
#define OUTPUT_R1_PIN NRF_GPIO_PIN_MAP(0, 31)
#define OUTPUT_R2_PIN NRF_GPIO_PIN_MAP(0, 28)
#define OUTPUT_VO_PIN NRF_GPIO_PIN_MAP(0, 29)
#define OUTPUT_VC_PIN NRF_GPIO_PIN_MAP(0, 2)
#define OUTPUT_VE_PIN NRF_GPIO_PIN_MAP(0, 3)
#define OUTPUT_R1_CHANNEL 7
#define OUTPUT_R2_CHANNEL 4
#define OUTPUT_VO_CHANNEL 5
#define OUTPUT_VC_CHANNEL 0
#define OUTPUT_VE_CHANNEL 1
#define OUTPUT_R1_IDX 0
#define OUTPUT_R2_IDX 1
#define OUTPUT_VO_IDX 2
#define OUTPUT_VC_IDX 3
#define OUTPUT_VE_IDX 4
#define INPUT_1_PIN NRF_GPIO_PIN_MAP(0, 15)
#define INPUT_2_PIN NRF_GPIO_PIN_MAP(0, 13)
#define INPUT_3_PIN NRF_GPIO_PIN_MAP(0, 20)
#define INPUT_4_PIN NRF_GPIO_PIN_MAP(1, 0)
#define INPUT_5_PIN NRF_GPIO_PIN_MAP(0, 25)
#define INPUT_6_PIN NRF_GPIO_PIN_MAP(0, 11)
#define INPUT_7_PIN NRF_GPIO_PIN_MAP(0, 14)
#define INPUT_8_PIN NRF_GPIO_PIN_MAP(0, 17)
#define INPUT_9_PIN NRF_GPIO_PIN_MAP(0, 18)
#define INPUT_10_PIN NRF_GPIO_PIN_MAP(0, 21)
#define INPUT_11_PIN NRF_GPIO_PIN_MAP(0, 19)
#define INPUT_12_PIN NRF_GPIO_PIN_MAP(0, 22)
#define WP_MEM_PIN NRF_GPIO_PIN_MAP(0, 12)
#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 6)
#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 27)
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 4)
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
typedef struct
{
uint32_t anode_pin;
uint32_t cathode_pin;
uint32_t smaple_r_pin;
uint32_t sample_v_pin;
uint32_t test_pin;
uint32_t point_us[5]; // toggle point timestamp
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
uint32_t mode; // 0: IOPL mode, 1: IOPH mode
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
int32_t adc_timing_shift;
void (*convt_new_arrival_cb)(void);
} pel_config_t;
typedef struct
{
nrf_saadc_gain_t gain;
nrf_saadc_acqtime_t smaple_time;
uint32_t channels[5];
int16_t results[5];
float results_f[5];
void (*convt_new_arrival_cb)(void);
} pel_adc_t;
typedef struct
{
NRF_TIMER_Type *pulse_tmr;
uint32_t pulse_irq_n;
uint32_t pulse_cnt;
uint32_t pulse_is_running;
pel_adc_t adc;
} pel_hw_t;
extern pel_hw_t pel_hw;
void spim_xfer(uint32_t cs_pin,
nrf_spim_mode_t spi_mode,
uint8_t *p_tx_buffer,
uint16_t tx_buffer_length,
uint8_t *p_rx_buf,
uint16_t rx_buffer_length);
void pel20_io_init(void);
void pel_pulse_gen_init(pel_config_t cfg);
void pel_pulse_gen_start(void);
void pel_pulse_gen_stop(void);
#endif /* ! DEF_ELITE_MODEL */
#ifdef __cplusplus
}
#endif
#endif /* ! __PEL20_IO_H__ */
+5
View File
@@ -5,6 +5,11 @@
#include "adgs1412.h"
const sw_drv_if_t *p_inst = &adgs1412;
#elif (DEF_MAX14802_ENABLED)
#include "max14802.h"
const sw_drv_if_t *p_inst = &max14802;
#else
const sw_drv_if_t *p_inst = NULL;
+1
View File
@@ -10,6 +10,7 @@
void tw1508_set(uint16_t out_0, uint16_t out_1)
{
NRF_LOG_INFO("%s(0x%04X, 0x%04X)", __FUNCTION__, out_0, out_1);
typedef struct
{
uint32_t scki_pin;
+243
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@@ -0,0 +1,243 @@
#include "nrf.h"
#include "nrf_gpio.h"
#include "nrf_uarte.h"
#include "le_uart_srv.h"
#include "uart_drv.h"
#include "nrf_error.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "semphr.h"
#include "task.h"
#include <string.h>
#if (DEF_UARTE_ENABLED)
#define UART_TX_PIN NRF_GPIO_PIN_MAP(0, 6)
#define UART_RX_PIN NRF_GPIO_PIN_MAP(0, 8)
static MessageBufferHandle_t rx_message = NULL;
static MessageBufferHandle_t tx_message = NULL;
static SemaphoreHandle_t tx_done_sem = NULL;
void UARTE0_UART0_IRQHandler(void)
{
if (NRF_UARTE0->EVENTS_ENDTX)
{
NRF_UARTE0->EVENTS_ENDTX = 0;
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
xSemaphoreGiveFromISR(tx_done_sem, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
ret_code_t uart_set_baud(uint32_t baudrate)
{
ret_code_t ret = NRF_SUCCESS;
vTaskSuspendAll();
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
switch (baudrate)
{
case 4800:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud4800;
break;
case 9600:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud9600;
break;
case 19200:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud19200;
break;
case 38400:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud38400;
break;
case 56000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud56000;
break;
case 57600:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud57600;
break;
case 115200:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud115200;
break;
case 250000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud250000;
break;
case 1000000:
NRF_UARTE0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;
break;
default:
ret = NRF_ERROR_INVALID_PARAM;
break;
}
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
xTaskResumeAll();
return ret;
}
void uart_tx_task(void *p_arg)
{
for (;;)
{
static uint8_t tx[2048];
size_t tx_size = xMessageBufferReceive(tx_message, tx, sizeof(tx), portMAX_DELAY);
if (tx_size)
{
NRF_UARTE0->TXD.PTR = (uint32_t)tx;
NRF_UARTE0->TXD.MAXCNT = tx_size;
NRF_UARTE0->EVENTS_ENDTX = 0;
NRF_UARTE0->EVENTS_TXSTOPPED = 0;
NRF_UARTE0->EVENTS_TXSTARTED = 0;
NRF_UARTE0->TASKS_STARTTX = 1;
NRF_UARTE0->INTENSET = UARTE_INTENSET_ENDTX_Msk;
if (xSemaphoreTake(tx_done_sem, pdMS_TO_TICKS(10000)) == pdFALSE)
{
NRF_UARTE0->TASKS_STOPTX = 1;
}
NRF_UARTE0->INTENCLR = UARTE_INTEN_ENDTX_Msk;
}
}
}
void uart_rx_task(void *p_arg)
{
static uint8_t rx[2][2048];
int idx = 0;
NRF_UARTE0->SHORTS = UARTE_SHORTS_ENDRX_STARTRX_Msk;
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx]);
NRF_UARTE0->TASKS_STOPRX = 1;
NRF_UARTE0->TASKS_STARTRX = 1;
do {
} while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx ^ 1];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx ^ 1]);
for (;;)
{
NRF_UARTE0->EVENTS_RXDRDY = 0;
do {
vTaskDelay(pdMS_TO_TICKS(5));
} while (NRF_UARTE0->EVENTS_RXDRDY == 0);
do {
NRF_UARTE0->EVENTS_RXDRDY = 0;
vTaskDelay(pdMS_TO_TICKS(5));
} while (NRF_UARTE0->EVENTS_RXDRDY == 1);
NRF_UARTE0->EVENTS_ENDRX = 0;
NRF_UARTE0->EVENTS_RXSTARTED = 0;
NRF_UARTE0->TASKS_STOPRX = 1;
do {
vTaskDelay(pdMS_TO_TICKS(1));
} while (NRF_UARTE0->EVENTS_RXSTARTED == 0);
NRF_UARTE0->RXD.PTR = (uint32_t)rx[idx];
NRF_UARTE0->RXD.MAXCNT = sizeof(rx[idx]);
xMessageBufferSend(rx_message, rx[idx], NRF_UARTE0->RXD.AMOUNT, portMAX_DELAY);
idx ^= 1;
}
}
void uart_rx_notify_task(void *p_arg)
{
for (;;)
{
static uint8_t buf[2048];
uint32_t recv_size = uart_recv(buf, sizeof(buf));
if (recv_size)
{
uint8_t *p = buf;
uint32_t loops = recv_size / BLE_UART_MAX_DATA_LEN;
uint32_t remain = recv_size % BLE_UART_MAX_DATA_LEN;
for (int i = 0; i < loops; i++)
{
for (int i = 0; i < 10; i++)
{
if (le_uart_notify((void *)p, BLE_UART_MAX_DATA_LEN) == NRF_SUCCESS)
{
p += BLE_UART_MAX_DATA_LEN;
break;
}
else
{
vTaskDelay(pdMS_TO_TICKS(5));
}
}
}
if (remain)
{
for (int i = 0; i < 10; i++)
{
if (le_uart_notify((void *)p, remain) == NRF_SUCCESS)
{
p += BLE_UART_MAX_DATA_LEN;
break;
}
else
{
vTaskDelay(pdMS_TO_TICKS(5));
}
}
}
}
}
}
void uart_init(void)
{
rx_message = xMessageBufferCreate(4096);
tx_message = xMessageBufferCreate(2048);
tx_done_sem = xSemaphoreCreateBinary();
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
NRF_UARTE0->PSEL.TXD = UART_TX_PIN | (UARTE_PSEL_TXD_CONNECT_Connected << UARTE_PSEL_TXD_CONNECT_Pos);
NRF_UARTE0->PSEL.RXD = UART_RX_PIN | (UARTE_PSEL_RXD_CONNECT_Connected << UARTE_PSEL_RXD_CONNECT_Pos);
NRF_UARTE0->PSEL.CTS = 0;
NRF_UARTE0->PSEL.RTS = 0;
NRF_UARTE0->CONFIG = UARTE_CONFIG_STOP_Msk;
NRF_UARTE0->BAUDRATE = UARTE_BAUDRATE_BAUDRATE_Baud115200;
NRF_UARTE0->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
// Config uart tx pin
nrf_gpio_cfg(
UART_TX_PIN,
NRF_GPIO_PIN_DIR_OUTPUT,
NRF_GPIO_PIN_INPUT_DISCONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_H0H1,
NRF_GPIO_PIN_NOSENSE);
// Config uart rx pin
nrf_gpio_cfg_input(UART_RX_PIN, NRF_GPIO_PIN_PULLUP);
sd_nvic_SetPriority(UARTE0_UART0_IRQn, _PRIO_APP_LOWEST);
sd_nvic_EnableIRQ(UARTE0_UART0_IRQn);
xTaskCreate(uart_tx_task, "uart tx", 64, NULL, 4, NULL);
xTaskCreate(uart_rx_task, "uart rx", 64, NULL, 4, NULL);
xTaskCreate(uart_rx_notify_task, "uart rx notify", 128, NULL, 3, NULL);
}
int uart_send(void *p_data, uint32_t size)
{
return xMessageBufferSend(tx_message, p_data, size, portMAX_DELAY);
}
int uart_recv(void *p_data, uint32_t max_size)
{
return xMessageBufferReceive(rx_message, p_data, max_size, portMAX_DELAY);
}
#endif
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#pragma once
#ifndef __UART_DRV_H__
#define __UART_DRV_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "app_config.h"
#include "sdk_errors.h"
#if (DEF_UARTE_ENABLED)
void uart_init(void);
int uart_send(void *p_data, uint32_t size);
int uart_recv(void *p_data, uint32_t max_size);
ret_code_t uart_set_baud(uint32_t baudrate);
#else
#define uart_init()
#define uart_send(...) ;
#define uart_recv(...) ;
#endif /* ! DEF_UARTE_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __UART_DRV_H__ */
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#include "nrf.h"
#include "app_usbd.h"
#include "app_usbd_cdc_acm.h"
#include "app_usbd_cdc_types.h"
#include "app_usbd_serial_num.h"
#include "nrf_log.h"
#include "FreeRTOS.h"
#include "message_buffer.h"
#include "semphr.h"
#include "stream_buffer.h"
#include "task.h"
#define DEBUG_ACM_CDC_READ 1
static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event);
#define CDC_ACM_COMM_EPIN NRF_DRV_USBD_EPIN1
#define CDC_ACM_DATA_EPIN NRF_DRV_USBD_EPIN2
#define CDC_ACM_DATA_EPOUT NRF_DRV_USBD_EPOUT2
APP_USBD_CDC_ACM_GLOBAL_DEF(cdc_acm_inst,
cdc_acm_user_ev_handler,
NRF_CDC_ACM_COMM_INTERFACE,
NRF_CDC_ACM_DATA_INTERFACE,
CDC_ACM_COMM_EPIN,
CDC_ACM_DATA_EPIN,
CDC_ACM_DATA_EPOUT,
APP_USBD_CDC_COMM_PROTOCOL_AT_V250);
static SemaphoreHandle_t usbd_ready_rx_done_sem = NULL;
static SemaphoreHandle_t usbd_ready_tx_done_sem = NULL;
static SemaphoreHandle_t usbd_evt_queue_sem = NULL;
static MessageBufferHandle_t usbd_tx_message = NULL;
static MessageBufferHandle_t usbd_rx_message = NULL;
static bool is_port_closed = true;
static void usbd_isr_handler(app_usbd_internal_evt_t const *const p_event, bool queued)
{
if (queued)
{
BaseType_t xHigherPriorityTaskWoken = false;
xSemaphoreGiveFromISR(usbd_evt_queue_sem, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
static void usbd_state_proc(app_usbd_event_type_t event)
{
switch (event)
{
case APP_USBD_EVT_DRV_SUSPEND:
break;
case APP_USBD_EVT_DRV_RESUME:
break;
case APP_USBD_EVT_STARTED:
NRF_LOG_INFO("APP_USBD_EVT_STARTED");
break;
case APP_USBD_EVT_STOPPED:
NRF_LOG_INFO("APP_USBD_EVT_STOPPED");
app_usbd_disable();
break;
case APP_USBD_EVT_POWER_DETECTED:
NRF_LOG_INFO("USB power detected");
if (!nrf_drv_usbd_is_enabled())
{
app_usbd_enable();
}
break;
case APP_USBD_EVT_POWER_REMOVED:
NRF_LOG_INFO("USB power removed");
app_usbd_stop();
break;
case APP_USBD_EVT_POWER_READY:
NRF_LOG_INFO("USB ready");
app_usbd_start();
break;
default:
break;
}
}
static void usbd_ser_send_task(void *p_arg)
{
static uint8_t buf[512];
for (;;)
{
size_t send_size = xStreamBufferReceive(usbd_tx_message, buf, sizeof(buf), portMAX_DELAY);
if (send_size && is_port_closed == false)
{
ret_code_t ret_code = app_usbd_cdc_acm_write(&cdc_acm_inst, buf, send_size);
switch (ret_code)
{
case NRF_SUCCESS:
xSemaphoreTake(usbd_ready_tx_done_sem, pdMS_TO_TICKS(1000));
break;
default:
break;
}
}
}
}
static void cdc_acm_user_ev_handler(app_usbd_class_inst_t const *p_inst, app_usbd_cdc_acm_user_event_t event)
{
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
switch (event)
{
case APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN:
is_port_closed = false;
xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
break;
case APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE:
is_port_closed = true;
break;
case APP_USBD_CDC_ACM_USER_EVT_TX_DONE:
xSemaphoreGiveFromISR(usbd_ready_tx_done_sem, &xHigherPriorityTaskWoken);
break;
case APP_USBD_CDC_ACM_USER_EVT_RX_DONE:
xSemaphoreGiveFromISR(usbd_ready_rx_done_sem, &xHigherPriorityTaskWoken);
break;
default:
break;
}
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
static void usbd_ser_recv_task(void *arg)
{
static uint8_t recv[NRFX_USBD_EPSIZE];
static uint32_t recv_size;
for (;;)
{
if (is_port_closed)
{
xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
}
taskENTER_CRITICAL();
xSemaphoreTake(usbd_ready_rx_done_sem, 0);
taskEXIT_CRITICAL();
ret_code_t ret_code = app_usbd_cdc_acm_read_any(&cdc_acm_inst, recv, NRFX_USBD_EPSIZE);
switch (ret_code)
{
case NRF_SUCCESS:
recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
break;
case NRF_ERROR_IO_PENDING:
xSemaphoreTake(usbd_ready_rx_done_sem, portMAX_DELAY);
recv_size = xMessageBufferSend(usbd_rx_message, recv, app_usbd_cdc_acm_rx_size(&cdc_acm_inst), portMAX_DELAY);
break;
default:
break;
}
#if (DEBUG_ACM_CDC_READ == 1)
{
static uint8_t str[256];
memcpy(str, recv, recv_size);
str[recv_size] = '\0';
NRF_LOG_INFO("%s", str);
}
#endif
}
}
static void usbd_evt_task(void *arg)
{
app_usbd_serial_num_generate();
app_usbd_config_t usbd_config = {
.ev_isr_handler = usbd_isr_handler,
.ev_state_proc = usbd_state_proc,
};
ret_code_t ret;
ret = app_usbd_init(&usbd_config);
APP_ERROR_CHECK(ret);
extern ret_code_t nrf_dfu_trigger_usb_init(void);
ret = nrf_dfu_trigger_usb_init();
APP_ERROR_CHECK(ret);
app_usbd_class_inst_t const *pxInst = app_usbd_cdc_acm_class_inst_get(&cdc_acm_inst);
ret = app_usbd_class_append(pxInst);
APP_ERROR_CHECK(ret);
app_usbd_enable();
app_usbd_start();
for (;;)
{
xSemaphoreTake(usbd_evt_queue_sem, portMAX_DELAY);
do {
} while (app_usbd_event_queue_process());
}
}
void usbd_init(void)
{
usbd_ready_rx_done_sem = xSemaphoreCreateBinary();
usbd_ready_tx_done_sem = xSemaphoreCreateBinary();
usbd_evt_queue_sem = xSemaphoreCreateBinary();
usbd_tx_message = xMessageBufferCreate(512);
usbd_rx_message = xMessageBufferCreate(512);
xTaskCreate(usbd_evt_task, "usb_evt", 1024, NULL, 3, NULL);
xTaskCreate(usbd_ser_recv_task, "usb_recv", 256, NULL, 3, NULL);
xTaskCreate(usbd_ser_send_task, "usb_send", 256, NULL, 3, NULL);
}
int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout)
{
int32_t ret = 0;
if (size)
{
if (timeout)
{
xMessageBufferSend(usbd_tx_message, p_data, size, timeout);
}
else
{
taskENTER_CRITICAL();
xMessageBufferSend(usbd_tx_message, p_data, size, 0);
taskEXIT_CRITICAL();
}
}
return ret;
}
int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout)
{
int32_t ret = 0;
if (size)
{
if (timeout)
{
ret = xMessageBufferReceive(usbd_rx_message, p_data, size, timeout);
}
else
{
taskENTER_CRITICAL();
ret = xMessageBufferReceive(usbd_rx_message, p_data, size, 0);
taskEXIT_CRITICAL();
}
}
return ret;
}
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#ifndef __USBD_H__
#define __USBD_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "app_config.h"
#if (DEF_USBD_ENABLED)
void usbd_init(void);
int32_t usbd_ser_write(uint8_t *p_data, uint32_t size, TickType_t timeout);
int32_t usbd_ser_read(uint8_t *p_data, uint32_t size, TickType_t timeout);
#else
#define usbd_init()
#define usbd_ser_write(...);
#define usbd_ser_read(...);
#endif /* ! DEF_FS_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* ! __USBD_H__ */
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/**
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "usbd_dfu_trigger.h"
#include "app_usbd.h"
#include "app_usbd_nrf_dfu_trigger.h"
#include "nrf_drv_clock.h"
#include "nrf_gpio.h"
#include "nrf_log_ctrl.h"
#include "app_usbd_serial_num.h"
#include "app_util.h"
#include "nrf_bootloader_info.h"
#include "nrf_pwr_mgmt.h"
#define NRF_LOG_MODULE_NAME nrf_dfu_trigger_usb
#include "nrf_log.h"
NRF_LOG_MODULE_REGISTER();
#define DFU_FLASH_PAGE_SIZE (NRF_FICR->CODEPAGESIZE)
#define DFU_FLASH_PAGE_COUNT (NRF_FICR->CODESIZE)
#define APP_NAME ELITE_DEVICE_NAME
#define APP_VERSION_STRING "1.0.0"
static uint8_t m_version_string[] = APP_NAME " " APP_VERSION_STRING; ///< Human-readable version string.
static app_usbd_nrf_dfu_trigger_nordic_info_t m_dfu_info; ///< Struct with various information about the current firmware.
static void dfu_trigger_evt_handler(app_usbd_class_inst_t const *p_inst, app_usbd_nrf_dfu_trigger_user_event_t event)
{
UNUSED_PARAMETER(p_inst);
ret_code_t err_code;
switch (event)
{
case APP_USBD_NRF_DFU_TRIGGER_USER_EVT_DETACH:
NRF_LOG_INFO("DFU Detach request received. Triggering a pin reset.");
NRF_LOG_FINAL_FLUSH();
{
err_code = sd_power_gpregret_clr(0, 0xFFFFFFFF);
APP_ERROR_CHECK(err_code);
err_code = sd_power_gpregret_set(0, BOOTLOADER_DFU_START);
APP_ERROR_CHECK(err_code);
// Signal that DFU mode is to be enter to the power management module
nrf_pwr_mgmt_shutdown(NRF_PWR_MGMT_SHUTDOWN_GOTO_DFU);
}
break;
default:
break;
}
}
APP_USBD_NRF_DFU_TRIGGER_GLOBAL_DEF(m_app_dfu,
NRF_DFU_TRIGGER_USB_INTERFACE_NUM,
&m_dfu_info,
m_version_string,
dfu_trigger_evt_handler);
static void strings_create(void)
{
uint8_t prev_char = 'a'; // Arbitrary valid char, not '-'.
// Remove characters that are not supported in semantic version strings.
for (size_t i = strlen(APP_NAME) + 1; i < strlen((char *)m_version_string); i++)
{
if (((m_version_string[i] >= 'a') && (m_version_string[i] <= 'z')) || ((m_version_string[i] >= 'A') && (m_version_string[i] <= 'Z')) || ((m_version_string[i] >= '0') && (m_version_string[i] <= '9')) || (m_version_string[i] == '+') || (m_version_string[i] == '.') || (m_version_string[i] == '-'))
{
// Valid semantic version character.
}
else if (prev_char == '-')
{
m_version_string[i] = '0';
}
else
{
m_version_string[i] = '-';
}
prev_char = m_version_string[i];
}
}
ret_code_t nrf_dfu_trigger_usb_init(void)
{
m_dfu_info.wAddress = CODE_START;
m_dfu_info.wFirmwareSize = CODE_SIZE;
m_dfu_info.wVersionMajor = 1;
m_dfu_info.wVersionMinor = 0;
m_dfu_info.wFirmwareID = 0;
m_dfu_info.wFlashPageSize = DFU_FLASH_PAGE_SIZE;
m_dfu_info.wFlashSize = m_dfu_info.wFlashPageSize * DFU_FLASH_PAGE_COUNT;
strings_create();
app_usbd_class_inst_t const *class_dfu = app_usbd_nrf_dfu_trigger_class_inst_get(&m_app_dfu);
ret_code_t ret = app_usbd_class_append(class_dfu);
return ret;
}
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/**
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef USBD_DFU_TRIGGER_H
#define USBD_DFU_TRIGGER_H
#include "sdk_errors.h"
/**
* @defgroup nrf_dfu_trigger_usb USB DFU trigger library
* @ingroup app_common
*
* @brief @tagAPI52840 USB DFU trigger library is used to enter the bootloader and read the firmware version.
*
* @details See @ref lib_dfu_trigger_usb for additional documentation.
* @{
*/
/**
* @brief Function for initializing the USB DFU trigger library.
*
* @note If the USB is also used for other purposes, then this function must be called after USB is
* initialized but before it is enabled. In this case, the configuration flag @ref
* NRF_DFU_TRIGGER_USB_USB_SHARED must be set to 1.
*
* @note Calling this again after the first success has no effect and returns @ref NRF_SUCCESS.
*
* @note If @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE is on (1), USB events must be handled manually.
* See @ref app_usbd_event_queue_process.
*
* @retval NRF_SUCCESS On successful initialization.
* @return An error code on failure, for example if called at a wrong time.
*/
ret_code_t nrf_dfu_trigger_usb_init(void);
/** @} */
#endif //NRF_DFU_TRIGGER_USB_H