Compare commits
42 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 3cccdba575 | |||
| b22f41e1b9 | |||
| 5e72244b69 | |||
| e0c7280cfd | |||
| 19a6e9856f | |||
| 537e48dde0 | |||
| a28ad39b14 | |||
| 63f457b5af | |||
| 8761c5b8c7 | |||
| 34f3f79267 | |||
| 584e6f76a2 | |||
| f650299c37 | |||
| ae34ff9efe | |||
| c2a747ae6a | |||
| 3562b5dfb8 | |||
| 9b9c710f63 | |||
| 090fee4014 | |||
| b2c63bcd5a | |||
| 8f507a9522 | |||
| 682f8d4a9b | |||
| d57d946c4f | |||
| 5576a6ea20 | |||
| 70312cf1f5 | |||
| 03d53ed0a3 | |||
| 412c08b995 | |||
| 78ab5c2a29 | |||
| cc66858615 | |||
| a6bcf5f8e2 | |||
| df280027f0 | |||
| 1a844b0c30 | |||
| 19d212253d | |||
| 9d11067e1d | |||
| 2f21efd1b2 | |||
| ccb15f4cba | |||
| d8b82b6edf | |||
| ba55256b91 | |||
| 0f105e6166 | |||
| 516970a6a5 | |||
| 694c3c4289 | |||
| 17587ae873 | |||
| 6e72b2cac2 | |||
| 906d684db0 |
+20
-9
@@ -104,10 +104,10 @@ extern "C"
|
||||
|
||||
// BLE device name
|
||||
#define DEF_ELITE_DEV 0x00000000
|
||||
#define DEF_ELITE_EDC_20 0x00020109
|
||||
#define DEF_PULSE_E_LOAD_10 0x00070000
|
||||
#define DEF_CURRENT_PULSE_GANERATOR_11 0x00080001
|
||||
#define DEF_ELITE_MODEL DEF_CURRENT_PULSE_GANERATOR_11
|
||||
#define DEF_ELITE_EDC_V2_0 0x00020109
|
||||
#define DEF_ELITE_PEL_V2_0 0x00070001
|
||||
#define DEF_ELITE_CPG_V1_1 0x00080001
|
||||
#define DEF_ELITE_MODEL DEF_ELITE_CPG_V1_1
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
|
||||
#define ELITE_DEVICE_NAME "Elite-Dev"
|
||||
@@ -116,6 +116,8 @@ extern "C"
|
||||
#define MAJOR_VERSION_NUMBER 0
|
||||
#define MINOR_VERSION_NUMBER 0
|
||||
|
||||
#define DEF_TW1508_ENABLED 0
|
||||
|
||||
#define DEF_LED_COUNT 0
|
||||
#define DEF_LED_DRV_ENABLED 0
|
||||
#define DEF_APA102_2020_ENABLED 0
|
||||
@@ -128,6 +130,7 @@ extern "C"
|
||||
#define DEF_MAX5136_ENABLED 0
|
||||
|
||||
#define DEF_SW_DRV_ENABLED 0
|
||||
#define DEF_MAX14802_ENABLED 0
|
||||
#define DEF_ADGS1412_ENABLED 0
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||||
|
||||
#define DEF_FS_ENABLED 0
|
||||
@@ -138,13 +141,15 @@ extern "C"
|
||||
|
||||
#define DEF_RTT_JSCOP_ENABLED 0
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||||
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
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||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
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||||
#define ELITE_DEVICE_NAME "Elite-EDC"
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||||
#define MAJOR_PRODUCT_NUMBER 0
|
||||
#define MINOR_PRODUCT_NUMBER 2
|
||||
#define MAJOR_VERSION_NUMBER 1
|
||||
#define MINOR_VERSION_NUMBER 9
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||||
|
||||
#define DEF_TW1508_ENABLED 0
|
||||
|
||||
#define DEF_LED_COUNT 12
|
||||
#define DEF_LED_DRV_ENABLED 1
|
||||
#define DEF_APA102_2020_ENABLED 1
|
||||
@@ -157,6 +162,7 @@ extern "C"
|
||||
#define DEF_MAX5136_ENABLED 1
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||||
|
||||
#define DEF_SW_DRV_ENABLED 1
|
||||
#define DEF_MAX14802_ENABLED 0
|
||||
#define DEF_ADGS1412_ENABLED 1
|
||||
|
||||
#define DEF_FS_ENABLED 0
|
||||
@@ -167,12 +173,14 @@ extern "C"
|
||||
|
||||
#define DEF_RTT_JSCOP_ENABLED 0
|
||||
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
#define ELITE_DEVICE_NAME "Elite-PEL"
|
||||
#define MAJOR_PRODUCT_NUMBER 0
|
||||
#define MINOR_PRODUCT_NUMBER 7
|
||||
#define MAJOR_VERSION_NUMBER 0
|
||||
#define MINOR_VERSION_NUMBER 0
|
||||
#define MINOR_VERSION_NUMBER 1
|
||||
|
||||
#define DEF_TW1508_ENABLED 0
|
||||
|
||||
#define DEF_LED_COUNT 0
|
||||
#define DEF_LED_DRV_ENABLED 0
|
||||
@@ -186,6 +194,7 @@ extern "C"
|
||||
#define DEF_MAX5136_ENABLED 0
|
||||
|
||||
#define DEF_SW_DRV_ENABLED 0
|
||||
#define DEF_MAX14802_ENABLED 0
|
||||
#define DEF_ADGS1412_ENABLED 0
|
||||
|
||||
#define DEF_FS_ENABLED 0
|
||||
@@ -196,7 +205,7 @@ extern "C"
|
||||
|
||||
#define DEF_RTT_JSCOP_ENABLED 0
|
||||
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
#define ELITE_DEVICE_NAME "Elite-CPG"
|
||||
#define MAJOR_PRODUCT_NUMBER 0
|
||||
#define MINOR_PRODUCT_NUMBER 8
|
||||
@@ -216,7 +225,8 @@ extern "C"
|
||||
#define DEF_DAC_DRV_ENABLED 0
|
||||
#define DEF_MAX5136_ENABLED 0
|
||||
|
||||
#define DEF_SW_DRV_ENABLED 0
|
||||
#define DEF_SW_DRV_ENABLED 1
|
||||
#define DEF_MAX14802_ENABLED 1
|
||||
#define DEF_ADGS1412_ENABLED 0
|
||||
|
||||
#define DEF_FS_ENABLED 0
|
||||
@@ -285,6 +295,7 @@ extern "C"
|
||||
|
||||
#define COUNT_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
|
||||
#define COUNTOF(x) (sizeof(x) / sizeof(x[0]))
|
||||
#define UNCONNECTED_PIN 0xFFFFFFFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -25,7 +25,6 @@
|
||||
<ProjectFile>bmd380_peripheral.vcxproj</ProjectFile>
|
||||
<RemoteBuildEnvironment>
|
||||
<Records />
|
||||
<EnvironmentSetupFiles />
|
||||
</RemoteBuildEnvironment>
|
||||
<ParallelJobCount>1</ParallelJobCount>
|
||||
<SuppressDirectoryChangeMessages>true</SuppressDirectoryChangeMessages>
|
||||
@@ -111,12 +110,9 @@
|
||||
<MaxBreakpointLimit>0</MaxBreakpointLimit>
|
||||
<EnableVerboseMode>true</EnableVerboseMode>
|
||||
<EnablePrettyPrinters>false</EnablePrettyPrinters>
|
||||
<EnableAbsolutePathReporting>true</EnableAbsolutePathReporting>
|
||||
</AdditionalGDBSettings>
|
||||
<DebugMethod>
|
||||
<ID>jlink-jtag</ID>
|
||||
<InterfaceID>com.sysprogs.debug.jlink.jlinksw</InterfaceID>
|
||||
<InterfaceSerialNumber>000801018887</InterfaceSerialNumber>
|
||||
<Configuration xsi:type="com.visualgdb.edp.segger.settings">
|
||||
<CommandLine>-select USB -device $$SYS:MCU_ID$$ -speed auto -if SWD</CommandLine>
|
||||
<ProgramMode>Enabled</ProgramMode>
|
||||
@@ -145,13 +141,6 @@
|
||||
<TimestampProviderTicksPerSecond>64000000</TimestampProviderTicksPerSecond>
|
||||
<KeepConsoleAfterExit>false</KeepConsoleAfterExit>
|
||||
<UnusedStackFillPattern xsi:nil="true" />
|
||||
<RelatedExecutables>
|
||||
<RelatedExecutable>
|
||||
<Program>false</Program>
|
||||
<LoadSymbols>false</LoadSymbols>
|
||||
<ShowInLiveWatch>false</ShowInLiveWatch>
|
||||
</RelatedExecutable>
|
||||
</RelatedExecutables>
|
||||
<CheckInterfaceDrivers>true</CheckInterfaceDrivers>
|
||||
</Debug>
|
||||
</VisualGDBProjectSettings2>
|
||||
@@ -46,7 +46,7 @@
|
||||
<ClCompile>
|
||||
<CLanguageStandard>GNU99</CLanguageStandard>
|
||||
<AdditionalIncludeDirectories>.;../bmd380_sdk/components/softdevice/s140/headers;../bmd380_sdk/components/softdevice/s140/headers/nrf52;../bmd380_sdk/external/segger_rtt;../bmd380_sdk/components/libraries/log;../bmd380_sdk/components/libraries/log/src;../bmd380_sdk/components/libraries/memobj;../bmd380_sdk/components/libraries/ringbuf;../bmd380_sdk/components/libraries/atomic;../bmd380_sdk/components/libraries/balloc;../bmd380_sdk/external/freertos/portable/CMSIS/nrf52;../bmd380_sdk/external/freertos/portable/GCC/nrf52;../bmd380_sdk/integration/nrfx;../bmd380_sdk/integration/nrfx/legacy;../bmd380_sdk/components/libraries/experimental_section_vars;../bmd380_sdk/components/libraries/strerror;../bmd380_sdk/external/freertos/source/include;../bmd380_sdk/components/softdevice/common;../bmd380_sdk/components/ble/common;../bmd380_sdk/components/ble/ble_advertising;../bmd380_sdk/components/libraries/atomic_flags;../bmd380_sdk/components/ble/ble_db_discovery;../bmd380_sdk/components/ble/ble_dtm;../bmd380_sdk/components/ble/ble_link_ctx_manager;../bmd380_sdk/components/ble/ble_racp;../bmd380_sdk/components/ble/ble_radio_notification;../bmd380_sdk/components/ble/ble_services/ble_ancs_c;../bmd380_sdk/components/ble/ble_services/ble_ans_c;../bmd380_sdk/components/ble/ble_services/ble_bas;../bmd380_sdk/components/ble/ble_services/ble_bas_c;../bmd380_sdk/components/ble/ble_services/ble_bps;../bmd380_sdk/components/ble/ble_services/ble_cscs;../bmd380_sdk/components/ble/ble_services/ble_cts_c;../bmd380_sdk/components/ble/ble_services/ble_dfu;../bmd380_sdk/components/ble/ble_services/ble_dis;../bmd380_sdk/components/ble/ble_services/ble_dis_c;../bmd380_sdk/components/ble/ble_services/ble_escs;../bmd380_sdk/components/ble/ble_services/ble_gls;../bmd380_sdk/components/ble/ble_services/ble_hids;../bmd380_sdk/components/ble/ble_services/ble_hrs;../bmd380_sdk/components/ble/ble_services/ble_hrs_c;../bmd380_sdk/components/ble/ble_services/ble_hts;../bmd380_sdk/components/ble/ble_services/ble_ias;../bmd380_sdk/components/ble/ble_services/ble_ias_c;../bmd380_sdk/components/ble/ble_services/ble_ipsp;../bmd380_sdk/components/ble/ble_services/ble_lbs;../bmd380_sdk/components/ble/ble_services/ble_lbs_c;../bmd380_sdk/components/ble/ble_services/ble_lls;../bmd380_sdk/components/ble/ble_services/ble_nus;../bmd380_sdk/components/ble/ble_services/ble_nus_c;../bmd380_sdk/components/ble/ble_services/ble_rscs;../bmd380_sdk/components/ble/ble_services/ble_rscs_c;../bmd380_sdk/components/ble/ble_services/ble_tps;../bmd380_sdk/components/ble/ble_services/eddystone;../bmd380_sdk/components/ble/ble_services/experimental_ble_lns;../bmd380_sdk/components/ble/ble_services/experimental_ble_ots;../bmd380_sdk/components/ble/ble_services/experimental_gatts_c;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_cgms;../bmd380_sdk/components/ble/ble_services/experimental_nrf_ble_ots_c;../bmd380_sdk/components/ble/ble_services/nrf_ble_bms;../bmd380_sdk/components/ble/nrf_ble_gatt;../bmd380_sdk/components/ble/nrf_ble_gq;../bmd380_sdk/components/ble/nrf_ble_qwr;../bmd380_sdk/components/ble/nrf_ble_scan;../bmd380_sdk/components/ble/peer_manager;../bmd380_sdk/components/libraries/pwr_mgmt;littlefs;%(ClCompile.AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
|
||||
<PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
|
||||
<PreprocessorDefinitions>DEBUG=1;USE_APP_CONFIG=1;LFS_THREADSAFE=1;CONFIG_NFCT_PINS_AS_GPIOS;%(ClCompile.PreprocessorDefinitions)</PreprocessorDefinitions>
|
||||
<AdditionalOptions />
|
||||
<CPPLanguageStandard />
|
||||
<Optimization>O0</Optimization>
|
||||
@@ -206,6 +206,7 @@
|
||||
<ClCompile Include="edc20_cycle_iv_mode.c" />
|
||||
<ClCompile Include="fs.c" />
|
||||
<ClCompile Include="gd25d10c.c" />
|
||||
<ClCompile Include="max14802.c" />
|
||||
<ClCompile Include="max5136.c" />
|
||||
<ClCompile Include="edc20_io.c" />
|
||||
<ClCompile Include="edc20.c" />
|
||||
@@ -223,10 +224,12 @@
|
||||
<ClCompile Include="main.c" />
|
||||
<ClCompile Include="j_scop.c" />
|
||||
<ClCompile Include="pel.c" />
|
||||
<ClCompile Include="pel10_io.c" />
|
||||
<ClCompile Include="pel20_io.c" />
|
||||
<ClCompile Include="sw_drv.c" />
|
||||
<ClCompile Include="syscalls.c" />
|
||||
<ClCompile Include="tw1508.c" />
|
||||
<ClInclude Include="max14802.h" />
|
||||
<ClInclude Include="pel20_io.h" />
|
||||
<ClInclude Include="tw1508.h" />
|
||||
<None Include="nRF52811_XXAA_s140.lds" />
|
||||
<None Include="nRF52840_XXAA_S140_reserve.lds" />
|
||||
@@ -401,7 +404,6 @@
|
||||
<ClInclude Include="led_drv_if.h" />
|
||||
<ClInclude Include="max5136.h" />
|
||||
<ClInclude Include="pel.h" />
|
||||
<ClInclude Include="pel10_io.h" />
|
||||
<ClInclude Include="sw_drv.h" />
|
||||
<ClInclude Include="sw_drv_if.h" />
|
||||
<ClInclude Include="sdk_config.h" />
|
||||
|
||||
@@ -1425,9 +1425,6 @@
|
||||
<ClCompile Include="elite_dac.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="pel10_io.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="btn.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
@@ -1455,6 +1452,12 @@
|
||||
<ClCompile Include="tw1508.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="max14802.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="pel20_io.c">
|
||||
<Filter>Source files</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<None Include="nRF52840_XXAA_S140_reserve.lds">
|
||||
@@ -1795,9 +1798,6 @@
|
||||
<ClInclude Include="elite_def.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="pel10_io.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="btn.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
@@ -1819,6 +1819,12 @@
|
||||
<ClInclude Include="cpg11_io.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="max14802.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="pel20_io.h">
|
||||
<Filter>Header files</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<Text Include="..\bmd380_sdk\external\segger_rtt\license\license.txt">
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#include "cpg11_dev_mode.h"
|
||||
#include "pel.h"
|
||||
#include "pel10_io.h"
|
||||
#include "elite_board.h"
|
||||
|
||||
#include "elite_def.h"
|
||||
|
||||
@@ -10,13 +10,13 @@
|
||||
|
||||
#include "tw1508.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
|
||||
#define VERSION_DATE_YEAR 24
|
||||
#define VERSION_DATE_MONTH 8
|
||||
#define VERSION_DATE_DAY 30
|
||||
#define VERSION_DATE_HOUR 16
|
||||
#define VERSION_DATE_MINUTE 50
|
||||
#define VERSION_DATE_MONTH 9
|
||||
#define VERSION_DATE_DAY 26
|
||||
#define VERSION_DATE_HOUR 11
|
||||
#define VERSION_DATE_MINUTE 04
|
||||
static void cis_version(uint8_t *ins, uint16_t size)
|
||||
{
|
||||
NRF_LOG_INFO("%s", __FUNCTION__);
|
||||
@@ -46,28 +46,32 @@ void dev_mode(uint8_t *ins, uint16_t size)
|
||||
uint8_t id : 4;
|
||||
uint8_t : 4;
|
||||
uint16_t magic : 16;
|
||||
uint8_t dev_opcode;
|
||||
uint8_t function_opcode;
|
||||
uint8_t func_id;
|
||||
uint8_t opcode;
|
||||
uint8_t param[];
|
||||
} *p_ins = (void *)ins;
|
||||
|
||||
switch (p_ins->dev_opcode)
|
||||
switch (p_ins->func_id)
|
||||
{
|
||||
case 0x00:
|
||||
dev_mode_set_cpg11_electrodes(ins);
|
||||
dev_mode_electrode_switch(ins);
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
dev_mode_set_cpg11_tw1508(ins);
|
||||
dev_mode_tw1508(ins);
|
||||
break;
|
||||
|
||||
case 0x02:
|
||||
dev_mode_ctrl_cpg11_electrodes_task(ins);
|
||||
break;
|
||||
|
||||
case 0x03:
|
||||
dev_mode_adapter_block_switch(ins);
|
||||
break;
|
||||
|
||||
// 0xA0 to 0xBF are reserved for controlling the BMD380
|
||||
case 0xA0:
|
||||
dev_mode_gpio_function(ins);
|
||||
dev_mode_gpio(ins);
|
||||
break;
|
||||
|
||||
case 0xA1:
|
||||
|
||||
+1095
-463
File diff suppressed because it is too large
Load Diff
+8
-7
@@ -1,5 +1,5 @@
|
||||
#ifndef __CPG10_DEV_MODE_H__
|
||||
#define __CPG10_DEV_MODE_H__
|
||||
#ifndef __CPG11_DEV_MODE_H__
|
||||
#define __CPG11_DEV_MODE_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
@@ -9,15 +9,16 @@ extern "C"
|
||||
#include "app_button.h"
|
||||
#include "elite_board.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
void dev_mode_set_cpg11_electrodes(uint8_t *ins);
|
||||
void dev_mode_set_cpg11_tw1508(uint8_t *ins);
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
void dev_mode_electrode_switch(uint8_t *ins);
|
||||
void dev_mode_tw1508(uint8_t *ins);
|
||||
void dev_mode_ctrl_cpg11_electrodes_task(uint8_t *ins);
|
||||
void dev_mode_gpio_function(uint8_t *ins);
|
||||
void dev_mode_adapter_block_switch(uint8_t *ins);
|
||||
void dev_mode_gpio(uint8_t *ins);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ! __CPG10_DEV_MODE_H__ */
|
||||
#endif /* ! __CPG11_DEV_MODE_H__ */
|
||||
|
||||
+293
-219
@@ -12,7 +12,7 @@
|
||||
|
||||
#pragma GCC optimize("O2")
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
@@ -20,48 +20,50 @@ typedef struct
|
||||
NRF_TIMER_Type *TMR_A;
|
||||
NRF_TIMER_Type *TMR_B;
|
||||
uint32_t IRQn;
|
||||
pusle_gen_t *p_pusle_gen;
|
||||
uint32_t pusle_gen_len;
|
||||
uint32_t pusle_gen_sel;
|
||||
} pusle_gen_hw_t;
|
||||
pulse_gen_t *p_pulse_gen;
|
||||
struct
|
||||
{
|
||||
pulse_gen_t *p_pulse_gen;
|
||||
uint32_t len;
|
||||
uint32_t select;
|
||||
} private;
|
||||
} pulse_gen_hw_t;
|
||||
|
||||
pusle_gen_hw_t pusle_gen_hw[] = {
|
||||
{{ 0, 1, 2, 3 },
|
||||
NRF_TIMER1,
|
||||
NRF_TIMER3,
|
||||
TIMER3_IRQn,
|
||||
NULL,
|
||||
0,
|
||||
0},
|
||||
{{ 4, 5, 6, 7 },
|
||||
NRF_TIMER2,
|
||||
NRF_TIMER4,
|
||||
TIMER4_IRQn,
|
||||
NULL,
|
||||
0,
|
||||
0},
|
||||
pulse_gen_hw_t pulse_gen_hw[] = {
|
||||
{.gpiote_idx = { 0, 1, 2, 3 },
|
||||
.TMR_A = NRF_TIMER1,
|
||||
.TMR_B = NRF_TIMER3,
|
||||
.IRQn = TIMER3_IRQn,
|
||||
.p_pulse_gen = NULL,
|
||||
.private = { NULL, 0, 0 }},
|
||||
{.gpiote_idx = { 4, 5, 6, 7 },
|
||||
.TMR_A = NRF_TIMER2,
|
||||
.TMR_B = NRF_TIMER4,
|
||||
.IRQn = TIMER4_IRQn,
|
||||
.p_pulse_gen = NULL,
|
||||
.private = { NULL, 0, 0 }},
|
||||
};
|
||||
|
||||
__STATIC_INLINE void cpg11_tmr_cb(uint32_t hw_idx)
|
||||
{
|
||||
if (pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4])
|
||||
if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4])
|
||||
{
|
||||
pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4] = 0;
|
||||
pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4] = 0;
|
||||
|
||||
uint32_t sel = pusle_gen_hw[hw_idx].pusle_gen_sel;
|
||||
uint32_t sel = pulse_gen_hw[hw_idx].private.select;
|
||||
|
||||
if (pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt > 0)
|
||||
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
|
||||
{
|
||||
pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt--;
|
||||
pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt--;
|
||||
}
|
||||
|
||||
for (uint32_t i = 0; i < pusle_gen_hw[hw_idx].pusle_gen_len; i++)
|
||||
for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
|
||||
{
|
||||
sel = (sel + 1) % pusle_gen_hw[hw_idx].pusle_gen_len;
|
||||
if (pusle_gen_hw[hw_idx].p_pusle_gen[sel].pulse_cnt > 0)
|
||||
sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
|
||||
if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
|
||||
{
|
||||
pusle_gen_hw[hw_idx].pusle_gen_sel = sel;
|
||||
cpg11_pulse_start(hw_idx, &pusle_gen_hw[hw_idx].p_pusle_gen[sel]);
|
||||
pulse_gen_hw[hw_idx].private.select = sel;
|
||||
cpg11_pulse_start(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@@ -78,247 +80,310 @@ void TIMER4_IRQHandler(void)
|
||||
cpg11_tmr_cb(1);
|
||||
}
|
||||
|
||||
void cpg11_pulse_stop_by_pulse_id(uint32_t pulse_id)
|
||||
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id)
|
||||
{
|
||||
for (uint32_t i = 0; i < COUNTOF(pusle_gen_hw); i++)
|
||||
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
|
||||
{
|
||||
for (uint32_t j = 0; j < pusle_gen_hw[i].pusle_gen_len; j++)
|
||||
for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
|
||||
{
|
||||
if (pusle_gen_hw[i].p_pusle_gen[j].pulse_id == pulse_id)
|
||||
if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
|
||||
{
|
||||
taskENTER_CRITICAL();
|
||||
pusle_gen_hw[i].p_pusle_gen[j].VAxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[j].VBxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[j].VAxL = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[j].VBxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = 0xFFFFFFFF;
|
||||
taskEXIT_CRITICAL();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void cpg11_pulse_start(uint32_t hw_idx, pusle_gen_t *p_pusle_gen)
|
||||
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id)
|
||||
{
|
||||
pusle_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
|
||||
pusle_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
|
||||
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
|
||||
{
|
||||
for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
|
||||
{
|
||||
if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
|
||||
{
|
||||
taskENTER_CRITICAL();
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = pulse_gen_hw[i].p_pulse_gen[j].VAxH;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = pulse_gen_hw[i].p_pulse_gen[j].VBxH;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = pulse_gen_hw[i].p_pulse_gen[j].VAxL;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = pulse_gen_hw[i].p_pulse_gen[j].VBxL;
|
||||
taskEXIT_CRITICAL();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sd_nvic_DisableIRQ(pusle_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_ClearPendingIRQ(pusle_gen_hw[hw_idx].IRQn);
|
||||
void cpg11_pulse_stop(uint32_t hw_idx)
|
||||
{
|
||||
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
|
||||
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
|
||||
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[0], p_pusle_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
|
||||
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[1], p_pusle_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[2], p_pusle_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
|
||||
nrf_gpiote_task_configure(pusle_gen_hw[hw_idx].gpiote_idx[3], p_pusle_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
}
|
||||
|
||||
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_enable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
|
||||
{
|
||||
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
|
||||
|
||||
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
|
||||
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
|
||||
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
|
||||
uint32_t offs = 8 * hw_idx;
|
||||
|
||||
NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[0]];
|
||||
NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 0));
|
||||
|
||||
NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[1]];
|
||||
NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 1));
|
||||
|
||||
NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
|
||||
NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[1]];
|
||||
NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
|
||||
NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 2));
|
||||
|
||||
NRF_PPI->CH[offs + 3].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
|
||||
NRF_PPI->CH[offs + 3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[0]];
|
||||
NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->TASKS_START;
|
||||
NRF_PPI->CH[offs + 3].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
|
||||
NRF_PPI->CH[offs + 3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
|
||||
NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->TASKS_START;
|
||||
NRF_PPI->CHENSET = (1 << (offs + 3));
|
||||
|
||||
NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[2]];
|
||||
NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 4));
|
||||
|
||||
NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[3]];
|
||||
NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 5));
|
||||
|
||||
NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
|
||||
NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[3]];
|
||||
NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
|
||||
NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 6));
|
||||
|
||||
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pusle_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
|
||||
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw[hw_idx].gpiote_idx[2]];
|
||||
NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
|
||||
NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
|
||||
NRF_PPI->CHENSET = (1 << (offs + 7));
|
||||
|
||||
pusle_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
|
||||
pusle_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
|
||||
|
||||
pusle_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pusle_gen->point_us[3] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_B->CC[1] = pusle_gen_hw[hw_idx].TMR_B->CC[0] + p_pusle_gen->point_us[4] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_B->CC[2] = pusle_gen_hw[hw_idx].TMR_B->CC[1] + p_pusle_gen->point_us[5] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_B->CC[3] = pusle_gen_hw[hw_idx].TMR_B->CC[2] + p_pusle_gen->point_us[6] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_B->CC[4] = pusle_gen_hw[hw_idx].TMR_B->CC[3] + p_pusle_gen->idle_us * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE4_STOP_MASK | NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK;
|
||||
pusle_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE4_MASK;
|
||||
pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_B->CC[4] = pulse_gen_hw[hw_idx].TMR_B->CC[3] + p_pulse_gen->idle_us * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE4_STOP_MASK | NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK;
|
||||
pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE4_MASK;
|
||||
|
||||
pusle_gen_hw[hw_idx].TMR_A->CC[0] = 1;
|
||||
pusle_gen_hw[hw_idx].TMR_A->CC[1] = pusle_gen_hw[hw_idx].TMR_A->CC[0] + p_pusle_gen->point_us[0] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_A->CC[2] = pusle_gen_hw[hw_idx].TMR_A->CC[1] + p_pusle_gen->point_us[1] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_A->CC[3] = pusle_gen_hw[hw_idx].TMR_A->CC[2] + p_pusle_gen->point_us[2] * 16;
|
||||
pusle_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
|
||||
pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
|
||||
pulse_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
|
||||
|
||||
sd_nvic_EnableIRQ(pusle_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
|
||||
pusle_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
|
||||
}
|
||||
|
||||
void cpg11_pulse_init(uint32_t hw_idx, pusle_gen_t *p_pusle_gen, uint32_t len)
|
||||
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
|
||||
{
|
||||
taskENTER_CRITICAL();
|
||||
NRF_LOG_INFO("%s", __FUNCTION__);
|
||||
|
||||
if (pusle_gen_hw[hw_idx].p_pusle_gen)
|
||||
if (pulse_gen_hw[hw_idx].private.p_pulse_gen != NULL)
|
||||
{
|
||||
pusle_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
|
||||
pusle_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
|
||||
pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
|
||||
|
||||
sd_nvic_DisableIRQ(pusle_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_ClearPendingIRQ(pusle_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].IRQn);
|
||||
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_disable(pusle_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
|
||||
nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
|
||||
|
||||
vPortFree(pulse_gen_hw[hw_idx].private.p_pulse_gen);
|
||||
}
|
||||
|
||||
pusle_gen_hw[hw_idx].p_pusle_gen = p_pusle_gen;
|
||||
pusle_gen_hw[hw_idx].pusle_gen_len = len;
|
||||
pusle_gen_hw[hw_idx].pusle_gen_sel = 0;
|
||||
pulse_gen_hw[hw_idx].p_pulse_gen = p_pulse_gen;
|
||||
pulse_gen_hw[hw_idx].private.len = len;
|
||||
pulse_gen_hw[hw_idx].private.select = 0;
|
||||
|
||||
NRF_LOG_INFO("hw_idx=%d", hw_idx);
|
||||
NRF_LOG_INFO("len=%d", len);
|
||||
pulse_gen_hw[hw_idx].private.p_pulse_gen = pvPortMalloc(sizeof(pulse_gen_t) * len);
|
||||
memcpy(pulse_gen_hw[hw_idx].private.p_pulse_gen, pulse_gen_hw[hw_idx].p_pulse_gen, sizeof(*p_pulse_gen) * len);
|
||||
|
||||
taskEXIT_CRITICAL();
|
||||
};
|
||||
|
||||
void cpg_pulse_default_demo_ext(void)
|
||||
{
|
||||
uint32_t pusle_gen_numb = 2;
|
||||
bool e1 = 1;
|
||||
bool e2 = 1;
|
||||
bool e3 = 1;
|
||||
bool e4 = 1;
|
||||
pulse_gen_t p_pulse_genA[2];
|
||||
pulse_gen_t p_pulse_genB[2];
|
||||
|
||||
pusle_gen_t *p_pusle_genA = pvPortMalloc(sizeof(pusle_gen_t) * pusle_gen_numb);
|
||||
pusle_gen_t *p_pusle_genB = pvPortMalloc(sizeof(pusle_gen_t) * pusle_gen_numb);
|
||||
p_pulse_genA[0] = (pulse_gen_t) {
|
||||
.VBxH = VB1H_PIN,
|
||||
.VBxL = VB1L_PIN,
|
||||
.VAxH = VA1H_PIN,
|
||||
.VAxL = VA1L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = PULSE_ID_A,
|
||||
};
|
||||
|
||||
memset(p_pusle_genA, 0x00, sizeof(pusle_gen_t) * pusle_gen_numb);
|
||||
memset(p_pusle_genB, 0x00, sizeof(pusle_gen_t) * pusle_gen_numb);
|
||||
p_pulse_genA[1] = (pulse_gen_t) {
|
||||
.VBxH = VB2H_PIN,
|
||||
.VBxL = VB2L_PIN,
|
||||
.VAxH = VA2H_PIN,
|
||||
.VAxL = VA2L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = PULSE_ID_B,
|
||||
};
|
||||
|
||||
if (pusle_gen_numb > 0)
|
||||
p_pulse_genB[0] = (pulse_gen_t) {
|
||||
.VBxH = VB3H_PIN,
|
||||
.VBxL = VB3L_PIN,
|
||||
.VAxH = VA3H_PIN,
|
||||
.VAxL = VA3L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = PULSE_ID_C,
|
||||
};
|
||||
|
||||
p_pulse_genB[1] = (pulse_gen_t) {
|
||||
.VBxH = VB4H_PIN,
|
||||
.VBxL = VB4L_PIN,
|
||||
.VAxH = VA4H_PIN,
|
||||
.VAxL = VA4L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = PULSE_ID_B,
|
||||
};
|
||||
|
||||
if(e1)
|
||||
{
|
||||
p_pusle_genA[0] = (pusle_gen_t) {
|
||||
.VBxH = VB1H_PIN,
|
||||
.VBxL = VB1L_PIN,
|
||||
.VAxH = VA1H_PIN,
|
||||
.VAxL = VA1L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = 0,
|
||||
};
|
||||
nrf_gpio_pin_clear(p_pulse_genA[0].VBxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[0].VBxH);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[0].VAxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[0].VAxH);
|
||||
}
|
||||
|
||||
if (pusle_gen_numb > 1)
|
||||
if(e2)
|
||||
{
|
||||
p_pusle_genA[1] = (pusle_gen_t) {
|
||||
.VBxH = VB2H_PIN,
|
||||
.VBxL = VB2L_PIN,
|
||||
.VAxH = VA2H_PIN,
|
||||
.VAxL = VA2L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = 1,
|
||||
};
|
||||
nrf_gpio_pin_clear(p_pulse_genA[1].VBxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[1].VBxH);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[1].VAxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genA[1].VAxH);
|
||||
}
|
||||
|
||||
if (pusle_gen_numb > 0)
|
||||
if(e3)
|
||||
{
|
||||
p_pusle_genB[0] = (pusle_gen_t) {
|
||||
.VBxH = VB3H_PIN,
|
||||
.VBxL = VB3L_PIN,
|
||||
.VAxH = VA3H_PIN,
|
||||
.VAxL = VA3L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = 2,
|
||||
};
|
||||
nrf_gpio_pin_clear(p_pulse_genB[0].VBxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[0].VBxH);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[0].VAxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[0].VAxH);
|
||||
}
|
||||
|
||||
if (pusle_gen_numb > 1)
|
||||
if(e4)
|
||||
{
|
||||
p_pusle_genB[1] = (pusle_gen_t) {
|
||||
.VBxH = VB4H_PIN,
|
||||
.VBxL = VB4L_PIN,
|
||||
.VAxH = VA4H_PIN,
|
||||
.VAxL = VA4L_PIN,
|
||||
.point_us[0] = 1,
|
||||
.point_us[1] = 50,
|
||||
.point_us[2] = 1,
|
||||
.point_us[3] = 0,
|
||||
.point_us[4] = 1,
|
||||
.point_us[5] = 50,
|
||||
.point_us[6] = 1,
|
||||
.idle_us = 1000,
|
||||
.pulse_cnt = UINT32_MAX,
|
||||
.pulse_id = 3,
|
||||
};
|
||||
nrf_gpio_pin_clear(p_pulse_genB[1].VBxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[1].VBxH);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[1].VAxL);
|
||||
nrf_gpio_pin_clear(p_pulse_genB[1].VAxH);
|
||||
}
|
||||
|
||||
|
||||
cpg11_pulse_init(0, p_pusle_genA, pusle_gen_numb);
|
||||
|
||||
cpg11_pulse_init(1, p_pusle_genB, pusle_gen_numb);
|
||||
|
||||
cpg11_pulse_start(0, p_pusle_genA);
|
||||
|
||||
cpg11_pulse_start(1, p_pusle_genB);
|
||||
|
||||
vTaskDelay(10);
|
||||
|
||||
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[0].pulse_id);
|
||||
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[1].pulse_id);
|
||||
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[2].pulse_id);
|
||||
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[3].pulse_id);
|
||||
// cpg11_pulse_stop_by_pulse_id(p_pusle_gen[4].pulse_id);
|
||||
|
||||
vPortFree(p_pusle_genA);
|
||||
vPortFree(p_pusle_genB);
|
||||
|
||||
for (;;)
|
||||
if (e1 && e2)
|
||||
{
|
||||
cpg11_pulse_init(0, p_pulse_genA, 2);
|
||||
cpg11_pulse_start(0, p_pulse_genA);
|
||||
}
|
||||
else if (e1 && e2==0)
|
||||
{
|
||||
cpg11_pulse_init(0, p_pulse_genA, 1);
|
||||
cpg11_pulse_start(0, p_pulse_genA);
|
||||
}
|
||||
else if (e2 && e1==0)
|
||||
{
|
||||
cpg11_pulse_init(0, &p_pulse_genA[1], 1);
|
||||
cpg11_pulse_start(0, &p_pulse_genA[1]);
|
||||
}
|
||||
|
||||
if (e3 && e4)
|
||||
{
|
||||
cpg11_pulse_init(1, p_pulse_genB, 2);
|
||||
cpg11_pulse_start(1, p_pulse_genB);
|
||||
}
|
||||
else if (e3 && e4==0)
|
||||
{
|
||||
cpg11_pulse_init(1, p_pulse_genB, 1);
|
||||
cpg11_pulse_start(1, p_pulse_genB);
|
||||
}
|
||||
else if (e4 && e3==0)
|
||||
{
|
||||
cpg11_pulse_init(1, &p_pulse_genB[1], 1);
|
||||
cpg11_pulse_start(1, &p_pulse_genB[1]);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void cpg11_io_init(void)
|
||||
@@ -326,20 +391,20 @@ void cpg11_io_init(void)
|
||||
const uint32_t pel_pins_default_high[] = {
|
||||
LED_R_PIN,
|
||||
LED_G_PIN,
|
||||
LED_B_PIN,
|
||||
CS_MEM_PIN
|
||||
CS_MEM_PIN,
|
||||
ADPT_CLR_PIN
|
||||
};
|
||||
|
||||
const uint32_t pel_pins_default_low[] = {
|
||||
LED_B_PIN,
|
||||
TW_SCKI_0_PIN,
|
||||
TW_SCKI_1_PIN,
|
||||
ADPT_CLK,
|
||||
ADPT_CLK_PIN,
|
||||
HV_EN_PIN,
|
||||
SPIM_CLK_PIN,
|
||||
SPIM_MOSI_PIN,
|
||||
SPIM_MISO_PIN,
|
||||
ADPT_LE_PIN,
|
||||
ADPT_CLR_PIN,
|
||||
ADPT0_S4_PIN,
|
||||
ADPT0_S3_PIN,
|
||||
ADPT0_S2_PIN,
|
||||
@@ -385,31 +450,40 @@ void cpg11_io_init(void)
|
||||
nrf_gpio_cfg_input(AIN0_PIN, NRF_GPIO_PIN_NOPULL);
|
||||
nrf_gpio_cfg_input(AIN1_PIN, NRF_GPIO_PIN_NOPULL);
|
||||
|
||||
for (uint32_t i = 0; i < COUNTOF(pusle_gen_hw); i++)
|
||||
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
|
||||
{
|
||||
pusle_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pusle_gen_hw[i].TMR_B->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pusle_gen_hw[i].TMR_B->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
pulse_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pulse_gen_hw[i].TMR_B->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pulse_gen_hw[i].TMR_B->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
|
||||
pusle_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pusle_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pusle_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
pulse_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pulse_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pulse_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
|
||||
sd_nvic_SetPriority(pusle_gen_hw[i].IRQn, _PRIO_APP_HIGH);
|
||||
sd_nvic_SetPriority(pulse_gen_hw[i].IRQn, _PRIO_APP_HIGH);
|
||||
}
|
||||
|
||||
for (int i=0; i<2; i++) {
|
||||
pusle_gen_hw[i].p_pusle_gen[0].VAxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[0].VBxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[0].VAxL = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[0].VBxL = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[1].VAxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[1].VBxH = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[1].VAxL = 0xFFFFFFFF;
|
||||
pusle_gen_hw[i].p_pusle_gen[1].VBxL = 0xFFFFFFFF;
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
pulse_gen_hw[i].p_pulse_gen[0].VAxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[0].VBxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[0].VAxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[0].VBxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[1].VAxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[1].VBxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[1].VAxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].p_pulse_gen[1].VBxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[0].VAxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[0].VBxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[0].VAxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[0].VBxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[1].VAxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[1].VBxH = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[1].VAxL = 0xFFFFFFFF;
|
||||
pulse_gen_hw[i].private.p_pulse_gen[1].VBxL = 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
//cpg_pulse_default_demo_ext();
|
||||
cpg_pulse_default_demo_ext();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+9
-6
@@ -11,7 +11,7 @@ extern "C"
|
||||
#include "nrf_gpio.h"
|
||||
#include "nrf_spim.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
|
||||
#define UNDEF_GPIO 0xFFFFFFFF
|
||||
#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
|
||||
@@ -22,7 +22,7 @@ extern "C"
|
||||
#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
|
||||
#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
|
||||
#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
|
||||
#define ADPT_CLK NRF_GPIO_PIN_MAP(0, 11)
|
||||
#define ADPT_CLK_PIN NRF_GPIO_PIN_MAP(0, 11)
|
||||
#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
|
||||
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
|
||||
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
|
||||
@@ -72,7 +72,7 @@ extern "C"
|
||||
uint32_t point_us[7]; // toggle point timestamp
|
||||
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
|
||||
uint32_t pulse_id; // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
|
||||
} pusle_gen_t;
|
||||
} pulse_gen_t;
|
||||
|
||||
void spim_xfer(uint32_t cs_pin,
|
||||
nrf_spim_mode_t spi_mode,
|
||||
@@ -82,9 +82,12 @@ extern "C"
|
||||
uint16_t rx_buffer_length);
|
||||
|
||||
void cpg11_io_init(void);
|
||||
void cpg11_pulse_init(uint32_t hw_idx, pusle_gen_t *p_pusle_gen, uint32_t len);
|
||||
void cpg11_pulse_start(uint32_t idx, pusle_gen_t *p_pusle_gen);
|
||||
void cpg11_pulse_stop_by_pulse_id(uint32_t pulse_id);
|
||||
void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
|
||||
void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
|
||||
void cpg11_pulse_stop(uint32_t hw_idx);
|
||||
void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
|
||||
void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
|
||||
|
||||
#endif /* ! DEF_ELITE_MODEL */
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@@ -14,7 +14,7 @@
|
||||
|
||||
#include "nrf_log.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
|
||||
extern ret_code_t le_event_upadate(uint8_t *p_value, uint16_t len);
|
||||
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
|
||||
#define OUT_0 DAC0
|
||||
#define OUT_1 DAC1
|
||||
|
||||
+1
-1
@@ -14,7 +14,7 @@
|
||||
#include "dac_drv.h"
|
||||
#include "sw_drv.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
|
||||
//==========================================================
|
||||
// gpio
|
||||
|
||||
@@ -2,11 +2,11 @@
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
|
||||
#include "elite_dev.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
#include "edc.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
#include "pel.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
#include "cpg.h"
|
||||
#else
|
||||
#error "Unknown DEF_ELITE_MODEL"
|
||||
@@ -102,12 +102,12 @@ void elite_init(void)
|
||||
{
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
|
||||
p_instance = dev_init();
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
edc.init();
|
||||
p_instance = edc.p_elite_instance;
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
p_instance = pel_init();
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
p_instance = cpg_init();
|
||||
#else
|
||||
#error "Unknown DEF_ELITE_MODEL"
|
||||
|
||||
+7
-7
@@ -2,21 +2,21 @@
|
||||
|
||||
void elite_board_init(void)
|
||||
{
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
edc20_io_init();
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
pel10_io_init();
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
pel20_io_init();
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
cpg11_io_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
void elite_board_power_off(void)
|
||||
{
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
edc20_io_power_off();
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
+4
-4
@@ -15,11 +15,11 @@ extern "C"
|
||||
#include "sw_drv.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_20)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
|
||||
#include "edc20_io.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#include "pel10_io.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11)
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
#include "pel20_io.h"
|
||||
#elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
|
||||
#include "cpg11_io.h"
|
||||
#else
|
||||
#error "Not implemented xxx_io.h"
|
||||
|
||||
@@ -123,6 +123,7 @@ int main(void)
|
||||
NRF_LOG_INIT(NULL, 0);
|
||||
NRF_LOG_DEFAULT_BACKENDS_INIT();
|
||||
NRF_LOG_INFO("%s Build: %s %s", ELITE_DEVICE_NAME, __TIME__, __DATE__);
|
||||
NRF_LOG_INFO("Elite hw ver(%d.%d.%d.%d)", MAJOR_PRODUCT_NUMBER, MINOR_PRODUCT_NUMBER, MAJOR_VERSION_NUMBER, MINOR_VERSION_NUMBER);
|
||||
|
||||
nrf_sdh_freertos_init(nrf_sdh_freertos_task_hook, NULL); // create event: softdevice_task - wireless protocal stack
|
||||
|
||||
|
||||
+187
@@ -0,0 +1,187 @@
|
||||
#include "max14802.h"
|
||||
#include "elite_board.h"
|
||||
|
||||
#include "nrf_delay.h"
|
||||
#include "nrf_gpio.h"
|
||||
|
||||
#include "string.h"
|
||||
|
||||
#pragma GCC optimize("O2")
|
||||
|
||||
#if (DEF_MAX14802_ENABLED)
|
||||
|
||||
static sw_t m_sw = { .val = UINT64_MAX };
|
||||
|
||||
#define EXCLUDE_IO_ENABLE 1
|
||||
#define EXCLUDE_IO_DISABLE 0
|
||||
|
||||
static const uint32_t exclude_io[64] = {
|
||||
ADPT0_S1_PIN,
|
||||
ADPT0_S2_PIN,
|
||||
ADPT0_S3_PIN,
|
||||
ADPT0_S4_PIN,
|
||||
ADPT1_S1_PIN,
|
||||
ADPT1_S2_PIN,
|
||||
ADPT1_S3_PIN,
|
||||
ADPT1_S4_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
UNCONNECTED_PIN,
|
||||
};
|
||||
|
||||
static void shift_out(uint8_t *p, uint32_t len)
|
||||
{
|
||||
nrf_gpio_pin_clear(ADPT_LE_PIN);
|
||||
|
||||
for (int32_t j = len; j > 0; j--)
|
||||
{
|
||||
uint32_t val = p[j - 1];
|
||||
for (uint32_t i = 0x01 << (SW_PER_BYTE - 1); i > 0; i >>= 1)
|
||||
{
|
||||
nrf_gpio_pin_clear(ADPT_CLK_PIN);
|
||||
nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
|
||||
nrf_gpio_pin_set(ADPT_CLK_PIN);
|
||||
nrf_gpio_pin_write(ADPT_DIN_PIN, val & i);
|
||||
}
|
||||
}
|
||||
|
||||
nrf_gpio_pin_clear(ADPT_CLK_PIN);
|
||||
nrf_gpio_pin_clear(ADPT_DIN_PIN);
|
||||
nrf_gpio_pin_set(ADPT_LE_PIN);
|
||||
nrf_gpio_pin_clear(ADPT_LE_PIN);
|
||||
}
|
||||
|
||||
int max14802_reset(void)
|
||||
{
|
||||
m_sw.val = 0;
|
||||
shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int max14802_write(sw_t sw_mask)
|
||||
{
|
||||
if (m_sw.val != sw_mask.val)
|
||||
{
|
||||
m_sw = sw_mask;
|
||||
|
||||
// Disable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT
|
||||
|
||||
for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
|
||||
{
|
||||
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
|
||||
}
|
||||
|
||||
// Set max14082
|
||||
shift_out((uint8_t *)&m_sw.val, SW_TOTAL_COUNT / SW_PER_BYTE);
|
||||
|
||||
// Enable A1_AOUT,A2_AOUT,B1_AOUT, .... B3_AOUT, B4_AOUT are all disable when all max14082 off
|
||||
|
||||
if (m_sw.val == 0)
|
||||
{
|
||||
for (uint32_t i = 0; i < SW_TOTAL_COUNT; i++)
|
||||
{
|
||||
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_ENABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int max14802_read(sw_t *p_sw_mask)
|
||||
{
|
||||
*p_sw_mask = m_sw;
|
||||
return 0;
|
||||
}
|
||||
int max14802_get_sw_count(uint32_t *p_sw_count)
|
||||
{
|
||||
*p_sw_count = SW_TOTAL_COUNT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int max14802_init(void)
|
||||
{
|
||||
nrf_gpio_pin_set(ADPT_CLR_PIN);
|
||||
nrf_gpio_pin_clear(ADPT_LE_PIN);
|
||||
nrf_gpio_pin_clear(ADPT_CLK_PIN);
|
||||
nrf_gpio_pin_clear(ADPT_DIN_PIN);
|
||||
|
||||
nrf_gpio_cfg_output(ADPT_CLR_PIN);
|
||||
nrf_gpio_cfg_output(ADPT_LE_PIN);
|
||||
nrf_gpio_cfg_output(ADPT_CLK_PIN);
|
||||
nrf_gpio_cfg_output(ADPT_DIN_PIN);
|
||||
|
||||
for (uint32_t i = 0; i < COUNTOF(exclude_io); i++)
|
||||
{
|
||||
nrf_gpio_pin_write(exclude_io[i], EXCLUDE_IO_DISABLE);
|
||||
}
|
||||
|
||||
max14802_write((sw_t) { .val = 0 });
|
||||
|
||||
nrf_gpio_pin_clear(ADPT_CLR_PIN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const sw_drv_if_t max14802 = {
|
||||
.init = max14802_init,
|
||||
.reset = max14802_reset,
|
||||
.write = max14802_write,
|
||||
.read = max14802_read,
|
||||
.get_sw_count = max14802_get_sw_count,
|
||||
};
|
||||
|
||||
#endif
|
||||
+31
@@ -0,0 +1,31 @@
|
||||
#ifndef __MAX14802_H__
|
||||
#define __MAX14802_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "app_config.h"
|
||||
#include "sw_drv_if.h"
|
||||
|
||||
#if (DEF_MAX14802_ENABLED)
|
||||
|
||||
#define MAX14802_COUNT 1
|
||||
#define SW_PER_MAX14802 16
|
||||
#define SW_TOTAL_COUNT (SW_PER_MAX14802 * MAX14802_COUNT)
|
||||
#define SW_PER_BYTE 8
|
||||
|
||||
#if (SW_TOTAL_COUNT > 64)
|
||||
#error "unsupport"
|
||||
#endif /* ! SW_TOTAL_COUNT */
|
||||
|
||||
extern const sw_drv_if_t max14802;
|
||||
|
||||
#endif /* ! DEF_MAX14802_ENABLED */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // !__MAX14802_H__
|
||||
+1
-1
File diff suppressed because one or more lines are too long
@@ -1,5 +1,5 @@
|
||||
#include "pel.h"
|
||||
#include "pel10_io.h"
|
||||
#include "elite_board.h"
|
||||
|
||||
#include "elite_def.h"
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
#include "adc_drv.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
@@ -176,10 +176,10 @@ pel_output_t pel_smaple_and_convt_all(uint32_t measure_out, uint32_t load_mask)
|
||||
}
|
||||
|
||||
#define VERSION_DATE_YEAR 24
|
||||
#define VERSION_DATE_MONTH 7
|
||||
#define VERSION_DATE_DAY 30
|
||||
#define VERSION_DATE_HOUR 13
|
||||
#define VERSION_DATE_MINUTE 40
|
||||
#define VERSION_DATE_MONTH 10
|
||||
#define VERSION_DATE_DAY 8
|
||||
#define VERSION_DATE_HOUR 12
|
||||
#define VERSION_DATE_MINUTE 31
|
||||
static void cis_version(uint8_t *ins, uint16_t size)
|
||||
{
|
||||
NRF_LOG_INFO("%s", __FUNCTION__);
|
||||
@@ -488,7 +488,7 @@ static void dev_mode(uint8_t *ins, uint16_t size)
|
||||
}
|
||||
|
||||
case 0xF0: {
|
||||
pel10_io_init();
|
||||
pel20_io_init();
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
+46
-46
@@ -9,7 +9,7 @@
|
||||
#include "semphr.h"
|
||||
#include "task.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
|
||||
void spim_xfer(uint32_t cs_pin,
|
||||
nrf_spim_mode_t spi_mode,
|
||||
@@ -82,7 +82,7 @@ typedef struct
|
||||
uint32_t pulse_idle; // min: 2, max: 32767, unit: us
|
||||
uint32_t pulse_width; // min: 2, max: 32767, unit: us,
|
||||
uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
|
||||
} pusle_gen_t;
|
||||
} pulse_gen_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
@@ -90,9 +90,9 @@ typedef struct
|
||||
NRF_TIMER_Type *pulse_tmr;
|
||||
uint32_t pulse_irq_n;
|
||||
uint32_t pulse_cnt;
|
||||
} pusle_gen_hw_t;
|
||||
} pulse_gen_hw_t;
|
||||
|
||||
pusle_gen_hw_t pusle_gen_hw = {
|
||||
pulse_gen_hw_t pulse_gen_hw = {
|
||||
.gpiote_idx = {0, 1},
|
||||
.pulse_tmr = NRF_TIMER3,
|
||||
.pulse_irq_n = TIMER3_IRQn,
|
||||
@@ -101,87 +101,87 @@ pusle_gen_hw_t pusle_gen_hw = {
|
||||
|
||||
void TIMER3_IRQHandler(void)
|
||||
{
|
||||
if (pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1])
|
||||
if (pulse_gen_hw.pulse_tmr->EVENTS_COMPARE[1])
|
||||
{
|
||||
pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1] = 0;
|
||||
pusle_gen_hw.pulse_cnt--;
|
||||
if (pusle_gen_hw.pulse_cnt == 1)
|
||||
pulse_gen_hw.pulse_tmr->EVENTS_COMPARE[1] = 0;
|
||||
pulse_gen_hw.pulse_cnt--;
|
||||
if (pulse_gen_hw.pulse_cnt == 1)
|
||||
{
|
||||
pusle_gen_hw.pulse_tmr->SHORTS |= NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
|
||||
pulse_gen_hw.pulse_tmr->SHORTS |= NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool pel10_pulse_gen(pusle_gen_t *p_pusle_gen)
|
||||
bool pel_pulse_gen(pulse_gen_t *p_pulse_gen)
|
||||
{
|
||||
/* hardware limitation */
|
||||
if (p_pusle_gen->pulse_cnt == 0 ||
|
||||
p_pusle_gen->pulse_idle < MIN_PULSE_IDLE ||
|
||||
p_pusle_gen->pulse_width < MIN_PULSE_WIDTH ||
|
||||
p_pusle_gen->pulse_idle > MAX_PULSE_IDLE ||
|
||||
p_pusle_gen->pulse_width > MAX_PULSE_WIDTH)
|
||||
if (p_pulse_gen->pulse_cnt == 0 ||
|
||||
p_pulse_gen->pulse_idle < MIN_PULSE_IDLE ||
|
||||
p_pulse_gen->pulse_width < MIN_PULSE_WIDTH ||
|
||||
p_pulse_gen->pulse_idle > MAX_PULSE_IDLE ||
|
||||
p_pulse_gen->pulse_width > MAX_PULSE_WIDTH)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
pusle_gen_hw.pulse_cnt = p_pusle_gen->pulse_cnt;
|
||||
pulse_gen_hw.pulse_cnt = p_pulse_gen->pulse_cnt;
|
||||
|
||||
pusle_gen_hw.pulse_tmr->TASKS_STOP = 1;
|
||||
pulse_gen_hw.pulse_tmr->TASKS_STOP = 1;
|
||||
|
||||
sd_nvic_DisableIRQ(pusle_gen_hw.pulse_irq_n);
|
||||
sd_nvic_ClearPendingIRQ(pusle_gen_hw.pulse_irq_n);
|
||||
sd_nvic_DisableIRQ(pulse_gen_hw.pulse_irq_n);
|
||||
sd_nvic_ClearPendingIRQ(pulse_gen_hw.pulse_irq_n);
|
||||
|
||||
nrf_gpiote_task_configure(pusle_gen_hw.gpiote_idx[0], p_pusle_gen->anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
|
||||
nrf_gpiote_task_configure(pusle_gen_hw.gpiote_idx[1], p_pusle_gen->cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
nrf_gpiote_task_configure(pulse_gen_hw.gpiote_idx[0], p_pulse_gen->anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
|
||||
nrf_gpiote_task_configure(pulse_gen_hw.gpiote_idx[1], p_pulse_gen->cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
|
||||
|
||||
nrf_gpiote_task_enable(pusle_gen_hw.gpiote_idx[0]);
|
||||
nrf_gpiote_task_enable(pusle_gen_hw.gpiote_idx[1]);
|
||||
nrf_gpiote_task_enable(pulse_gen_hw.gpiote_idx[0]);
|
||||
nrf_gpiote_task_enable(pulse_gen_hw.gpiote_idx[1]);
|
||||
|
||||
NRF_PPI->CH[0].EEP = (uint32_t)&pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[0]];
|
||||
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[1]];
|
||||
NRF_PPI->CH[0].EEP = (uint32_t)&pulse_gen_hw.pulse_tmr->EVENTS_COMPARE[0];
|
||||
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw.gpiote_idx[0]];
|
||||
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw.gpiote_idx[1]];
|
||||
NRF_PPI->CHENSET = (1 << (0));
|
||||
|
||||
NRF_PPI->CH[1].EEP = (uint32_t)&pusle_gen_hw.pulse_tmr->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[0]];
|
||||
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pusle_gen_hw.gpiote_idx[1]];
|
||||
NRF_PPI->CH[1].EEP = (uint32_t)&pulse_gen_hw.pulse_tmr->EVENTS_COMPARE[1];
|
||||
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw.gpiote_idx[0]];
|
||||
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw.gpiote_idx[1]];
|
||||
NRF_PPI->CHENSET = (1 << (1));
|
||||
|
||||
pusle_gen_hw.pulse_tmr->TASKS_CLEAR = 1;
|
||||
pulse_gen_hw.pulse_tmr->TASKS_CLEAR = 1;
|
||||
|
||||
pusle_gen_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pusle_gen_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pusle_gen_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
pusle_gen_hw.pulse_tmr->CC[0] = p_pusle_gen->pulse_idle * 16;
|
||||
pusle_gen_hw.pulse_tmr->CC[1] = pusle_gen_hw.pulse_tmr->CC[0] + p_pusle_gen->pulse_width * 16;
|
||||
pusle_gen_hw.pulse_tmr->SHORTS = pusle_gen_hw.pulse_cnt > 1 ? NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK : NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
|
||||
pusle_gen_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE1_MASK;
|
||||
pulse_gen_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
||||
pulse_gen_hw.pulse_tmr->MODE = NRF_TIMER_MODE_TIMER;
|
||||
pulse_gen_hw.pulse_tmr->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
||||
pulse_gen_hw.pulse_tmr->CC[0] = p_pulse_gen->pulse_idle * 16;
|
||||
pulse_gen_hw.pulse_tmr->CC[1] = pulse_gen_hw.pulse_tmr->CC[0] + p_pulse_gen->pulse_width * 16;
|
||||
pulse_gen_hw.pulse_tmr->SHORTS = pulse_gen_hw.pulse_cnt > 1 ? NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK : NRF_TIMER_SHORT_COMPARE1_STOP_MASK;
|
||||
pulse_gen_hw.pulse_tmr->INTENSET = NRF_TIMER_INT_COMPARE1_MASK;
|
||||
|
||||
sd_nvic_SetPriority(pusle_gen_hw.pulse_irq_n, _PRIO_APP_HIGH);
|
||||
sd_nvic_EnableIRQ(pusle_gen_hw.pulse_irq_n);
|
||||
sd_nvic_SetPriority(pulse_gen_hw.pulse_irq_n, _PRIO_APP_HIGH);
|
||||
sd_nvic_EnableIRQ(pulse_gen_hw.pulse_irq_n);
|
||||
|
||||
pusle_gen_hw.pulse_tmr->TASKS_START = 1;
|
||||
pulse_gen_hw.pulse_tmr->TASKS_START = 1;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void pel10_pulse_gen_demo(void)
|
||||
void pel_pulse_gen_demo(void)
|
||||
{
|
||||
pusle_gen_t pusle_gen = {
|
||||
pulse_gen_t pulse_gen = {
|
||||
.anode_pin = ANODE_PIN,
|
||||
.cathode_pin = CATHODE_PIN,
|
||||
.pulse_width = 10,
|
||||
.pulse_idle = 10,
|
||||
.pulse_idle = 1000,
|
||||
.pulse_cnt = 0xFFFFFFFF
|
||||
};
|
||||
|
||||
if (pel10_pulse_gen(&pusle_gen) == false)
|
||||
if (pel_pulse_gen(&pulse_gen) == false)
|
||||
{
|
||||
// fail handling
|
||||
}
|
||||
}
|
||||
|
||||
void pel10_io_init(void)
|
||||
void pel20_io_init(void)
|
||||
{
|
||||
const uint32_t pel_pins_default_high[] = {
|
||||
INPUT_1_PIN,
|
||||
@@ -242,7 +242,7 @@ void pel10_io_init(void)
|
||||
NRF_SPIM3->PSEL.MISO = SPIM_MISO_PIN;
|
||||
NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
|
||||
|
||||
pel10_pulse_gen_demo();
|
||||
pel_pulse_gen_demo();
|
||||
}
|
||||
|
||||
#endif
|
||||
+19
-18
@@ -1,8 +1,9 @@
|
||||
#ifndef __PEL10_IO_H__
|
||||
#define __PEL10_IO_H__
|
||||
#ifndef __PEL20_IO_H__
|
||||
#define __PEL20_IO_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "app_config.h"
|
||||
@@ -10,7 +11,7 @@ extern "C" {
|
||||
#include "nrf_gpio.h"
|
||||
#include "nrf_spim.h"
|
||||
|
||||
#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_10)
|
||||
#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
|
||||
|
||||
#define RELAY1_PIN NRF_GPIO_PIN_MAP(1, 10)
|
||||
#define RELAY2_PIN NRF_GPIO_PIN_MAP(1, 15)
|
||||
@@ -18,20 +19,20 @@ extern "C" {
|
||||
#define SAMPLE_R_PIN NRF_GPIO_PIN_MAP(1, 11)
|
||||
#define SAMPLE_V_PIN NRF_GPIO_PIN_MAP(1, 6)
|
||||
|
||||
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 7)
|
||||
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 8)
|
||||
#define CATHODE_PIN NRF_GPIO_PIN_MAP(0, 8)
|
||||
#define ANODE_PIN NRF_GPIO_PIN_MAP(0, 7)
|
||||
|
||||
#define OUTPUT_R1_PIN NRF_GPIO_PIN_MAP(0, 31)
|
||||
#define OUTPUT_R2_PIN NRF_GPIO_PIN_MAP(0, 28)
|
||||
#define OUTPUT_VO_PIN NRF_GPIO_PIN_MAP(0, 29)
|
||||
#define OUTPUT_VC_PIN NRF_GPIO_PIN_MAP(0, 3)
|
||||
#define OUTPUT_VE_PIN NRF_GPIO_PIN_MAP(0, 2)
|
||||
#define OUTPUT_VC_PIN NRF_GPIO_PIN_MAP(0, 2)
|
||||
#define OUTPUT_VE_PIN NRF_GPIO_PIN_MAP(0, 3)
|
||||
|
||||
#define OUTPUT_R1_CHANNEL 7
|
||||
#define OUTPUT_R2_CHANNEL 4
|
||||
#define OUTPUT_VO_CHANNEL 5
|
||||
#define OUTPUT_VC_CHANNEL 1
|
||||
#define OUTPUT_VE_CHANNEL 0
|
||||
#define OUTPUT_VC_CHANNEL 0
|
||||
#define OUTPUT_VE_CHANNEL 1
|
||||
|
||||
#define OUTPUT_R1_IDX 0
|
||||
#define OUTPUT_R2_IDX 1
|
||||
@@ -58,14 +59,14 @@ extern "C" {
|
||||
#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 4)
|
||||
#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
|
||||
|
||||
void spim_xfer(uint32_t cs_pin,
|
||||
nrf_spim_mode_t spi_mode,
|
||||
uint8_t *p_tx_buffer,
|
||||
uint16_t tx_buffer_length,
|
||||
uint8_t *p_rx_buf,
|
||||
uint16_t rx_buffer_length);
|
||||
void spim_xfer(uint32_t cs_pin,
|
||||
nrf_spim_mode_t spi_mode,
|
||||
uint8_t *p_tx_buffer,
|
||||
uint16_t tx_buffer_length,
|
||||
uint8_t *p_rx_buf,
|
||||
uint16_t rx_buffer_length);
|
||||
|
||||
void pel10_io_init(void);
|
||||
void pel20_io_init(void);
|
||||
|
||||
#endif /* ! DEF_ELITE_MODEL */
|
||||
|
||||
@@ -73,4 +74,4 @@ void pel10_io_init(void);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ! __PEL10_IO_H__ */
|
||||
#endif /* ! __PEL20_IO_H__ */
|
||||
Reference in New Issue
Block a user