Compare commits
20 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| c79f2a0e92 | |||
| c92b25e217 | |||
| 2f4f257974 | |||
| 7adcdf064f | |||
| 94eb567d9b | |||
| 536bc23896 | |||
| 7deb709946 | |||
| 25267411d8 | |||
| 200feead76 | |||
| f445550b4e | |||
| dfbbfe4e07 | |||
| 57e5c1a9e2 | |||
| ba192ccce8 | |||
| aae1ab7a33 | |||
| 59148cff6d | |||
| c9b10fc6aa | |||
| f82c3ab033 | |||
| 3884fad006 | |||
| 75ca525f36 | |||
| 9bb947f8e0 |
@@ -470,7 +470,6 @@ class CC2650Device(Device):
|
||||
# receive
|
||||
data = self._master.read_characteristic(self.device_id, CC2650MasterDevice.RETURN_HANDLE)
|
||||
data = self._decode_data(DeviceInstruction.CIS_VERSION, data)
|
||||
print('data:',list(data))
|
||||
|
||||
except SendInstructionTimeoutError:
|
||||
self._master.log_warn('device', self.device_id, 'update_device_version no response')
|
||||
@@ -484,13 +483,19 @@ class CC2650Device(Device):
|
||||
day = struct.unpack('<B', data[4:5])[0]
|
||||
hour = struct.unpack('<B', data[5:6])[0]
|
||||
minute = struct.unpack('<B', data[6:7])[0]
|
||||
# mac1 = struct.unpack('<B', data[7:8])[0]
|
||||
# mac2 = struct.unpack('<B', data[8:9])[0]
|
||||
# mac1 = "%02X" % mac1
|
||||
# mac2 = "%02X" % mac2
|
||||
|
||||
self._device_version = str(year) + '/' + str(month) + '/' + str(day) + " " + str(hour) + ":" + str(
|
||||
minute)
|
||||
# + " | " + str(mac1) + ":" + str(mac2)
|
||||
|
||||
@property
|
||||
def battery(self) -> int:
|
||||
self.update_battery_info()
|
||||
if self._start_flag == False:
|
||||
self.update_battery_info()
|
||||
return self._battery
|
||||
|
||||
@property
|
||||
@@ -2031,22 +2036,32 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
ins.append(0xF1)
|
||||
self._interface.flush_input()
|
||||
|
||||
try:
|
||||
self.log_verbose('[CC2650]', 'scan_callback att_write','0x'+str.upper(ins.hex()))
|
||||
self._cc2650.send("bytes", bytes(ins))
|
||||
|
||||
except SerialTimeoutException:
|
||||
self.log_verbose('[CC2650]', 'scan_callback send fail')
|
||||
|
||||
else:
|
||||
for _ in range(5):
|
||||
try:
|
||||
scan_response = self._cc2650.recv_uart(0.01)
|
||||
self.log_verbose('[CC2650]', 'scan_callback att_write','0x'+str.upper(ins.hex()))
|
||||
self._cc2650.send("bytes", bytes(ins))
|
||||
|
||||
except RecvTimeout:
|
||||
self.log_verbose('[CC2650]', 'scan_callback response timeout, no device')
|
||||
return False
|
||||
except SerialTimeoutException:
|
||||
self.log_verbose('[CC2650]', 'scan_callback send fail, rescan')
|
||||
continue
|
||||
|
||||
else:
|
||||
try:
|
||||
scan_response = self._cc2650.recv_uart(0.01)
|
||||
|
||||
except RecvTimeout:
|
||||
self.log_verbose('[CC2650]', 'scan_callback response timeout, no device, rescan')
|
||||
continue
|
||||
|
||||
else:
|
||||
if scan_response is None:
|
||||
self.log_verbose('[CC2650]', 'scan_callback response is None, rescan')
|
||||
continue
|
||||
else:
|
||||
break
|
||||
|
||||
if scan_response is None:
|
||||
self.log_verbose('[CC2650]', 'scan_callback response is None--2')
|
||||
return False
|
||||
|
||||
scan_response_hex = ''.join(format(i, '02X') for i in scan_response)
|
||||
@@ -2131,6 +2146,7 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
addr_type = response.addr_type
|
||||
address_s = cc2650.address_str(address)
|
||||
|
||||
connected = False
|
||||
connect_response = None
|
||||
ins = bytearray()
|
||||
|
||||
@@ -2158,33 +2174,43 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
else:
|
||||
try:
|
||||
connect_response = self._cc2650.recv_uart(2)
|
||||
print('!!connect_response:', list(connect_response))
|
||||
except RecvTimeout:
|
||||
self.log_verbose('[CC2650]', 'connect response timeout')
|
||||
# self.log_verbose('[CC2650]', 'connect response timeout')
|
||||
if retry < 5:
|
||||
self.log_verbose('[CC2650]', 'connect retry')
|
||||
continue
|
||||
else:
|
||||
break
|
||||
|
||||
|
||||
if connect_response is None:
|
||||
self.log_verbose('[CC2650]', 'connect response timeout')
|
||||
return False
|
||||
|
||||
pack_len = connect_response[0]
|
||||
connect_ack = connect_response[1:pack_len+1]
|
||||
|
||||
if connect_ack == [3]:
|
||||
connect_response_hex = ''.join(format(i, '02X') for i in connect_response)
|
||||
self.log_verbose('[CC2650]', 'connect success', '0x'+connect_response_hex)
|
||||
if pack_len == 1:
|
||||
if connect_ack[0] == 3:
|
||||
connected = True
|
||||
connect_response_hex = ''.join(format(i, '02X') for i in connect_response)
|
||||
self.log_verbose('[CC2650]', 'connect success', '0x'+connect_response_hex)
|
||||
|
||||
elif pack_len == 4:
|
||||
if connect_ack[0] == 46 and connect_ack[1] == 80 and \
|
||||
connect_ack[2] == 48 and connect_ack[3] == 4:
|
||||
connected = True
|
||||
connect_response_hex = ''.join(format(i, '02X') for i in connect_response)
|
||||
self.log_verbose('[CC2650]', 'connect success', '0x'+connect_response_hex)
|
||||
|
||||
if connected == True:
|
||||
# CC2650Device(device_id, master, scan_response) is a slave device
|
||||
# device_id is don't care, because it will be overwrite later
|
||||
dont_care = 0
|
||||
self._device = ret = CC2650Device(device_id=dont_care, master=self, response_info=response)
|
||||
self.log_verbose('[CC2650]', DEVICE_CONNECTED, address_s)
|
||||
return ret
|
||||
|
||||
self.log_verbose('[CC2650]', 'connect fail')
|
||||
|
||||
connect_response_hex = ''.join(format(i, '02X') for i in connect_response)
|
||||
self.log_verbose('[CC2650]', 'connect fail', '0x'+connect_response_hex)
|
||||
return False
|
||||
|
||||
@synchronized
|
||||
@@ -2196,7 +2222,7 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
ins.append(0xF1)
|
||||
self._interface.flush_input()
|
||||
|
||||
for _ in range(5):
|
||||
for retry in range(5):
|
||||
try:
|
||||
self.log_verbose('[CC2650]', 'disconnect att_write','0x'+str.upper(ins.hex()))
|
||||
self._cc2650.send("bytes", bytes(ins))
|
||||
@@ -2210,6 +2236,30 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
self.reset_hardware()
|
||||
self.log_verbose('[CC2650]', 'disconnect success')
|
||||
return True
|
||||
# try:
|
||||
# disconnect_response = self._cc2650.recv_uart(0.01)
|
||||
# print(disconnect_response)
|
||||
|
||||
# except RecvTimeout:
|
||||
# self.log_verbose('[CC2650]', 'disconnect response timeout')
|
||||
# if retry < 5:
|
||||
# self.log_verbose('[CC2650]', 'connect retry')
|
||||
# continue
|
||||
# else:
|
||||
# break
|
||||
|
||||
# if disconnect_response is None:
|
||||
# return False
|
||||
|
||||
# pack_len = disconnect_response[0]
|
||||
# disconnect_ack = disconnect_response[1:pack_len+1]
|
||||
|
||||
# if disconnect_ack == [3]:
|
||||
# disconnect_response_hex = ''.join(format(i, '02X') for i in disconnect_response)
|
||||
# self.log_verbose('[CC2650]', 'disconnect success', '0x'+disconnect_response_hex)
|
||||
# self.reset_internal()
|
||||
# self.reset_hardware()
|
||||
# return True
|
||||
|
||||
self.log_verbose('[CC2650]', 'disconnect fail')
|
||||
return False
|
||||
@@ -2242,6 +2292,7 @@ class CC2650SingleMasterCentralDevice(CC2650MasterDevice, Synchronized):
|
||||
self.log_verbose('[CC2650]', 'write_characteristic response timeout')
|
||||
|
||||
if write_response is None:
|
||||
self.log_verbose('[CC2650]', 'write_characteristic fail')
|
||||
return False
|
||||
|
||||
pack_len = write_response[0]
|
||||
|
||||
@@ -854,7 +854,8 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
|
||||
|
||||
__slots__ = ('_message', '_cycle_number', '_start_return_data', '_time_stamp',
|
||||
'_total_time_stamp', '_mode', '_cycle_start_time',
|
||||
'_mode_stop', '_show_data')
|
||||
'_mode_stop', '_show_data',
|
||||
'_last_mem_wrong_information', '_last_mem_cnt', '_last_elite_notify_times')
|
||||
|
||||
def __init__(self):
|
||||
super().__init__()
|
||||
@@ -871,6 +872,10 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
|
||||
|
||||
self._show_data = False
|
||||
|
||||
self._last_mem_wrong_information = -1
|
||||
self._last_mem_cnt = -1
|
||||
self._last_elite_notify_times = -1
|
||||
|
||||
@property
|
||||
def name(self) -> str:
|
||||
return self.NAME
|
||||
@@ -935,6 +940,19 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
|
||||
# self._show_data = True
|
||||
|
||||
mem_wrong_information = struct.unpack('<i', data[43:47])[0] # mem_wrong_information = green retry, green wrong, red retry, red wrong
|
||||
|
||||
if mem_wrong_information != self._last_mem_wrong_information:
|
||||
print(datetime.now(), 'device', str(self.device), 'mem_wrong_information[43:47]:', data[43:47], mem_wrong_information, self._last_mem_wrong_information, flush = True)
|
||||
if mem_cnt != self._last_mem_cnt+1:
|
||||
if not (mem_cnt == 0 and self._last_mem_cnt == 255):
|
||||
print(datetime.now(), 'device', str(self.device), 'mem_cnt:', mem_cnt, 'self._last_mem_cnt:', self._last_mem_cnt, flush = True)
|
||||
if (elite_notify_times != self._last_elite_notify_times+1) and not (elite_notify_times == 0 and self._last_elite_notify_times == 0):
|
||||
if not (elite_notify_times == 0 and self._last_elite_notify_times == 255):
|
||||
print(datetime.now(), 'device', str(self.device), 'elite_notify_times:', elite_notify_times, 'self._elite_notify_times:', self._last_elite_notify_times, flush = True)
|
||||
self._last_mem_wrong_information = mem_wrong_information
|
||||
self._last_mem_cnt = mem_cnt
|
||||
self._last_elite_notify_times = elite_notify_times
|
||||
|
||||
ram_num = data[47]
|
||||
broken_flag = data[-1]
|
||||
|
||||
|
||||
@@ -372,7 +372,6 @@ class InternalInstruction(SingleInstruction):
|
||||
|
||||
else:
|
||||
data = [v for v in data]
|
||||
print('cdr data:', data)
|
||||
|
||||
parser.parse_instruction(context, data)
|
||||
|
||||
@@ -777,12 +776,6 @@ class InstructionDataContent(InstructionContent):
|
||||
|
||||
def parse_instruction(self, context: Scope, buffer: List[int], offset: int = 0, shift: int = 0) -> Tuple[int, int]:
|
||||
|
||||
print('self._width', self._width)
|
||||
print('self._width.size', self._width.size)
|
||||
|
||||
for _ in range (self._width.size - len(buffer)):
|
||||
buffer.append(0)
|
||||
|
||||
if self._width.is_array:
|
||||
raise NotImplementedError()
|
||||
|
||||
@@ -796,20 +789,22 @@ class InstructionDataContent(InstructionContent):
|
||||
|
||||
value = 0
|
||||
|
||||
for i in range(self._width.size):
|
||||
if self._width.little_endian:
|
||||
value |= (buffer[offset] << (1 * i))
|
||||
else:
|
||||
value = (value << 8) | buffer[offset]
|
||||
if self._width.size == 1:
|
||||
value = buffer[offset]
|
||||
offset += 1
|
||||
|
||||
else:
|
||||
buffer.extend([0]*(self._width.size-len(buffer)))
|
||||
for i in range(self._width.size):
|
||||
if self._width.little_endian:
|
||||
value |= (buffer[offset] << (1 * i))
|
||||
else:
|
||||
value = (value << 8) | buffer[offset]
|
||||
offset += 1
|
||||
|
||||
if len(self._value) > 0:
|
||||
context[self._value] = value
|
||||
|
||||
print('value',value)
|
||||
print('hex(value)',hex(value))
|
||||
|
||||
|
||||
return offset, 0
|
||||
|
||||
else:
|
||||
@@ -827,6 +822,7 @@ class InstructionDataContent(InstructionContent):
|
||||
if self._width.bytes_unit:
|
||||
if shift != 0:
|
||||
offset += 1
|
||||
|
||||
return offset + self._width.size, 0
|
||||
|
||||
else:
|
||||
|
||||
@@ -3708,8 +3708,8 @@ class CC2650Central(LoggerFlag):
|
||||
|
||||
def _recv_byte(self) -> Optional[int]:
|
||||
ret = self._recv_bytes(1)
|
||||
if ret is not None:
|
||||
print('packet = {0}'.format(hex(ret[0]).upper()))
|
||||
# if ret is not None:
|
||||
# print('packet = {0}'.format(hex(ret[0]).upper()))
|
||||
return ret[0] if ret is not None else None
|
||||
|
||||
def _recv_bytes(self, size: int = 1) -> Union[None, bytes]:
|
||||
|
||||
@@ -13,7 +13,7 @@ MSM_REG_WRITE = 0x01
|
||||
MEM_INS_WRITE = 0x02
|
||||
MEM_INS_READ = 0x03
|
||||
MEM_REG_READ = 0x05
|
||||
DEFAULT_REGISTER_VALUE = 0b0100_0011 # 67
|
||||
DEFAULT_REGISTER_VALUE = 0b0100_0001 # 0x41
|
||||
MEM_SIZE = 0x1000
|
||||
|
||||
_SLEEP_TIME_ = 0.001
|
||||
@@ -457,6 +457,16 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
|
||||
|
||||
self._spi.send_byte(tx)
|
||||
|
||||
def test_ram(self, channel: int):
|
||||
spi_MOSI = [MEM_INS_WRITE, 0, 0, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
|
||||
self._spi.send_byte(spi_MOSI)
|
||||
print('device:', channel, 'spi_MOSI:',spi_MOSI)
|
||||
|
||||
spi_MISO = [0] * len(spi_MOSI)
|
||||
spi_MISO[0:3] = [MEM_INS_READ, 0, 0]
|
||||
spi_MISO = self._spi.send_byte(spi_MISO)
|
||||
print('device:', channel, 'spi_MISO:', spi_MISO)
|
||||
|
||||
class ExtMemManager:
|
||||
def __init__(self, ext_mem: MultiExtMemSpiInterface):
|
||||
self._ext_mem = ext_mem
|
||||
@@ -493,28 +503,31 @@ class ExtMemManager:
|
||||
|
||||
ret[channel] = tuple(r)
|
||||
|
||||
print('ret=', ret)
|
||||
return ret
|
||||
|
||||
@staticmethod
|
||||
def is_no_device(result: Tuple[Optional[int], Optional[int]]) -> bool:
|
||||
def is_memory_test_fail(result: Tuple[Optional[int], Optional[int]], channel: int) -> int:
|
||||
r1, r2 = result
|
||||
return (r1 is None or r2 is None) and (r1 is None or r1 == 0) and (r2 is None or r2 == 0)
|
||||
r1_check = False
|
||||
r2_check = False
|
||||
|
||||
@staticmethod
|
||||
def is_memory_test_fail(result: Tuple[Optional[int], Optional[int]]) -> int:
|
||||
r1, r2 = result
|
||||
if r1 is not None and r1 != 0:
|
||||
if (r1 & 0b11000001 == DEFAULT_REGISTER_VALUE & 0b11000001):
|
||||
r1_check = True
|
||||
print('device:', channel, 'ram0 ready')
|
||||
|
||||
if r2 is not None and r2 != 0:
|
||||
if (r2 & 0b11000001 == DEFAULT_REGISTER_VALUE & 0b11000001):
|
||||
r2_check = True
|
||||
print('device:', channel, 'ram1 ready')
|
||||
print('--------------------')
|
||||
|
||||
if r1 is None or r2 is None:
|
||||
if r1_check and r2_check:
|
||||
return 0
|
||||
else:
|
||||
return 1
|
||||
|
||||
if r1 is not None and r1 > 0 and r1 != DEFAULT_REGISTER_VALUE:
|
||||
return 2
|
||||
|
||||
if r2 is not None and r2 > 0 and r2 != DEFAULT_REGISTER_VALUE:
|
||||
return 3
|
||||
|
||||
return 0
|
||||
|
||||
def get_available_channel(self, result: List[Tuple[Optional[int], Optional[int]]] = None) -> List[int]:
|
||||
if result is None:
|
||||
result = self.get_ext_mem_register()
|
||||
@@ -522,12 +535,14 @@ class ExtMemManager:
|
||||
ret = []
|
||||
|
||||
for channel, result in enumerate(result):
|
||||
if self.is_no_device(result):
|
||||
continue
|
||||
|
||||
if self.is_memory_test_fail(result) != 0:
|
||||
if self.is_memory_test_fail(result, channel) != 0:
|
||||
continue
|
||||
|
||||
ret.append(channel)
|
||||
|
||||
# test ram
|
||||
# for channel in self._ext_mem.foreach():
|
||||
# if channel == 4 or channel == 5:
|
||||
# self._ext_mem.test_ram(channel)
|
||||
|
||||
return ret
|
||||
|
||||
@@ -866,11 +866,13 @@ class RecordingFile:
|
||||
|
||||
# def write(self, content: Union[bytes, RecordingData]) -> int:
|
||||
def write(self, content: str, channels: list) -> int:
|
||||
if not isinstance(content, str):
|
||||
raise RuntimeError('wrong data format : ' + repr(self._data_format))
|
||||
# print('count_size', content, channels)
|
||||
# if not isinstance(content, str):
|
||||
# raise RuntimeError('wrong data format : ' + repr(self._data_format))
|
||||
|
||||
self._meta_file.update_channels(channels)
|
||||
sz = sys.getsizeof(content)
|
||||
# print('sz', sz)
|
||||
self._size += sz
|
||||
return sz
|
||||
|
||||
@@ -1154,15 +1156,15 @@ class RecordingFileWriter:
|
||||
self._send_data[ch] = False
|
||||
|
||||
if self._recording_file_dict[ch]._status:
|
||||
_data = ' '.join(self._data_db[ch])
|
||||
self._raw_save['data'][ch] = _data
|
||||
_data = self._data_db[ch]
|
||||
self._raw_save['data'][ch] = copy(_data)
|
||||
self._raw_save['id'][ch] = self._recording_file_dict[ch]._id_db
|
||||
self._recording_file_dict[ch].write(_data, self._channel_list)
|
||||
self._recording_file_dict[ch].close(self._time_now)
|
||||
self._meta._size += self._recording_file_dict[ch]._size
|
||||
# self._data_db.clear()
|
||||
if self._database is not None:
|
||||
self._database.put_queue(['data_raw_recording', self._raw_save['id'], self._channel_list, self._raw_save['data'], self._id_db_save])
|
||||
self._database.put_queue(['data_raw_recording_bytea', self._raw_save['id'], self._channel_list, self._raw_save['data'], self._id_db_save])
|
||||
# self._database.put_queue(['data_raw_recording', self._raw_save['id'], self._channel_list, self._raw_save['data']])
|
||||
self._recording_file_dict.clear()
|
||||
for scale in self._mini_scale_list:
|
||||
@@ -1324,8 +1326,8 @@ class RecordingFileWriter:
|
||||
# self._data_mini_ch[c]['10000']['random'].append( str(self._data_mini_ch[c]['1000']['random'][random.randint(-10,-1)]) )
|
||||
# self._data_mini_ch[c]['1000']['dec'] = int(len(self._data_mini_ch[c]['1000']['mean']) / 10)
|
||||
# add normal data
|
||||
self._data_db[c].append(str(int(t)))
|
||||
self._data_db[c].append(str(v))
|
||||
self._data_db[c].append(int(t))
|
||||
self._data_db[c].append(v)
|
||||
self._time_now = int(t)
|
||||
return
|
||||
|
||||
@@ -1417,9 +1419,9 @@ class RecordingFileWriter:
|
||||
for ch in self._data_db.keys():
|
||||
if self._time_now - self._time[ch] > 5000000:
|
||||
if self._recording_file_dict[ch]._status:
|
||||
_data = ' '.join(self._data_db[ch])
|
||||
_data = self._data_db[ch]
|
||||
write_sz = self._recording_file_dict[ch].write(_data, self._channel_list)
|
||||
self._raw_save['data'][ch] = _data
|
||||
self._raw_save['data'][ch] = copy(_data)
|
||||
self._raw_save['id'][ch] = self._recording_file_dict[ch]._id_db
|
||||
self._raw_save['end_time'][ch] = self._time_now
|
||||
self._raw_save['size'][ch] = self._recording_file_dict[ch]._size
|
||||
@@ -1446,9 +1448,15 @@ class RecordingFileWriter:
|
||||
|
||||
if data_save is True:
|
||||
if self._database is not None:
|
||||
recording_input = ['data_raw_recording_new', copy(self._raw_save['id']), copy(self._channel_list), copy(self._raw_save['data']), copy(self._raw_save['end_time']), copy(self._raw_save['size'])]
|
||||
recording_input = ['data_raw_recording_bytea', copy(self._raw_save['id']), copy(self._channel_list), copy(self._raw_save['data']), copy(self._raw_save['end_time']), copy(self._raw_save['size'])]
|
||||
self._database.put_queue(recording_input)
|
||||
self._meta.update_subfile_time_size(database = self._database)
|
||||
|
||||
# if data_save is True:
|
||||
# if self._database is not None:
|
||||
# recording_input = ['data_raw_recording_new', copy(self._raw_save['id']), copy(self._channel_list), copy(self._raw_save['data']), copy(self._raw_save['end_time']), copy(self._raw_save['size'])]
|
||||
# self._database.put_queue(recording_input)
|
||||
|
||||
if mini_save is True:
|
||||
if self._database is not None:
|
||||
for scale in self._mini_scale_list:
|
||||
|
||||
@@ -70,7 +70,7 @@ class DataBaseProcess(Process):
|
||||
self._data_raw_create_sql_str = None
|
||||
self._data_raw_update_sql_str = None
|
||||
self._data_raw_recording_sql_str = 'UPDATE "public"."%s_recording_data_raws" SET data = concat(data, %s) where id = %s'
|
||||
self._new_data_raw_recording_sql_str = 'UPDATE "public"."%s_recording_data_raws" SET data = concat(data, %s), end_time=%s, size=%s where id = %s'
|
||||
self._new_data_raw_recording_sql_str = 'UPDATE "public"."%s_recording_data_raws" SET bytea_data = bytea_data || %s, end_time=%s, size=%s where id = %s'
|
||||
self._data_mini_recording_sql_str = 'UPDATE "public"."%s_recording_data_minis" SET data_mean = concat(data_mean, %s) where id = %s'
|
||||
|
||||
@property
|
||||
@@ -325,6 +325,7 @@ class DataBaseProcess(Process):
|
||||
|
||||
# @calculate_time()
|
||||
def data_raw_create(self, _data_dict, _channel_list, device_id):
|
||||
print('data_raw_create', _data_dict, _channel_list, device_id)
|
||||
if self._data_raw_create_sql_str == None:
|
||||
sql_str_list = []
|
||||
key_list = _data_dict[_channel_list[0]].keys()
|
||||
@@ -582,3 +583,17 @@ class DataBaseProcess(Process):
|
||||
self._queue_ds[int(device_id)].put(['project_id', int(sql_cursor.fetchone()[0])])
|
||||
self._psql_conn.commit()
|
||||
sql_cursor.close()
|
||||
|
||||
def data_raw_recording_bytea(self, _id_dict, _channel_list, _data_dict, _end_time_dict, _size_dict):
|
||||
# print('data_raw_recording_bytea', _id_dict, _channel_list, _data_dict, _end_time_dict, _size_dict)
|
||||
try:
|
||||
para_list = []
|
||||
for _channel in _channel_list:
|
||||
bytes_data = b''.join([int.to_bytes(i, 8, 'big', signed=True) for i in _data_dict[_channel]])
|
||||
para_list.append([_channel, bytes_data, _end_time_dict[_channel], _size_dict[_channel], _id_dict[_channel]])
|
||||
with self._psql_conn as conn:
|
||||
with conn.cursor() as sql_cursor:
|
||||
execute_batch(sql_cursor, self._new_data_raw_recording_sql_str, para_list)
|
||||
except psycopg2.Error as e:
|
||||
print('recording error', e)
|
||||
return None
|
||||
|
||||
@@ -868,7 +868,7 @@ class ControlServer(SocketServer, ControlServerAPI):
|
||||
mac_address = address_str(connect_device.mac_address)
|
||||
device = Device.get_device({"mac_address": mac_address})
|
||||
try:
|
||||
if connect_device.library.name.startswith('Elite_EIS_1.1'):
|
||||
if connect_device.library.name.startswith('Elite_EIS'):
|
||||
# update calibration version
|
||||
connect_device._device.update_cali_version()
|
||||
# check if is first time or calibration version is different
|
||||
|
||||
@@ -9,9 +9,189 @@
|
||||
"minor_version_number": 0
|
||||
},
|
||||
"constant": {
|
||||
"TIME_MAX": 100000
|
||||
"TIME_MAX": 100000,
|
||||
"BLE_WRITE_MAX": 255,
|
||||
"MODE_ALL_OUTPUT": 15,
|
||||
"ELITE_CH_PR0": 0,
|
||||
"ELITE_CH_D0": 1,
|
||||
"ELITE_CH_A0": 2,
|
||||
"ELITE_CH_A2": 3,
|
||||
"ELITE_CH_A3": 4,
|
||||
"ELITE_CH_A1": 5,
|
||||
"ELITE_CH_D1": 6,
|
||||
"ELITE_CH_PR1": 7,
|
||||
"PR0": 0,
|
||||
"PR1": 1,
|
||||
"D0": 2,
|
||||
"D1": 3,
|
||||
"A0": 4,
|
||||
"A1": 5,
|
||||
"A2": 6,
|
||||
"A3": 7
|
||||
},
|
||||
"parameters": {
|
||||
"USED": {
|
||||
"initial": [true, true, true, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_EARLY": {
|
||||
"initial": [5000, 5000, 5000, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_EARLY": {
|
||||
"initial": [true, false, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"CYCLE": {
|
||||
"initial": [10, 10, 10, 1, 1, 1, 1, 1],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 65535
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_MID0": {
|
||||
"initial": [30000, 30000, 30000, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_MID1": {
|
||||
"initial": [30000, 30000, 30000, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_MID2": {
|
||||
"initial": [0, 0, 0, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_MID3": {
|
||||
"initial": [0, 0, 0, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_MID0": {
|
||||
"initial": [true, true, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_MID1": {
|
||||
"initial": [false, false, true, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_MID2": {
|
||||
"initial": [false, false, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_MID3": {
|
||||
"initial": [false, false, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"T_LATE": {
|
||||
"initial": [0, 0, 0, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 86400000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"V_LATE": {
|
||||
"initial": [false, false, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"CURRENT": {
|
||||
"initial": [0, 0, 0, 0, 0, 0, 0, 0],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 50000
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"OUTPUT_5V": {
|
||||
"initial": [false, false, false, false, false, false, false, false],
|
||||
"domain": {
|
||||
"list": [
|
||||
0, 2
|
||||
]
|
||||
},
|
||||
"value": "VALUE"
|
||||
},
|
||||
"ADC_VALUE_I": {
|
||||
"description": "ADC value current value",
|
||||
"domain": "int"
|
||||
},
|
||||
"BLE_WRITE": {
|
||||
"description": "send msg to elite",
|
||||
"domain": {
|
||||
"list": [
|
||||
"BLE_WRITE_MAX"
|
||||
]
|
||||
},
|
||||
"initial": "[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]",
|
||||
"value": "VALUE"
|
||||
},
|
||||
"BLE_READ": {
|
||||
"description": "receive msg from elite",
|
||||
"domain": "int"
|
||||
},
|
||||
"TIME_DURATION": {
|
||||
"description": "timer",
|
||||
"record_meta": true,
|
||||
@@ -152,16 +332,16 @@
|
||||
"MODE": {
|
||||
"description": "working mode",
|
||||
"record_meta": true,
|
||||
"initial": 3,
|
||||
"value": [
|
||||
"Analog Current Control (ACC)",
|
||||
"Idle"
|
||||
"Idle",
|
||||
"Dev Mode",
|
||||
"Protocal 1",
|
||||
"Protocal 2",
|
||||
"Trigger"
|
||||
]
|
||||
},
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
"CHANNEL": {
|
||||
"description": "delete it",
|
||||
"record_meta": true,
|
||||
@@ -220,7 +400,10 @@
|
||||
{
|
||||
"expression": "MODE",
|
||||
"when": {
|
||||
"0": "curve_acc"
|
||||
"0": "curve_acc",
|
||||
"3": "trig_timer_mode",
|
||||
"4": "trig_timer_mode",
|
||||
"5": "trig_timer_mode"
|
||||
}
|
||||
},
|
||||
"_sync(True)",
|
||||
@@ -245,6 +428,21 @@
|
||||
"CIS_VOLT",
|
||||
"_cdr('20X>ADC_VALUE_I')"
|
||||
],
|
||||
"ble_instru_send": [
|
||||
"ble_write",
|
||||
"_cdr('20X>ADC_VALUE_I')"
|
||||
],
|
||||
"ble_write": {
|
||||
"type": "RIS",
|
||||
"data": [
|
||||
"XFF;",
|
||||
"1B>BLE_WRITE[0];1B>BLE_WRITE[1];1B>BLE_WRITE[2];1B>BLE_WRITE[3];",
|
||||
"1B>BLE_WRITE[4];1B>BLE_WRITE[5];1B>BLE_WRITE[6];1B>BLE_WRITE[7];",
|
||||
"1B>BLE_WRITE[8];1B>BLE_WRITE[9];1B>BLE_WRITE[10];1B>BLE_WRITE[11];",
|
||||
"1B>BLE_WRITE[12];1B>BLE_WRITE[13];1B>BLE_WRITE[14];1B>BLE_WRITE[15];",
|
||||
"1B>BLE_WRITE[16];"
|
||||
]
|
||||
},
|
||||
"curve_acc": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
@@ -307,6 +505,677 @@
|
||||
"data": [
|
||||
"XE2;X02;X03;2B>ACC_a_out3_current;1B>ACC_a_out3"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode": [
|
||||
"trig_timer_mode_set_mode",
|
||||
{
|
||||
"expression": "USED[PR0]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_PR0"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[PR1]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_PR1"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[D0]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_D0"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[D1]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_D1"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[A0]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_A0"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[A1]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_A1"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[A2]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_A2"
|
||||
}
|
||||
},
|
||||
{
|
||||
"expression": "USED[A3]",
|
||||
"when": {
|
||||
"True": "trig_timer_mode_set_A3"
|
||||
}
|
||||
}
|
||||
],
|
||||
|
||||
"trig_timer_mode_set_mode": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1XFF;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_PR0": [
|
||||
"trig_timer_mode_set_PR0_para1",
|
||||
"trig_timer_mode_set_PR0_para2",
|
||||
"trig_timer_mode_set_PR0_para3"
|
||||
],
|
||||
"trig_timer_mode_set_PR0_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR0",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[PR0]",
|
||||
"v_early": "V_EARLY[PR0]",
|
||||
"v_late": "V_LATE[PR0]",
|
||||
"v_mid0": "V_MID0[PR0]",
|
||||
"v_mid1": "V_MID1[PR0]",
|
||||
"v_mid2": "V_MID2[PR0]",
|
||||
"v_mid3": "V_MID3[PR0]",
|
||||
"cycle": "CYCLE[PR0]",
|
||||
"t_early": "T_EARLY[PR0]",
|
||||
"t_late": "T_LATE[PR0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_PR0_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR0",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[PR0]",
|
||||
"t_mid1": "T_MID1[PR0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_PR0_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR0",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[PR0]",
|
||||
"t_mid3": "T_MID3[PR0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_PR1": [
|
||||
"trig_timer_mode_set_PR1_para1",
|
||||
"trig_timer_mode_set_PR1_para2",
|
||||
"trig_timer_mode_set_PR1_para3"
|
||||
],
|
||||
"trig_timer_mode_set_PR1_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR1",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[PR1]",
|
||||
"v_early": "V_EARLY[PR1]",
|
||||
"v_late": "V_LATE[PR1]",
|
||||
"v_mid0": "V_MID0[PR1]",
|
||||
"v_mid1": "V_MID1[PR1]",
|
||||
"v_mid2": "V_MID2[PR1]",
|
||||
"v_mid3": "V_MID3[PR1]",
|
||||
"cycle": "CYCLE[PR1]",
|
||||
"t_early": "T_EARLY[PR1]",
|
||||
"t_late": "T_LATE[PR1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_PR1_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR1",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[PR1]",
|
||||
"t_mid1": "T_MID1[PR1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_PR1_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_PR1",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[PR1]",
|
||||
"t_mid3": "T_MID3[PR1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_D0": [
|
||||
"trig_timer_mode_set_D0_para1",
|
||||
"trig_timer_mode_set_D0_para2",
|
||||
"trig_timer_mode_set_D0_para3",
|
||||
"trig_timer_mode_set_D0_para4"
|
||||
],
|
||||
"trig_timer_mode_set_D0_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D0",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[D0]",
|
||||
"v_early": "V_EARLY[D0]",
|
||||
"v_late": "V_LATE[D0]",
|
||||
"v_mid0": "V_MID0[D0]",
|
||||
"v_mid1": "V_MID1[D0]",
|
||||
"v_mid2": "V_MID2[D0]",
|
||||
"v_mid3": "V_MID3[D0]",
|
||||
"cycle": "CYCLE[D0]",
|
||||
"t_early": "T_EARLY[D0]",
|
||||
"t_late": "T_LATE[D0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D0_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D0",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[D0]",
|
||||
"t_mid1": "T_MID1[D0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D0_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D0",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[D0]",
|
||||
"t_mid3": "T_MID3[D0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D0_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D0",
|
||||
"para_sequence": 4,
|
||||
"d0_as_5v_en": "OUTPUT_5V[D0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"1B>d0_as_5v_en;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_D1": [
|
||||
"trig_timer_mode_set_D1_para1",
|
||||
"trig_timer_mode_set_D1_para2",
|
||||
"trig_timer_mode_set_D1_para3",
|
||||
"trig_timer_mode_set_D1_para4"
|
||||
],
|
||||
"trig_timer_mode_set_D1_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D1",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[D1]",
|
||||
"v_early": "V_EARLY[D1]",
|
||||
"v_late": "V_LATE[D1]",
|
||||
"v_mid0": "V_MID0[D1]",
|
||||
"v_mid1": "V_MID1[D1]",
|
||||
"v_mid2": "V_MID2[D1]",
|
||||
"v_mid3": "V_MID3[D1]",
|
||||
"cycle": "CYCLE[D1]",
|
||||
"t_early": "T_EARLY[D1]",
|
||||
"t_late": "T_LATE[D1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D1_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D1",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[D1]",
|
||||
"t_mid1": "T_MID1[D1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D1_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D1",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[D1]",
|
||||
"t_mid3": "T_MID3[D1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_D1_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_D1",
|
||||
"para_sequence": 4,
|
||||
"d0_as_5v_en": "OUTPUT_5V[D1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"1B>d0_as_5v_en;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_A0": [
|
||||
"trig_timer_mode_set_A0_para1",
|
||||
"trig_timer_mode_set_A0_para2",
|
||||
"trig_timer_mode_set_A0_para3",
|
||||
"trig_timer_mode_set_A0_para4"
|
||||
],
|
||||
"trig_timer_mode_set_A0_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A0",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[A0]",
|
||||
"v_early": "V_EARLY[A0]",
|
||||
"v_late": "V_LATE[A0]",
|
||||
"v_mid0": "V_MID0[A0]",
|
||||
"v_mid1": "V_MID1[A0]",
|
||||
"v_mid2": "V_MID2[A0]",
|
||||
"v_mid3": "V_MID3[A0]",
|
||||
"cycle": "CYCLE[A0]",
|
||||
"t_early": "T_EARLY[A0]",
|
||||
"t_late": "T_LATE[A0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A0_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A0",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[A0]",
|
||||
"t_mid1": "T_MID1[A0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A0_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A0",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[A0]",
|
||||
"t_mid3": "T_MID3[A0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A0_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A0",
|
||||
"para_sequence": 4,
|
||||
"current": "CURRENT[A0]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"2B>current;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_A1": [
|
||||
"trig_timer_mode_set_A1_para1",
|
||||
"trig_timer_mode_set_A1_para2",
|
||||
"trig_timer_mode_set_A1_para3",
|
||||
"trig_timer_mode_set_A1_para4"
|
||||
],
|
||||
"trig_timer_mode_set_A1_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A1",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[A1]",
|
||||
"v_early": "V_EARLY[A1]",
|
||||
"v_late": "V_LATE[A1]",
|
||||
"v_mid0": "V_MID0[A1]",
|
||||
"v_mid1": "V_MID1[A1]",
|
||||
"v_mid2": "V_MID2[A1]",
|
||||
"v_mid3": "V_MID3[A1]",
|
||||
"cycle": "CYCLE[A1]",
|
||||
"t_early": "T_EARLY[A1]",
|
||||
"t_late": "T_LATE[A1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A1_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A1",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[A1]",
|
||||
"t_mid1": "T_MID1[A1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A1_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A1",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[A1]",
|
||||
"t_mid3": "T_MID3[A1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A1_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A1",
|
||||
"para_sequence": 4,
|
||||
"current": "CURRENT[A1]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"2B>current;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_A2": [
|
||||
"trig_timer_mode_set_A2_para1",
|
||||
"trig_timer_mode_set_A2_para2",
|
||||
"trig_timer_mode_set_A2_para3",
|
||||
"trig_timer_mode_set_A2_para4"
|
||||
],
|
||||
"trig_timer_mode_set_A2_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A2",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[A2]",
|
||||
"v_early": "V_EARLY[A2]",
|
||||
"v_late": "V_LATE[A2]",
|
||||
"v_mid0": "V_MID0[A2]",
|
||||
"v_mid1": "V_MID1[A2]",
|
||||
"v_mid2": "V_MID2[A2]",
|
||||
"v_mid3": "V_MID3[A2]",
|
||||
"cycle": "CYCLE[A2]",
|
||||
"t_early": "T_EARLY[A2]",
|
||||
"t_late": "T_LATE[A2]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A2_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A2",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[A2]",
|
||||
"t_mid1": "T_MID1[A2]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A2_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A2",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[A2]",
|
||||
"t_mid3": "T_MID3[A2]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A2_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A2",
|
||||
"para_sequence": 4,
|
||||
"current": "CURRENT[A2]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"2B>current;"
|
||||
]
|
||||
},
|
||||
|
||||
"trig_timer_mode_set_A3": [
|
||||
"trig_timer_mode_set_A3_para1",
|
||||
"trig_timer_mode_set_A3_para2",
|
||||
"trig_timer_mode_set_A3_para3",
|
||||
"trig_timer_mode_set_A3_para4"
|
||||
],
|
||||
"trig_timer_mode_set_A3_para1": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A3",
|
||||
"para_sequence": 1,
|
||||
"used": "USED[A3]",
|
||||
"v_early": "V_EARLY[A3]",
|
||||
"v_late": "V_LATE[A3]",
|
||||
"v_mid0": "V_MID0[A3]",
|
||||
"v_mid1": "V_MID1[A3]",
|
||||
"v_mid2": "V_MID2[A3]",
|
||||
"v_mid3": "V_MID3[A3]",
|
||||
"cycle": "CYCLE[A3]",
|
||||
"t_early": "T_EARLY[A3]",
|
||||
"t_late": "T_LATE[A3]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"5b>0;1b>v_late;1b>v_early;1b>used;",
|
||||
"4b>0;1b>v_mid3;1b>v_mid2;1b>v_mid1;1b>v_mid0;",
|
||||
"2B>cycle;4B>t_early;4B>t_late;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A3_para2": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A3",
|
||||
"para_sequence": 2,
|
||||
"t_mid0": "T_MID0[A3]",
|
||||
"t_mid1": "T_MID1[A3]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid0;4B>t_mid1;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A3_para3": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A3",
|
||||
"para_sequence": 3,
|
||||
"t_mid2": "T_MID2[A3]",
|
||||
"t_mid3": "T_MID3[A3]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"4B>t_mid2;4B>t_mid3;"
|
||||
]
|
||||
},
|
||||
"trig_timer_mode_set_A3_para4": {
|
||||
"type": "RIS",
|
||||
"parameter": {
|
||||
"mode": "MODE_ALL_OUTPUT",
|
||||
"elite_ch": "ELITE_CH_A3",
|
||||
"para_sequence": 4,
|
||||
"current": "CURRENT[A3]"
|
||||
},
|
||||
"data": [
|
||||
"1B>mode;",
|
||||
"1B>elite_ch;",
|
||||
"1B>para_sequence;",
|
||||
"2B>current;"
|
||||
]
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@@ -35,4 +35,10 @@ sudo su -c "psql -d postgres -c \"ALTER TABLE devices ALTER COLUMN calibration D
|
||||
sudo su -c "psql -d postgres -c \"ALTER TABLE devices ALTER COLUMN calibration TYPE bytea USING calibration::bytea;\"" postgres
|
||||
|
||||
# add column project in recording_data_metas
|
||||
sudo su -c "psql -d postgres -c \"ALTER TABLE devices ADD COLUMN IF NOT EXISTS calibration_version Int4 DEFAULT -1;\"" postgres
|
||||
sudo su -c "psql -d postgres -c \"ALTER TABLE devices ADD COLUMN IF NOT EXISTS calibration_version Int4 DEFAULT -1;\"" postgres
|
||||
|
||||
# add column bytea_data column in 0-32_recording_data_raws
|
||||
for i in {0..32}
|
||||
do
|
||||
sudo su -c "psql -d postgres -c \"ALTER TABLE \\\"${i}_recording_data_raws\\\" ADD COLUMN IF NOT EXISTS bytea_data BYTEA DEFAULT ''::bytea;\"" postgres
|
||||
done
|
||||
Reference in New Issue
Block a user