[bug] "rec+sti" mode will stop read spi sometime

there are bug if "start all -> stop all -> start rec"
2020-12-22 18:26:10 +08:00 · 2020-12-22 18:15:36 +08:00 · 2020-12-22 09:55:22 +08:00 · 2020-12-18 18:09:40 +08:00 · 2020-12-11 11:36:55 +08:00 · 2020-12-10 19:18:05 +08:00
15 changed files with 772 additions and 260 deletions
@@ -8,7 +8,7 @@ no	device	y=ax+b	MAC	a+	b+	a-	b-	avg
 7	c652	c652	18:04:ED:37:C6:52	2024	-7687	2086	-11283	4.88850143182858
 8	c5ed	c5ed	18:04:ED:37:C5:ED	2231	-1711	2353	-70845	4.45265043545859
 9	9bef	9bef	0081F9E49BEF	2383	-8585	2415	-20347	4.2758539244186
-10	8b50	8b50	00:81:F9:E4:8B:50	2369	-11005	2360	-11797	4.30475635707671
+10	8b50	8b50	00:81:F9:E4:8B:50	2366	-5223	2402	-14971	4.35162291666667
 11	c641	c641	18:04:ED:37:C6:41	2090	4616	1997	-40665	5.07591391714942
 12	E8E6	E8E6	A4:DA:32:D4:E8:E6	2306	-88454	2418	-15140	4.2686494968089
 13	E73B	E73B	A4:DA:32:D4:E7:3B	2262	-564	2298	44746	4.35551198222141
@@ -16,8 +16,8 @@ no	device	y=ax+b	MAC	a+	b+	a-	b-	avg
 15	E871	E871	A4:DA:32:D4:E8:71	2175	-4549	2220	31468	4.60684608395208
 16	EFC4	EFC4	A4:DA:32:D4:EF:C4	2348	-4371	2374	-26606	4.45106768611704
 17	EF85	EF85	A4:DA:32:D4:EF:85	2136	-3339	2189	-30040	4.61909624778354
-18	E7DA	E7DA	A4:DA:32:D4:E7:DA	2081	-3015	2122	-21543	4.79766509652981
-19	E6EA	E6EA	A4:DA:32:D4:E6:EA	2039	-262	2127	-47259	4.79384458739747
+18	E7DA	E7DA	A4:DA:32:D4:E7:DA	2096	-10653	2054	-14255	3.73011080492424
+19	E6EA	E6EA	A4:DA:32:D4:E6:EA	2074	-13075	2031	-13585	3.77641447962488
 20	EEDB	EEDB	A4:DA:32:D4:EE:DB	2214	-1170	2351	-24636	4.44485358085645
 21	E73A	E73A	A4:DA:32:D4:E7:3A	2210	-4855	2339	-16434	4.47776494604746
 22	E6CF	E6CF	A4:DA:32:D4:E6:CF	2135	-5206	2193	-30885	4.73462680884304
@@ -102,8 +102,8 @@ typedef enum {
    FLUSH_BUFFER2,      // clean SPI buffer twice
    READ_REG,           // read DBS register value, used after a "read" SPI instruction (MISO)
    READ_REG2,          // read DBS register value, used after a "read" SPI instruction (MISO)
-    END_TRANSMIT,       // read DBS register value, used after a "read" SPI instruction (MISO)
-    ONE_SHOT_SPI,       // end spi instruction
+    ONE_SHOT_FLUSH,       // read DBS register value, used after a "read" SPI instruction (MISO)
+    CONTI_SPI_WITH_FLUSH,       // end spi instruction
    READ_MOSI
 } SPI_CB_MODE;

@@ -119,6 +119,8 @@ static bool ConnectState = false;
 static bool ErrorRestart = false;
 static SPI_CB_MODE SPICallBack;
 static uint8 adc_spi_en_switch = 1;
+static bool rewrite_rec_en = false;
+static bool rewrite_sti_en = false;

 /*
 *  Let C = command, S = status;
@@ -214,7 +216,7 @@ extern ICall_Semaphore semaphore;
 // command return characteristic
 #define BLE_CDR_BUFF_CHAR SIMPLEPROFILE_CHAR2
 #define BLE_CDR_BUFF_SIZE SIMPLEPROFILE_CHAR2_LEN
-#define BLE_CDR_SAMLL_SIZE 10
+#define BLE_CDR_SMALL_SIZE 10

 // instruction input characteristic
 #define BLE_INS_BUFF_CHAR SIMPLEPROFILE_CHAR3
@@ -356,7 +358,7 @@ static uint16_t CONNECT_HANDLE = 0;
 /**
 * command instruction buffer
 */
-static uint8_t cdr_buf[BLE_CDR_SAMLL_SIZE] = {0};
+static uint8_t cdr_buf[BLE_CDR_SMALL_SIZE] = {0};

 /*====================
 ==== event table ====
@@ -27,14 +27,14 @@ static void SendCaliValue(uint8_t CaliNumber){

 //    ch = 2 * (CaliNumber % 4);
 //    uint8_t gain_level = CaliNumber / 4;   // 0:gain, 1:offset
-    uint8_t channel_number = 8, index = 1;
+    uint8_t channel_number = 8, index = 2;
    uint8_t gain_level = 0;

    if(CaliNumber < 4){
        gain_level = CaliNumber;
    }

-    cali_buf[0] = CHIP_ID;
+    cali_buf[1] = CHIP_ID;
    for(int i=0 ; i<channel_number ; i++){
        cali_buf[index++] = (uint8_t) (CaliTable.Ch[i].Gain[gain_level] >> 8) & 0xFF;
        cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Gain[gain_level] & 0x00FF;
@@ -42,9 +42,8 @@ static void SendCaliValue(uint8_t CaliNumber){
        cali_buf[index++] = (uint8_t) CaliTable.Ch[i].Offset[gain_level] & 0x00FF;
    }

-//    for(int i=1 ; i<BLE_CDR_BUFF_SIZE ; i++){
-//        cali_buf[i] = i;
-//    }
+    cali_buf[0] = index - 1;
+
    SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, index, cali_buf);
 }

@@ -192,18 +192,18 @@ struct _StiCaliStiTable{

 #elif defined(BOARD_A4_DA_32_D4_E7_DA)
 {
-    .p_ch.coefficient = 2081,
-    .p_ch.offset = -3015,
-    .n_ch.coefficient = 2122,
-    .n_ch.offset = -21543
+    .p_ch.coefficient = 4834,
+    .p_ch.offset = -10653,
+    .n_ch.coefficient = 4628,
+    .n_ch.offset = -14255
 };

 #elif defined(BOARD_A4_DA_32_D4_E6_EA)
 {
-    .p_ch.coefficient = 2039,
-    .p_ch.offset = -262,
-    .n_ch.coefficient = 2127,
-    .n_ch.offset = -47259
+    .p_ch.coefficient = 4980,
+    .p_ch.offset = -13075,
+    .n_ch.coefficient = 4660,
+    .n_ch.offset = -13585
 };

 #elif defined(BOARD_A4_DA_32_D4_EE_DB)
@@ -27,7 +27,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
        check_reg_counter = 0;
        if(check_ins(instruction_to_fit)){
            NEULIVE_STATE.state = next_state;
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;

            // update rec_sti_command
            if(!(rec_sti_command & ENABLE_STI)){
@@ -70,7 +70,7 @@ static void check_register(uint8_t register_to_check, uint16_t instruction_to_fi
                IsFirstData = true;
            }

-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
            ReopenSPI();
        }
        headstage_spi_transaction(3);
@@ -167,7 +167,7 @@ static void check_sti_t1_t5(NEU_WORK_STATE next_state){
    else{
        NEULIVE_STATE.state       = next_state;
    }
-    SPICallBack = ONE_SHOT_SPI;
+    SPICallBack = CONTI_SPI_WITH_FLUSH;
    headstage_spi_transaction(3);
 }

@@ -8,26 +8,27 @@
 #define SYS_GENERAL_ENABLE_INDEX 1
 #define SYS_LNA_BIOS1_INDEX      2
 #define SYS_LNA_BIOS2_INDEX      3
+#define SYS_STI_CLK_RATIO_INDEX  4

 #define REC_CHANNEL_INDEX      0
 #define REC_GAIN_INDEX         1
 #define REC_ADC_CLOCK_INDEX    2

 #define STI_ENABLE_INDEX        0
-#define STI_DURATION0_INDEX     1
-#define STI_DURATION1_INDEX     2
-#define STI_DURATION2_INDEX     3
-#define STI_DURATION3_INDEX     4
-#define STI_AMP_POS_INDEX       5
-#define STI_AMP_NEG_INDEX       6
-#define STI_POLARITY_INDEX      7
-#define STI_CYCLE_CH01_INDEX    8
-#define STI_CYCLE_CH23_INDEX    9
-#define STI_CYCLE_CH45_INDEX   10
-#define STI_CYCLE_CH67_INDEX   11
-#define STI_CLK_RATIO_INDEX    12
-#define STI_ARBITRARY_EN_INDEX 13
-#define STI_MODE_INDEX         14
+#define STI_AMP_POS_INDEX       1
+#define STI_AMP_NEG_INDEX       2
+#define STI_POLARITY_INDEX      3
+#define STI_CYCLE_CH01_INDEX    4
+#define STI_CYCLE_CH23_INDEX    5
+#define STI_CYCLE_CH45_INDEX    6
+#define STI_CYCLE_CH67_INDEX    7
+#define STI_CLK_RATIO_INDEX     8
+#define STI_ARBITRARY_EN_INDEX  9
+#define STI_MODE_INDEX         10
+#define STI_DURATION0_INDEX    11
+#define STI_DURATION1_INDEX    12
+#define STI_DURATION2_INDEX    13
+#define STI_DURATION3_INDEX    14

 //#define DBS_REGISTER                                            \
 //    uint8_t address;                                            \
@@ -37,45 +38,53 @@
 typedef struct _DBSRegister{
    uint8_t address;
    bool WriteRegister, CheckRegister;
-    void (*write_reg) (struct _DBSRegister *self, uint16_t reg_value);
+    void (*write_reg) (uint8_t self_address, uint16_t reg_value);
    void (*read_reg) (struct  _DBSRegister *self);
 }DBSRegister;

-void write_reg(DBSRegister *self, uint16_t reg_value){
-    spi_txbuf[0] = 0x80 | self->address;
+void write_reg(uint8_t self_address, uint16_t reg_value){
+    spi_txbuf[0] = 0x80 | self_address;
    spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
    spi_txbuf[2] = reg_value & 0xFF;
-    SPICallBack = ONE_SHOT_SPI;
+
+//    self->WriteRegister = false;
+//    self->CheckRegister = true;
+
+    SPICallBack = CONTI_SPI_WITH_FLUSH;
    headstage_spi_transaction(SPI_BUFFER_SIZE);
 }

 void read_reg(DBSRegister *self){
    spi_txbuf[0] = 0x7F & self->address;
-    spi_txbuf[1] = 0x7F & self->address; // it's don't care actually
-    spi_txbuf[2] = 0x7F & self->address; // it's don't care actually
+    spi_txbuf[1] = 0; // it's don't care actually
+    spi_txbuf[2] = 0; // it's don't care actually
    SPICallBack = READ_REG;
    headstage_spi_transaction(SPI_BUFFER_SIZE);
 }

-
-static uint16_t sys_register_default_value[4] = {
+static uint16_t sys_register_default_value[5] = {
    0x0000,
    0x40F2,
    0x0210,
-    0x4210
+    0x4210,
+    0x0002
 };
-static uint16_t rec_register_value[3];
-static uint16_t sti_register_value[15];

-static DBSRegister sys_register[4];
+static uint16_t rec_register_value[3];
+static uint16_t sti_register_value[43];
+static uint16_t fast_settle_param[43];
+static void init_fast_settle();
+
+static DBSRegister sys_register[5];
 static DBSRegister rec_register[3];
-static DBSRegister sti_register[15];
+static DBSRegister sti_register[43];

 static void InitSysRegister(){
    sys_register[SYS_RESERVED_INDEX].address = 0x00;
    sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
    sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
    sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
+    sys_register[SYS_STI_CLK_RATIO_INDEX].address = 52;

    for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
        sys_register[i].WriteRegister = false;
@@ -96,14 +105,14 @@ static void InitRecRegister(){
        rec_register[i].write_reg = &write_reg;
        rec_register[i].read_reg = &read_reg;
    }
+
+    rec_register_value[REC_CHANNEL_INDEX] = 0;
+    rec_register_value[REC_GAIN_INDEX] = 1;
+    rec_register_value[REC_ADC_CLOCK_INDEX] = 100;
 }

 static void InitStiRegister(){
    sti_register[STI_ENABLE_INDEX].address = 46;
-    sti_register[STI_DURATION0_INDEX].address = 1;
-    sti_register[STI_DURATION1_INDEX].address = 2;
-    sti_register[STI_DURATION2_INDEX].address = 3;
-    sti_register[STI_DURATION3_INDEX].address = 4;
    sti_register[STI_AMP_POS_INDEX].address = 37;
    sti_register[STI_AMP_NEG_INDEX].address = 38;
    sti_register[STI_POLARITY_INDEX].address = 40;
@@ -115,6 +124,54 @@ static void InitStiRegister(){
    sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
    sti_register[STI_MODE_INDEX].address = 56;

+    for(int ch=0 ; ch<8 ; ch++){
+        sti_register[ch*4 + STI_DURATION0_INDEX].address = ch*4 + 1;
+        sti_register[ch*4 + STI_DURATION1_INDEX].address = ch*4 + 2;
+        sti_register[ch*4 + STI_DURATION2_INDEX].address = ch*4 + 3;
+        sti_register[ch*4 + STI_DURATION3_INDEX].address = ch*4 + 4;
+    }
+
+    for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
+        sti_register[i].WriteRegister = false;
+        sti_register[i].CheckRegister = false;
+        sti_register[i].write_reg = &write_reg;
+        sti_register[i].read_reg = &read_reg;
+    }
+
+    sti_register_value[STI_AMP_POS_INDEX] = 1;
+    sti_register_value[STI_AMP_NEG_INDEX] = 1;
+}
+
+static void InitDBSRegister(){
+    InitSysRegister();
+    InitRecRegister();
+    InitStiRegister();
+    init_fast_settle();
+
+    for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
+        sys_register[i].WriteRegister = true;
+    }
+
+    sys_register[0].CheckRegister = true;
+    sys_register[0].write_reg(sys_register[0].address, sys_register_default_value[0]);
+//    flag_notify(EVT_NEU_SPI);
+}
+
+static void ResetDBSRegister(){
+    for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
+        sys_register[i].WriteRegister = false;
+        sys_register[i].CheckRegister = false;
+        sys_register[i].write_reg = &write_reg;
+        sys_register[i].read_reg = &read_reg;
+    }
+
+    for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
+        rec_register[i].WriteRegister = false;
+        rec_register[i].CheckRegister = false;
+        rec_register[i].write_reg = &write_reg;
+        rec_register[i].read_reg = &read_reg;
+    }
+
    for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
        sti_register[i].WriteRegister = false;
        sti_register[i].CheckRegister = false;
@@ -123,16 +180,35 @@ static void InitStiRegister(){
    }
 }

-static void InitDBSRegister(){
-    InitSysRegister();
-    InitRecRegister();
-    InitStiRegister();
+static uint16_t fast_settle_param[43];
+static void init_fast_settle(){
+    uint8_t ch = 7;
+    uint8_t t1=25, t2=0, t3=25 , t4=0, t5=0;

-//    for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
-    for(int i=1 ; i<4 ; i++){
-        sys_register[i].WriteRegister = true;
-    }
-    flag_notify(EVT_NEU_SPI);
+    // setting t1~t5
+    fast_settle_param[ch*4 + STI_DURATION0_INDEX] = (t2 & 0x003F) << 10 | (t1 & 0x03FF);
+    fast_settle_param[ch*4 + STI_DURATION1_INDEX] = (t4 & 0x0003) << 14 | (t3 & 0x03FF)  << 4 | (t2 & 0x03C0) >> 6;
+    fast_settle_param[ch*4 + STI_DURATION2_INDEX] = (t4 & 0x0007FFFC) >> 2;
+    fast_settle_param[ch*4 + STI_DURATION3_INDEX] = t5;
+
+    // cycle number
+    fast_settle_param[STI_CYCLE_CH67_INDEX] = 10 << 8 | 0;
+
+    // set polarity, it's don't care in fast settle
+    fast_settle_param[STI_POLARITY_INDEX] = 0;
+
+    // set stimulate mode
+    fast_settle_param[STI_MODE_INDEX] = 0;
+//            INSTRUCTION.sti_mode             = 0;   // 1 = continuous mode; 0 = limit mode
+//            INSTRUCTION.sti_h_bridge         = 0;   // voltage sti must use H-bridge
+//            INSTRUCTION.sti_ref              = 0;   // 1 = GND; 0 = Vref
+
+    // using minimum amplitude
+    fast_settle_param[STI_AMP_POS_INDEX] = 0;
+    fast_settle_param[STI_AMP_NEG_INDEX] = 0;
+
+    // using ch8 to fast settle
+    fast_settle_param[STI_ENABLE_INDEX] = 0b0000000010000000;  // 0bxxxx_xxxv_cccc_cccc, c = current; v = volt, x = don't care
 }

 #endif
@@ -6,7 +6,7 @@

 static uint16_t UserCode2StiCode(uint16_t amp, uint8_t positive_ch){
    // get real current value (uA)
-    uint32_t sti_code, real_amp = amp * 5;
+    int32_t sti_code, real_amp = amp * 5;

    if(StiCaliTable.p_ch.coefficient == 10000 && StiCaliTable.p_ch.offset == 0){
        return amp;
@@ -23,7 +23,11 @@ static uint16_t UserCode2StiCode(uint16_t amp, uint8_t positive_ch){
        sti_code = StiCaliTable.n_ch.coefficient * real_amp + StiCaliTable.n_ch.offset;
    }

-    sti_code = sti_code / 10000;
+    if(sti_code <= 10000){
+        sti_code = 10000;
+    }
+
+    sti_code = (sti_code+5000) / 10000;
    return (uint16_t) (sti_code);
 }

@@ -3,15 +3,15 @@
 #define VERSION_DATE

 #define VERSION_DATE_YEAR      20
-#define VERSION_DATE_MONTH     9
-#define VERSION_DATE_DAY       9
-#define VERSION_DATE_HOUR      10
+#define VERSION_DATE_MONTH     12
+#define VERSION_DATE_DAY       22
+#define VERSION_DATE_HOUR      18
 #define VERSION_DATE_MINUTE    26

 // this is NOT the version hash !!
 // it's the last version hash
-#define VERSION_HASH           b9c9cc0bbcdb1ad375f9f5966577ca34ef3fd6d1
-#define VERSION_GIT_BRANCH     neulive20_development_without_central
+#define VERSION_HASH           2937fa6a1124e6bac1d7726e51313a0d42c805dd
+#define VERSION_GIT_BRANCH     neulive20_development_onchange_central

 static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
    uint8 name_offset = 18;
@@ -8,6 +8,8 @@
 #error "headstage/headstage_notify.h not included"
 #endif

+#include "headstage_dbs_object.h"
+
 #define NOT_BUF_OFFSET_INIT 8

 static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
@@ -41,19 +43,15 @@ static void headstage_neu_append_notify_data() {
    }

    // discard illegal channel
-//    uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
+    uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
    if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
        // illegal channel
        return;
    }

-    uint8_t not_buf[3];
-    not_buf[0] = channel; // ch
-    not_buf[1] = spi_rxbuf[1];
-    not_buf[2] = spi_rxbuf[2];
-
-//    not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
-//    not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
+    uint8_t not_buf[2];
+    not_buf[0] = (channel & 0x0F) << 4 | (spi_rxbuf[1] & 0x0F);
+    not_buf[1] = spi_rxbuf[2];

    uint8_t data_size = headstage_notify_append_data(not_buf);

@@ -74,7 +72,7 @@ static void headstage_notify_set_timestamp() {
 }

 static void headstage_notify_flip_buffer() {
-    uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 3;
+    uint8_t data_count = (not_buf_offset - NOT_BUF_OFFSET_INIT) / 2;

    headstage_notify_buffer[0] = CHIP_ID;
    headstage_notify_buffer[1] = data_count;
@@ -91,11 +89,9 @@ static uint8_t headstage_notify_append_data(uint8_t *data_value) {
    if (data_value == NULL) {
        headstage_notify_buffer[not_buf_offset++] = 0x00;
        headstage_notify_buffer[not_buf_offset++] = 0x00;
-        headstage_notify_buffer[not_buf_offset++] = 0x00;
    } else {
        headstage_notify_buffer[not_buf_offset++] = data_value[0];
        headstage_notify_buffer[not_buf_offset++] = data_value[1];
-        headstage_notify_buffer[not_buf_offset++] = data_value[2];
    }

    if (not_buf_offset >= BLE_NOT_BUFF_SIZE - 1) {
@@ -4,6 +4,7 @@

 #include "headstage_instruction.h"
 #include "neu/headstage_spi.h"
+#include "headstage_dbs_object.h"

 static void ResetINSTRUCTION();

@@ -25,7 +26,7 @@ static void MCUReset(){
        spi_txbuf[i] = 0;
        spi_rxbuf[i] = 0;
    }
-    SPICallBack  =   ONE_SHOT_SPI;
+    SPICallBack  =   CONTI_SPI_WITH_FLUSH;
    ReopenSPI();

    for(int i=0 ; i<SPI_LED_BUFF_SIZE ; i++){
@@ -33,7 +34,7 @@ static void MCUReset(){
    }

    // CIS buffer reset
-    for(int i=0 ; i<BLE_CDR_SAMLL_SIZE ; i++){
+    for(int i=0 ; i<BLE_CDR_SMALL_SIZE ; i++){
        cdr_buf[i] = 0;
    }

@@ -70,6 +71,7 @@ static void DBSReset(){
 static void Neu2Reset(){
    DBSReset();
    MCUReset();
+    InitDBSRegister();
 }

 static void ResetINSTRUCTION(){
@@ -143,7 +143,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
            break;
        }
        case FLUSH_BUFFER2:{
-           SPICallBack = ONE_SHOT_SPI;
+           SPICallBack = CONTI_SPI_WITH_FLUSH;
           for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
               spi_txbuf[i] = 0x00;
           }
@@ -151,7 +151,7 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
 //           headstage_spi_transaction(SPI_BUFFER_SIZE);
           break;
       }
-        case ONE_SHOT_SPI:{
+        case CONTI_SPI_WITH_FLUSH:{
            SPICallBack = FLUSH_BUFFER;
            for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
                spi_txbuf[i] = 0x00;
@@ -172,14 +172,13 @@ static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transacti
        }

        case CLOSE_SPI:{
-            SPICallBack = ONE_SHOT_SPI;
+            SPICallBack = CONTI_SPI_WITH_FLUSH;
            SPI_close(headstage_spi_handle);
            break;
        }

-        case END_TRANSMIT:{
+        case ONE_SHOT_FLUSH:{
            tx_put_u24(0, 0);
-            SPICallBack = CONTINUOUS_TRANS;
            break;
        }
        default:{
@@ -82,7 +82,8 @@ extern "C" {

 // Length of Characteristic 5 in bytes
 #define SIMPLEPROFILE_CHAR1_LEN 2
-#define SIMPLEPROFILE_CHAR2_LEN 50
+//#define SIMPLEPROFILE_CHAR2_LEN 50
+#define SIMPLEPROFILE_CHAR2_LEN 34
 #define SIMPLEPROFILE_CHAR3_LEN 20
 #define SIMPLEPROFILE_CHAR4_LEN 200
 //#define SIMPLEPROFILE_CHAR4_LEN 20
Author	SHA1	Message	Date
weiting2	a348b9553d	[bug] "rec+sti" mode will stop read spi sometime	2020-12-22 18:26:10 +08:00
weiting2	2937fa6a11	[bug] "rec+sti" mode will stop read spi sometime	2020-12-22 18:15:36 +08:00
weiting2	4a973421df	there are bug if "start all -> stop all -> start rec"	2020-12-22 09:55:22 +08:00
weiting2	521e241978	change led and enable rec after limit sti end	2020-12-18 18:09:40 +08:00
weiting2	d1ba348ea0	fast set do not reset sti now	2020-12-11 11:36:55 +08:00
weiting2	8686220e28	do not check sti in limit mode; resend rec ch when press "start rec"	2020-12-10 19:18:05 +08:00
weiting2	91e62474d1	idle state pull low MISO; send three time ins to close sti	2020-12-10 17:30:28 +08:00
weiting2	734da9a27e	correct start rec bug; should be test: sti turn on/off correctly?	2020-12-10 13:58:48 +08:00
weiting2	bd48ac8d49	should be test: sti turn on/off correctly?	2020-12-09 17:07:15 +08:00
weiting2	9f68a07d31	attempt to fix sti start/stop failed issue	2020-12-09 16:41:51 +08:00
weiting2	87cac38444	fix central on_change bug	2020-11-30 11:31:10 +08:00
weiting2	7f163e85c3	special version for E7DA, E6EA	2020-11-27 18:11:56 +08:00
weiting2	7880fce151	special version for E7DA, E6EA	2020-11-25 14:06:16 +08:00
weiting2	abf67f5dd4	[stable] sti_amp with init value	2020-11-24 18:28:15 +08:00
weiting2	cf9766c786	[stable] better current cali; "start sti" no bug	2020-11-24 17:59:36 +08:00
weiting2	7063a2460a	update E7DA, E6EA sti cali data	2020-11-23 14:25:16 +08:00
weiting2	11a6389a83	neulive without sti frequency on change	2020-11-16 14:48:21 +08:00
weiting2	9dde948902	Merge branch 'neulive_onchange_central_debug' into neulive20_development_onchange_central # Conflicts: # simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_dbs_object.h # simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_version.h	2020-11-16 14:47:11 +08:00
weiting2	9209d9dff7	neulive without sti frequency on change	2020-11-16 14:44:17 +08:00
weiting2	acd0080929	sti_clk ratio should be system register	2020-11-13 18:30:41 +08:00
weiting2	8ae43d0628	sti_clk ratio should be system register	2020-11-13 16:06:21 +08:00
weiting2	1cde4cfe02	update sti_cali data	2020-10-26 17:03:38 +08:00
weiting2	764bd9364d	amp_gain does not on change	2020-10-13 18:09:20 +08:00
weiting2	b5e0026f2e	amp_gain does not on change	2020-10-13 18:09:09 +08:00
weiting2	823016d4b7	support fast settle now	2020-09-25 18:36:10 +08:00
weiting2	bee57486e0	support fast settle now	2020-09-25 18:35:55 +08:00
weiting2	214222cb1e	TODO: support fast settle	2020-09-25 17:48:52 +08:00
weiting2	38572e128d	increase data throughput by modify notify format	2020-09-25 16:37:27 +08:00
weiting2	9e19642081	increase data throughput by modify notify format	2020-09-25 15:57:41 +08:00
weiting2	5f2a258f49	increase data throughput by modify notify format	2020-09-25 11:56:25 +08:00
weiting2	d5158775b8	[semi-stable] TODO: increase data throughput by modify notify format	2020-09-25 11:46:16 +08:00
weiting2	282b8077a7	update central	2020-09-18 20:21:15 +08:00
weiting2	5b6430cec9	update central	2020-09-18 18:13:00 +08:00
weiting2	9484008d1e	update central	2020-09-18 18:09:28 +08:00
weiting2	bd0c282d25	using central feature CIS	2020-09-16 15:26:26 +08:00
weiting2	acd590de44	sti on change is done; TODO: disable sti before every on change	2020-09-16 10:59:22 +08:00
weiting2	b8d96c32b0	sti on change is done; TODO: disable sti before every on change	2020-09-15 17:41:46 +08:00
weiting2	c3ab78e16a	sti on change has some bug	2020-09-14 17:21:30 +08:00
weiting2	fde824ee34	sti on change has some bug	2020-09-14 12:54:23 +08:00
weiting2	fc3adb450c	sti on change has some bug	2020-09-14 11:10:42 +08:00
weiting2	747752640a	sti on change has some bug	2020-09-14 09:55:26 +08:00
weiting2	7a73097666	add sti, stop, ... etc function	2020-09-10 18:41:29 +08:00
weiting2	8a95874b0b	"on change" can work; TODO: add sti, stop, ... etc function	2020-09-09 17:01:35 +08:00