Elite 1.4-re development SPI init

Elite 1.4-re development PIN define
2019-08-21 12:21:21 +08:00 · 2019-08-21 11:55:05 +08:00 · 2019-08-21 11:42:34 +08:00 · 2019-08-21 11:31:18 +08:00 · 2019-08-21 11:28:59 +08:00 · 2019-08-21 11:06:45 +08:00
5 changed files with 96 additions and 65 deletions
@@ -219,64 +219,53 @@ SPICC26XXDMA_Object spiCC26XXDMAObjects[BOOSTXL_CC2650MA_SPICOUNT];

 /* SPI configuration structure, describing which pins are to be used */
 const SPICC26XXDMA_HWAttrsV1 spiCC26XXDMAHWAttrs[BOOSTXL_CC2650MA_SPICOUNT] = {
-    //
    {
-        //
-        .baseAddr          = SSI0_BASE,
-        .intNum            = INT_SSI0_COMB,
-        .intPriority       = ~0,
-        .swiPriority       = 0,
-        .powerMngrId       = PowerCC26XX_PERIPH_SSI0,
-        .defaultTxBufValue = 0,
-        .rxChannelBitMask  = 1 << UDMA_CHAN_SSI0_RX,
-        .txChannelBitMask  = 1 << UDMA_CHAN_SSI0_TX,
-        .mosiPin           = Board_SPI0_MOSI,
-        .misoPin           = Board_SPI0_MISO,
-        .clkPin            = Board_SPI0_CLK,
-        .csnPin            = Board_SPI0_CS
-        //
+        .baseAddr           = SSI0_BASE,
+        .intNum             = INT_SSI0_COMB,
+        .intPriority        = ~0,
+        .swiPriority        = 0,
+        .powerMngrId        = PowerCC26XX_PERIPH_SSI0,
+        .defaultTxBufValue  = 0,
+        .rxChannelBitMask   = 1<<UDMA_CHAN_SSI0_RX,
+        .txChannelBitMask   = 1<<UDMA_CHAN_SSI0_TX,
+        .mosiPin            = Board_SPI0_MOSI,
+        .misoPin            = Board_SPI0_MISO,
+        .clkPin             = Board_SPI0_CLK,
+        .csnPin             = Board_SPI0_CS
    },
-#ifdef HEADSTAGE_MA_USE_SPI2
    {
-        //
-        .baseAddr          = SSI1_BASE,
-        .intNum            = INT_SSI1_COMB,
-        .intPriority       = ~0,
-        .swiPriority       = 0,
-        .powerMngrId       = PowerCC26XX_PERIPH_SSI1,
-        .defaultTxBufValue = 0,
-        .rxChannelBitMask  = 1 << UDMA_CHAN_SSI1_RX,
-        .txChannelBitMask  = 1 << UDMA_CHAN_SSI1_TX,
-        .mosiPin           = Board_SPI1_MOSI,
-        .misoPin           = Board_SPI1_MISO,
-        .clkPin            = Board_SPI1_CLK,
-        .csnPin            = Board_SPI1_CS  //
+        .baseAddr           = SSI1_BASE,
+        .intNum             = INT_SSI1_COMB,
+        .intPriority        = ~0,
+        .swiPriority        = 0,
+        .powerMngrId        = PowerCC26XX_PERIPH_SSI1,
+        .defaultTxBufValue  = 0,
+        .rxChannelBitMask   = 1<<UDMA_CHAN_SSI1_RX,
+        .txChannelBitMask   = 1<<UDMA_CHAN_SSI1_TX,
+        .mosiPin            = Board_SPI1_MOSI,
+        .misoPin            = Board_SPI1_MISO,
+        .clkPin             = Board_SPI1_CLK,
+        .csnPin             = Board_SPI1_CS
    },
-#endif
 };

 /* SPI configuration structure */
-const SPI_Config SPI_config[] = {  //
+const SPI_Config SPI_config[] = {
    {
-        //
-        .fxnTablePtr = &SPICC26XXDMA_fxnTable,
-        .object      = &spiCC26XXDMAObjects[0],
-        .hwAttrs     = &spiCC26XXDMAHWAttrs[0]
-        //
+         .fxnTablePtr = &SPICC26XXDMA_fxnTable,
+         .object      = &spiCC26XXDMAObjects[0],
+         .hwAttrs     = &spiCC26XXDMAHWAttrs[0]
    },
-#ifdef HEADSTAGE_MA_USE_SPI2
    {
-        //
-        .fxnTablePtr = &SPICC26XXDMA_fxnTable,
-        .object      = &spiCC26XXDMAObjects[1],
-        .hwAttrs     = &spiCC26XXDMAHWAttrs[1]
-        //
+         .fxnTablePtr = &SPICC26XXDMA_fxnTable,
+         .object      = &spiCC26XXDMAObjects[1],
+         .hwAttrs     = &spiCC26XXDMAHWAttrs[1]
    },
-#endif
-    {NULL, NULL, NULL}};
+    {NULL, NULL, NULL}
+};
 /*
 *  ========================== SPI DMA end =====================================
- */
+*/

 /*
 *  ========================== Crypto begin ====================================
@@ -515,12 +504,21 @@ const PWM_Config PWM_config[BOOSTXL_CC2650MA_PWMCOUNT + 1] = {

 /*
 *  ============================= I2C Begin=====================================
+*/
+
+#ifdef ELITE_I2C
+
+/* Generic I2C instance identifiers */
+#define Board_I2C                   CC2650_MA_I2C0
+/*!
+ *  @def    CC2650_LAUNCHXL_I2CName
+ *  @brief  Enum of I2C names on the CC2650 dev board
 */
+typedef enum CC2650_MA_I2CName {
+    CC2650_MA_I2C0 = 0,

-#ifdef  HEADSTAGE_LED_USE_I2C
-
-#define Board_I2C0_SCL0 IOID_10
-#define Board_I2C0_SDA0 IOID_11
+    CC2650_MA_I2CCOUNT
+} CC2650_MA_I2CName;

 /* Place into subsections to allow the TI linker to remove items properly */
 #if defined(__TI_COMPILER_VERSION__)
@@ -532,10 +530,10 @@ const PWM_Config PWM_config[BOOSTXL_CC2650MA_PWMCOUNT + 1] = {
 #include <ti/drivers/i2c/I2CCC26XX.h>

 /* I2C objects */
-I2CCC26XX_Object i2cCC26xxObjects[BOOSTXL_CC2650MA_I2CCOUNT];
+I2CCC26XX_Object i2cCC26xxObjects[CC2650_MA_I2CCOUNT];

 /* I2C configuration structure, describing which pins are to be used */
-const I2CCC26XX_HWAttrsV1 i2cCC26xxHWAttrs[BOOSTXL_CC2650MA_I2CCOUNT] = {
+const I2CCC26XX_HWAttrsV1 i2cCC26xxHWAttrs[CC2650_MA_I2CCOUNT] = {
    {
        .baseAddr = I2C0_BASE,
        .powerMngrId = PowerCC26XX_PERIPH_I2C0,
@@ -556,11 +554,9 @@ const I2C_Config I2C_config[] = {
    },
    {NULL, NULL, NULL}
 };
-#endif
 /*
 *  ========================== I2C end =========================================
 */
-
 /*
  *  ============================= Watchdog begin =====================================
 */
@@ -311,7 +311,7 @@ typedef struct {
 ==== device implement implement header ====
 =========================================*/

-#include "headstage_uni.h"
+#include "headstage_zm.h"

 /*======================
 ==== main function ====
@@ -8,7 +8,7 @@
 #define HEADSTAGE_ZM_H

 // product information
-#define DEVICE_NAME "Elite-ZM-v1.2-30"
+#define DEVICE_NAME "Elite-ZM-v1.4-re"
 #define MAJOR_PRODUCT_NUMBER 0
 #define MINOR_PRODUCT_NUMBER 2
 #define MAJOR_VERSION_NUMBER 1
@@ -4,14 +4,37 @@
 #define HEADSTAGE_PIN_ZM_H

 // clang-format off
-#define PIN_ADC_CS          IOID_2
-#define PIN_DAC_CS          IOID_4
-#define PIN_SWITCH_ON       IOID_10
-#define PIN_SHUTDOWN_6994   IOID_11
+#define PIN_ADC_CS          IOID_8
+#define PIN_DAC_CS          IOID_9
+#define PIN_SWITCH_ON       IOID_11
+#define PIN_SHUTDOWN_6994   IOID_10
 #define PIN_ENABLE_V10      IOID_12
-#define PIN_ENABLE_V05      IOID_14
+#define PIN_ENABLE_V05      IOID_13
+
+#define PIN_TURNON_200R     IOID_5
+#define PIN_TURNON_10K      IOID_6
+
+/* I2C */
+#ifdef ELITE_I2C
+#define Board_I2C0_SCL0                 IOID_7
+#define Board_I2C0_SDA0                 IOID_1
+#endif
 // clang-format on

+// from Elite IV-test branch
+/* SPI Board */
+#define Board_SPI0_MISO                 PIN_UNASSIGNED
+#define Board_SPI0_MOSI                 IOID_1
+#define Board_SPI0_CLK                  IOID_0
+#define Board_SPI0_CS                   PIN_UNASSIGNED
+
+#define Board_SPI1_MISO                 IOID_3
+#define Board_SPI1_MOSI                 IOID_2
+#define Board_SPI1_CLK                  IOID_4
+#define Board_SPI1_CS                   PIN_UNASSIGNED
+// End of Elite IV-test branch
+
+
 #if defined(CC2650_LAUNCHXL)
 #define PIN_LED_R IOID_6
 #define PIN_LED_G IOID_7
@@ -22,6 +45,9 @@ static PIN_Config headstage_pin_configuration[] = {  //
    PIN_ADC_CS | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
    PIN_DAC_CS | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,

+    PIN_TURNON_200R | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
+    PIN_TURNON_10K | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
+
    PIN_ENABLE_V10 | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
    PIN_ENABLE_V05 | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,

@@ -36,14 +36,23 @@ static SPI_Transaction headstage_spi_adc_transaction;
 #define headstage_spi_open()                                               \
    do {                                                                   \
        SPI_init();                                                        \
-        SPI_Params spi_parameter;                                          \
-        SPI_Params_init(&spi_parameter);                                   \
+        SPI_Params spi_parameter0;                                         \
+        SPI_Params_init(&spi_parameter0);                                  \
        spi_parameter.transferMode = SPI_MODE_BLOCKING;                    \
        spi_parameter.mode         = SPI_MASTER;                           \
-        spi_parameter.bitRate      = 12000000;                             \
+        spi_parameter.bitRate      = 2000;                                 \
+        spi_parameter.dataSize     = 16;                                   \
+        spi_parameter.frameFormat  = SPI_POL0_PHA1;                        \
+        headstage_spi_dac_handle   = SPI_open(Board_SPI0, &spi_parameter0);\
+
+        SPI_Params spi_parameter1;                                         \
+        SPI_Params_init(&spi_parameter1);                                  \
+        spi_parameter.transferMode = SPI_MODE_BLOCKING;                    \
+        spi_parameter.mode         = SPI_MASTER;                           \
+        spi_parameter.bitRate      = 1000000;                              \
        spi_parameter.dataSize     = 8;                                    \
-        spi_parameter.frameFormat  = SPI_POL0_PHA0;                        \
-        headstage_spi_dac_handle   = SPI_open(Board_SPI0, &spi_parameter); \
+        spi_parameter.frameFormat  = SPI_POL0_PHA1;                        \
+        headstage_spi_dac_handle   = SPI_open(Board_SPI1, &spi_parameter1);\
    } while (0)

 #define headstage_dac_transaction()                                             \
Author	SHA1	Message	Date
alan	e8fffbd41c	Elite 1.4-re development SPI init	2019-08-21 12:21:21 +08:00
alan	c59cd145de	Elite 1.4-re development PIN define	2019-08-21 11:55:05 +08:00
alan	ad50355a33	Elite 1.4-re development PIN define	2019-08-21 11:42:34 +08:00
alan	213da10216	Elite 1.4-re development SPI DMA	2019-08-21 11:31:18 +08:00
alan	5c610495e4	Elite 1.4-re development SPI PIN define	2019-08-21 11:28:59 +08:00
alan	45cc2246f6	Elite 1.4-re development	2019-08-21 11:06:45 +08:00