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wisetop/past-project-past_code_cc2650:master wisetop/past-project-past_code_cc2650:EliteEIS_AutoCali wisetop/past-project-past_code_cc2650:Elite_1.5_Taylor_061721 wisetop/past-project-past_code_cc2650:Elite1.5_AutoCali wisetop/past-project-past_code_cc2650:simple_central_ma_pin wisetop/past-project-past_code_cc2650:Elite1.5 wisetop/past-project-past_code_cc2650:release/elite_211202-2 wisetop/past-project-past_code_cc2650:release/elite_211216 wisetop/past-project-past_code_cc2650:e_Elite15_ccmode_1124 wisetop/past-project-past_code_cc2650:Elite_TRIG01_20210922 wisetop/past-project-past_code_cc2650:simple_central_ma_pin_one_four wisetop/past-project-past_code_cc2650:Elite1.5_Vout_in_RT_0628 wisetop/past-project-past_code_cc2650:central_separate_c_file wisetop/past-project-past_code_cc2650:Elite1.5-re_calibration wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv wisetop/past-project-past_code_cc2650:EliteEIS_Taylor wisetop/past-project-past_code_cc2650:Elite_TRIG01_development wisetop/past-project-past_code_cc2650:simple_central_ma_pin_0513_2 wisetop/past-project-past_code_cc2650:EliteEIS_developement_Roy wisetop/past-project-past_code_cc2650:neulive20_onchange_multiStageSTI wisetop/past-project-past_code_cc2650:Elite1.5_sps wisetop/past-project-past_code_cc2650:Offline_BS wisetop/past-project-past_code_cc2650:Elite_NueLive_FFT wisetop/past-project-past_code_cc2650:Elite1.5_dev_module wisetop/past-project-past_code_cc2650:Elite_TRIG_mega_0217 wisetop/past-project-past_code_cc2650:neulive2_E7DA_special_version wisetop/past-project-past_code_cc2650:simple_central_ma_pin_linux wisetop/past-project-past_code_cc2650:EliteEIS_developement wisetop/past-project-past_code_cc2650:EliteEIS_developement_jim wisetop/past-project-past_code_cc2650:neulive20_development_onchange_central wisetop/past-project-past_code_cc2650:Elite1.5_development_cali_mode wisetop/past-project-past_code_cc2650:Elite1.5_developement_magafly wisetop/past-project-past_code_cc2650:central_BS_triangle_wave wisetop/past-project-past_code_cc2650:central_borshin wisetop/past-project-past_code_cc2650:Neulive20_hostTest wisetop/past-project-past_code_cc2650:neulive_onchange_central_debug wisetop/past-project-past_code_cc2650:animal_experience wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_release_1103 wisetop/past-project-past_code_cc2650:neulive20_borshin_fft wisetop/past-project-past_code_cc2650:neulive20_stable_non_central wisetop/past-project-past_code_cc2650:Neulive2.0_developement wisetop/past-project-past_code_cc2650:neulive20_development_without_central wisetop/past-project-past_code_cc2650:Elite1.5_developement_EventHandle wisetop/past-project-past_code_cc2650:neulive20_nordic_testing wisetop/past-project-past_code_cc2650:Neulive20_developement_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_calibration_CHAO-I_BAT01 wisetop/past-project-past_code_cc2650:neulive20_linux_debug wisetop/past-project-past_code_cc2650:release/elite1.4-0720_2 wisetop/past-project-past_code_cc2650:simple_central_ma_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_test_connect_interval wisetop/past-project-past_code_cc2650:host_test_KIN_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_BAT01 wisetop/past-project-past_code_cc2650:Elite_BAT wisetop/past-project-past_code_cc2650:Neulive2_close_loop_BS wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_calibration_CHAO-I wisetop/past-project-past_code_cc2650:Neulive2_closeLoop wisetop/past-project-past_code_cc2650:CentralDataRateTest_neulive2 wisetop/past-project-past_code_cc2650:Elite_OBJ_calibration wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_addCV3_15 wisetop/past-project-past_code_cc2650:MemBoard_simple_central wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_release_0602 wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mV_addCV3_modify_shift wisetop/past-project-past_code_cc2650:central_pseudo_controller wisetop/past-project-past_code_cc2650:simple_central_lp_pin wisetop/past-project-past_code_cc2650:neulive20_blastData wisetop/past-project-past_code_cc2650:neu_data_rate_test wisetop/past-project-past_code_cc2650:Elite15_by_BENNY wisetop/past-project-past_code_cc2650:Debug_channel_mux wisetop/past-project-past_code_cc2650:Modify_Pramble_Header_Detection wisetop/past-project-past_code_cc2650:neuliveSTI/1210 wisetop/past-project-past_code_cc2650:host_test/master wisetop/past-project-past_code_cc2650:HostTest_developement wisetop/past-project-past_code_cc2650:elite_0.2_ship_dead_tabby_Cat wisetop/past-project-past_code_cc2650:Elite_OBJ_Version wisetop/past-project-past_code_cc2650:fix_channel_pointer wisetop/past-project-past_code_cc2650:Elite14_battery wisetop/past-project-past_code_cc2650:Neulive20_MergeWith13 wisetop/past-project-past_code_cc2650:neulive13_cali_new_0218 wisetop/past-project-past_code_cc2650:refix2 wisetop/past-project-past_code_cc2650:refix_channel_pointer wisetop/past-project-past_code_cc2650:modify_header_detection wisetop/past-project-past_code_cc2650:add_HCI wisetop/past-project-past_code_cc2650:Neulive20_8bitSPI wisetop/past-project-past_code_cc2650:neulive13_cali_new_0206 wisetop/past-project-past_code_cc2650:neulive13_cdr_cali wisetop/past-project-past_code_cc2650:Test_HCI wisetop/past-project-past_code_cc2650:Neulive13_YC_12/3 wisetop/past-project-past_code_cc2650:neulive2.0_16bit_SPI wisetop/past-project-past_code_cc2650:Neulive20_CHC wisetop/past-project-past_code_cc2650:Elite_Square_current wisetop/past-project-past_code_cc2650:neulive/development wisetop/past-project-past_code_cc2650:Neulive13_YC wisetop/past-project-past_code_cc2650:Memory_Board_KIM wisetop/past-project-past_code_cc2650:Elite_PSCurve wisetop/past-project-past_code_cc2650:Elite_CC_TempBranch wisetop/past-project-past_code_cc2650:Elite_master wisetop/past-project-past_code_cc2650:Elite_Earth_calibration wisetop/past-project-past_code_cc2650:Elite_calibration wisetop/past-project-past_code_cc2650:Elite_SmallZTcurve wisetop/past-project-past_code_cc2650:release/neulive wisetop/past-project-past_code_cc2650:EliteNewFormatNotify wisetop/past-project-past_code_cc2650:Elite_development wisetop/past-project-past_code_cc2650:origin/Elite_14re_demo wisetop/past-project-past_code_cc2650:elite_zm/alan wisetop/past-project-past_code_cc2650:neulive2.0/master wisetop/past-project-past_code_cc2650:Elite_LaunchPadTest wisetop/past-project-past_code_cc2650:neuliveSTI/master wisetop/past-project-past_code_cc2650:release/host_test-0.5.0 wisetop/past-project-past_code_cc2650:release/neulive1.2-demo-0.1 wisetop/past-project-past_code_cc2650:release/neulive1.2-demo-0.2 wisetop/past-project-past_code_cc2650:release/neulive1.2-30m
wisetop/past-project-past_code_cc2650:release-2.0 wisetop/past-project-past_code_cc2650:host-test-v0.5.0 wisetop/past-project-past_code_cc2650:neulive-1.2-demo-0.1 wisetop/past-project-past_code_cc2650:neulive-1.2-30m wisetop/past-project-past_code_cc2650:host-test-v0.4.0 wisetop/past-project-past_code_cc2650:host-test-v0.3.0 wisetop/past-project-past_code_cc2650:host-test-v0.2.0
...
pull from: wisetop/past-project-past_code_cc2650:neulive/development
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wisetop/past-project-past_code_cc2650:EliteEIS_AutoCali wisetop/past-project-past_code_cc2650:Elite_1.5_Taylor_061721 wisetop/past-project-past_code_cc2650:Elite1.5_AutoCali wisetop/past-project-past_code_cc2650:simple_central_ma_pin wisetop/past-project-past_code_cc2650:Elite1.5 wisetop/past-project-past_code_cc2650:release/elite_211202-2 wisetop/past-project-past_code_cc2650:release/elite_211216 wisetop/past-project-past_code_cc2650:e_Elite15_ccmode_1124 wisetop/past-project-past_code_cc2650:Elite_TRIG01_20210922 wisetop/past-project-past_code_cc2650:simple_central_ma_pin_one_four wisetop/past-project-past_code_cc2650:Elite1.5_Vout_in_RT_0628 wisetop/past-project-past_code_cc2650:central_separate_c_file wisetop/past-project-past_code_cc2650:Elite1.5-re_calibration wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv wisetop/past-project-past_code_cc2650:EliteEIS_Taylor wisetop/past-project-past_code_cc2650:Elite_TRIG01_development wisetop/past-project-past_code_cc2650:simple_central_ma_pin_0513_2 wisetop/past-project-past_code_cc2650:EliteEIS_developement_Roy wisetop/past-project-past_code_cc2650:neulive20_onchange_multiStageSTI wisetop/past-project-past_code_cc2650:Elite1.5_sps wisetop/past-project-past_code_cc2650:Offline_BS wisetop/past-project-past_code_cc2650:Elite_NueLive_FFT wisetop/past-project-past_code_cc2650:Elite1.5_dev_module wisetop/past-project-past_code_cc2650:Elite_TRIG_mega_0217 wisetop/past-project-past_code_cc2650:neulive2_E7DA_special_version wisetop/past-project-past_code_cc2650:simple_central_ma_pin_linux wisetop/past-project-past_code_cc2650:EliteEIS_developement wisetop/past-project-past_code_cc2650:EliteEIS_developement_jim wisetop/past-project-past_code_cc2650:neulive20_development_onchange_central wisetop/past-project-past_code_cc2650:Elite1.5_development_cali_mode wisetop/past-project-past_code_cc2650:Elite1.5_developement_magafly wisetop/past-project-past_code_cc2650:central_BS_triangle_wave wisetop/past-project-past_code_cc2650:central_borshin wisetop/past-project-past_code_cc2650:Neulive20_hostTest wisetop/past-project-past_code_cc2650:neulive_onchange_central_debug wisetop/past-project-past_code_cc2650:animal_experience wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_release_1103 wisetop/past-project-past_code_cc2650:neulive20_borshin_fft wisetop/past-project-past_code_cc2650:neulive20_stable_non_central wisetop/past-project-past_code_cc2650:Neulive2.0_developement wisetop/past-project-past_code_cc2650:neulive20_development_without_central wisetop/past-project-past_code_cc2650:Elite1.5_developement_EventHandle wisetop/past-project-past_code_cc2650:neulive20_nordic_testing wisetop/past-project-past_code_cc2650:Neulive20_developement_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_calibration_CHAO-I_BAT01 wisetop/past-project-past_code_cc2650:neulive20_linux_debug wisetop/past-project-past_code_cc2650:release/elite1.4-0720_2 wisetop/past-project-past_code_cc2650:simple_central_ma_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_test_connect_interval wisetop/past-project-past_code_cc2650:host_test_KIN_linux wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_BAT01 wisetop/past-project-past_code_cc2650:Elite_BAT wisetop/past-project-past_code_cc2650:Neulive2_close_loop_BS wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_calibration_CHAO-I wisetop/past-project-past_code_cc2650:Neulive2_closeLoop wisetop/past-project-past_code_cc2650:CentralDataRateTest_neulive2 wisetop/past-project-past_code_cc2650:Elite_OBJ_calibration wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_addCV3_15 wisetop/past-project-past_code_cc2650:MemBoard_simple_central wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mv_release_0602 wisetop/past-project-past_code_cc2650:Elite_OBJ_0.2mV_addCV3_modify_shift wisetop/past-project-past_code_cc2650:central_pseudo_controller wisetop/past-project-past_code_cc2650:simple_central_lp_pin wisetop/past-project-past_code_cc2650:neulive20_blastData wisetop/past-project-past_code_cc2650:neu_data_rate_test wisetop/past-project-past_code_cc2650:Elite15_by_BENNY wisetop/past-project-past_code_cc2650:Debug_channel_mux wisetop/past-project-past_code_cc2650:Modify_Pramble_Header_Detection wisetop/past-project-past_code_cc2650:neuliveSTI/1210 wisetop/past-project-past_code_cc2650:host_test/master wisetop/past-project-past_code_cc2650:HostTest_developement wisetop/past-project-past_code_cc2650:elite_0.2_ship_dead_tabby_Cat wisetop/past-project-past_code_cc2650:Elite_OBJ_Version wisetop/past-project-past_code_cc2650:fix_channel_pointer wisetop/past-project-past_code_cc2650:Elite14_battery wisetop/past-project-past_code_cc2650:Neulive20_MergeWith13 wisetop/past-project-past_code_cc2650:neulive13_cali_new_0218 wisetop/past-project-past_code_cc2650:refix2 wisetop/past-project-past_code_cc2650:refix_channel_pointer wisetop/past-project-past_code_cc2650:modify_header_detection wisetop/past-project-past_code_cc2650:add_HCI wisetop/past-project-past_code_cc2650:Neulive20_8bitSPI wisetop/past-project-past_code_cc2650:neulive13_cali_new_0206 wisetop/past-project-past_code_cc2650:neulive13_cdr_cali wisetop/past-project-past_code_cc2650:Test_HCI wisetop/past-project-past_code_cc2650:Neulive13_YC_12/3 wisetop/past-project-past_code_cc2650:neulive2.0_16bit_SPI wisetop/past-project-past_code_cc2650:Neulive20_CHC wisetop/past-project-past_code_cc2650:Elite_Square_current wisetop/past-project-past_code_cc2650:neulive/development wisetop/past-project-past_code_cc2650:Neulive13_YC wisetop/past-project-past_code_cc2650:Memory_Board_KIM wisetop/past-project-past_code_cc2650:Elite_PSCurve wisetop/past-project-past_code_cc2650:Elite_CC_TempBranch wisetop/past-project-past_code_cc2650:Elite_master wisetop/past-project-past_code_cc2650:Elite_Earth_calibration wisetop/past-project-past_code_cc2650:Elite_calibration wisetop/past-project-past_code_cc2650:Elite_SmallZTcurve wisetop/past-project-past_code_cc2650:release/neulive wisetop/past-project-past_code_cc2650:master wisetop/past-project-past_code_cc2650:EliteNewFormatNotify wisetop/past-project-past_code_cc2650:Elite_development wisetop/past-project-past_code_cc2650:origin/Elite_14re_demo wisetop/past-project-past_code_cc2650:elite_zm/alan wisetop/past-project-past_code_cc2650:neulive2.0/master wisetop/past-project-past_code_cc2650:Elite_LaunchPadTest wisetop/past-project-past_code_cc2650:neuliveSTI/master wisetop/past-project-past_code_cc2650:release/host_test-0.5.0 wisetop/past-project-past_code_cc2650:release/neulive1.2-demo-0.1 wisetop/past-project-past_code_cc2650:release/neulive1.2-demo-0.2 wisetop/past-project-past_code_cc2650:release/neulive1.2-30m
wisetop/past-project-past_code_cc2650:release-2.0 wisetop/past-project-past_code_cc2650:host-test-v0.5.0 wisetop/past-project-past_code_cc2650:neulive-1.2-demo-0.1 wisetop/past-project-past_code_cc2650:neulive-1.2-30m wisetop/past-project-past_code_cc2650:host-test-v0.4.0 wisetop/past-project-past_code_cc2650:host-test-v0.3.0 wisetop/past-project-past_code_cc2650:host-test-v0.2.0

95 Commits
Neulive20_hostTest ... neulive/development

Author SHA1 Message Date
weiting2 f4d18daf67 send calibration coeff to controller from CIS 2020-01-08 14:00:47 +08:00
weiting2 ee9ba737b2 send calibration coeff to controller 2020-01-08 10:38:02 +08:00
weiting2 3acb175b76 send calibration coeff to controller 2020-01-07 17:07:40 +08:00
weiting2 b05b5e5a4f check LSK speed 2020-01-06 17:54:53 +08:00
weiting2 f39c2e2e03 new way to detect LSK 2020-01-06 16:38:22 +08:00
weiting2 d60ae2a72e new way to detect LSK 2020-01-06 16:01:45 +08:00
weiting2 17ae7862fc new way to detect LSK 2020-01-06 15:54:58 +08:00
weiting2 e9f568f301 new way to detect LSK 2020-01-06 15:35:06 +08:00
weiting2 f9947d2335 new way to detect LSK 2020-01-06 14:15:21 +08:00
yichin beaa81af70 error fix 2020-01-06 13:55:28 +08:00
yichin f918df6520 error fix 2020-01-06 13:54:35 +08:00
yichin 42782dbcdd error fix 2020-01-06 13:54:16 +08:00
weiting2 2758db39aa calibration table 2020-01-06 13:49:26 +08:00
yichin 6c82c6447c calibration table 2020-01-06 11:31:10 +08:00
yichin eaffe0b917 calibration 2020-01-06 11:30:34 +08:00
weiting2 bad7c412c8 Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-06 10:56:00 +08:00
weiting2 71fcd7bffe new LSK decoder testing 2020-01-04 14:57:35 +08:00
yichin d5d2952fec error fix 2020-01-03 19:08:46 +08:00
yichin f130a9ce2a error fix 2020-01-03 18:50:43 +08:00
weiting2 9eebdcfa24 new LSK decoder testing 2020-01-03 18:13:22 +08:00
weiting2 12dca5bde4 new LSK decoder testing 2020-01-03 17:42:58 +08:00
weiting2 c5756104c0 new LSK decoder testing 2020-01-03 17:38:28 +08:00
weiting2 9f50fe43f7 new LSK decoder testing 2020-01-03 17:04:00 +08:00
weiting2 e28d246b60 new LSK decoder testing 2020-01-03 17:00:59 +08:00
weiting2 eb12cda156 new LSK decoder testing 2020-01-03 16:59:27 +08:00
weiting2 c0125497b3 new LSK decoder testing 2020-01-03 16:51:44 +08:00
weiting2 629f78f9e2 new LSK decoder testing 2020-01-03 16:08:45 +08:00
weiting2 5b0b11fb74 Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-03 15:50:57 +08:00
weiting2 17ba44da8b error fix 2020-01-03 15:50:49 +08:00
yichin 09b40fa24a error fix 2020-01-03 15:38:47 +08:00
weiting2 92901e6963 error fix 2020-01-03 15:11:00 +08:00
weiting2 c94ae4a6d9 update LSK decode 2020-01-03 15:05:33 +08:00
weiting2 e1e2855d6f update LSK decode 2020-01-03 14:17:07 +08:00
weiting2 efa948a95b use preamble correctly 2020-01-03 12:19:47 +08:00
weiting2 222bb3a966 use preamble correctly 2020-01-02 19:25:28 +08:00
weiting2 ec7e082b27 check LSK to decide restart or not 2020-01-02 18:59:10 +08:00
weiting2 891d0c3f9a check LSK to decide restart or not 2020-01-02 18:38:37 +08:00
weiting2 e087cec666 check LSK to decide restart or not 2020-01-02 17:27:50 +08:00
weiting2 4da9b99cf6 check LSK to decide restart or not 2020-01-02 17:02:32 +08:00
weiting2 13c60bdaca check LSK to decide restart or not 2020-01-02 16:33:00 +08:00
weiting2 54bd693c87 check LSK to decide restart or not 2020-01-02 16:17:46 +08:00
weiting2 8ebca1228c check LSK to decide restart or not 2020-01-02 16:08:34 +08:00
weiting2 5c3a110c3c Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-02 15:40:47 +08:00
weiting2 47b68817e2 check LSK to decide restart or not 2020-01-02 15:40:36 +08:00
yichin 4a5c76f13e Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-02 15:29:26 +08:00
weiting2 2fd9b80a20 check LSK to decide restart or not 2020-01-02 15:29:11 +08:00
yichin 2fdd61c23c error fix 2020-01-02 15:23:12 +08:00
yichin 9ebf171d9b error fix 2020-01-02 15:21:56 +08:00
weiting2 28553126ef check LSK to decide restart or not 2020-01-02 15:20:39 +08:00
weiting2 04d2a60ea6 check LSK to decide restart or not 2020-01-02 14:18:08 +08:00
yichin 2eab4b6227 error fix 2020-01-02 13:40:07 +08:00
yichin 74e417136c Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-02 13:34:35 +08:00
weiting2 91d4e8c42d check LSK to decide restart or not 2020-01-02 13:33:09 +08:00
yichin 3cb98ed6bb Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2020-01-02 11:23:30 +08:00
weiting2 e9c8175e91 check LSK to decide restart or not 2020-01-02 11:12:40 +08:00
yichin 1347d89577 Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2019-12-31 13:46:55 +08:00
weiting2 6e2a275f31 send recording para only 2019-12-31 13:44:42 +08:00
yichin f869c1ae3c Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2019-12-31 11:50:31 +08:00
weiting2 6e9d4685fc go to config done directly 2019-12-31 11:49:37 +08:00
yichin cc55716b6e Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2019-12-31 11:44:09 +08:00
weiting2 7a469c3231 go to config done directly 2019-12-31 11:42:18 +08:00
yichin f6400ee6c6 change ADC level timeOK 2019-12-31 11:28:35 +08:00
weiting2 7dd490adc1 go to config done directly 2019-12-31 11:25:10 +08:00
weiting2 224c2494c0 2650 send recording (amp) parameter only 2019-12-31 10:41:44 +08:00
weiting2 eff7e84dd7 2650 send recording (amp) parameter only 2019-12-30 11:07:37 +08:00
weiting2 c159b8b0d6 Merge remote-tracking branch 'origin/neulive/development' into neulive/development 2019-12-27 18:43:33 +08:00
weiting2 7918644b08 DBS using VIS break "start" instruction 2019-12-27 18:43:20 +08:00
YiChin 5a2b9a0061 error fix 2019-12-27 18:40:51 +08:00
YiChin 3292c9bcec error fix 2019-12-27 18:39:09 +08:00
weiting2 3effed2d65 DBS using VIS break "start" instruction 2019-12-27 18:37:11 +08:00
weiting2 f2d07eea76 DBS using VIS break "start" instruction 2019-12-27 16:42:29 +08:00
weiting2 0005e654c1 DBS interrupt & restart testing 2019-12-27 12:38:28 +08:00
weiting2 7a7f848930 DBS interrupt & restart testing 2019-12-27 12:28:13 +08:00
weiting2 e4e08ffbdc DBS interrupt & restart testing 2019-12-27 12:27:43 +08:00
weiting2 8774bad1b1 DBS interrupt & restart testing 2019-12-27 11:47:29 +08:00
weiting2 618e3ad01a DBS interrupt & restart testing 2019-12-27 10:33:59 +08:00
weiting2 8ed8201c0c VIS_FUH call DBS interrupt 2019-12-26 15:10:07 +08:00
YiChin c8f6ec239d error fix 2019-12-26 14:45:17 +08:00
weiting2 4930e8845b VIS_FUH call DBS interrupt 2019-12-26 14:38:51 +08:00
YiChin 5549d07208 error fix 2019-12-26 11:57:01 +08:00
weiting2 9380ecacec VIS_FUH call DBS interrupt 2019-12-26 11:51:52 +08:00
weiting2 e4a25a6225 DBS interrupt => back to configure => check if MUX configure correctly 2019-12-26 11:01:02 +08:00
weiting2 338b21fd65 read LSK directly to check restart issue 2019-12-25 17:16:15 +08:00
weiting2 b5762c0f65 FlushSPIrx(); make sure lsk pass check correct 2019-12-25 16:52:18 +08:00
weiting2 5799223d69 check configure instruction work well 2019-12-25 15:15:46 +08:00
weiting2 e72463b60a check configure instruction work well 2019-12-25 15:06:53 +08:00
weiting2 634f2fbd47 check configure instruction work well 2019-12-25 15:05:00 +08:00
weiting2 9aa508c6cf check configure instruction work well 2019-12-25 14:37:54 +08:00
weiting2 65a380cbca check configure instruction work well 2019-12-25 11:52:46 +08:00
weiting2 f1eb0dd727 check configure instruction work well 2019-12-25 11:19:21 +08:00
weiting2 a190f3212e add debug state in lsk; check every MISO SPI 2019-12-25 10:24:56 +08:00
weiting2 c5e55c4e96 add debug state in lsk; check every MISO SPI 2019-12-24 15:39:15 +08:00
weiting2 2a321cbd0e start PWM after turn on; add debug state in lsk 2019-12-24 15:23:47 +08:00
weiting2 468e4c491a test PWM (system clk) 2019-12-23 17:04:12 +08:00
weiting2 828f96c96c test PWM (system clk) 2019-12-23 16:49:35 +08:00
22 changed files with 993 additions and 421 deletions
Expand all files Collapse all files
simplelink/ble_sdk_2_02_02_25/examples/cc2650bp/simple_np/ccs/config/ccs_compiler_defines.bcfg
+3 -2
View File
@@ -1,9 +1,10 @@
/* /*
** Stack Frontier Generator 1.1.0 (2016-03-03 16:08:48.603000) ** Stack Frontier Generator 1.1.0 (2019-12-27 16:40:05.273000)
** **
** WARNING - Auto-generated file. Modifications could be lost! ** WARNING - Auto-generated file. Modifications could be lost!
*/ */
--define=ICALL_STACK0_ADDR=0xd001 --define=ICALL_STACK0_ADDR=0xd001
--define=ICALL_STACK0_START=0xd000 --define=ICALL_STACK0_START=0xd000
--define=ICALL_RAM0_START=0x200041e0 --define=ICALL_RAM0_START=0x20004160
simplelink/ble_sdk_2_02_02_25/examples/cc2650bp/simple_np/ccs/config/ccs_linker_defines.cmd
+3 -2
View File
@@ -1,9 +1,10 @@
/* /*
** Stack Frontier Generator 1.1.0 (2016-03-03 16:08:48.603000) ** Stack Frontier Generator 1.1.0 (2019-12-27 16:40:05.273000)
** **
** WARNING - Auto-generated file. Modifications could be lost! ** WARNING - Auto-generated file. Modifications could be lost!
*/ */
--define=ICALL_RAM0_START=0x200041e0 --define=ICALL_RAM0_START=0x20004160
--define=ICALL_STACK0_START=0xd000 --define=ICALL_STACK0_START=0xd000
--define=ICALL_STACK0_ADDR=0xd001 --define=ICALL_STACK0_ADDR=0xd001
simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.ccsproject
+1 -1
View File
@@ -9,6 +9,6 @@
<linkerCommandFile value="cc26x0f128.cmd"/> <linkerCommandFile value="cc26x0f128.cmd"/>
<rts value="libc.a"/> <rts value="libc.a"/>
<createSlaveProjects value=""/> <createSlaveProjects value=""/>
<connection value="common/targetdb/connections/TIXDS100v3_Dot7_Connection.xml"/> <connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
<isTargetManual value="false"/> <isTargetManual value="false"/>
</projectOptions> </projectOptions>
simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.cproject
+142 -175
View File
@@ -18,315 +18,282 @@
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch
+1 -1
View File
@@ -12,7 +12,7 @@
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/targetConfigs/CC2650F128.ccxml
+15 -14
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@@ -1,19 +1,20 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0"> <connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510icepick_c.xml" id="drivers" xml="tixds510icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cortexM.xml" id="drivers" xml="tixds100v2cortexM.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cortexM.xml" id="drivers" xml="tixds510cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="2" id="The Converter Usage"> <property Type="choicelist" Value="1" id="Power Selection">
<choice Name="Generate 1149.7 2-pin advanced modes" value="enable"> <choice Name="Probe supplied power" value="1">
<property Type="choicelist" Value="1" id="The Converter 1149.7 Frequency"> <property Type="stringfield" Value="3.3" id="Voltage Level"/>
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<property Type="choicelist" Value="5" id="-- Choose a value from 1.0MHz to 50.0MHz"/> </property>
</choice> <property Type="choicelist" Value="0" id="JTAG Signal Isolation"/>
</property> <property Type="choicelist" Value="4" id="SWD Mode Settings">
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<property Type="choicelist" Value="1" id="XDS110 Aux Port"/>
</choice> </choice>
</property> </property>
<platform XML_version="1.2" id="platform_0"> <platform XML_version="1.2" id="platform_0">
simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/m3_Hwi_asm.obj
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.aem3
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.obj
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/stack/.ccsproject
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@@ -9,6 +9,6 @@
<linkerCommandFile value="cc26x0f128.cmd"/> <linkerCommandFile value="cc26x0f128.cmd"/>
<rts value="libc.a"/> <rts value="libc.a"/>
<createSlaveProjects value=""/> <createSlaveProjects value=""/>
<connection value="common/targetdb/connections/TIXDS100v3_Dot7_Connection.xml"/> <connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
<isTargetManual value="false"/> <isTargetManual value="false"/>
</projectOptions> </projectOptions>
simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/stack/.cproject
+286 -131
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@@ -13,137 +13,292 @@
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simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/stack/.launches/simple_peripheral_cc2650em_stack.launch
+1
View File
@@ -12,6 +12,7 @@
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\stack\FlashROM\simple_peripheral_cc2650em_stack.out"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/simple_peripheral_cc2650em_stack"/> <listEntry value="/simple_peripheral_cc2650em_stack"/>
</listAttribute> </listAttribute>
simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/stack/targetConfigs/CC2650F128.ccxml
+15 -14
View File
@@ -1,19 +1,20 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0"> <configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0"> <configuration XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS100v3 USB Debug Probe_0" href="connections/TIXDS100v3_Dot7_Connection.xml" id="Texas Instruments XDS100v3 USB Debug Probe_0" xml="TIXDS100v3_Dot7_Connection.xml" xmlpath="connections"/> <instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe_0" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe_0" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS100v3 USB Debug Probe_0"> <connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510icepick_c.xml" id="drivers" xml="tixds510icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100v2cortexM.xml" id="drivers" xml="tixds100v2cortexM.xml" xmlpath="drivers"/> <instance XML_version="1.2" href="drivers/tixds510cortexM.xml" id="drivers" xml="tixds510cortexM.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="2" id="The Converter Usage"> <property Type="choicelist" Value="1" id="Power Selection">
<choice Name="Generate 1149.7 2-pin advanced modes" value="enable"> <choice Name="Probe supplied power" value="1">
<property Type="choicelist" Value="1" id="The Converter 1149.7 Frequency"> <property Type="stringfield" Value="3.3" id="Voltage Level"/>
<choice Name="Overclock with user specified value" value="unused"> </choice>
<property Type="choicelist" Value="5" id="-- Choose a value from 1.0MHz to 50.0MHz"/> </property>
</choice> <property Type="choicelist" Value="0" id="JTAG Signal Isolation"/>
</property> <property Type="choicelist" Value="4" id="SWD Mode Settings">
<property Type="choicelist" Value="5" id="The Target Scan Format"/> <choice Name="cJTAG (1149.7) 2-pin advanced modes" value="enable">
<property Type="choicelist" Value="1" id="XDS110 Aux Port"/>
</choice> </choice>
</property> </property>
<platform XML_version="1.2" id="platform_0"> <platform XML_version="1.2" id="platform_0">
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h
+5
View File
@@ -188,11 +188,16 @@ extern ICall_Semaphore semaphore;
#define VIS_CAL 0xA0 #define VIS_CAL 0xA0
#define VIS_STI 0xC0 #define VIS_STI 0xC0
#define VIS_RST 0xF0 #define VIS_RST 0xF0
#define VIS_PAU 0x10 // pause
#define VIS_HANDSHAKE_TO_CONFIG 0x20
#define VIS_CONFIG 0x40
#define VIS_CONFIG2 0x70
// CIS operator // CIS operator
#define CIS_NOP 0x00 #define CIS_NOP 0x00
#define CIS_VOLT 0x10 #define CIS_VOLT 0x10
#define CIS_LED 0x20 #define CIS_LED 0x20
#define CIS_CALI 0x30
// CIS return status code // CIS return status code
#define CDR_SUCCESS 0x0 #define CDR_SUCCESS 0x0
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage13_calibration.h
+45
View File
@@ -0,0 +1,45 @@
#ifndef NEU_CALI
#define NEU_CALI
#include "neulive13_CalibrationTable.h"
/*
*
* How to define Calibration()
*
* let y be DBS ADC raw data, which has value 0~1023
* x is UI display value, x = (y-512)/1000
* r is the real voltage value
*
* Before calibration we have r = (x - offset) / gain
*
* we want to have y' = Calibration(y), such that r = x_WithCali = (y' - 512)/1000
*
* => r = (x_WithOutCali - offset)/gain = x_WithCali = (y'-512)/1000
*
* => (x_WithOutCali - offset)/gain = ((y-512)/1000 - Offset)/gain = (y'-512)/1000
*
* => y' = 512 + [1000 * ((y-512)/1000 - Offset) / gain ]
*
* => y' = 512 + (y-512)/gain - [(1000 * Offset)/gain]
*
* => y' = (y-512)/gain + 512 - [(1000 * Offset)/gain]
*
*/
static uint16_t Calibration(uint8_t* DataBuf, uint8_t ch, uint8_t gain){
uint32_t raw, ret;
raw = (DataBuf[1] & 0x0f) << 6 | (DataBuf[2] & 0xFC) >> 2;
ret = 1000 * (raw-512)/CaliTable.Ch[ch].Gain[gain] + 512000 - 1000*1000*CaliTable.Ch[ch].Offset[gain] / CaliTable.Ch[ch].Gain[gain];
ret = ret / 1000;
// ret = ret * 10;
// ret = 1000 * (ret - CaliTable.Ch[ch].Offset[gain]) / CaliTable.Ch[ch].Gain[gain];
return (uint16_t) (ret);
}
#endif
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_checkLSK.h
+90
View File
@@ -0,0 +1,90 @@
#ifndef NEU_CHECK_LSK
#define NEU_CHECK_LSK
#define LSK_CHECKING_ERROR 0
#define LSK_NO_ERROR 1
#define LSK_ERROR 2
#define CHECK_NUMBER 50
#define VALUE_OFFSET 512
static uint16_t CheckLSKBuf[CHECK_NUMBER] = {0};
static uint8_t CheckLSKBufIndex = 0;
/***************************************
* @fn static void headstage_uni_delay()
* @brief make some delay
***************************************/
static void headstage_uni_delay() {
for (uint16_t i = 0; i < 1023; i++)
;
}
static uint8_t CheckLSK(uint8_t* data_buf){
uint16_t Data = 0;
// check LSK data preamble ( 0b0110_0000_1 ) 58(01011000) 2c(00101100)
// sometimes we lose the first bit , it means we only receive
// 0110_0000_1010_1xxx_xxxx_xxxX_XXXX_XXXX and
// 1100_0001_0101_xxxx_xxxx_xxXX_XXXX_XXXX
if ( data_buf[0] == 0x60 && ((data_buf[1] & 0xF8) == 0xA8) ) {
headstage_led_spi_color_debug(0xE1, 0xFF, 0x00, 0xFF);
Data = ((data_buf[1] & 0x07) << 7) | ((data_buf[2] & 0xFE) >> 1);
}
else if ( data_buf[0] == 0xC1 && ((data_buf[1] & 0xF0) == 0x50) ) {
headstage_led_spi_color_debug(0xE1, 0xFF, 0x00, 0xFF);
Data = ((data_buf[1] & 0x0F) << 6) | ((data_buf[2] & 0xFC) >> 2);
}
else if ( data_buf[0] == 0x30 && ((data_buf[1] & 0xFC) == 0x54) ) {
headstage_led_spi_color_debug(0xE1, 0xFF, 0x00, 0xFF);
Data = ((data_buf[1] & 0x03) << 8) | ((data_buf[2] & 0xFF));
}
else{
return LSK_CHECKING_ERROR;
}
headstage_led_spi_color_debug(0x0F, 0xFF, 0x0F, 0x0F);
// uint8_t channel;
//
// if ((INSTRUCTION.enable_channel_number == 1) || (dat_buf[0] == 0xc1)) {
// channel = reverse_channel[INSTRUCTION.last_enable_channel];
// } else {
// uint8_t channel_pointer = (INSTRUCTION.channel_pointer + 1) % INSTRUCTION.last_enable_channel;
// channel = reverse_channel[INSTRUCTION.channel_mux[channel_pointer]];
// INSTRUCTION.channel_pointer = channel_pointer;
// }
CheckLSKBuf[CheckLSKBufIndex] = Data;
CheckLSKBufIndex ++;
if(CheckLSKBufIndex >= CHECK_NUMBER){
CheckLSKBufIndex = 0;
// check LSK work well or not
uint32_t avg = 0;
uint8_t avgNumber = 0;
// sum all value that abs value < 100 mv
for(int i=0 ; i<CHECK_NUMBER ; i++){
if(-100+VALUE_OFFSET < CheckLSKBuf[i] && CheckLSKBuf[i] < 100+VALUE_OFFSET){
avg = avg + CheckLSKBuf[i];
avgNumber ++;
}
}
avg = avg / avgNumber;
if(10+VALUE_OFFSET < avg && avg < 30+VALUE_OFFSET){
return LSK_ERROR;
}
else if(-10+VALUE_OFFSET < avg && avg < -30+VALUE_OFFSET){
return LSK_ERROR;
}
else{
return LSK_NO_ERROR;
}
}
return LSK_CHECKING_ERROR;
}
#endif
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_led.h
+7
View File
@@ -222,6 +222,13 @@ static void headstage_led_spi_color(uint8_t color) {
headstage_led_spi_transmit(); headstage_led_spi_transmit();
} }
static void headstage_led_spi_color_debug(uint8_t brightness, uint8_t red, uint8_t green, uint8_t blue) {
LEDParameter parameter;
parameter = (LEDParameter){.luminance = brightness, .red = red, .green = green, .blue = blue};
headstage_led_set_buffer(headstage_spi_led_txbuf, SPI_LED_REPEAT, &parameter);
headstage_led_spi_transmit();
}
#endif // HEADSTAGE_LED_USE_GPIO #endif // HEADSTAGE_LED_USE_GPIO
#endif // HEADSTAGE_LED_H #endif // HEADSTAGE_LED_H
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_uni.h
+249 -75
View File
@@ -123,6 +123,7 @@
#include "uni/headstage_spi.h" #include "uni/headstage_spi.h"
#include "uni/headstage_pwm.h" #include "uni/headstage_pwm.h"
#include "uni/uni1.3_parameter.h" #include "uni/uni1.3_parameter.h"
#include "headstage_checkLSK.h"
/************************************ /************************************
* instruction building macro * instruction building macro
@@ -288,6 +289,8 @@
#define RIS_UMC_TRIG 0xC0 /**< control box to cc2650 instruction opcode, trigger stimulation */ #define RIS_UMC_TRIG 0xC0 /**< control box to cc2650 instruction opcode, trigger stimulation */
#define RIS_DEBUG 0xE0 /* largest value of RIS, (RIS = ins[1] & 0xE0) */
/*********************** /***********************
* stimulation waveform * stimulation waveform
***********************/ ***********************/
@@ -302,8 +305,8 @@
/******************************* /*******************************
* reserved virtual instruction * reserved virtual instruction
*******************************/ *******************************/
#define VIS_BLE_T 0b10100000 #define VIS_BLE_T 0xA0
#define VIS_SHIFT_T 0b01010000 #define VIS_SHIFT_T 0x50
/// all the categories of instruction we can change . /// all the categories of instruction we can change .
@@ -504,14 +507,10 @@ struct HEADSTAGE_PARAMETER_TABLE {
bool amp_rst; bool amp_rst;
} INSTRUCTION = {0}; } INSTRUCTION = {0};
/*************************************** static uint8_t build_umn_ins_config(uint8_t config_type, uint32_t* value);
* @fn static void headstage_uni_delay()
* @brief make some delay static uint8_t StartSync = 0;
***************************************/ static uint8_t SingleCh = 0;
static void headstage_uni_delay() {
for (uint16_t i = 0; i < 1023; i++)
;
}
static void rearrange_channel_mux_table() { static void rearrange_channel_mux_table() {
uint8_t enable_channel_number = 0; uint8_t enable_channel_number = 0;
@@ -534,6 +533,7 @@ static void rearrange_channel_mux_table() {
if (enable_channel_number == 1) { if (enable_channel_number == 1) {
INSTRUCTION.channel_mux[0] = last_enable_channel; INSTRUCTION.channel_mux[0] = last_enable_channel;
SingleCh = 1;
return; return;
} }
@@ -547,6 +547,7 @@ static void rearrange_channel_mux_table() {
int8_t i = next_enable_channel - 1; int8_t i = next_enable_channel - 1;
while (i >= 0) { while (i >= 0) {
// find largest enable ch number
if (INSTRUCTION.channel_table[i]) { if (INSTRUCTION.channel_table[i]) {
next_enable_channel = i; next_enable_channel = i;
break; break;
@@ -586,8 +587,13 @@ static void rearrange_channel_mux_table() {
#define UMC_STATE_LIMITED 0x08 #define UMC_STATE_LIMITED 0x08
#define UMC_STATE_TRIGGER 0x09 #define UMC_STATE_TRIGGER 0x09
#define UMC_STATE_WAIT_TRIGGER 0x0A #define UMC_STATE_WAIT_TRIGGER 0x0A
#define UMC_STATE_PAUSE 0x0B
#define UMC_STATE_RESTART 0x0C
#define UMC_STATE_INTERRUPT 0x0D #define UMC_STATE_INTERRUPT 0x0D
#define UMC_STATE_CHECK_LSK 0x0E
#define UMC_STATE_REC_STI 0x0F
#define UPDATE_DONE 0xFF #define UPDATE_DONE 0xFF
#define DEBUG 0xEE
// clang-format on // clang-format on
/******************* /*******************
@@ -598,9 +604,9 @@ struct {
uint8_t state; uint8_t state;
uint8_t config_type; uint8_t config_type;
uint8_t trigger_times; uint8_t trigger_times;
uint8_t reset_flag; uint8_t reset_flag;
} UMC_STATE = {0}; } UMC_STATE = {0};
@@ -669,14 +675,16 @@ static void headstage_spi_lsk_callback(SPI_Handle handle, SPI_Transaction* trans
} }
static void headstage_reset() { static void headstage_reset() {
headstage_led_spi_color(COLOR_GREEN);
memset(&INSTRUCTION, 0, sizeof(struct HEADSTAGE_PARAMETER_TABLE)); memset(&INSTRUCTION, 0, sizeof(struct HEADSTAGE_PARAMETER_TABLE));
memset(spi_txbuf, 0, SPI_BUFFER_SIZE); memset(spi_txbuf, 0, SPI_BUFFER_SIZE);
memset(spi_rxbuf, 0, SPI_BUFFER_SIZE); memset(spi_rxbuf, 0, SPI_BUFFER_SIZE);
memset(headstage_debug_buffer, 0, SPI_BUFFER_SIZE); memset(headstage_debug_buffer, 0, SPI_BUFFER_SIZE);
UMC_STATE.reset_flag = 1; UMC_STATE.reset_flag = 1;
StartSync = 0;
headstage_spi_transaction_cancel(headstage_spi_lsk_handle); headstage_spi_transaction_cancel(headstage_spi_lsk_handle);
headstage_pwm_stop(headstage_poly_r_pwm_handle); // headstage_pwm_stop(headstage_poly_r_pwm_handle);
headstage_pwm_stop(headstage_system_pwm_handle); // headstage_pwm_stop(headstage_system_pwm_handle);
headstage_pin_output(PIN_RESET, 0); headstage_pin_output(PIN_RESET, 0);
headstage_cpu_delay_ms(1); headstage_cpu_delay_ms(1);
headstage_pin_output(PIN_RESET, 1); headstage_pin_output(PIN_RESET, 1);
@@ -699,6 +707,8 @@ static void headstage_init() {
headstage_pin_output(PIN_STI_SEL, 1); // chip select is ok headstage_pin_output(PIN_STI_SEL, 1); // chip select is ok
headstage_pin_output(PIN_VGRP, 1); headstage_pin_output(PIN_VGRP, 1);
headstage_pin_output(PIN_FASTSET, 0); headstage_pin_output(PIN_FASTSET, 0);
headstage_pwm_start(headstage_system_pwm_handle);
headstage_pwm_start(headstage_poly_r_pwm_handle);
} }
static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instruction) { static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instruction) {
@@ -729,8 +739,8 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
uint8_t amp_gain = (instruction[0] & 0x1C) >> 2; uint8_t amp_gain = (instruction[0] & 0x1C) >> 2;
uint8_t pulse_width = ((instruction[0] & 0x03) << 2) | ((instruction[1] & 0xC0) >> 6); uint8_t pulse_width = ((instruction[0] & 0x03) << 2) | ((instruction[1] & 0xC0) >> 6);
uint8_t sti_times = (instruction[1] & 0x3F); uint8_t sti_times = (instruction[1] & 0x3F);
uint8_t sti_freq = (instruction[2] & 0x3F);
uint8_t mode = (instruction[2] & 0xC0) >> 6; uint8_t mode = (instruction[2] & 0xC0) >> 6;
uint8_t sti_freq = (instruction[2] & 0x3F);
uint8_t cha = (instruction[3] & 0x0F); uint8_t cha = (instruction[3] & 0x0F);
uint8_t chb = (instruction[4] & 0xF0) >> 4; uint8_t chb = (instruction[4] & 0xF0) >> 4;
uint8_t chc = (instruction[4] & 0x0F); uint8_t chc = (instruction[4] & 0x0F);
@@ -762,12 +772,25 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
break; break;
} }
case RIS_DEBUG:{
headstage_state = DEBUG;
headstage_led_spi_color(COLOR_BLUE);
uint32_t value;
uint8_t new_config_type = build_umn_ins_config(CONFIG_DONE, &value);
tx_put_u32(0, value);
headstage_spi_ask_transaction(4);
break;
}
default: default:
break; break;
} }
} }
static uint8_t VIS_START = 0;
static void headstage_update_vis_instruction(uint8_t vis_oper) { static void headstage_update_vis_instruction(uint8_t vis_oper) {
uint32_t value;
uint8_t new_config_type;
switch (vis_oper) { switch (vis_oper) {
// reset // reset
case VIS_RST: case VIS_RST:
@@ -777,6 +800,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
break; break;
case VIS_STI: case VIS_STI:
if (headstage_state == UMC_STATE_INTERRUPT) { if (headstage_state == UMC_STATE_INTERRUPT) {
// go back to configure state by DBS interrupt
headstage_state = UMC_STATE_INITIAL; headstage_state = UMC_STATE_INITIAL;
rearrange_channel_mux_table(); rearrange_channel_mux_table();
UMC_STATE.config_type = CONFIG_AMP_MUX; UMC_STATE.config_type = CONFIG_AMP_MUX;
@@ -786,20 +810,30 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
} else { } else {
headstage_state = UMC_STATE_HANDSHAKE; headstage_state = UMC_STATE_HANDSHAKE;
rearrange_channel_mux_table(); rearrange_channel_mux_table();
headstage_pwm_start(headstage_system_pwm_handle);
headstage_pwm_start(headstage_poly_r_pwm_handle);
UMC_STATE.config_type = CONFIG_AMP_MUX; UMC_STATE.config_type = CONFIG_AMP_MUX;
UMC_STATE.reset_flag = 0; UMC_STATE.reset_flag = 0;
headstage_led_spi_color(COLOR_BLUE); headstage_led_spi_color(COLOR_BLUE);
flag_notify(EVT_UMC_LSK); flag_notify(EVT_UMC_LSK);
} }
VIS_START = 0;
break; break;
// interrupt // interrupt
case VIS_INT: case VIS_INT:
headstage_reset(); headstage_reset();
headstage_state = UMC_STATE_HANDSHAKE; headstage_state = UMC_STATE_HANDSHAKE;
VIS_START = 0;
break;
case VIS_PAU:
// go back to configure state by DBS interrupt
headstage_state = UMC_STATE_PAUSE;
// rearrange_channel_mux_table();
UMC_STATE.config_type = CONFIG_AMP_MUX;
tx_put_u32(0, build_configure_instruction(UMC_IRQ, UMC_IRQ_CODE));
headstage_spi_ask_transaction(4);
break; break;
case VIS_BLE_T: case VIS_BLE_T:
@@ -809,9 +843,44 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
break; break;
case VIS_SHIFT_T: case VIS_SHIFT_T:
// headstage_led_spi_color(COLOR_BLUE);
// uint32_t value;
// uint8_t new_config_type = build_umn_ins_config(CONFIG_DONE, &value);
// tx_put_u32(0, value);
// headstage_spi_ask_transaction(4);
break; break;
case VIS_FUH:
// send config done to DBS
headstage_state = UMC_STATE_WAIT_START;
new_config_type = build_umn_ins_config(CONFIG_DONE, &value);
tx_put_u32(0, value);
headstage_spi_ask_transaction(4);
break;
case VIS_HANDSHAKE_TO_CONFIG:
VIS_START = 1;
headstage_state = UMC_STATE_HANDSHAKE;
rearrange_channel_mux_table();
UMC_STATE.config_type = CONFIG_AMP_MUX;
UMC_STATE.reset_flag = 0;
headstage_led_spi_color(COLOR_BLUE);
flag_notify(EVT_UMC_LSK);
break;
case VIS_CONFIG:
// choose recording channel
headstage_state = DEBUG;
UMC_STATE.config_type = CONFIG_AMP_MUX;
UMC_STATE.config_type = build_umn_ins_config(CONFIG_AMP_MUX, &value);
tx_put_u32(0, value);
headstage_spi_ask_transaction(4);
break;
case VIS_CONFIG2:
// set gain and other amp parameter
headstage_state = UMC_STATE_CONFIGURE;
UMC_STATE.config_type = build_umn_ins_config(UMC_STATE.config_type, &value);
tx_put_u32(0, value);
headstage_spi_ask_transaction(4);
break;
default: default:
break; break;
} }
@@ -852,6 +921,13 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
break; break;
} }
#endif #endif
case CIS_CALI:{
cdr_buf[0] = 87;
cdr_buf[1] = 187;
SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
break;
}
default: { default: {
cdr_buf[0] = _B_4b4b(cis_oper, CHIP_ID); cdr_buf[0] = _B_4b4b(cis_oper, CHIP_ID);
cdr_buf[1] = _B_4b4b(CDR_FAILURE, 0); cdr_buf[1] = _B_4b4b(CDR_FAILURE, 0);
@@ -875,35 +951,60 @@ static uint8_t headstage_debug_instruction(uint8_t* ins_buf) {
// todo: check data length extension with this function -> this function should be // todo: check data length extension with this function -> this function should be
static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) { static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) {
// check LSK data preamble ( 0b01100_0001 ) 58(01011000) 2c(00101100) // check LSK data preamble ( 0b0110_0000_1 ) 58(01011000) 2c(00101100)
// sometimes we lose the first bit , it means we only receive // sometimes we lose the first bit , it means we only receive
// 0110_0000_1010_1xxx_xxxx_xxxX_XXXX_XXXX and // 0110_0000_1010_1xxx_xxxx_xxxX_XXXX_XXXX and
// 1100_0001_0101_xxxx_xxxx_xxXX_XXXX_XXXX // 1100_0001_0101_xxxx_xxxx_xxXX_XXXX_XXXX
if (((dat_buf[0] & 0xC1) != 0xC1) && (dat_buf[0] != 0x00)) { // if (((dat_buf[0] & 0xC1) != 0xC1) && (dat_buf[0] != 0x00)) {
headstage_led_spi_color(COLOR_CYAN); //// headstage_led_spi_color(COLOR_CYAN);
headstage_uni_delay(); // headstage_uni_delay();
} else { // } else
if ((dat_buf[1] & 0x28) == 0x28) {
dat_buf[0] = (dat_buf[0] << 1) | ((dat_buf[1] >> 7) & 0x01); if(!StartSync){
dat_buf[1] = (dat_buf[1] << 1) | ((dat_buf[2] >> 7) & 0x01); // headstage_led_spi_color(COLOR_RED);
dat_buf[2] = (dat_buf[2] << 1) | ((dat_buf[3] >> 7) & 0x01); if(SingleCh){
if((dat_buf[1] & 0b01111000) == 0b00101000){
StartSync = 1;
}
} }
// multi channel should read preamble to allocate every channel
else{
if((dat_buf[0] & 0xFF) == 0x60 && (dat_buf[1] & 0xF8) == 0xA8){
StartSync = 1;
}
}
}
if(StartSync){
// check header, which is also a sync for single channel
dat_buf[0] = (dat_buf[0] << 1) | ((dat_buf[1] >> 7) & 0x01);
dat_buf[1] = (dat_buf[1] << 1) | ((dat_buf[2] >> 7) & 0x01);
dat_buf[2] = (dat_buf[2] << 1) | ((dat_buf[3] >> 7) & 0x01);
uint8_t channel; uint8_t channel;
if ((INSTRUCTION.enable_channel_number == 1) || (dat_buf[0] == 0xc1)) { if ((INSTRUCTION.enable_channel_number == 1)) {
channel = reverse_channel[INSTRUCTION.last_enable_channel]; channel = reverse_channel[INSTRUCTION.last_enable_channel];
} else { } else {
uint8_t channel_pointer = (INSTRUCTION.channel_pointer + 1) % INSTRUCTION.last_enable_channel; uint8_t channel_pointer = (INSTRUCTION.channel_pointer + 1) % INSTRUCTION.last_enable_channel;
channel = reverse_channel[INSTRUCTION.channel_mux[channel_pointer]]; channel = reverse_channel[INSTRUCTION.channel_mux[channel_pointer]];
INSTRUCTION.channel_pointer = channel_pointer; INSTRUCTION.channel_pointer = channel_pointer;
} }
uint8_t data_size = headstage_notify_append_data(channel, dat_buf); // SimpleProfile_SetParameter(BLE_NOT_BUFF_CHAR, BLE_NOT_BUFF_SIZE, headstage_notify_buffer);
uint8_t data_size = headstage_notify_append_data(channel, dat_buf, INSTRUCTION.amp_gain);
// headstage_notify_buffer[0] = CHIP_ID;
// headstage_notify_buffer[1] = 200;
// headstage_notify_send();
if (data_size >= BLE_NOT_BUFF_SIZE) { if (data_size >= BLE_NOT_BUFF_SIZE) {
headstage_notify_flip_buffer(); headstage_notify_flip_buffer();
headstage_notify_send(); headstage_notify_send();
// headstage_led_spi_color(COLOR_YELLOW);
// headstage_led_spi_color(COLOR_CYAN);
} }
} }
else{
headstage_uni_delay();
}
// uint16_t data_value = (uint16_t)(((dat_buf[1] & 0x0F) << 6) | ((dat_buf[2] & 0xFC) >> 2)); // uint16_t data_value = (uint16_t)(((dat_buf[1] & 0x0F) << 6) | ((dat_buf[2] & 0xFC) >> 2));
headstage_spi_lsk_transaction(3); headstage_spi_lsk_transaction(3);
} }
@@ -926,7 +1027,8 @@ static uint8_t build_umn_ins_config(uint8_t config_type, uint32_t* value) {
case CONFIG_AMP_GAIN: case CONFIG_AMP_GAIN:
*value = build_configure_instruction(CONFIG_AMP_GAIN, amp_gain_table[INSTRUCTION.amp_gain]); *value = build_configure_instruction(CONFIG_AMP_GAIN, amp_gain_table[INSTRUCTION.amp_gain]);
return CONFIG_STI_VOLT; // return CONFIG_STI_VOLT;
return CONFIG_AMP_BAND;
case CONFIG_STI_VOLT: case CONFIG_STI_VOLT:
*value = build_configure_instruction(CONFIG_STI_VOLT, INSTRUCTION.sti_volt); *value = build_configure_instruction(CONFIG_STI_VOLT, INSTRUCTION.sti_volt);
@@ -934,7 +1036,8 @@ static uint8_t build_umn_ins_config(uint8_t config_type, uint32_t* value) {
case CONFIG_AMP_BAND: case CONFIG_AMP_BAND:
*value = build_configure_instruction(CONFIG_AMP_BAND, amp_band_table[INSTRUCTION.amp_low_band_freq]); *value = build_configure_instruction(CONFIG_AMP_BAND, amp_band_table[INSTRUCTION.amp_low_band_freq]);
return CONFIG_STI_PULSE_WIDTH; // return CONFIG_STI_PULSE_WIDTH;
return CONFIG_ADC_RATE;
case CONFIG_STI_PULSE_WIDTH: case CONFIG_STI_PULSE_WIDTH:
*value = build_configure_instruction(CONFIG_STI_PULSE_WIDTH, sti_pulse_width_table[INSTRUCTION.pulse_width]); *value = build_configure_instruction(CONFIG_STI_PULSE_WIDTH, sti_pulse_width_table[INSTRUCTION.pulse_width]);
@@ -946,7 +1049,8 @@ static uint8_t build_umn_ins_config(uint8_t config_type, uint32_t* value) {
case CONFIG_ADC_RATE: case CONFIG_ADC_RATE:
*value = build_configure_instruction(CONFIG_ADC_RATE, adc_clock_table[INSTRUCTION.frequency]); *value = build_configure_instruction(CONFIG_ADC_RATE, adc_clock_table[INSTRUCTION.frequency]);
return CONFIG_STI_CHANNEL_P; // return CONFIG_STI_CHANNEL_P;
return CONFIG_DONE;
case CONFIG_STI_CHANNEL: case CONFIG_STI_CHANNEL:
case CONFIG_STI_CHANNEL_P: case CONFIG_STI_CHANNEL_P:
@@ -1018,6 +1122,8 @@ static void headstage_umc_state_transfer_ask() {
case UMC_STATE_WAIT_START: case UMC_STATE_WAIT_START:
headstage_spi_lsk_transaction(8); headstage_spi_lsk_transaction(8);
break; break;
case UMC_STATE_CHECK_LSK:
case UMC_STATE_REC_STI:
case UMC_STATE_TRIGGER: case UMC_STATE_TRIGGER:
case UMC_STATE_CONTINUOUS: case UMC_STATE_CONTINUOUS:
case UMC_STATE_LIMITED: case UMC_STATE_LIMITED:
@@ -1027,6 +1133,12 @@ static void headstage_umc_state_transfer_ask() {
headstage_state = UMC_STATE_TRIGGER; headstage_state = UMC_STATE_TRIGGER;
headstage_spi_lsk_transaction(3); headstage_spi_lsk_transaction(3);
break; break;
case UMC_STATE_PAUSE:
headstage_spi_lsk_transaction(8);
break;
case UMC_STATE_RESTART:
headstage_spi_lsk_transaction(8);
break;
default: default:
break; break;
} }
@@ -1035,6 +1147,8 @@ static void headstage_umc_state_transfer_ask() {
/** /**
* @fn headstage_umc_state_transfer_lsk * @fn headstage_umc_state_transfer_lsk
*/ */
static uint8_t TestCounter = 0;
static uint8_t PassCheck = 0; // PassCheck=1 => DBS receive ASK, else ASK failed
static void headstage_umc_state_transfer_lsk() { static void headstage_umc_state_transfer_lsk() {
switch (headstage_state) { switch (headstage_state) {
case UMC_STATE_IDLE: case UMC_STATE_IDLE:
@@ -1044,8 +1158,10 @@ static void headstage_umc_state_transfer_lsk() {
case UMC_STATE_HANDSHAKE: case UMC_STATE_HANDSHAKE:
// if we receive handshake data , prepare handshake echo and call spi_tx transfer // if we receive handshake data , prepare handshake echo and call spi_tx transfer
if (umc_handshake_check(spi_rxbuf)) { if (umc_handshake_check(spi_rxbuf)) {
FlushSPIrx();
tx_put_u32(0, UMC_HAND_SHAKE_RECV); tx_put_u32(0, UMC_HAND_SHAKE_RECV);
headstage_state = UMC_STATE_HANDSHAKE_RECEIVE; headstage_state = UMC_STATE_HANDSHAKE_RECEIVE;
// headstage_state = DEBUG;
headstage_spi_ask_transaction(4); // transmit handshake echo headstage_spi_ask_transaction(4); // transmit handshake echo
} else { } else {
headstage_spi_lsk_transaction(2); // listen to LSK for handshake data again headstage_spi_lsk_transaction(2); // listen to LSK for handshake data again
@@ -1055,10 +1171,10 @@ static void headstage_umc_state_transfer_lsk() {
case UMC_STATE_HANDSHAKE_RECEIVE: case UMC_STATE_HANDSHAKE_RECEIVE:
/**< if we success to receive handshake data */ /**< if we success to receive handshake data */
if (umc_pass_check()) { if (umc_pass_check()) {
FlushSPIrx();
tx_put_u32(0, build_configure_instruction(UMC_CALIB_DONE, UMC_MODE_LSK_OUT)); tx_put_u32(0, build_configure_instruction(UMC_CALIB_DONE, UMC_MODE_LSK_OUT));
headstage_state = UMC_STATE_INITIAL; headstage_state = UMC_STATE_INITIAL;
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} else { } else {
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
@@ -1067,12 +1183,17 @@ static void headstage_umc_state_transfer_lsk() {
case UMC_STATE_INITIAL: case UMC_STATE_INITIAL:
if (umc_pass_check()) { if (umc_pass_check()) {
FlushSPIrx();
TestCounter = 0;
headstage_state = UMC_STATE_CONFIGURE; headstage_state = UMC_STATE_CONFIGURE;
if(VIS_START){
headstage_state = DEBUG;
}
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} else { } else {
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} }
TestCounter ++;
break; break;
case UMC_STATE_CONFIGURE: case UMC_STATE_CONFIGURE:
@@ -1089,69 +1210,98 @@ static void headstage_umc_state_transfer_lsk() {
if (new_config_type == CONFIG_DONE) { if (new_config_type == CONFIG_DONE) {
headstage_state = UMC_STATE_WAIT_START; headstage_state = UMC_STATE_WAIT_START;
if(VIS_START){ headstage_state = DEBUG; }
} else { } else {
headstage_state = UMC_STATE_CONFIGURE; headstage_state = UMC_STATE_CONFIGURE;
} }
TestCounter = 0;
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} }
} else { } else {
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} }
TestCounter ++;
break; break;
/**
* conservative instruction need golden key to trigger DBS // conservative instruction need golden key to trigger DBS
*/
case UMC_STATE_WAIT_START: case UMC_STATE_WAIT_START:
if (headstage_debug_buffer[1] > 18) { if (headstage_debug_buffer[1] > 18) {
// this transaction make cause amplifier data right shift // headstage_state = UMC_STATE_CHECK_LSK;
switch (INSTRUCTION.mode) { headstage_state = UMC_STATE_REC_STI;
case 0: headstage_spi_lsk_transaction(3);
// continuous mode
headstage_state = UMC_STATE_TRIGGER;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
case 1:
// trigger mode
headstage_state = UMC_STATE_TRIGGER;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
case 2:
// limited mode
headstage_state = UMC_STATE_LIMITED;
UMC_STATE.trigger_times = INSTRUCTION.sti_times;
headstage_spi_lsk_transaction(3);
break;
case 3:
// continuous mode
headstage_state = UMC_STATE_CONTINUOUS;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
default:
headstage_state = UMC_STATE_CONTINUOUS;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
}
} else if (headstage_debug_buffer[1] > 10) { } else if (headstage_debug_buffer[1] > 10) {
headstage_debug_buffer[1] += 1; headstage_debug_buffer[1] += 1;
tx_put_u32(0, UMC_GOLDEN_KEY); tx_put_u32(0, UMC_GOLDEN_KEY);
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} else { } else {
headstage_debug_buffer[1] += 1; headstage_debug_buffer[1] ++;
tx_put_u32(0, build_configure_instruction(CONFIG_DONE, 0xFF)); tx_put_u32(0, build_configure_instruction(CONFIG_DONE, 0xFF));
headstage_spi_ask_transaction(4); headstage_spi_ask_transaction(4);
} }
break; break;
// check lsk, make sure DBS chip have no error
case UMC_STATE_CHECK_LSK:{
uint8_t NoError = 0;
NoError = CheckLSK(spi_rxbuf);
if(NoError == LSK_NO_ERROR){
headstage_state = UMC_STATE_REC_STI;
headstage_led_spi_color_debug(0xE1, 0x00, 0x00, 0xFF);
}
else if(NoError == LSK_CHECKING_ERROR){
headstage_state = UMC_STATE_CHECK_LSK;
headstage_led_spi_color(COLOR_GREEN);
}
else if(NoError == LSK_ERROR){
headstage_state = UMC_STATE_REC_STI;
headstage_led_spi_color_debug(0xE1, 0xF1, 0x00, 0x00);
}
else{
headstage_led_spi_color_debug(0xE1, 0xF1, 0xF1, 0xF1);
headstage_state = UMC_STATE_REC_STI;
}
headstage_spi_lsk_transaction(3);
break;
}
case UMC_STATE_REC_STI:
// this transaction make cause amplifier data right shift
switch (INSTRUCTION.mode) {
case 0:
// continuous mode
headstage_state = UMC_STATE_TRIGGER;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
case 1:
// trigger mode
headstage_state = UMC_STATE_TRIGGER;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
case 2:
// limited mode
headstage_state = UMC_STATE_LIMITED;
UMC_STATE.trigger_times = INSTRUCTION.sti_times;
headstage_spi_lsk_transaction(3);
break;
case 3:
// continuous mode
headstage_state = UMC_STATE_CONTINUOUS;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
default:
headstage_state = UMC_STATE_CONTINUOUS;
UMC_STATE.trigger_times = 0;
headstage_spi_lsk_transaction(3);
break;
}
break;
case UMC_STATE_TRIGGER: case UMC_STATE_TRIGGER:
// headstage_led_spi_color(COLOR_GREEN);
headstage_uni_umc_data_append_notify_buffer(spi_rxbuf); headstage_uni_umc_data_append_notify_buffer(spi_rxbuf);
break; break;
@@ -1173,6 +1323,30 @@ static void headstage_umc_state_transfer_lsk() {
break; break;
case UMC_STATE_INTERRUPT: case UMC_STATE_INTERRUPT:
break; break;
case DEBUG:
UMC_STATE.reset_flag = 1;
break;
case UMC_STATE_PAUSE:
if (umc_pass_check()) {
headstage_led_spi_color(COLOR_RED);
// headstage_state = UMC_STATE_RESTART;
}
else {
headstage_spi_ask_transaction(4);
}
break;
case UMC_STATE_RESTART:
// if (umc_pass_check()) {
// headstage_led_spi_color(COLOR_YELLOW);
INSTRUCTION.mode = 0;
headstage_state = UMC_STATE_WAIT_START;
headstage_spi_ask_transaction(4);
// } else {
// headstage_spi_ask_transaction(4);
// }
break;
default: default:
break; break;
} }
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neulive13_CalibrationTable.h
+107
View File
@@ -0,0 +1,107 @@
#ifndef NEU_CALI_TABLE
#define NEU_CALI_TABLE
#define BOARD_NAME
typedef struct _SingleChannelCali{
uint16_t Gain[3];
int16_t Offset[3];
}SingleChannelCali;
struct _CaliTable{
SingleChannelCali Ch[12];
}CaliTable =
#ifdef BOARD_NAME
{
.Ch[0].Gain[0] = 23,
.Ch[0].Offset[0] = -3,
.Ch[0].Gain[1] = 106,
.Ch[0].Offset[1] = -13,
.Ch[0].Gain[2] = 233,
.Ch[0].Offset[2] = -27,
.Ch[1].Gain[0] = 23,
.Ch[1].Offset[0] = 1,
.Ch[1].Gain[1] = 109,
.Ch[1].Offset[1] = 6,
.Ch[1].Gain[2] = 241,
.Ch[1].Offset[2] = 16,
.Ch[2].Gain[0] = 24,
.Ch[2].Offset[0] = -14,
.Ch[2].Gain[1] = 112,
.Ch[2].Offset[1] = -60,
.Ch[2].Gain[2] = 241,
.Ch[2].Offset[2] = -131,
.Ch[3].Gain[0] = 23,
.Ch[3].Offset[0] = 16,
.Ch[3].Gain[1] = 110,
.Ch[3].Offset[1] =70,
.Ch[3].Gain[2] = 231,
.Ch[3].Offset[2] = 156,
.Ch[4].Gain[0] = 69,
.Ch[4].Offset[0] = 0,
.Ch[4].Gain[1] = 322,
.Ch[4].Offset[1] = 10,
.Ch[4].Gain[2] = 665,
.Ch[4].Offset[2] = 15,
.Ch[5].Gain[0] = 69,
.Ch[5].Offset[0] = 9,
.Ch[5].Gain[1] = 320,
.Ch[5].Offset[1] = 35,
.Ch[5].Gain[2] = 632,
.Ch[5].Offset[2] = 75,
.Ch[6].Gain[0] = 69,
.Ch[6].Offset[0] = 21,
.Ch[6].Gain[1] = 323,
.Ch[6].Offset[1] = 86,
.Ch[6].Gain[2] = 551,
.Ch[6].Offset[2] = 167,
.Ch[7].Gain[0] = 69,
.Ch[7].Offset[0] = -20,
.Ch[7].Gain[1] = 316,
.Ch[7].Offset[1] = -82,
.Ch[7].Gain[2] = 577,
.Ch[7].Offset[2] = -148,
.Ch[8].Gain[0] = 69,
.Ch[8].Offset[0] = 12,
.Ch[8].Gain[1] = 322,
.Ch[8].Offset[1] = 58,
.Ch[8].Gain[2] = 613,
.Ch[8].Offset[2] = 105,
.Ch[9].Gain[0] = 69,
.Ch[9].Offset[0] = -6,
.Ch[9].Gain[1] = 325,
.Ch[9].Offset[1] = -15,
.Ch[9].Gain[2] = 622,
.Ch[9].Offset[2] = -14,
.Ch[10].Gain[0] = 24,
.Ch[10].Offset[0] = -5,
.Ch[10].Gain[1] = 103,
.Ch[10].Offset[1] = -24,
.Ch[10].Gain[2] = 209,
.Ch[10].Offset[2] = -50,
.Ch[11].Gain[0] = 116,
.Ch[11].Offset[0] = 49,
.Ch[11].Gain[1] = 388,
.Ch[11].Offset[1] = 202,
.Ch[11].Gain[2] = 340,
.Ch[11].Offset[2] = 273
};
#endif
#else
{0};
#endif
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/tni/headstage_notify.h
+12 -3
View File
@@ -8,6 +8,8 @@
#error "headstage/headstage_notify.h not included" #error "headstage/headstage_notify.h not included"
#endif #endif
#include "headstage13_calibration.h"
#define NOT_BUF_OFFSET_INIT 8 #define NOT_BUF_OFFSET_INIT 8
static uint32_t not_buf_offset = NOT_BUF_OFFSET_INIT; static uint32_t not_buf_offset = NOT_BUF_OFFSET_INIT;
@@ -31,7 +33,9 @@ static void headstage_notify_flip_buffer() {
not_buf_offset = NOT_BUF_OFFSET_INIT; not_buf_offset = NOT_BUF_OFFSET_INIT;
} }
static uint8_t headstage_notify_append_data(uint8_t channel, uint8_t *data_value) { static uint8_t headstage_notify_append_data(uint8_t channel, uint8_t *data_value, uint8_t gain) {
uint16_t data;
if (not_buf_offset <= NOT_BUF_OFFSET_INIT) { if (not_buf_offset <= NOT_BUF_OFFSET_INIT) {
headstage_notify_set_timestamp(); headstage_notify_set_timestamp();
not_buf_offset = NOT_BUF_OFFSET_INIT; not_buf_offset = NOT_BUF_OFFSET_INIT;
@@ -41,8 +45,13 @@ static uint8_t headstage_notify_append_data(uint8_t channel, uint8_t *data_value
headstage_notify_buffer[not_buf_offset++] = ((channel & 0x0F) << 4); headstage_notify_buffer[not_buf_offset++] = ((channel & 0x0F) << 4);
headstage_notify_buffer[not_buf_offset++] = 0x03; headstage_notify_buffer[not_buf_offset++] = 0x03;
} else { } else {
headstage_notify_buffer[not_buf_offset++] = ((channel & 0x0f) << 4) | (data_value[1] & 0x0f); // data = Calibration(data_value, channel, gain);
headstage_notify_buffer[not_buf_offset++] = data_value[2] & 0xFC; data = (data_value[1] & 0x0F) << 6 | (data_value[2] & 0xFC) >>2;
data = not_buf_offset;
// headstage_notify_buffer[not_buf_offset++] = ((channel & 0x0F) << 4) | (data_value[1] & 0x0F);
// headstage_notify_buffer[not_buf_offset++] = data_value[2] & 0xFC;
headstage_notify_buffer[not_buf_offset++] = ((channel & 0x0F) << 4) | (data & 0x03C0) >> 6;
headstage_notify_buffer[not_buf_offset++] = (data & 0x003F) << 2;
} }
if (not_buf_offset == BLE_NOT_BUFF_SIZE) { if (not_buf_offset == BLE_NOT_BUFF_SIZE) {
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/uni/headstage_spi.h
+8
View File
@@ -89,4 +89,12 @@ static void headstage_spi_lsk_callback(SPI_Handle handle, SPI_Transaction* trans
} \ } \
} while (0) } while (0)
static void FlushSPIrx(){
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
spi_rxbuf[i] = 0;
}
}
#endif // HEADSTAGE_SPI_H #endif // HEADSTAGE_SPI_H
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c
+2 -2
View File
@@ -316,7 +316,7 @@ static void SimpleBLEPeripheral_init(void) {
application_message_queue = Util_constructQueue(&application_message); application_message_queue = Util_constructQueue(&application_message);
// Setup the GAP // Setup the GAP
GAP_SetParamValue(TGAP_CONN_PAUSE_PERIPHERAL, DEFAULT_CONN_PAUSE_PERIPHERAL); GAP_SetParamValue(TGAP_GAP_SetParamValueCONN_PAUSE_PERIPHERAL, DEFAULT_CONN_PAUSE_PERIPHERAL);
// Setup the GAP Peripheral Role Profile // Setup the GAP Peripheral Role Profile
{ {
@@ -499,7 +499,7 @@ static void headstage_init_device_info() {
break; break;
} }
uint8_t scanRspData[64]; uint8_t scanRspData[120];
uint8_t *p = scanRspData; uint8_t *p = scanRspData;
*p++ = sizeof(DEVICE_NAME); *p++ = sizeof(DEVICE_NAME);
*p++ = GAP_ADTYPE_LOCAL_NAME_COMPLETE; *p++ = GAP_ADTYPE_LOCAL_NAME_COMPLETE;