Merge branch 'dev/PELv2.0' into vscode

config: switch project configuration to DEF_ELITE_DEV
feat: PELv2.0 notify 120 bytes
2025-08-29 17:25:17 +08:00 · 2025-08-29 17:25:09 +08:00 · 2025-08-29 17:24:33 +08:00 · 2025-08-29 13:57:05 +08:00 · 2025-08-29 10:10:08 +08:00 · 2025-08-29 10:09:56 +08:00
115 changed files with 2167 additions and 4740 deletions
@@ -29,7 +29,6 @@ BinPackParameters: false
 BreakBeforeBinaryOperators: None
 BreakBeforeTernaryOperators: false
 BreakAfterJavaFieldAnnotations: true
-AlignConsecutiveAssignments: true
 AlignTrailingComments: true
 BreakConstructorInitializers: AfterColon
 AlignConsecutiveMacros:
@@ -50,6 +49,4 @@ AlignConsecutiveBitFields:
  AlignCompound: true
  PadOperators: true 
 AlignEscapedNewlines: Right
-BinPackArguments: false
-BinPackParameters: false
 ...
@@ -4,3 +4,4 @@
 *.vgdbsettings.*.user
 *.zip
 /build/
+/output/
@@ -0,0 +1,74 @@
+{
+  // Use IntelliSense to learn about possible attributes.
+  // Hover to view descriptions of existing attributes.
+  // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
+  "version": "0.2.0",
+  "configurations": [
+    {
+      "cwd": "${workspaceRoot}",
+      "executable": "${command:cmake.launchTargetPath}",
+      "name": "(Ubuntu) launch & debug",
+      "request": "launch",
+      "type": "cortex-debug",
+      "servertype": "jlink",
+      "serverpath": "/opt/SEGGER/JLink/JLinkGDBServerCLExe",
+      "serverArgs": [
+        "-halt",
+        "-ir",
+        "-vd",
+        "-strict",
+      ],
+      "rttConfig": {
+        "enabled": true,
+        "address": "auto",
+        "decoders": [
+          {
+            "label": "",
+            "port": 0,
+            "type": "console"
+          }
+        ],
+      },
+      "armToolchainPath": "/opt/arm-none-eabi/bin",
+      "device": "NRF52840_XXAA",
+      "interface": "swd",
+      "rtos": "FreeRTOS",
+      "svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
+      "runToEntryPoint": "main",
+      "preLaunchTask": "CMake: build"
+    },
+    {
+      "cwd": "${workspaceRoot}",
+      "executable": "${command:cmake.launchTargetPath}",
+      "name": "(Windows) launch & debug",
+      "request": "launch",
+      "type": "cortex-debug",
+      "servertype": "jlink",
+      "serverpath": "C:/Program Files/SEGGER/JLink/JLinkGDBServerCL.exe",
+      "serverArgs": [
+        "-halt",
+        "-ir",
+        "-vd",
+        "-strict",
+      ],
+      "rttConfig": {
+        "enabled": true,
+        "address": "auto",
+        "decoders": [
+          {
+            "label": "",
+            "port": 0,
+            "type": "console"
+          }
+        ],
+      },
+      "armToolchainPath": "C:/sysgcc/arm-eabi/bin",
+      "device": "NRF52840_XXAA",
+      "interface": "swd",
+      "rtos": "FreeRTOS",
+      "svdFile": "${workspaceRoot}/../bmd380_sdk/modules/nrfx/mdk/nrf52840.svd",
+      "runToEntryPoint": "main",
+      "preLaunchTask": "CMake: build"
+    },
+  ]
+}
@@ -0,0 +1,15 @@
+{
+    "editor.formatOnSave": false,
+    "[c]": {
+        "editor.defaultFormatter": "xaver.clang-format",
+        "editor.formatOnSave": true
+    },
+    "[cpp]": {
+        "editor.defaultFormatter": "xaver.clang-format",
+        "editor.formatOnSave": true
+    },
+    "[python]": {
+        "editor.defaultFormatter": "ms-python.black-formatter",
+        "editor.formatOnSave": true
+    }
+}
@@ -0,0 +1,29 @@
+{
+	"version": "2.0.0",
+	"tasks": [
+		{
+			"type": "cmake",
+			"label": "CMake: build",
+			"command": "build",
+			"targets": [
+				"all"
+			],
+			"preset": "Debug",
+			"group": "build",
+			"problemMatcher": [],
+			"detail": "CMake template build task"
+		},
+		{
+			"type": "cmake",
+			"label": "CMake: clean rebuild",
+			"command": "cleanRebuild",
+			"targets": [
+				"all"
+			],
+			"preset": "Debug",
+			"group": "build",
+			"problemMatcher": [],
+			"detail": "CMake template clean rebuild task"
+		}
+	]
+}
@@ -0,0 +1,261 @@
+cmake_minimum_required(VERSION 3.10.0)
+
+# ==========================
+# Toolchain Setup
+# ==========================
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_SOURCE_DIR}/cmake/arm-none-eabi-gcc.cmake)
+
+# ==========================
+# Project Setup
+# ==========================
+project(elite VERSION 0.1.0 LANGUAGES C ASM)
+
+set(CMAKE_C_STANDARD 99)
+set(CMAKE_C_STANDARD_REQUIRED ON)
+set(CMAKE_C_EXTENSIONS ON)
+
+set(EXECUTABLE ${PROJECT_NAME}.elf)
+set(NRF_SDK_DIR ${CMAKE_SOURCE_DIR}/../bmd380_sdk)
+set(NRF_SDK_LINKER_DIR ${NRF_SDK_DIR}/modules/nrfx/mdk)
+set(SD_LINKER_DIR ${CMAKE_SOURCE_DIR}/SoftdeviceLibraries/hard)
+set(LINKER_DIR ${CMAKE_SOURCE_DIR}/linkscripts)
+set(LINKER_FILE ${LINKER_DIR}/nRF52840_XXAA_S140_reserve.lds)
+
+# ==========================
+# Compiler Flags and Defines
+# ==========================
+set(COMMON_COMPILE_OPT
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
+    -fdata-sections -ffunction-sections -Wall -Os -g3 -std=gnu99
+    -Wno-unused-variable -Wno-pointer-sign -Wno-array-bounds
+)
+
+set(COMMON_COMPILE_DEF
+    -DDEBUG=1 -DNRF52840_XXAA -DS140_reserve -DCONFIG_GPIO_AS_PIN
+    -DRESETHNRF_DFU_SETTINGS_VERSION=2 -DNRF_SD_BLE_API_VERSION=7
+    -D__STACK_SIZE=1024 -D__HEAP_SIZE=1024 -DARM_MATH_CM4
+    -DSOFTDEVICE_PRESENT -DUSE_APP_CONFIG
+)
+
+set(COMMON_COMPILE_INC
+    ${ARM_TOOLCHAIN_DIR}/../arm-none-eabi/include
+    ${CMAKE_SOURCE_DIR}/app/inc
+    ${NRF_SDK_DIR}/components/ble/ble_db_discovery
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dis
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dis_c
+    ${NRF_SDK_DIR}/components/ble/common/
+    ${NRF_SDK_DIR}/components/ble/nrf_ble_gatt
+    ${NRF_SDK_DIR}/components/ble/nrf_ble_gq
+    ${NRF_SDK_DIR}/components/ble/nrf_ble_scan
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu
+    ${NRF_SDK_DIR}/components/ble/ble_advertising
+    ${NRF_SDK_DIR}/components/ble/peer_manager
+
+    ${NRF_SDK_DIR}/components/libraries/atomic
+    ${NRF_SDK_DIR}/components/libraries/atomic_flags
+    ${NRF_SDK_DIR}/components/libraries/balloc
+    ${NRF_SDK_DIR}/components/libraries/delay
+    ${NRF_SDK_DIR}/components/libraries/experimental_section_vars
+  
+    ${NRF_SDK_DIR}/components/libraries/memobj
+    ${NRF_SDK_DIR}/components/libraries/queue
+    ${NRF_SDK_DIR}/components/libraries/ringbuf
+    ${NRF_SDK_DIR}/components/libraries/strerror
+    ${NRF_SDK_DIR}/components/libraries/util
+    ${NRF_SDK_DIR}/components/libraries/block_dev
+    ${NRF_SDK_DIR}/components/libraries/bootloader
+    ${NRF_SDK_DIR}/components/libraries/bootloader/ble_dfu
+    ${NRF_SDK_DIR}/components/libraries/bootloader/dfu
+    ${NRF_SDK_DIR}/components/libraries/pwr_mgmt
+    ${NRF_SDK_DIR}/components/libraries/usbd
+    ${NRF_SDK_DIR}/components/libraries/usbd/class/cdc
+    ${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm
+    ${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger
+    ${NRF_SDK_DIR}/components/libraries/atomic_fifo
+    ${NRF_SDK_DIR}/components/libraries/svc
+    ${NRF_SDK_DIR}/components/libraries/mutex
+
+    ${NRF_SDK_DIR}/components/softdevice/common
+    ${NRF_SDK_DIR}/components/softdevice/mbr/headers
+    ${NRF_SDK_DIR}/components/softdevice/s140/headers
+
+    ${NRF_SDK_DIR}/components/toolchain/cmsis/include
+    ${NRF_SDK_DIR}/modules/nrfx
+    ${NRF_SDK_DIR}/modules/nrfx/hal
+    ${NRF_SDK_DIR}/modules/nrfx/mdk
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/include
+
+    ${NRF_SDK_DIR}/external/fprintf
+    ${NRF_SDK_DIR}/external/segger_rtt
+    ${NRF_SDK_DIR}/external/utf_converter
+
+    ${NRF_SDK_DIR}/integration/nrfx
+    ${NRF_SDK_DIR}/integration/nrfx/legacy
+)
+
+# ==========================
+# Configuration Interface
+# ==========================
+add_library(prj_config INTERFACE)
+target_include_directories(prj_config INTERFACE ${COMMON_COMPILE_INC})
+target_compile_definitions(prj_config INTERFACE ${COMMON_COMPILE_DEF})
+target_compile_options(prj_config INTERFACE ${COMMON_COMPILE_OPT})
+
+
+# ==========================
+# Subdirectories
+# ==========================
+include(cmake/littlefs.cmake)
+include(cmake/freertos.cmake)
+include(cmake/nrf_log.cmake)
+
+# ==========================
+# Source Files
+# ==========================
+set(STARTUP_SRC
+    ${NRF_SDK_DIR}/modules/nrfx/mdk/gcc_startup_nrf52840.S
+    ${NRF_SDK_DIR}/modules/nrfx/mdk/system_nrf52.c
+)
+
+set(UTILS_SRC
+    ${NRF_SDK_DIR}/components/libraries/util/nrf_assert.c
+    ${NRF_SDK_DIR}/components/libraries/util/app_error.c
+    ${NRF_SDK_DIR}/components/libraries/util/app_error_handler_gcc.c
+    ${NRF_SDK_DIR}/components/libraries/util/app_error_weak.c
+    ${NRF_SDK_DIR}/components/libraries/util/app_util_platform.c
+    ${NRF_SDK_DIR}/components/libraries/strerror/nrf_strerror.c
+    ${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
+)
+
+set(ATOMIC_SRC
+    ${NRF_SDK_DIR}/components/libraries/atomic/nrf_atomic.c
+    ${NRF_SDK_DIR}/components/libraries/atomic_fifo/nrf_atfifo.c
+    ${NRF_SDK_DIR}/components/libraries/atomic_flags/nrf_atflags.c
+    ${NRF_SDK_DIR}/components/libraries/memobj/nrf_memobj.c
+    ${NRF_SDK_DIR}/components/libraries/balloc/nrf_balloc.c
+    ${NRF_SDK_DIR}/components/libraries/ringbuf/nrf_ringbuf.c
+)
+
+set(USBD_SRC
+    ${NRF_SDK_DIR}/components/libraries/usbd/app_usbd.c
+    ${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_core.c
+    ${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_serial_num.c
+    ${NRF_SDK_DIR}/components/libraries/usbd/app_usbd_string_desc.c
+    ${NRF_SDK_DIR}/components/libraries/usbd/class/cdc/acm/app_usbd_cdc_acm.c
+    ${NRF_SDK_DIR}/components/libraries/usbd/class/nrf_dfu_trigger/app_usbd_nrf_dfu_trigger.c
+)
+
+set(SOFTDEVICE_SRC
+    ${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh.c
+    ${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_freertos.c
+    ${NRF_SDK_DIR}/components/softdevice/common/nrf_sdh_ble.c
+)
+
+set(BLE_SRC
+    ${NRF_SDK_DIR}/components/ble/common/ble_advdata.c
+    ${NRF_SDK_DIR}/components/ble/common/ble_conn_state.c
+    ${NRF_SDK_DIR}/components/ble/common/ble_srv_common.c
+    ${NRF_SDK_DIR}/components/ble/ble_advertising/ble_advertising.c
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dis/ble_dis.c
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu.c
+    ${NRF_SDK_DIR}/components/ble/ble_services/ble_dfu/ble_dfu_unbonded.c
+    ${NRF_SDK_DIR}/components/ble/nrf_ble_gatt/nrf_ble_gatt.c 
+)
+
+set(PRINTF_SRC
+    ${NRF_SDK_DIR}/external/fprintf/nrf_fprintf.c
+    ${NRF_SDK_DIR}/external/fprintf/nrf_fprintf_format.c
+    ${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT.c
+    ${NRF_SDK_DIR}/external/segger_rtt/SEGGER_RTT_printf.c
+)
+
+set(NRFX_DRIVERS_SRC
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_clock.c
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_power.c
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_usbd.c
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_gpiote.c
+    ${NRF_SDK_DIR}/modules/nrfx/soc/nrfx_atomic.c
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_spim.c
+    ${NRF_SDK_DIR}/modules/nrfx/drivers/src/nrfx_twim.c
+    )
+    
+    set(NRFX_LEGACY_SRC
+    ${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_clock.c
+    ${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_power.c
+    ${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_spi.c
+    ${NRF_SDK_DIR}/integration/nrfx/legacy/nrf_drv_twi.c
+)
+
+set(EXPERIMENTAL_SRC
+    ${NRF_SDK_DIR}/components/libraries/experimental_section_vars/nrf_section_iter.c
+)
+
+file(GLOB_RECURSE APP_SOURCES "app/*.c")
+
+# ==========================
+# Executable and Linker
+# ==========================
+add_executable(${EXECUTABLE}
+    $<TARGET_OBJECTS:lfs>
+    $<TARGET_OBJECTS:freertos>
+    $<TARGET_OBJECTS:nrf_log>
+    ${APP_SOURCES}
+    ${STARTUP_SRC}
+    ${UTILS_SRC}
+    ${ATOMIC_SRC}
+    ${USBD_SRC}
+    ${SOFTDEVICE_SRC}
+    ${BLE_SRC}
+    ${PRINTF_SRC}
+    ${NRFX_DRIVERS_SRC}
+    ${NRFX_LEGACY_SRC}
+    ${EXPERIMENTAL_SRC}
+    ${NRF_SDK_DIR}/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c
+)
+
+target_link_options(${EXECUTABLE} PRIVATE
+    -T${LINKER_FILE}
+    -L${LINKER_DIR}
+    -L${SD_LINKER_DIR}
+    -L${NRF_SDK_LINKER_DIR}
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb
+    --specs=nano.specs --specs=nosys.specs -u _printf_float
+    -lc -lm
+    -Wl,-Map=${PROJECT_NAME}.map,--cref
+    -Wl,--gc-sections
+    -Xlinker -print-memory-usage -Xlinker
+)
+
+target_link_libraries(${EXECUTABLE} PRIVATE
+    prj_config
+    lfs
+    freertos
+    nrf_log
+    m
+    c
+)
+
+# Optional: Print executable size as part of the post build process
+add_custom_command(TARGET ${EXECUTABLE}
+        POST_BUILD
+        COMMAND ${CMAKE_SIZE} ${EXECUTABLE})
+
+string(TIMESTAMP BUILD_TIMESTAMP "%Y%m%d%H%M")
+set(OTA_ZIP_NAME "ota_${PROJECT_NAME}_${BUILD_TIMESTAMP}.zip")        
+
+# Optional: Create hex, bin and S-Record files after the build
+add_custom_command(TARGET ${EXECUTABLE}
+        POST_BUILD
+        COMMAND ${CMAKE_OBJCOPY} -O srec --srec-len=64 ${EXECUTABLE} ${PROJECT_NAME}.s19
+        COMMAND ${CMAKE_OBJCOPY} -O ihex ${EXECUTABLE} ${PROJECT_NAME}.hex
+        COMMAND ${CMAKE_OBJCOPY} -O binary ${EXECUTABLE} ${PROJECT_NAME}.bin
+        COMMAND nrfutil nrf5sdk-tools pkg generate
+            --hw-version 52
+            --sd-req 0x100
+            --application-version 0
+            --application ${PROJECT_NAME}.hex
+            --key-file ${CMAKE_SOURCE_DIR}/private.pem
+            ${OTA_ZIP_NAME}
+        COMMAND ${CMAKE_COMMAND} -E make_directory "${CMAKE_SOURCE_DIR}/output"
+        COMMAND ${CMAKE_COMMAND} -E rename "${OTA_ZIP_NAME}" "${CMAKE_SOURCE_DIR}/output/${OTA_ZIP_NAME}"
+)
@@ -0,0 +1,59 @@
+{
+    "version": 3,
+    "configurePresets": [
+        {
+            "name": "default",
+            "hidden": true,
+            "generator": "Ninja",
+            "binaryDir": "${sourceDir}/build/${presetName}",
+            "cacheVariables": {
+            }
+        },
+        {
+            "name": "Debug",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "Debug"
+            }
+        },
+        {
+            "name": "RelWithDebInfo",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "RelWithDebInfo"
+            }
+        },
+        {
+            "name": "Release",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "Release"
+            }
+        },
+        {
+            "name": "MinSizeRel",
+            "inherits": "default",
+            "cacheVariables": {
+                "CMAKE_BUILD_TYPE": "MinSizeRel"
+            }
+        }
+    ],
+    "buildPresets": [
+        {
+            "name": "Debug",
+            "configurePreset": "Debug"
+        },
+        {
+            "name": "RelWithDebInfo",
+            "configurePreset": "RelWithDebInfo"
+        },
+        {
+            "name": "Release",
+            "configurePreset": "Release"
+        },
+        {
+            "name": "MinSizeRel",
+            "configurePreset": "MinSizeRel"
+        }
+    ]
+}
@@ -1,49 +0,0 @@
-#ifndef __ADC_DRV_H__
-#define __ADC_DRV_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "app_config.h"
-#include "adc_drv_if.h"
-
-#define ADC_DRV_ERROR   (-1)
-#define ADC_DRV_SUCCESS (0)
-
-#define AIN0            0
-#define AIN1            1
-#define AIN2            2
-#define AIN3            3
-#define AIN4            4
-#define AIN5            5
-#define AIN6            6
-#define AIN7            7
-
-#if (DEF_ADC_DRV_ENABLED)
-int adc_init(void);
-int adc_reset(void);
-int adc_gain(adc_gain_t gain);
-int adc_read(uint32_t channel, int32_t *adc_val);
-int adc_read_milivolt(uint32_t channel, float *mv);
-int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
-int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
-int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
-int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
-#else
-#define adc_init()
-#define adc_reset()
-#define adc_gain(x)
-#define adc_read(x, y)
-#define adc_read_milivolt(x, y)
-#define adc_read_mutiple_channels(x, y, z)
-#define adc_read_mutiple_channels_ex(x, y, z, a)
-#define adc_read_multiple_milivolt_ex(x, y, z, a)
-#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
-#endif /* ! DEF_ADC_DRV_ENABLED */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! __ADC_DRV_H__ */
@@ -1,48 +0,0 @@
-#ifndef __ADC_DRV_IF_H__
-#define __ADC_DRV_IF_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-#include <stdlib.h>
-
-#define ADC0 (0x01 << 0)
-#define ADC1 (0x01 << 1)
-#define ADC2 (0x01 << 2)
-#define ADC3 (0x01 << 3)
-
-typedef enum
-{
-    GAIN_0P625,
-    GAIN_1P000,
-    GAIN_1P200,
-    GAIN_1P250,
-    GAIN_1P500,
-    GAIN_2P000,
-    GAIN_2P500,
-    GAIN_3P000,
-    GAIN_6P000,
-    GAIN_12P000,
-    GAIN_24P000,
-} adc_gain_t;
-
-typedef struct
-{
-    int (*init)(void);
-    int (*reset)(void);
-    int (*read)(uint32_t channel, int32_t *adc_val);
-    int (*read_milivolt)(uint32_t channel, float *p_val);
-    int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void (*preliminary_action));
-    int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
-    int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
-    int (*gain)(adc_gain_t gain);
-    int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
-} adc_drv_if_t;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! __ADC_DRV_IF_H__ */
@@ -0,0 +1,39 @@
+#ifndef __ADC_DRV_H__
+#define __ADC_DRV_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+
+#include "adc_drv_if.h"
+
+#if (DEF_ADC_DRV_ENABLED)
+    int adc_init(void);
+    int adc_reset(void);
+    int adc_gain(adc_gain_t gain);
+    int adc_read(uint32_t channel, int32_t *adc_val);
+    int adc_read_milivolt(uint32_t channel, float *mv);
+    int adc_read_mutiple_channels(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt);
+    int adc_read_mutiple_channels_ex(uint32_t *p_channel, int32_t *p_adc_val, uint32_t cnt, void (*preliminary_action)(void));
+    int adc_read_multiple_milivolt_ex(uint32_t *p_channel, float *p_val, uint32_t cnt, void (*preliminary_action)(void));
+    int adc_read_mutiple_channels_convert_milivolt(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
+#else
+#define adc_init()
+#define adc_reset()
+#define adc_gain(x)
+#define adc_read(x, y)
+#define adc_read_milivolt(x, y)
+#define adc_read_mutiple_channels(x, y, z)
+#define adc_read_mutiple_channels_ex(x, y, z, a)
+#define adc_read_multiple_milivolt_ex(x, y, z, a)
+#define adc_read_mutiple_channels_convert_milivolt(x, y, z)
+#endif /* ! DEF_ADC_DRV_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __ADC_DRV_H__ */
@@ -0,0 +1,46 @@
+#ifndef __ADC_DRV_IF_H__
+#define __ADC_DRV_IF_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stdint.h>
+
+#define ADC_DRV_ERROR   (-1)
+#define ADC_DRV_SUCCESS (0)
+
+    typedef enum
+    {
+        GAIN_0P625,
+        GAIN_1P000,
+        GAIN_1P200,
+        GAIN_1P250,
+        GAIN_1P500,
+        GAIN_2P000,
+        GAIN_2P500,
+        GAIN_3P000,
+        GAIN_6P000,
+        GAIN_12P000,
+        GAIN_24P000,
+    } adc_gain_t;
+
+    typedef struct
+    {
+        int (*init)(void);
+        int (*reset)(void);
+        int (*read)(uint32_t channel, int32_t *adc_val);
+        int (*read_milivolt)(uint32_t channel, float *p_val);
+        int (*read_multiple_milivolt_ex)(uint32_t *p_channels, float *p_val, uint32_t count, void(*preliminary_action));
+        int (*read_multiple_channels)(uint32_t *p_channels, int32_t *adc_val, uint32_t count);
+        int (*read_multiple_channels_ex)(uint32_t *p_channels, int32_t *adc_val, uint32_t count, void (*preliminary_action)(void));
+        int (*gain)(adc_gain_t gain);
+        int (*adc_convert_multiple_milivolt)(int32_t *p_val_14bit, float *p_val_f, uint32_t count);
+    } adc_drv_if_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __ADC_DRV_IF_H__ */
@@ -151,7 +151,7 @@ extern "C"

 #define DEF_USBD_ENABLED        1

-#define DEF_UART_ENABLED        0
+#define DEF_UARTE_ENABLED       0

 #elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 #define ELITE_DEVICE_NAME       "Elite-EDC"
@@ -189,7 +189,7 @@ extern "C"

 #define DEF_USBD_ENABLED        1

-#define DEF_UART_ENABLED        0
+#define DEF_UARTE_ENABLED       0

 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
 #define BOARD_IOPH              1
@@ -231,7 +231,7 @@ extern "C"

 #define DEF_USBD_ENABLED        1

-#define DEF_UART_ENABLED        0
+#define DEF_UARTE_ENABLED       0

 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
 #define BOARD_IOPH              1
@@ -273,7 +273,7 @@ extern "C"

 #define DEF_USBD_ENABLED        1

-#define DEF_UART_ENABLED        0
+#define DEF_UARTE_ENABLED       0

 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #define ELITE_DEVICE_NAME       "Elite-CPG"
@@ -7,9 +7,10 @@ extern "C"
 #endif

 #include "app_config.h"
-#include "app_error.h"

-#include "elite_def.h"
+#include "elite.h"
+
+#include "app_error.h"

    void elite_init(void);
    void elite_instr_send(void *p, size_t size);
@@ -17,6 +18,13 @@ extern "C"
    ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
    ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_wait);

+    typedef struct
+    {
+        void (*cis_func[256])(uint8_t *ins, uint16_t size);
+        void (*vis_func[256])(uint8_t *ins, uint16_t size);
+        void (*ris_func[256])(uint8_t *ins, uint16_t size);
+    } elite_instance_t;
+
 #ifdef __cplusplus
 }
 #endif
@@ -18,13 +18,13 @@ extern "C"

 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
 #elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
-#include "edc20_io.h"
+#include "elite_edc_v2_0_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
-#include "pel20_io.h"
+#include "elite_pel_v2_0_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
-#include "pel_v3_0_io.h"
+#include "elite_pel_v3_0_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
-#include "cpg11_io.h"
+#include "elite_cpg_v1_1_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
 #else
 #error "Not implemented xxx_io.h"
@@ -2,13 +2,14 @@
 #define __ELITE_DEV_H__

 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif

 #include "app_config.h"
 #include "elite.h"

-const elite_instance_t *dev_init(void);
+    const elite_instance_t *dev_init(void);

 #ifdef __cplusplus
 }
@@ -0,0 +1,48 @@
+#ifndef __EDC_H__
+#define __EDC_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
+
+#include "dac_drv.h"
+#include "elite.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+    typedef struct
+    {
+        void (*init)(void);
+        elite_instance_t *p_elite_instance;
+    } edc20_t;
+
+    typedef struct
+    {
+        struct
+        {
+            float coeff;
+            float offset;
+        } dac_c;
+        struct
+        {
+            float coeff;
+            float offset;
+            float Voffset;
+        } dac_f[3];
+    } edc20_dac_cal_data_t;
+
+    extern edc20_t edc;
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __EDC_H__ */
@@ -2,12 +2,14 @@
 #define __EDC20_IO_H__

 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif

-#include <stdint.h>
 #include "nrf_drv_spi.h"
 #include "nrf_gpio.h"
+#include <stdint.h>
+

 #define ADCA2_PIN        NRF_GPIO_PIN_MAP(0, 25)
 #define ADCA1_PIN        NRF_GPIO_PIN_MAP(0, 19)
@@ -45,51 +47,51 @@ extern "C" {
 #define SPIM_MOSI_PIN    NRF_GPIO_PIN_MAP(0, 7)
 #define SPIM_MISO_PIN    NRF_GPIO_PIN_MAP(1, 9)

-typedef struct
-{
-    float mV_start;
-    float mV_stop;
-    float mV_step;
-    uint32_t uS_step;
-    uint32_t cycles;
-    bool hi_z_en;
-} elite_dac_config_t;
+    typedef struct
+    {
+        float mV_start;
+        float mV_stop;
+        float mV_step;
+        uint32_t uS_step;
+        uint32_t cycles;
+        bool hi_z_en;
+    } elite_dac_config_t;

-void gpio_init(void);
-void circuit_selection_vin_0(void);
-void circuit_selection_vin_1(void);
-void circuit_selection_vin_2(void);
-void circuit_selection_Iin_0(void);
-void circuit_selection_Iin_1(void);
-void circuit_selection_Iin_2(void);
-void circuit_selection_Iin_3(void);
-void circuit_selection_Iin_4(void);
-void circuit_selection_dac_coarse_tune_c(void);
-void circuit_selection_dac_fine_tune_f0(void);
-void circuit_selection_dac_fine_tune_f1(void);
-void circuit_selection_dac_fine_tune_f2(void);
-void circuit_selection_cv3_config(void);
-void circuit_selection_cc_config(void);
-void circuit_selection_dac_circuit_open(void);
+    void gpio_init(void);
+    void circuit_selection_vin_0(void);
+    void circuit_selection_vin_1(void);
+    void circuit_selection_vin_2(void);
+    void circuit_selection_Iin_0(void);
+    void circuit_selection_Iin_1(void);
+    void circuit_selection_Iin_2(void);
+    void circuit_selection_Iin_3(void);
+    void circuit_selection_Iin_4(void);
+    void circuit_selection_dac_coarse_tune_c(void);
+    void circuit_selection_dac_fine_tune_f0(void);
+    void circuit_selection_dac_fine_tune_f1(void);
+    void circuit_selection_dac_fine_tune_f2(void);
+    void circuit_selection_cv3_config(void);
+    void circuit_selection_cc_config(void);
+    void circuit_selection_dac_circuit_open(void);

-void twi_init(void);
-void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
-void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);
+    void twi_init(void);
+    void twi0_write_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t data_len);
+    void twi0_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_rx_buf, uint8_t rx_buffer_length);

-void spi_init(void);
-void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
-void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
-void spi2_set_mode(nrf_drv_spi_mode_t mode);
+    void spi_init(void);
+    void spi1_write(uint8_t *p_tx_buffer, uint16_t tx_buffer_length);
+    void spim_xfer(uint32_t cs_pin, nrf_spim_mode_t mode, uint8_t *p_tx_buffer, uint16_t tx_buffer_length, uint8_t *p_rx_buf, uint16_t rx_buffer_length);
+    void spi2_set_mode(nrf_drv_spi_mode_t mode);

-void edc20_io_init(void);
-void edc20_io_power_off(void);
-void edc20_io_power_on(void);
+    void edc20_io_init(void);
+    void edc20_io_power_off(void);
+    void edc20_io_power_on(void);

-void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
-void edc20_dac_tim_stop(void);
+    void edc20_dac_tim_start(uint32_t period, void (*callback)(void *p_arg), void *p_arg);
+    void edc20_dac_tim_stop(void);

-void edc20_adc_tim_start(elite_dac_config_t *p_config);
-void edc20_adc_tim_stop(void);
+    void edc20_adc_tim_start(elite_dac_config_t *p_config);
+    void edc20_adc_tim_stop(void);

 #ifdef __cplusplus
 }
@@ -1,5 +1,5 @@
-#ifndef __PEL_H__
-#define __PEL_H__
+#ifndef __ELITE_PEL_V2_0_H__
+#define __ELITE_PEL_V2_0_H__

 #ifdef __cplusplus
 extern "C"
@@ -11,10 +11,10 @@ extern "C"
 #include "elite_board.h"

 #define VERSION_DATE_YEAR   25
-#define VERSION_DATE_MONTH  3
-#define VERSION_DATE_DAY    31
-#define VERSION_DATE_HOUR   10
-#define VERSION_DATE_MINUTE 45
+#define VERSION_DATE_MONTH  8
+#define VERSION_DATE_DAY    29
+#define VERSION_DATE_HOUR   17
+#define VERSION_DATE_MINUTE 24

 #define PEL_0P5R_MASK       (0x01 << 0)
 #define PEL_1P0R_MASK       (0x01 << 1)
@@ -31,23 +31,34 @@ extern "C"

    typedef struct __PACKED
    {
-        uint16_t mem_board_id : 8;
-        uint16_t packet_seq   : 8;
+        uint16_t mem_board_id;
+        uint16_t packet_seq;
        uint32_t notify_time;
-        int32_t output_vo_raw;
-        int32_t output_vc_raw;
-        int32_t output_ve_raw;
-        float hold_OUT_v;
-        float hold_VCC_v;
-        float hold_VEE_v;
+
+        int32_t raw_output_r1;
+        int32_t raw_output_r2;
+        int32_t raw_output_vo;
+        int32_t raw_output_vc;
+        int32_t raw_output_ve;
+        float output_r1_mv;
+        float output_r2_mv;
+        float output_vo_mv;
+        float output_vc_mv;
+        float output_ve_mv;
+
+        float hold_r1_v;
+        float hold_r2_v;
+        float hold_out_v;
+        float hold_vcc_v;
+        float hold_vee_v;
+        float current;
+
        uint16_t resis_pattern_id;
        uint16_t resis_bitsmask;
        float resis_g_value;
        uint32_t mode_complete : 4;
        uint32_t rsvd          : 28;
-        uint32_t val_1;
-        uint32_t val_2;
-        uint16_t val_3;
+        uint32_t payload[9];
    } scan_mode_notify_packet_t;

    const elite_instance_t *pel_init(void);
@@ -56,4 +67,4 @@ extern "C"
 }
 #endif

-#endif /* ! __PEL_H__ */
+#endif /* ! __ELITE_PEL_V2_0_H__ */
@@ -11,10 +11,10 @@ extern "C"
 #include "elite_board.h"

 #define VERSION_DATE_YEAR   25
-#define VERSION_DATE_MONTH  7
-#define VERSION_DATE_DAY    10
-#define VERSION_DATE_HOUR   14
-#define VERSION_DATE_MINUTE 15
+#define VERSION_DATE_MONTH  8
+#define VERSION_DATE_DAY    28
+#define VERSION_DATE_HOUR   17
+#define VERSION_DATE_MINUTE 46

 #define PEL_0P5R_MASK       (0x01 << 0)
 #define PEL_1P0R_MASK       (0x01 << 1)
@@ -31,25 +31,35 @@ extern "C"

    typedef struct __PACKED
    {
-        uint16_t mem_board_id : 8;
-        uint16_t packet_seq   : 8;
+        uint16_t mem_board_id;
+        uint16_t packet_seq;
        uint32_t notify_time;
-        int32_t output_vo_raw;
-        int32_t output_vc_raw;
-        int32_t output_ve_raw;
-        float hold_OUT_v;
-        float hold_VCC_v;
-        float hold_VEE_v;
+
+        int32_t raw_acs37030_vref;
+        int32_t raw_i_out;
+        int32_t raw_output_vo;
+        int32_t raw_output_vc;
+        int32_t raw_output_ve;
+        float acs37030_vref_mv;
+        float i_out_mv;
+        float output_vo_mv;
+        float output_vc_mv;
+        float output_ve_mv;
+
+        float acs37030_vref_v;
+        float hold_acs37030_out_v;
+        float hold_out_v;
+        float hold_vcc_v;
+        float hold_vee_v;
+        float acs37030_current_a;
+
        uint16_t resis_pattern_id;
        uint16_t resis_bitsmask;
        float resis_g_value;
        uint32_t mode_complete : 4;
        uint32_t rsvd          : 28;
-        uint32_t val_1;
-        uint32_t val_2;
-        uint16_t val_3;
+        uint32_t payload[9];
    } scan_mode_notify_packet_t;
-
    const elite_instance_t *pel_init(void);

 #ifdef __cplusplus
@@ -74,7 +74,7 @@ extern "C"
    typedef struct
    {
        uint32_t anode_pin;
-        uint32_t cathode_pin;
+        uint32_t ina_hi_pin;
        uint32_t smaple_i_pin;
        uint32_t sample_v_pin;
        uint32_t test_pin;
@@ -115,7 +115,7 @@ extern "C"
                   uint8_t *p_rx_buf,
                   uint16_t rx_buffer_length);

-    void pel20_io_init(void);
+    void pel30_io_init(void);
    void pel_pulse_gen_init(pel_config_t cfg);
    void pel_pulse_gen_start(void);
    void pel_pulse_gen_stop(void);
@@ -1,16 +1,17 @@
 #include "adc_drv.h"

-#if (DEF_ADS8691_ENABLED)
+#if (DEF_ADC_DRV_ENABLED && DEF_ADS8691_ENABLED)
 #include "ads8691.h"
-extern const adc_drv_if_t ads8691;
 static const adc_drv_if_t *p_inst = &ads8691;
-#else
+#elif (DEF_ADC_DRV_ENABLED && DEF_BULTIN_ADC_ENABED)
 #include "builtin_saadc.h"
 static const adc_drv_if_t *p_inst = &builtin_saadc;
 #endif

 #if (DEF_ADC_DRV_ENABLED)

+#include <stdlib.h>
+
 int adc_init(void)
 {
    if (p_inst == NULL)
@@ -1,4 +1,9 @@
+#include "app_config.h"
+
 #include "ads8691.h"
+
+#if (DEF_ADS8691_ENABLED)
+
 #include "elite_board.h"

 #include "nrf_delay.h"
@@ -8,8 +13,6 @@

 #include <string.h>

-#if (DEF_ADS8691_ENABLED)
-
 /*
 * ADS8691
 * Features:
@@ -164,11 +167,11 @@ uint32_t read_dev_id(void)
    return read_hword();
 }

-static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
-{
-    write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
-    return 0;
-}
+// static int write_dataout_ctrl(dataout_ctl_t *dataout_ctl)
+// {
+//     write_cmd(ADS8691_CMD_WRITE, DATAOUT_CTL_REG, dataout_ctl->val);
+//     return 0;
+// }

 static int read_dataout_ctrl(dataout_ctl_t *dataout_ctl)
 {
@@ -214,7 +217,7 @@ static double adc_convert_volt(uint16_t range_sel, int32_t val_18bit)
 #define FSR_VREF_P_1P500  6.144
 #define FSR_VREF_P_1P250  5.12

-    double volt;
+    double volt = 0;

    if (range_sel == VREF_NP_3P000)
        volt = (double)val_18bit * LSB_VREF_NP_3P000 / 1000000 - FSR_VREF_NP_3P000 / 2;
@@ -326,10 +329,10 @@ static int ads8691_init(void)
 }

 const adc_drv_if_t ads8691 = {
-    .init  = ads8691_init,
-    .reset = ads8691_reset,
-    .read  = ads8691_read,
-    .gain  = ads8691_gain,
+    .init          = ads8691_init,
+    .reset         = ads8691_reset,
+    .read          = ads8691_read,
+    .gain          = ads8691_gain,
    .read_milivolt = ads8691_read_milivolt,
 };

@@ -41,7 +41,7 @@ static int reset(void)
 static float adc_convert_milivolt(uint16_t range_sel, int32_t val_14bit, bool is_diff)
 {
    float volt;
-    float gain;
+    float gain = 1.0 / 6.0;
    float vref;
    uint32_t m = is_diff ? 1 : 0;

@@ -1,17 +1,19 @@
+#include "app_config.h"
+
 #include "elite.h"

 #if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
-#include "elite_dev.h"
+#include "elite_dev_v1_0.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
-#include "edc.h"
+#include "elite_edc_v2_0.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
-#include "pel.h"
+#include "elite_pel_v2_0.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
-#include "pel_v3_0.h"
+#include "elite_pel_v3_0.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
-#include "cpg.h"
+#include "elite_cpg_v1_1.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
-#include "elite_mmm.h"
+#include "elite_mmm_v1_0.h"
 #else
 #error "Unknown DEF_ELITE_MODEL"
 #endif
@@ -71,6 +73,11 @@ static void decode_cis_ins(uint8_t *ins, uint16_t size)
    }
 }

+// define BT instruction
+#define INS_TYPE_RIS 0x30
+#define INS_TYPE_VIS 0xC0
+#define INS_TYPE_CIS 0x70
+
 static void elite_instr_task(void *p_arg)
 {
    static size_t instr_size = 0;
@@ -128,7 +135,7 @@ void elite_init(void)
 void elite_instr_send(void *p, size_t size)
 {
    /* reply the instruction */
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update(p, size);

    xMessageBufferSend(instr_msg, p, size, portMAX_DELAY);
@@ -7,7 +7,7 @@ void elite_board_init(void)
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
    pel20_io_init();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
-    pel20_io_init();
+    pel30_io_init();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
    cpg11_io_init();
 #endif
@@ -1,7 +1,11 @@
-#include "cpg.h"
-#include "elite_board.h"
+#include "app_config.h"

-#include "elite_def.h"
+#include "elite_cpg_v1_1.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+
+#include "elite.h"
+#include "elite_board.h"

 #include "nrf_delay.h"
 #include "nrf_gpio.h"
@@ -9,7 +13,17 @@

 #include "tw1508.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
+// RIS (real instruction)
+#define DEV_MODE          0xFF // Develop Mode
+
+// VIS (virtual instruction)
+#define VIS_RST           0xF0
+#define VIS_DEVICE_SHINY  0x10
+
+// CIS (control instruction)
+#define CIS_VERSION       0x40
+#define CIS_VOLT          0x10
+#define CIS_TEMPERATURE   0x80

 // ExN: electrode x negative
 // ExP: electrode x positive
@@ -155,8 +169,8 @@ static uint16_t current_mA_convert_tw1508_value(float current_mA)

    uint16_t tw1508_value;
    uint8_t dac_7bit;
-    uint8_t dac_3bit;
-    float rext;
+    uint8_t dac_3bit = 0b000;
+    float rext       = 0.0;

    if (current_mA > TW1508_BOUNDARY_GAIN7)
    {
@@ -205,7 +219,7 @@ static uint16_t current_mA_convert_tw1508_value(float current_mA)
        rext     = TW1508_REXR;
    }

-    dac_7bit     = current_mA * 8 * TW1508_REXR / 1.25 / (dac_3bit + 1);
+    dac_7bit     = current_mA * 8 * rext / 1.25 / (dac_3bit + 1);
    tw1508_value = dac_3bit << 7 | dac_7bit;

    return tw1508_value;
@@ -773,7 +787,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
        VERSION_DATE_HOUR,
        VERSION_DATE_MINUTE,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }

@@ -31,20 +31,20 @@ typedef struct
 } pulse_gen_hw_t;

 pulse_gen_hw_t pulse_gen_hw[] = {
-    {.gpiote_idx  = { 0, 1, 2, 3 },
+    { .gpiote_idx  = { 0, 1, 2, 3 },
     .TMR_A       = NRF_TIMER1,
     .TMR_B       = NRF_TIMER3,
     .TMR_A_IRQn  = TIMER1_IRQn,
     .TMR_B_IRQn  = TIMER3_IRQn,
     .p_pulse_gen = NULL,
-     .private     = { NULL, 0, 0 }},
-    {.gpiote_idx  = { 4, 5, 6, 7 },
+     .private     = { NULL, 0, 0 } },
+    { .gpiote_idx  = { 4, 5, 6, 7 },
     .TMR_A       = NRF_TIMER2,
     .TMR_B       = NRF_TIMER4,
     .TMR_A_IRQn  = TIMER2_IRQn,
     .TMR_B_IRQn  = TIMER4_IRQn,
     .p_pulse_gen = NULL,
-     .private     = { NULL, 0, 0 }},
+     .private     = { NULL, 0, 0 } },
 };

 __STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
@@ -1,9 +1,27 @@
-#include "elite_dev.h"
+#include "app_config.h"

+#include "elite_dev_v1_0.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
+
+#include "app_error.h"
 #include "nrf_gpio.h"
 #include "nrf_log.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_DEV)
+#include <stdint.h>
+
+// RIS (real instruction)
+#define DEV_MODE            0xFF // Develop Mode
+
+// VIS (virtual instruction)
+#define VIS_RST             0xF0
+#define VIS_DEVICE_SHINY    0x10
+
+// CIS (control instruction)
+#define CIS_VERSION         0x40
+#define CIS_VOLT            0x10
+#define CIS_TEMPERATURE     0x80
+#define CIS_CALI            0x30

 #define VERSION_DATE_YEAR   24
 #define VERSION_DATE_MONTH  7
@@ -21,7 +39,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
        VERSION_DATE_HOUR,
        VERSION_DATE_MINUTE,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }

@@ -1,14 +1,13 @@
 #include "app_config.h"
+
+#include "elite_edc_v2_0.h"
+
 #if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)

 #include "adc_drv.h"
 #include "dac_drv.h"
-#include "edc.h"
 #include "elite.h"
-#include "elite_adc.h"
 #include "elite_board.h"
-#include "elite_correction.h"
-#include "elite_dac.h"
 #include "led_drv.h"
 #include "sw_drv.h"

@@ -16,17 +15,59 @@

 #include "timers.h"

-#define DEV_IDENTIFICATION_DELAY_MS 3000
+// RIS (real instruction)
+#define DEV_MODE                  0xFF // Develop Mode
+#define CURVE_IV                  0x01 // I-V Curve
+#define CURVE_IV_CY               0x02 // Cycle I-V
+#define CURVE_VO                  0x03 // Function Generator
+#define CURVE_RT                  0x04 // R-T Graph
+#define CURVE_VT                  0x05 // V-T Graph
+#define CURVE_IT                  0x06 // I-T Graph
+#define CURVE_CC                  0x07 // Constant Current (CC)
+#define CURVE_OCP                 0x08 // Open Circuit Potential (OCP)
+#define CURVE_CV                  0x09 // Cyclic Voltammetry (CV)
+#define CURVE_LSV                 0x0A // Linear Sweep Voltammetry (LSV)
+#define CURVE_CA                  0x0B // Chronoamperometric Graph (CA)
+#define CURVE_CP                  0x0C // Chronopotentiometry (CP)
+#define CURVE_UNI_PULSE           0x0D // Pulse Sensing (universal pulse)
+#define CURVE_DPV                 0x0E // Differential Pulse Voltammetry (DPV)
+#define CURVE_DPV_ADVANCE         0x0F
+#define CURVE_DPV_SMPRATE         0x10
+#define CURVE_DPV_ADVANCE_SMPRATE 0x11
+#define CURVE_EIS                 0x12
+#define CURVE_CF                  0x13 // Constant Frequency(CF)
+#define CURVE_CALI                0xF1
+#define SET_SAMPLE_RATE           0xE0

-static TimerHandle_t dev_identify_timer_handle = NULL;
+// VIS (virtual instruction)
+#define VIS_RST                   0xF0
+#define VIS_DEVICE_SHINY          0x10
+
+// CIS (control instruction)
+#define CIS_VERSION               0x40
+#define CIS_VOLT                  0x10
+#define CIS_TEMPERATURE           0x80
+#define CIS_CALI                  0x30
+
+// ADC Iin gain level !!! move to ADC.h in future
+#define I_GAIN_3M                 0x00 // lv0,largest gain
+#define I_GAIN_100K               0x01 // lv1
+#define I_GAIN_3K                 0x02 // lv2
+#define I_GAIN_100R               0x03 // lv3,the least gain
+#define I_GAIN_AUTO               0x04
+
+// ADC Vin gain level !!! move to ADC.h in future
+#define VIN_GAIN_1M               0x00
+#define VIN_GAIN_30K              0x01
+#define VIN_GAIN_1K               0x02
+#define VIN_GAIN_AUTO             0x03
+
+#define DEV_SHINY_DELAY_MS        3000
+
+static TimerHandle_t dev_shiny_timer_handle = NULL;

 extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);

-static void dummy(uint8_t *ins, uint16_t size)
-{
-    NRF_LOG_INFO("%s", __FUNCTION__);
-}
-
 /*
    dev_mode_set_led
    (1)0x3000FF0400
@@ -399,6 +440,7 @@ static void dev_mode_read_output_pin(void)
    output.cs_mem       = nrf_gpio_pin_out_read(CS_MEM_PIN);
    output.cs_adc       = nrf_gpio_pin_out_read(CS_ADC_PIN);
    output.cs_dac       = nrf_gpio_pin_out_read(CS_DAC_PIN);
+    output.resvd        = 0;

    pin_out_status = (output.resvd << 21) |
                     (output.power_5v_en << 20) |
@@ -465,6 +507,7 @@ static void dev_mode_read_input_pin(void)
    input.vbat      = nrf_gpio_pin_read(VBAT_PIN);
    input.shut_down = nrf_gpio_pin_read(SHUT_DOWN_PIN);
    input.int9466   = nrf_gpio_pin_read(INT9466_PIN);
+    input.resvd     = 0;

    pin_input_status = (input.resvd << 3) |
                       (input.vbat << 2) |
@@ -849,7 +892,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
        .hh     = 22,
        .mm     = 40,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)&cis_ver, sizeof(cis_ver));
 }

@@ -871,7 +914,7 @@ static void cis_volt(uint8_t *ins, uint16_t size)
        .opcode = CIS_VOLT,
        .volt   = bat_volt_read(),
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)&cis_volt, sizeof(cis_volt));
 }

@@ -894,34 +937,20 @@ static void cis_temperature(uint8_t *ins, uint16_t size)
        .opcode      = CIS_TEMPERATURE,
        .temperature = __REV(temperature_read()),
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)&cis_temperature, sizeof(cis_temperature));
 }

 static void cis_cali(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }

+static bool DACReset;
+
 static void vis_rst(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
-
-    edc.instru.eliteFxn = VIS_RST;
-
-    edc.instru.VinADCGainLv = VIN_GAIN_1K;
-    VinADCGainCtrl(edc.instru.VinADCGainLv);
-
-    edc.instru.IinADCGainLv = I_GAIN_100R;
-    IinADCGainCtrl(edc.instru.IinADCGainLv);
-
-    edc.instru.VoutGainLv = VOUT_GAIN_15K;
-    VoutGainControl(edc.instru.VoutGainLv);
-
-    uint16_t volt = Usercode_Correction_to_DAC(edc.instru.VoutGainLv, 25000);
-    dac_write_through(DAC0, volt);
 }
-static void vis_sti(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
-static void vis_int(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }

-static void device_identification_callback(TimerHandle_t xTimer)
+static void dev_shiny_callback(TimerHandle_t xTimer)
 {
    extern bool is_ble_connected(void);
    if (!is_ble_connected())
@@ -941,26 +970,26 @@ static void device_identification_callback(TimerHandle_t xTimer)
    }
 }

-void start_device_identification_timer(void)
+void start_dev_shiny_timer(void)
 {
-    if (dev_identify_timer_handle == NULL)
+    if (dev_shiny_timer_handle == NULL)
    {
-        dev_identify_timer_handle = xTimerCreate("dev_identify_timer",
-                                                 pdMS_TO_TICKS(DEV_IDENTIFICATION_DELAY_MS),
-                                                 pdFALSE,
-                                                 NULL,
-                                                 device_identification_callback);
+        dev_shiny_timer_handle = xTimerCreate("dev_shiny_timer",
+                                              pdMS_TO_TICKS(DEV_SHINY_DELAY_MS),
+                                              pdFALSE,
+                                              NULL,
+                                              dev_shiny_callback);

-        if (dev_identify_timer_handle == NULL)
+        if (dev_shiny_timer_handle == NULL)
        {
-            NRF_LOG_ERROR("dev_identify_timer creation failed");
+            NRF_LOG_ERROR("dev_shiny_timer creation failed");
            return;
        }
    }

-    if (xTimerStart(dev_identify_timer_handle, 0) != pdPASS)
+    if (xTimerStart(dev_shiny_timer_handle, 0) != pdPASS)
    {
-        NRF_LOG_ERROR("dev_identify_timer start failed");
+        NRF_LOG_ERROR("dev_shiny_timer start failed");
    }
 }

@@ -968,14 +997,14 @@ static void vis_dev_shiny(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
    led_set(LED_IDENTIFY_DEV);
-    start_device_identification_timer();
+    start_dev_shiny_timer();
 }

 static void curve_iv(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
 static void curve_iv_cy(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
-    extern void edc20_cycle_iv_mode_start(uint8_t * ins, uint16_t size);
+    extern void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size);
    edc20_cycle_iv_mode_start(ins, size);
 }

@@ -1008,8 +1037,6 @@ elite_instance_t edc20_elite_instance = {
                 },
    .vis_func = {
                 [VIS_RST]          = vis_rst,
-                 [VIS_STI]          = vis_sti,
-                 [VIS_INT]          = vis_int,
                 [VIS_DEVICE_SHINY] = vis_dev_shiny,
                 },
    .ris_func = {
@@ -1,7 +1,12 @@
-#include "edc.h"
-#include "elite_board.h"
+#include "app_config.h"
+
+#include "elite_edc_v2_0.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)

 #include "dac_drv.h"
+#include "elite.h"
+#include "elite_board.h"

 #include "nrf.h"
 #include "nrf_log.h"
@@ -16,8 +21,6 @@
 #include <stdlib.h>
 #include <string.h>

-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
-
 #define OUT_0 DAC0
 #define OUT_1 DAC1

@@ -363,70 +366,9 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
    vTaskDelete(NULL);
 }

-void edc20_cycle_iv_mode_init(void)
-{
-}
-
 #define VDIRECTION(v1, v2) ((v1 > v2) ? 0 : 1)
-// Step time macro
-#define STEPTIME_HALF_SEC  5000
-#define STEPTIME_ONE_SEC   10000
-#define STEPTIME_TWO_SEC   20000
-static uint32_t step2VsetRate(uint32_t step)
-{
-    /*step = 100 mv, index = 0, n = 2
-             10  mv, index = 1, n = 10
-             1   mv, index = 2, n = 100
-             0.1 mv, index = 3, n = 1000
-             0.01mv, index = 4, n = 10000  */
-
-    if (step >= 10000)
-    {
-        return 0;
-    }
-    else if (step >= 1000)
-    {
-        return 1;
-    }
-    else if (step >= 100)
-    {
-        return 2;
-    }
-    else if (step >= 10)
-    {
-        return 3;
-    }
-    else if (step >= 1)
-    {
-        return 4;
-    }
-    else
-    {
-        return 5;
-    }
-}
-
-static uint32_t get_step_time(uint8_t StepTime)
-{
-    switch (StepTime)
-    {
-        case 0: { // 0.5 sec
-            return STEPTIME_HALF_SEC;
-        }
-        case 1: { // 1 sec
-            return STEPTIME_ONE_SEC;
-        }
-        case 2: { // 2 sec
-            return STEPTIME_TWO_SEC;
-        }
-        default: { // 1 sec
-            return STEPTIME_ONE_SEC;
-        }
-    }
-}
-
-#define STEP_TO_VSETRATE(step) step2VsetRate(step)
-const uint32_t VsetRateTable[5] = { 2, 10, 100, 1000, 10000 };
+#define VMAX(v1, v2)       ((v1 >= v2) ? v1 : v2)
+#define VMIN(v1, v2)       ((v1 < v2) ? v1 : v2)

 static uint32_t convt_uS_step(uint32_t idx)
 {
@@ -454,36 +396,17 @@ bool is_mode_running(void)

 void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size)
 {
-    /*
-        instru.eliteFxn      = CURVE_IV_CY;
-        instru.Ve1           = ((uint16_t)(ins[3]) << 8) | (uint16_t)(ins[4]);
-        instru.Ve2           = ((uint16_t)(ins[5]) << 8) | (uint16_t)(ins[6]);
-        instru.Vinit         = (int32_t)instru.Ve1;
-        instru.Vmax          = (int32_t)VMAX(instru.Ve1,instru.Ve2);
-        instru.Vmin          = (int32_t)VMIN(instru.Ve1,instru.Ve2);
-        instru.directionInit = VDIRECTION(instru.Ve1,instru.Ve2);
-        instru.steptime      = get_step_time(ins[9]); //5000;10000;20000;
-        instru.step          = ((uint32_t)(ins[7]) << 8) | (uint32_t)(ins[8]);//1~1000 = 0.1mv ~ 100mv
-        instru.step          = instru.step * 100000 / instru.steptime;
-        STEP_TO_VSETRATE(instru.step);
-        instru.VsetRate      = VsetRateTable[instru.VsetRateIndex];//N
-        instru.cycleNumber   = ((uint16_t)(ins[10]) << 8) | (uint16_t)(ins[11]);
-        instru.hign_z_en     = ins[13] & 0x0F;
-        instru.notifyRate    = ((uint32_t)ins[14] << 8) | (uint32_t)ins[15];
-        instru.notifyRate    = 10000 / instru.notifyRate * 10;
-    */
-
    struct __PACKED
    {
        uint8_t id : 4;
        uint8_t    : 4;
        uint8_t    : 8;
        uint8_t    : 8;
-        uint16_t volt_start;  // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
-        uint16_t volt_stop;   // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
-        uint16_t step;        // unit: 100uV
-        uint8_t step_time;    // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
-        uint16_t cycles;      // 0 ~ 500000
+        uint16_t volt_start; // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
+        uint16_t volt_stop;  // unit: 100uV, -5V = 0, 0V = 25000, 5V = 50000
+        uint16_t step;       // unit: 100uV
+        uint8_t step_time;   // enum: 0 = 5000us, 1 = 10000us, 2 = 20000us
+        uint16_t cycles;     // 0 ~ 500000
        uint8_t : 8;
        uint8_t hi_z_en;      // lower nibble
        uint16_t sample_rate; // unit: 0.1Hz
@@ -1,9 +1,24 @@
-#include "elite_mmm.h"
+#include "app_config.h"
+
+#include "elite_mmm_v1_0.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)

 #include "nrf_gpio.h"
 #include "nrf_log.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+// RIS (real instruction)
+#define DEV_MODE            0xFF // Develop Mode
+
+// VIS (virtual instruction)
+#define VIS_RST             0xF0
+#define VIS_DEVICE_SHINY    0x10
+
+// CIS (control instruction)
+#define CIS_VERSION         0x40
+#define CIS_VOLT            0x10
+#define CIS_TEMPERATURE     0x80
+#define CIS_CALI            0x30

 #define VERSION_DATE_YEAR   25
 #define VERSION_DATE_MONTH  6
@@ -21,7 +36,7 @@ static void cis_version(uint8_t *ins, uint16_t size)
        VERSION_DATE_HOUR,
        VERSION_DATE_MINUTE,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }

@@ -1,97 +1,41 @@
 #include "app_config.h"
-#include "app_error.h"

-#include "elite_board.h"
-#include "pel_v3_0.h"
-
-#include "elite_def.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-#include "nrf_log.h"
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)

 #include "adc_drv.h"
+#include "elite.h"
+#include "elite_board.h"
+#include "elite_pel_v2_0.h"

-#include "FreeRTOS.h"
 #include "message_buffer.h"
-#include "pel_v3_0_io.h"
-#include "queue.h"
 #include "semphr.h"
-#include "stream_buffer.h"
 #include "task.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#include "nrf_log.h"

-#include "FreeRTOS.h"
-#include "nrfx_gpiote.h"
-#include "timers.h"
-#define DEBOUNCE_DELAY_MS     30
-#define HOT_SWAP_IS_CONNECTED 0
-#define VCC_DUT1_output_en()  nrf_gpio_pin_set(HOT_SWAP_1_PIN)
-#define VCC_DUT1_output_dis() nrf_gpio_pin_clear(HOT_SWAP_1_PIN)
-static TimerHandle_t debounce_timer = NULL;
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdlib.h>

-static void debounce_timer_callback(TimerHandle_t xTimer)
-{
-    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+// RIS (real instruction)
+#define MANUAL_SCAN_MODE            0x01
+#define AUTO_SCAN_MODE              0x02
+#define R_EXTERNAL_CALIBRATION_MODE 0x03
+#define DEV_MODE                    0xFF

-    if (state == HOT_SWAP_IS_CONNECTED)
-    {
-        NRF_LOG_INFO("VCC_DUT1 enable");
-        VCC_DUT1_output_en();
-    }
-    else
-    {
-        NRF_LOG_INFO("VCC_DUT1 disable");
-        VCC_DUT1_output_dis();
-    }
-}
+// VIS (virtual instruction)
+#define VIS_RST                     0xF0
+#define VIS_DEVICE_SHINY            0x10

-static void hot_swap_gpiote_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
-{
-    // only handle timer, not handle GPIO
-    if (debounce_timer != NULL)
-    {
-        // reset and start debounce timer
-        xTimerStopFromISR(debounce_timer, NULL);
-        xTimerStartFromISR(debounce_timer, NULL);
-    }
-}
+// CIS (control instruction)
+#define CIS_VERSION                 0x40
+#define CIS_VOLT                    0x10
+#define CIS_TEMPERATURE             0x80
+#define CIS_CALI                    0x30

-void hot_swap_monitor_init(void)
-{
-    nrfx_gpiote_in_config_t config = {
-        .hi_accuracy     = 0,
-        .is_watcher      = 0,
-        .pull            = NRF_GPIO_PIN_PULLUP,
-        .sense           = NRF_GPIOTE_POLARITY_TOGGLE,
-        .skip_gpio_setup = 0
-    };
+#define DUMP_DATA                   0

-    nrfx_gpiote_init();
-    nrfx_gpiote_in_init(HOT_SWAP_SIGNAL_PIN, &config, hot_swap_gpiote_handler);
-    nrfx_gpiote_in_event_enable(HOT_SWAP_SIGNAL_PIN, true);
-
-    debounce_timer = xTimerCreate("debounce", pdMS_TO_TICKS(DEBOUNCE_DELAY_MS), pdFALSE, NULL, debounce_timer_callback);
-    if (debounce_timer == NULL)
-    {
-        NRF_LOG_ERROR("Failed to create debounce timer");
-        return;
-    }
-
-    // initial HOT_SWAP_1_PIN
-    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
-    if (state == HOT_SWAP_IS_CONNECTED)
-    {
-        NRF_LOG_INFO("VCC_DUT1 enable");
-        VCC_DUT1_output_en();
-    }
-    else
-    {
-        NRF_LOG_INFO("VCC_DUT1 disable");
-        VCC_DUT1_output_dis();
-    }
-}
+static bool running = false;

 typedef struct
 {
@@ -118,18 +62,18 @@ static float _load_set(uint32_t mask)
    } input_pin_t;

    const input_pin_t input_pin_tab[] = {
-        {  0.6,  INPUT_1_PIN,  PEL_0P5R_MASK},
-        {  1.2,  INPUT_2_PIN,  PEL_1P0R_MASK},
-        {  2.2,  INPUT_3_PIN,  PEL_2P0R_MASK},
-        {  4.1,  INPUT_4_PIN,  PEL_4P0R_MASK},
-        {  8.4,  INPUT_5_PIN,  PEL_8P0R_MASK},
-        { 16.3,  INPUT_6_PIN, PEL_16P2R_MASK},
-        { 32.7,  INPUT_7_PIN, PEL_32P4R_MASK},
-        { 62.3,  INPUT_8_PIN, PEL_63P4R_MASK},
-        {129.8,  INPUT_9_PIN,  PEL_127R_MASK},
-        {270.0, INPUT_10_PIN,  PEL_255R_MASK},
-        {510.0, INPUT_11_PIN,  PEL_511R_MASK},
-        {998.0, INPUT_12_PIN, PEL_1000R_MASK},
+        {    0.5,  INPUT_1_PIN,  PEL_0P5R_MASK },
+        {    1.0,  INPUT_2_PIN,  PEL_1P0R_MASK },
+        {    2.0,  INPUT_3_PIN,  PEL_2P0R_MASK },
+        {    4.0,  INPUT_4_PIN,  PEL_4P0R_MASK },
+        {    8.3,  INPUT_5_PIN,  PEL_8P0R_MASK },
+        {   16.2,  INPUT_6_PIN, PEL_16P2R_MASK },
+        {   32.4,  INPUT_7_PIN, PEL_32P4R_MASK },
+        {   62.5,  INPUT_8_PIN, PEL_63P4R_MASK },
+        {  130.0,  INPUT_9_PIN,  PEL_127R_MASK },
+        {  270.0, INPUT_10_PIN,  PEL_255R_MASK },
+        {  510.0, INPUT_11_PIN,  PEL_511R_MASK },
+        { 1000.0, INPUT_12_PIN, PEL_1000R_MASK },
    };

    float ohms                = 0;
@@ -168,49 +112,49 @@ static void set_resistor_load_bits(uint32_t mask)
 static void set_resistor_load_pattern(uint32_t index)
 {
    const resistor_t pattern_tab[] = {
-        { 1, 0b0000000000000111},
-        { 2, 0b0000000000000011},
-        { 3, 0b0000000000000101},
-        { 4, 0b0000000000000001},
-        { 5, 0b0000000000001110},
-        { 6, 0b0000000000000110},
-        { 7, 0b0000000000001010},
-        { 8, 0b0000000000000010},
-        { 9, 0b0000000000011100},
-        {10, 0b0000000000001100},
-        {11, 0b0000000000010100},
-        {12, 0b0000000000000100},
-        {13, 0b0000000000111000},
-        {14, 0b0000000000011000},
-        {15, 0b0000000000101000},
-        {16, 0b0000000000001000},
-        {17, 0b0000000001110000},
-        {18, 0b0000000000110000},
-        {19, 0b0000000001010000},
-        {20, 0b0000000000010000},
-        {21, 0b0000000011100000},
-        {22, 0b0000000001100000},
-        {23, 0b0000000010100000},
-        {24, 0b0000000000100000},
-        {25, 0b0000000111000000},
-        {26, 0b0000000011000000},
-        {27, 0b0000000101000000},
-        {28, 0b0000000001000000},
-        {29, 0b0000001110000000},
-        {30, 0b0000000110000000},
-        {31, 0b0000001010000000},
-        {32, 0b0000000010000000},
-        {33, 0b0000011100000000},
-        {34, 0b0000001100000000},
-        {35, 0b0000010100000000},
-        {36, 0b0000000100000000},
-        {37, 0b0000111000000000},
-        {38, 0b0000011000000000},
-        {39, 0b0000101000000000},
-        {40, 0b0000001000000000},
-        {41, 0b0000110000000000},
-        {42, 0b0000010000000000},
-        {43, 0b0000100000000000},
+        {  1, 0b0000000000000111 },
+        {  2, 0b0000000000000011 },
+        {  3, 0b0000000000000101 },
+        {  4, 0b0000000000000001 },
+        {  5, 0b0000000000001110 },
+        {  6, 0b0000000000000110 },
+        {  7, 0b0000000000001010 },
+        {  8, 0b0000000000000010 },
+        {  9, 0b0000000000011100 },
+        { 10, 0b0000000000001100 },
+        { 11, 0b0000000000010100 },
+        { 12, 0b0000000000000100 },
+        { 13, 0b0000000000111000 },
+        { 14, 0b0000000000011000 },
+        { 15, 0b0000000000101000 },
+        { 16, 0b0000000000001000 },
+        { 17, 0b0000000001110000 },
+        { 18, 0b0000000000110000 },
+        { 19, 0b0000000001010000 },
+        { 20, 0b0000000000010000 },
+        { 21, 0b0000000011100000 },
+        { 22, 0b0000000001100000 },
+        { 23, 0b0000000010100000 },
+        { 24, 0b0000000000100000 },
+        { 25, 0b0000000111000000 },
+        { 26, 0b0000000011000000 },
+        { 27, 0b0000000101000000 },
+        { 28, 0b0000000001000000 },
+        { 29, 0b0000001110000000 },
+        { 30, 0b0000000110000000 },
+        { 31, 0b0000001010000000 },
+        { 32, 0b0000000010000000 },
+        { 33, 0b0000011100000000 },
+        { 34, 0b0000001100000000 },
+        { 35, 0b0000010100000000 },
+        { 36, 0b0000000100000000 },
+        { 37, 0b0000111000000000 },
+        { 38, 0b0000011000000000 },
+        { 39, 0b0000101000000000 },
+        { 40, 0b0000001000000000 },
+        { 41, 0b0000110000000000 },
+        { 42, 0b0000010000000000 },
+        { 43, 0b0000100000000000 },
    };

    for (int32_t i = 0; i < ARRAY_SIZE(pattern_tab); i++)
@@ -283,14 +227,14 @@ static void cis_version(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
    uint8_t cis_ver[] = {
-        CIS_VERSION,
+        ins[1],
        VERSION_DATE_YEAR,
        VERSION_DATE_MONTH,
        VERSION_DATE_DAY,
        VERSION_DATE_HOUR,
        VERSION_DATE_MINUTE,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }

@@ -298,15 +242,20 @@ static void send_start_package(void *packet_buf, uint32_t packet_len)
 {
    for (uint32_t i = 0; i < 4; i++)
    {
-        ret_code_t le_event_notify(uint8_t * p_value, uint16_t len);
+        ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
        nrf_gpio_pin_set(TP2_PIN);
        ret_code_t ret = le_event_notify(packet_buf, packet_len);
        nrf_gpio_pin_clear(TP2_PIN);

+        if (DUMP_DATA)
+        {
+            for (uint32_t i = 0; i < packet_len; i++)
+            {
+                NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
+            }
+            NRF_LOG_RAW_INFO("\r\n");
+        }
        vTaskDelay(pdMS_TO_TICKS(10));
-
-        NRF_LOG_HEXDUMP_INFO(packet_buf, packet_len);
-        NRF_LOG_INFO("\n");
    }
 }

@@ -323,97 +272,60 @@ static void pel_scan_mode_notify(scan_mode_notify_packet_t *packet_buf, uint32_t

    packet_buf->mem_board_id = global_memoryboard_id;
    packet_buf->packet_seq++;
-    packet_buf->notify_time      = xTaskGetTickCount();
-    packet_buf->output_vo_raw    = pel_hw.adc.results[2];
-    packet_buf->output_vc_raw    = pel_hw.adc.results[3];
-    packet_buf->output_ve_raw    = pel_hw.adc.results[4];
-    packet_buf->hold_OUT_v       = pel_hw.adc.results_f[2] * 10 / 1000;
-    packet_buf->hold_VCC_v       = pel_hw.adc.results_f[3] * 10 / 1000;
-    packet_buf->hold_VEE_v       = pel_hw.adc.results_f[4] * 10 / 1000;
+    packet_buf->notify_time   = xTaskGetTickCount();
+    packet_buf->raw_output_r1 = pel_hw.adc.results[0];
+    packet_buf->raw_output_r2 = pel_hw.adc.results[1];
+    packet_buf->raw_output_vo = pel_hw.adc.results[2];
+    packet_buf->raw_output_vc = pel_hw.adc.results[3];
+    packet_buf->raw_output_ve = pel_hw.adc.results[4];
+    packet_buf->output_r1_mv  = pel_hw.adc.results_f[0];
+    packet_buf->output_r2_mv  = pel_hw.adc.results_f[1];
+    packet_buf->output_vo_mv  = pel_hw.adc.results_f[2];
+    packet_buf->output_vc_mv  = pel_hw.adc.results_f[3];
+    packet_buf->output_ve_mv  = pel_hw.adc.results_f[4];
+
+    packet_buf->hold_r1_v  = pel_hw.adc.results_f[0] * 10 / 1000;
+    packet_buf->hold_r2_v  = pel_hw.adc.results_f[1] * 10 / 1000;
+    packet_buf->hold_out_v = pel_hw.adc.results_f[2] * 10 / 1000;
+    packet_buf->hold_vcc_v = pel_hw.adc.results_f[3] * 10 / 1000;
+    packet_buf->hold_vee_v = pel_hw.adc.results_f[4] * 10 / 1000;
+    packet_buf->current    = 0;
+
    packet_buf->resis_pattern_id = load_config.resistor.pattern_index;
    packet_buf->resis_bitsmask   = load_config.resistor.resistor_mask;
    packet_buf->resis_g_value    = load_config.resistor.resistor_conductance;
-    packet_buf->val_1            = 0xFFFFFFFF;
-    packet_buf->val_2            = 0xFFFFFFFF;
-    packet_buf->val_3            = 0xFFFF;
-    ret_code_t ret               = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
-
-    // NRF_LOG_HEXDUMP_INFO(packet_buf,packet_len);
+    for (int i = 0; i < ARRAY_SIZE(packet_buf->payload); i++)
    {
-        char str[128];
-        snprintf(str, sizeof(str), "{%3d, %3d, %10lu, %10lu, %10lu, %10lu, %2.7f, %2.7f, %2.7f, %5d, 0x%04X, %.7f, %d}", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time, packet_buf->output_vo_raw, packet_buf->output_vc_raw, packet_buf->output_ve_raw, packet_buf->hold_OUT_v, packet_buf->hold_VCC_v, packet_buf->hold_VEE_v, packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
-        NRF_LOG_INFO("%s", str);
+        packet_buf->payload[i] = 0xFFFFFFFF;
    }
-}

-void test_gpio_task(void *pArg)
-{
-    const uint32_t pel_pins[] = {
-        INPUT_1_PIN,
-        INPUT_2_PIN,
-        INPUT_3_PIN,
-        INPUT_4_PIN,
-        INPUT_5_PIN,
-        INPUT_6_PIN,
-        INPUT_7_PIN,
-        INPUT_8_PIN,
-        INPUT_9_PIN,
-        INPUT_10_PIN,
-        INPUT_11_PIN,
-        INPUT_12_PIN,
-        ANODE_PIN,
-        CATHODE_PIN,
-        SAMPLE_I_PIN,
-        SAMPLE_V_PIN
-    };
+    ret_code_t ret = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));

-    for (;;)
+    if (DUMP_DATA)
    {
+        for (uint32_t i = 0; i < packet_len; i++)
+        {
+            NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
+        }
+        NRF_LOG_RAW_INFO("\r\n");

-        NRF_LOG_INFO("[test] all output pin set low");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
        {
-            nrf_gpio_pin_clear(pel_pins[i]);
-        }
-        vTaskDelay(1000);
+            char str[128];
+            snprintf(str, sizeof(str), "{%10d, %10d, %10lu,", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time);
+            NRF_LOG_INFO("%s", str);

-        NRF_LOG_INFO("[test] all output pin set high");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_set(pel_pins[i]);
-        }
-        vTaskDelay(1000);
+            snprintf(str, sizeof(str), " %10lu, %10lu, %10lu, %10lu, %10lu, %7.3f, %7.3f, %7.3f, %7.3f, %7.3f,", packet_buf->raw_output_r1, packet_buf->raw_output_r2, packet_buf->raw_output_vo, packet_buf->raw_output_vc, packet_buf->raw_output_ve, packet_buf->output_r1_mv, packet_buf->output_r2_mv, packet_buf->output_vo_mv, packet_buf->output_vc_mv, packet_buf->output_ve_mv);
+            NRF_LOG_INFO("%s", str);

-        NRF_LOG_INFO("[test] alternating high and low signals on all output pins");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_clear(pel_pins[i]);
+            snprintf(str, sizeof(str), " %4.6f, %4.6f, %4.6f, %4.6f, %4.6f, %4.6f,", packet_buf->hold_r1_v, packet_buf->hold_r2_v, packet_buf->hold_out_v, packet_buf->hold_vcc_v, packet_buf->hold_vee_v, packet_buf->current);
+            NRF_LOG_INFO("%s", str);
+
+            snprintf(str, sizeof(str), " %10d,     0x%04X, %3.7f, %d}", packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
+            NRF_LOG_INFO("%s", str);
        }
-        vTaskDelay(1000);
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_set(pel_pins[i]);
-            vTaskDelay(100);
-            nrf_gpio_pin_clear(pel_pins[i]);
-        }
-        vTaskDelay(1000);
    }
 }

-static void decode_and_set_resistor_pattern(uint8_t *param)
-{
-    uint16_t pattern_id = u8_to_u16(param[0], param[1]);
-
-    set_resistor_load_pattern(pattern_id);
-}
-
-static void decode_and_set_manual_resistor(uint8_t *param)
-{
-    uint16_t manual_val = u8_to_u16(param[0], param[1]);
-
-    set_resistor_load_bits(manual_val);
-}
-
 static void dev_mode_input_resistor(uint8_t *ins)
 {
    NRF_LOG_INFO("[DEV MODE] %s", __FUNCTION__);
@@ -424,36 +336,188 @@ static void dev_mode_input_resistor(uint8_t *ins)
        uint8_t ins_type : 4;
        uint8_t pkg_size;
        uint8_t mode;
-        uint8_t func_id;
-        uint8_t opcode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
        uint8_t param[];
    } *p_ins = (void *)ins;

-    switch (p_ins->opcode)
+    switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
    {
-        case 0x00:
+        case 0x0100:
+            // 3000FFFF 0100
            set_resistor_to_high_z();
            break;

-        case 0x01:
-            decode_and_set_resistor_pattern(p_ins->param);
+        case 0x0101: {
+            // 3000FFFF 0101 0001
+            uint16_t pattern_id = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+            set_resistor_load_pattern(pattern_id);
            break;
+        }

-        case 0x02:
-            decode_and_set_manual_resistor(p_ins->param);
+        case 0x0102: {
+            // 3000FFFF 0102 000F
+            uint16_t manual_val = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+            set_resistor_load_bits(manual_val);
            break;
+        }

        default:
            break;
    }
 }

+typedef struct
+{
+    uint32_t gpio;
+    const char *gpio_desc;
+} pin_map_entry_t;
+
+#define UNDEF_GPIO 0xFFFFFFFF
+static const pin_map_entry_t pin_to_gpio_table[64] = {
+    [1]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [2]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [3]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [4]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [5]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [6]  = { NRF_GPIO_PIN_MAP(0, 22), "GPIO(0, 22)" },
+    [7]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [8]  = { NRF_GPIO_PIN_MAP(0, 25), "GPIO(0, 25)" },
+    [9]  = { NRF_GPIO_PIN_MAP(0, 19), "GPIO(0, 19)" },
+    [10] = { NRF_GPIO_PIN_MAP(0, 21), "GPIO(0, 21)" },
+    [11] = { NRF_GPIO_PIN_MAP(1, 0), "GPIO(1, 0)" },
+    [12] = { NRF_GPIO_PIN_MAP(0, 18), "GPIO(0, 18)" },
+    [13] = { NRF_GPIO_PIN_MAP(0, 17), "GPIO(0, 17)" },
+    [14] = { NRF_GPIO_PIN_MAP(0, 20), "GPIO(0, 20)" },
+    [15] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [16] = { NRF_GPIO_PIN_MAP(0, 14), "GPIO(0, 14)" },
+    [17] = { NRF_GPIO_PIN_MAP(0, 13), "GPIO(0, 13)" },
+    [18] = { NRF_GPIO_PIN_MAP(0, 11), "GPIO(0, 11)" },
+    [19] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [20] = { NRF_GPIO_PIN_MAP(0, 15), "GPIO(0, 15)" },
+    [21] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [22] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [23] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [24] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [25] = { NRF_GPIO_PIN_MAP(1, 8), "GPIO(1, 8)" },
+    [26] = { NRF_GPIO_PIN_MAP(0, 12), "GPIO(0, 12)" },
+    [27] = { NRF_GPIO_PIN_MAP(0, 7), "GPIO(0, 7)" },
+    [28] = { NRF_GPIO_PIN_MAP(1, 9), "GPIO(1, 9)" },
+    [29] = { NRF_GPIO_PIN_MAP(0, 8), "GPIO(0, 8)" },
+    [30] = { NRF_GPIO_PIN_MAP(0, 6), "GPIO(0, 6)" },
+    [31] = { NRF_GPIO_PIN_MAP(0, 5), "GPIO(0, 5)" },
+    [32] = { NRF_GPIO_PIN_MAP(0, 27), "GPIO(0, 27)" },
+    [33] = { NRF_GPIO_PIN_MAP(0, 26), "GPIO(0, 26)" },
+    [34] = { NRF_GPIO_PIN_MAP(0, 4), "GPIO(0, 4)" },
+    [35] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [36] = { NRF_GPIO_PIN_MAP(0, 1), "GPIO(0, 1)" },
+    [37] = { NRF_GPIO_PIN_MAP(0, 29), "GPIO(0, 29)" },
+    [38] = { NRF_GPIO_PIN_MAP(0, 0), "GPIO(0, 0)" },
+    [39] = { NRF_GPIO_PIN_MAP(0, 31), "GPIO(0, 31)" },
+    [40] = { NRF_GPIO_PIN_MAP(1, 15), "GPIO(1, 15)" },
+    [41] = { NRF_GPIO_PIN_MAP(0, 2), "GPIO(0, 2)" },
+    [42] = { NRF_GPIO_PIN_MAP(0, 30), "GPIO(0, 30)" },
+    [43] = { NRF_GPIO_PIN_MAP(0, 28), "GPIO(0, 28)" },
+    [44] = { NRF_GPIO_PIN_MAP(1, 12), "GPIO(1, 12)" },
+    [45] = { NRF_GPIO_PIN_MAP(1, 14), "GPIO(1, 14)" },
+    [46] = { NRF_GPIO_PIN_MAP(0, 3), "GPIO(0, 3)" },
+    [47] = { NRF_GPIO_PIN_MAP(1, 13), "GPIO(1, 13)" },
+    [48] = { NRF_GPIO_PIN_MAP(1, 3), "GPIO(1, 3)" },
+    [49] = { NRF_GPIO_PIN_MAP(1, 10), "GPIO(1, 10)" },
+    [50] = { NRF_GPIO_PIN_MAP(1, 6), "GPIO(1, 6)" },
+    [51] = { NRF_GPIO_PIN_MAP(1, 11), "GPIO(1, 11)" },
+    [52] = { NRF_GPIO_PIN_MAP(0, 10), "GPIO(0, 10)" },
+    [53] = { NRF_GPIO_PIN_MAP(0, 9), "GPIO(0, 9)" },
+    [54] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [55] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [56] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [57] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [58] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [59] = { NRF_GPIO_PIN_MAP(1, 2), "GPIO(1, 2)" },
+    [60] = { NRF_GPIO_PIN_MAP(0, 24), "GPIO(0, 24)" },
+    [61] = { NRF_GPIO_PIN_MAP(0, 23), "GPIO(0, 23)" },
+    [62] = { NRF_GPIO_PIN_MAP(0, 16), "GPIO(0, 16)" },
+    [63] = { UNDEF_GPIO, "UNDEF_GPIO" },
+};
+
+static void set_single_pin_as_output(uint16_t pin_number, uint16_t high_low)
+{
+    const pin_map_entry_t *pin_entry = &pin_to_gpio_table[pin_number];
+
+    if (pin_entry->gpio == UNDEF_GPIO)
+    {
+        NRF_LOG_INFO("pin_number(%d) is not used", pin_number);
+        return;
+    }
+
+    if (high_low > 1) high_low = 1;
+    nrf_gpio_cfg_output(pin_entry->gpio);
+    nrf_gpio_pin_write(pin_entry->gpio, high_low);
+    NRF_LOG_INFO("pin_number(%d) = %d // pin_function_name: %s",
+                 pin_number,
+                 high_low,
+                 pin_entry->gpio_desc);
+}
+
+static void set_all_pins_as_output(uint16_t high_low)
+{
+    if (high_low > 1) high_low = 1;
+
+    for (uint16_t i = 1; i < ARRAY_SIZE(pin_to_gpio_table); i++)
+    {
+        if (pin_to_gpio_table[i].gpio != UNDEF_GPIO)
+        {
+            set_single_pin_as_output(i, high_low);
+        }
+    }
+}
+
+static void dev_mode_gpio(uint8_t *ins)
+{
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
+    {
+        case 0xA000: {
+            // 3000FFFF A000
+            // pelv30_default_gpio();
+            break;
+        }
+
+        case 0xA001: {
+            // 3000FFFF A001 0008 0001
+            uint16_t pin_number = uint16_big_decode(&p_ins->param[0]);
+            uint16_t high_low   = uint16_big_decode(&p_ins->param[2]);
+            set_single_pin_as_output(pin_number, high_low);
+            break;
+        }
+
+        case 0xA002: {
+            // 3000FFFF A002 0001
+            uint16_t high_low = uint16_big_decode(&p_ins->param[0]);
+            set_all_pins_as_output(high_low);
+            break;
+        }
+    }
+}
+
 static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
 {
    pel_config_t pel_cfg = {
        .anode_pin    = ANODE_PIN,
        .cathode_pin  = CATHODE_PIN,
-        .smaple_i_pin = SAMPLE_I_PIN,
+        .smaple_r_pin = SAMPLE_R_PIN,
        .sample_v_pin = SAMPLE_V_PIN,
        .test_pin     = TP1_PIN,
        .mode         = BOARD_IOPx,
@@ -506,9 +570,7 @@ static void pel_pulse_start(void *p_arg)
        set_resistor_load_bits(p_setting->bitmask);
    }

-    nrf_gpio_pin_set(TP2_PIN);   // For testing
    start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
-    nrf_gpio_pin_clear(TP2_PIN); // For testing
 }

 static void pel_pulse_stop(void *p_arg)
@@ -606,19 +668,22 @@ static void dev_mode(uint8_t *ins, uint16_t size)
        uint8_t ins_type : 4;
        uint8_t pkg_size;
        uint8_t mode;
-        uint8_t func_id;
-        uint8_t opcode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
        uint8_t param[];
    } *p_ins = (void *)ins;

-    global_memoryboard_id = p_ins->id;
-
-    switch (p_ins->func_id)
+    switch (p_ins->dev_feat)
    {
        case 0x01:
            dev_mode_input_resistor(ins);
            break;

+        case 0xA0:
+            dev_mode_gpio(ins);
+            break;
+
        default:
            break;
    }
@@ -649,6 +714,7 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
            // 30 00 01 00
            pel_scan_msg.opcode = PEL_STOP;
            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            running = false;
            break;
        }

@@ -666,6 +732,7 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            running = true;
            break;
        }

@@ -758,6 +825,8 @@ static void auto_scan_start_task(void *p_arg)

    auto_scan_start_handle = NULL;

+    running = false;
+
    vTaskDelete(NULL);
 }

@@ -794,6 +863,7 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
                vTaskDelete(auto_scan_start_handle);
                auto_scan_start_handle = NULL;
            }
+            running = false;
            taskEXIT_CRITICAL();
            break;
        }
@@ -820,6 +890,7 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)

                // using a 100ms delay to ensure the parameter is copied to  to auto_scan_start_task()
                vTaskDelay(pdMS_TO_TICKS(100));
+                running = true;
            }
            break;
        }
@@ -923,10 +994,6 @@ static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
    }
 }

-#define MANUAL_SCAN_MODE            0x01
-#define AUTO_SCAN_MODE              0x02
-#define R_EXTERNAL_CALIBRATION_MODE 0x03
-
 const elite_instance_t pel_elite_instance = {
    .cis_func = {
                 [CIS_VERSION] = cis_version,
@@ -958,8 +1025,6 @@ const elite_instance_t *pel_init(void)

    ASSERT(xTaskCreate(pel_scan_mode_task, "pel_scan_mode", 512, NULL, 4, NULL));

-    hot_swap_monitor_init();
-
    return &pel_elite_instance;
 }

@@ -23,7 +23,7 @@ pel_hw_t pel_hw = {
                     [OUTPUT_R2_IDX] = OUTPUT_R2_CHANNEL,
                     [OUTPUT_VO_IDX] = OUTPUT_VO_CHANNEL,
                     [OUTPUT_VC_IDX] = OUTPUT_VC_CHANNEL,
-                     [OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL},
+                     [OUTPUT_VE_IDX] = OUTPUT_VE_CHANNEL },
    .adc.gain        = NRF_SAADC_GAIN1_6,
    .adc.smaple_time = NRF_SAADC_ACQTIME_3US
 };
@@ -92,30 +92,6 @@ void spim_xfer(uint32_t cs_pin,
 #define MAX_PULSE_WIDTH INT16_MAX
 #define MAX_PULSE_IDLE  INT16_MAX

-void set_anode_cathode_to_default(void)
-{
-    if (BOARD_IOPx == BOARD_IOPL)
-    {
-        nrf_gpio_pin_set(ANODE_PIN);
-        nrf_gpio_pin_clear(CATHODE_PIN);
-        nrf_gpio_pin_clear(SAMPLE_R_PIN);
-        nrf_gpio_pin_clear(SAMPLE_V_PIN);
-        nrf_gpio_pin_clear(TP1_PIN);
-        nrf_gpio_pin_clear(TP2_PIN);
-        nrf_gpio_pin_clear(RELAY1_PIN);
-    }
-    else if (BOARD_IOPx == BOARD_IOPH)
-    {
-        nrf_gpio_pin_clear(ANODE_PIN);
-        nrf_gpio_pin_set(CATHODE_PIN);
-        nrf_gpio_pin_clear(SAMPLE_R_PIN);
-        nrf_gpio_pin_clear(SAMPLE_V_PIN);
-        nrf_gpio_pin_clear(TP1_PIN);
-        nrf_gpio_pin_clear(TP2_PIN);
-        nrf_gpio_pin_clear(RELAY1_PIN);
-    }
-}
-
 static void pel_saadc_init(pel_adc_t *p_adc)
 {
    /* stop ssadc */
@@ -207,10 +183,8 @@ void SAADC_IRQHandler(void)
 void pel_pulse_gen_init(pel_config_t cfg)
 {
    pel_hw.pulse_tmr->TASKS_STOP = 1;
-
    sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
    sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
-
    sd_nvic_DisableIRQ(SAADC_IRQn);
    sd_nvic_ClearPendingIRQ(SAADC_IRQn);

@@ -218,78 +192,60 @@ void pel_pulse_gen_init(pel_config_t cfg)
    pel_hw.adc.gain                 = cfg.gain;
    pel_hw.adc.smaple_time          = cfg.smaple_time;
    pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
-
    pel_saadc_init(&pel_hw.adc);

    // disable gpio task
-    for (int i = 0; i < 5; i++)
+    for (int i = 0; i < 4; i++)
    {
        nrf_gpiote_task_disable(i);
    }

-    set_anode_cathode_to_default();
-
    // config gpiote task
-    switch (cfg.mode)
-    {
-        default:
-        case 1:
-            nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-            nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
-            break;
-        case 0:
-            nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
-            nrf_gpiote_task_configure(1, cfg.cathode_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-            break;
-    }
+    nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(1, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);

-    nrf_gpiote_task_configure(2, cfg.smaple_r_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-    nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-
-    if (cfg.test_pin != 0xFFFFFFFF)
-    {
-        nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-    }
-
-    // enable gpio task
-    for (int i = 0; i < 5; i++)
-    {
-        nrf_gpiote_task_enable(i);
-    }
-
-    NRF_PPI->CH[0].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
-    NRF_PPI->CH[0].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
-    NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
-    NRF_PPI->CHENSET     = (1 << (0));
+    NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
+    NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->CHENSET   = (1 << (0));

    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
-    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
-    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_r_pin
+    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
    NRF_PPI->CHENSET     = (1 << (1));

    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
-    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
-    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
    NRF_PPI->CHENSET     = (1 << (2));

-    NRF_PPI->CH[3].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
-    NRF_PPI->CH[3].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
-    NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
-    NRF_PPI->CHENSET     = (1 << (3));
+    NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
+    NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
+    NRF_PPI->CHENSET   = (1 << (3));

    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
    NRF_PPI->CHENSET   = (1 << (4));

+    NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
+    NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
+    NRF_PPI->CHENSET   = (1 << (5));
+
+    NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
+    NRF_PPI->CHENSET   = (1 << (6));
+
+    // enable gpio task
+    for (int i = 0; i < 3; i++)
+    {
+        nrf_gpiote_task_enable(i);
+    }
+
    if (cfg.test_pin != 0xFFFFFFFF)
    {
-        NRF_PPI->CH[6].EEP   = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
-        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
-        NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
-        NRF_PPI->CHENSET     = (1 << (6));
-        NRF_PPI->CH[7].EEP   = (uint32_t)&NRF_SAADC->EVENTS_END;
-        NRF_PPI->CH[7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
-        NRF_PPI->CHENSET     = (1 << (7));
+        nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+        NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
+        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+        nrf_gpiote_task_enable(3);
    }

    pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
@@ -366,7 +322,8 @@ void pel_pulse_gen_demo(void)

 void pel20_io_init(void)
 {
-    const uint32_t pel_pins_default_high[] = {
+    // common gpio
+    const uint32_t config_output_and_set[] = {
        INPUT_1_PIN,
        INPUT_2_PIN,
        INPUT_3_PIN,
@@ -381,30 +338,47 @@ void pel20_io_init(void)
        INPUT_12_PIN
    };

-    for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
+    const uint32_t config_output_and_clear[] = {
+        TP1_PIN,
+        TP2_PIN,
+        SAMPLE_R_PIN,
+        SAMPLE_V_PIN,
+    };
+
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
    {
-        nrf_gpio_pin_set(pel_pins_default_high[i]);
-        nrf_gpio_cfg_output(pel_pins_default_high[i]);
+        nrf_gpio_pin_set(config_output_and_set[i]);
+        nrf_gpio_cfg_output(config_output_and_set[i]);
    }

-    set_anode_cathode_to_default();
-    nrf_gpio_cfg_output(ANODE_PIN);
-    nrf_gpio_cfg_output(CATHODE_PIN);
-    nrf_gpio_cfg_output(SAMPLE_R_PIN);
-    nrf_gpio_cfg_output(SAMPLE_V_PIN);
-    nrf_gpio_cfg_output(TP1_PIN);
-    nrf_gpio_cfg_output(TP2_PIN);
-    nrf_gpio_cfg_output(RELAY1_PIN);
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
+    {
+        nrf_gpio_pin_clear(config_output_and_clear[i]);
+        nrf_gpio_cfg_output(config_output_and_clear[i]);
+    }
+
+    nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
+
+    // specific gpio
+    if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_cfg_output(ANODE_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_cfg_output(ANODE_PIN);
+    }

    // Config spi module
-
    nrf_gpio_pin_set(WP_MEM_PIN);
-    nrf_gpio_cfg_output(WP_MEM_PIN);
    nrf_gpio_pin_set(CS_MEM_PIN);
-    nrf_gpio_cfg_output(CS_MEM_PIN);
    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
-    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
    nrf_gpio_pin_clear(SPIM_CLK_PIN);
+    nrf_gpio_cfg_output(WP_MEM_PIN);
+    nrf_gpio_cfg_output(CS_MEM_PIN);
+    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
    nrf_gpio_cfg_output(SPIM_CLK_PIN);
    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);

@@ -1,25 +1,112 @@
 #include "app_config.h"
-#include "app_error.h"

-#include "elite_board.h"
-#include "pel.h"
-
-#include "elite_def.h"
-
-#include "nrf_delay.h"
-#include "nrf_gpio.h"
-#include "nrf_log.h"
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)

 #include "adc_drv.h"
+#include "elite.h"
+#include "elite_board.h"
+#include "elite_pel_v3_0.h"

-#include "FreeRTOS.h"
 #include "message_buffer.h"
-#include "queue.h"
 #include "semphr.h"
-#include "stream_buffer.h"
 #include "task.h"
+#include "timers.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+#include "nrf_log.h"
+#include "nrfx_gpiote.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#define DEBOUNCE_DELAY_MS           30
+#define HOT_SWAP_IS_CONNECTED       0
+#define VCC_DUT1_output_en()        nrf_gpio_pin_set(HOT_SWAP_1_PIN)
+#define VCC_DUT1_output_dis()       nrf_gpio_pin_clear(HOT_SWAP_1_PIN)
+
+// RIS (real instruction)
+#define MANUAL_SCAN_MODE            0x01
+#define AUTO_SCAN_MODE              0x02
+#define R_EXTERNAL_CALIBRATION_MODE 0x03
+#define DEV_MODE                    0xFF
+
+// VIS (virtual instruction)
+#define VIS_RST                     0xF0
+#define VIS_DEVICE_SHINY            0x10
+
+// CIS (control instruction)
+#define CIS_VERSION                 0x40
+#define CIS_VOLT                    0x10
+#define CIS_TEMPERATURE             0x80
+#define CIS_CALI                    0x30
+
+#define DUMP_DATA                   0
+
+static TimerHandle_t debounce_timer         = NULL;
+static TimerHandle_t dev_shiny_timer_handle = NULL;
+static bool running                         = false;
+
+static void debounce_timer_callback(TimerHandle_t xTimer)
+{
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}
+
+static void hot_swap_gpiote_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
+{
+    // only handle timer, not handle GPIO
+    if (debounce_timer != NULL)
+    {
+        // reset and start debounce timer
+        xTimerStopFromISR(debounce_timer, NULL);
+        xTimerStartFromISR(debounce_timer, NULL);
+    }
+}
+
+void hot_swap_monitor_init(void)
+{
+    nrfx_gpiote_in_config_t config = {
+        .hi_accuracy     = 0,
+        .is_watcher      = 0,
+        .pull            = NRF_GPIO_PIN_PULLUP,
+        .sense           = NRF_GPIOTE_POLARITY_TOGGLE,
+        .skip_gpio_setup = 0
+    };
+
+    nrfx_gpiote_init();
+    nrfx_gpiote_in_init(HOT_SWAP_SIGNAL_PIN, &config, hot_swap_gpiote_handler);
+    nrfx_gpiote_in_event_enable(HOT_SWAP_SIGNAL_PIN, true);
+
+    debounce_timer = xTimerCreate("debounce", pdMS_TO_TICKS(DEBOUNCE_DELAY_MS), pdFALSE, NULL, debounce_timer_callback);
+    if (debounce_timer == NULL)
+    {
+        NRF_LOG_ERROR("Failed to create debounce timer");
+        return;
+    }
+
+    // initial HOT_SWAP_1_PIN
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}

 typedef struct
 {
@@ -46,18 +133,18 @@ static float _load_set(uint32_t mask)
    } input_pin_t;

    const input_pin_t input_pin_tab[] = {
-        {   0.5,  INPUT_1_PIN,  PEL_0P5R_MASK},
-        {   1.0,  INPUT_2_PIN,  PEL_1P0R_MASK},
-        {   2.0,  INPUT_3_PIN,  PEL_2P0R_MASK},
-        {   4.0,  INPUT_4_PIN,  PEL_4P0R_MASK},
-        {   8.3,  INPUT_5_PIN,  PEL_8P0R_MASK},
-        {  16.2,  INPUT_6_PIN, PEL_16P2R_MASK},
-        {  32.4,  INPUT_7_PIN, PEL_32P4R_MASK},
-        {  62.5,  INPUT_8_PIN, PEL_63P4R_MASK},
-        { 130.0,  INPUT_9_PIN,  PEL_127R_MASK},
-        { 270.0, INPUT_10_PIN,  PEL_255R_MASK},
-        { 510.0, INPUT_11_PIN,  PEL_511R_MASK},
-        {1000.0, INPUT_12_PIN, PEL_1000R_MASK},
+        {   0.6,  INPUT_1_PIN,  PEL_0P5R_MASK },
+        {   1.2,  INPUT_2_PIN,  PEL_1P0R_MASK },
+        {   2.2,  INPUT_3_PIN,  PEL_2P0R_MASK },
+        {   4.1,  INPUT_4_PIN,  PEL_4P0R_MASK },
+        {   8.4,  INPUT_5_PIN,  PEL_8P0R_MASK },
+        {  16.3,  INPUT_6_PIN, PEL_16P2R_MASK },
+        {  32.7,  INPUT_7_PIN, PEL_32P4R_MASK },
+        {  62.3,  INPUT_8_PIN, PEL_63P4R_MASK },
+        { 129.8,  INPUT_9_PIN,  PEL_127R_MASK },
+        { 270.0, INPUT_10_PIN,  PEL_255R_MASK },
+        { 510.0, INPUT_11_PIN,  PEL_511R_MASK },
+        { 998.0, INPUT_12_PIN, PEL_1000R_MASK },
    };

    float ohms                = 0;
@@ -77,6 +164,11 @@ static float _load_set(uint32_t mask)
            nrf_gpio_pin_set(input_pin_tab[i].pin);
        }
    }
+
+    if (mask == 0)
+    {
+        NRF_LOG_INFO("disable R1~R12");
+    }
    return sum_of_conductances;
 }

@@ -91,49 +183,49 @@ static void set_resistor_load_bits(uint32_t mask)
 static void set_resistor_load_pattern(uint32_t index)
 {
    const resistor_t pattern_tab[] = {
-        { 1, 0b0000000000000111},
-        { 2, 0b0000000000000011},
-        { 3, 0b0000000000000101},
-        { 4, 0b0000000000000001},
-        { 5, 0b0000000000001110},
-        { 6, 0b0000000000000110},
-        { 7, 0b0000000000001010},
-        { 8, 0b0000000000000010},
-        { 9, 0b0000000000011100},
-        {10, 0b0000000000001100},
-        {11, 0b0000000000010100},
-        {12, 0b0000000000000100},
-        {13, 0b0000000000111000},
-        {14, 0b0000000000011000},
-        {15, 0b0000000000101000},
-        {16, 0b0000000000001000},
-        {17, 0b0000000001110000},
-        {18, 0b0000000000110000},
-        {19, 0b0000000001010000},
-        {20, 0b0000000000010000},
-        {21, 0b0000000011100000},
-        {22, 0b0000000001100000},
-        {23, 0b0000000010100000},
-        {24, 0b0000000000100000},
-        {25, 0b0000000111000000},
-        {26, 0b0000000011000000},
-        {27, 0b0000000101000000},
-        {28, 0b0000000001000000},
-        {29, 0b0000001110000000},
-        {30, 0b0000000110000000},
-        {31, 0b0000001010000000},
-        {32, 0b0000000010000000},
-        {33, 0b0000011100000000},
-        {34, 0b0000001100000000},
-        {35, 0b0000010100000000},
-        {36, 0b0000000100000000},
-        {37, 0b0000111000000000},
-        {38, 0b0000011000000000},
-        {39, 0b0000101000000000},
-        {40, 0b0000001000000000},
-        {41, 0b0000110000000000},
-        {42, 0b0000010000000000},
-        {43, 0b0000100000000000},
+        {  1, 0b0000000000000111 },
+        {  2, 0b0000000000000011 },
+        {  3, 0b0000000000000101 },
+        {  4, 0b0000000000000001 },
+        {  5, 0b0000000000001110 },
+        {  6, 0b0000000000000110 },
+        {  7, 0b0000000000001010 },
+        {  8, 0b0000000000000010 },
+        {  9, 0b0000000000011100 },
+        { 10, 0b0000000000001100 },
+        { 11, 0b0000000000010100 },
+        { 12, 0b0000000000000100 },
+        { 13, 0b0000000000111000 },
+        { 14, 0b0000000000011000 },
+        { 15, 0b0000000000101000 },
+        { 16, 0b0000000000001000 },
+        { 17, 0b0000000001110000 },
+        { 18, 0b0000000000110000 },
+        { 19, 0b0000000001010000 },
+        { 20, 0b0000000000010000 },
+        { 21, 0b0000000011100000 },
+        { 22, 0b0000000001100000 },
+        { 23, 0b0000000010100000 },
+        { 24, 0b0000000000100000 },
+        { 25, 0b0000000111000000 },
+        { 26, 0b0000000011000000 },
+        { 27, 0b0000000101000000 },
+        { 28, 0b0000000001000000 },
+        { 29, 0b0000001110000000 },
+        { 30, 0b0000000110000000 },
+        { 31, 0b0000001010000000 },
+        { 32, 0b0000000010000000 },
+        { 33, 0b0000011100000000 },
+        { 34, 0b0000001100000000 },
+        { 35, 0b0000010100000000 },
+        { 36, 0b0000000100000000 },
+        { 37, 0b0000111000000000 },
+        { 38, 0b0000011000000000 },
+        { 39, 0b0000101000000000 },
+        { 40, 0b0000001000000000 },
+        { 41, 0b0000110000000000 },
+        { 42, 0b0000010000000000 },
+        { 43, 0b0000100000000000 },
    };

    for (int32_t i = 0; i < ARRAY_SIZE(pattern_tab); i++)
@@ -206,32 +298,35 @@ static void cis_version(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
    uint8_t cis_ver[] = {
-        CIS_VERSION,
+        ins[1],
        VERSION_DATE_YEAR,
        VERSION_DATE_MONTH,
        VERSION_DATE_DAY,
        VERSION_DATE_HOUR,
        VERSION_DATE_MINUTE,
    };
-    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    extern ret_code_t le_data_update(uint8_t *p_value, uint16_t len);
    le_data_update((void *)cis_ver, sizeof(cis_ver));
 }

 static void send_start_package(void *packet_buf, uint32_t packet_len)
 {
-    NRF_LOG_INFO(__FUNCTION__);
-
    for (uint32_t i = 0; i < 4; i++)
    {
-        ret_code_t le_event_notify(uint8_t * p_value, uint16_t len);
+        ret_code_t le_event_notify(uint8_t *p_value, uint16_t len);
        nrf_gpio_pin_set(TP2_PIN);
        ret_code_t ret = le_event_notify(packet_buf, packet_len);
        nrf_gpio_pin_clear(TP2_PIN);

+        if (DUMP_DATA)
+        {
+            for (uint32_t i = 0; i < packet_len; i++)
+            {
+                NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
+            }
+            NRF_LOG_RAW_INFO("\r\n");
+        }
        vTaskDelay(pdMS_TO_TICKS(10));
-
-        NRF_LOG_HEXDUMP_INFO(packet_buf, packet_len);
-        NRF_LOG_INFO("\n");
    }
 }

@@ -248,97 +343,59 @@ static void pel_scan_mode_notify(scan_mode_notify_packet_t *packet_buf, uint32_t

    packet_buf->mem_board_id = global_memoryboard_id;
    packet_buf->packet_seq++;
-    packet_buf->notify_time      = xTaskGetTickCount();
-    packet_buf->output_vo_raw    = pel_hw.adc.results[2];
-    packet_buf->output_vc_raw    = pel_hw.adc.results[3];
-    packet_buf->output_ve_raw    = pel_hw.adc.results[4];
-    packet_buf->hold_OUT_v       = pel_hw.adc.results_f[2] * 10 / 1000;
-    packet_buf->hold_VCC_v       = pel_hw.adc.results_f[3] * 10 / 1000;
-    packet_buf->hold_VEE_v       = pel_hw.adc.results_f[4] * 10 / 1000;
+    packet_buf->notify_time       = xTaskGetTickCount();
+    packet_buf->raw_acs37030_vref = pel_hw.adc.results[0];
+    packet_buf->raw_i_out         = pel_hw.adc.results[1];
+    packet_buf->raw_output_vo     = pel_hw.adc.results[2];
+    packet_buf->raw_output_vc     = pel_hw.adc.results[3];
+    packet_buf->raw_output_ve     = pel_hw.adc.results[4];
+    packet_buf->acs37030_vref_mv  = pel_hw.adc.results_f[0];
+    packet_buf->i_out_mv          = pel_hw.adc.results_f[1];
+    packet_buf->output_vo_mv      = pel_hw.adc.results_f[2];
+    packet_buf->output_vc_mv      = pel_hw.adc.results_f[3];
+    packet_buf->output_ve_mv      = pel_hw.adc.results_f[4];
+
+    packet_buf->acs37030_vref_v     = packet_buf->acs37030_vref_mv / 1000;
+    packet_buf->hold_acs37030_out_v = packet_buf->i_out_mv * 10 / 1000;
+    packet_buf->hold_out_v          = packet_buf->output_vo_mv * 10 / 1000;
+    packet_buf->hold_vcc_v          = packet_buf->output_vc_mv * 10 / 1000;
+    packet_buf->hold_vee_v          = packet_buf->output_ve_mv * 10 / 1000;
+    packet_buf->acs37030_current_a  = (packet_buf->hold_acs37030_out_v - packet_buf->acs37030_vref_v) / 0.066;
+
    packet_buf->resis_pattern_id = load_config.resistor.pattern_index;
    packet_buf->resis_bitsmask   = load_config.resistor.resistor_mask;
    packet_buf->resis_g_value    = load_config.resistor.resistor_conductance;
-    packet_buf->val_1            = 0xFFFFFFFF;
-    packet_buf->val_2            = 0xFFFFFFFF;
-    packet_buf->val_3            = 0xFFFF;
-    ret_code_t ret               = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
-
-    // NRF_LOG_HEXDUMP_INFO(packet_buf,packet_len);
+    for (int i = 0; i < ARRAY_SIZE(packet_buf->payload); i++)
    {
-        char str[128];
-        snprintf(str, sizeof(str), "{%3d, %3d, %10lu, %10lu, %10lu, %10lu, %2.7f, %2.7f, %2.7f, %5d, 0x%04X, %.7f, %d}", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time, packet_buf->output_vo_raw, packet_buf->output_vc_raw, packet_buf->output_ve_raw, packet_buf->hold_OUT_v, packet_buf->hold_VCC_v, packet_buf->hold_VEE_v, packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
-        NRF_LOG_INFO("%s", str);
+        packet_buf->payload[i] = 0xFFFFFFFF;
    }
-}
+    ret_code_t ret = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));

-void test_gpio_task(void *pArg)
-{
-    const uint32_t pel_pins[] = {
-        INPUT_1_PIN,
-        INPUT_2_PIN,
-        INPUT_3_PIN,
-        INPUT_4_PIN,
-        INPUT_5_PIN,
-        INPUT_6_PIN,
-        INPUT_7_PIN,
-        INPUT_8_PIN,
-        INPUT_9_PIN,
-        INPUT_10_PIN,
-        INPUT_11_PIN,
-        INPUT_12_PIN,
-        ANODE_PIN,
-        CATHODE_PIN,
-        SAMPLE_R_PIN,
-        SAMPLE_V_PIN
-    };
-
-    for (;;)
+    if (DUMP_DATA)
    {
+        for (uint32_t i = 0; i < packet_len; i++)
+        {
+            NRF_LOG_RAW_INFO("%02X ", ((uint8_t *)packet_buf)[i]);
+        }
+        NRF_LOG_RAW_INFO("\r\n");

-        NRF_LOG_INFO("[test] all output pin set low");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
        {
-            nrf_gpio_pin_clear(pel_pins[i]);
-        }
-        vTaskDelay(1000);
+            char str[128];
+            snprintf(str, sizeof(str), "{%10d, %10d, %10lu,", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time);
+            NRF_LOG_INFO("%s", str);

-        NRF_LOG_INFO("[test] all output pin set high");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_set(pel_pins[i]);
-        }
-        vTaskDelay(1000);
+            snprintf(str, sizeof(str), " %10lu, %10lu, %10lu, %10lu, %10lu, %7.3f, %7.3f, %7.3f, %7.3f, %7.3f,", packet_buf->raw_acs37030_vref, packet_buf->raw_i_out, packet_buf->raw_output_vo, packet_buf->raw_output_vc, packet_buf->raw_output_ve, packet_buf->acs37030_vref_mv, packet_buf->i_out_mv, packet_buf->output_vo_mv, packet_buf->output_vc_mv, packet_buf->output_ve_mv);
+            NRF_LOG_INFO("%s", str);

-        NRF_LOG_INFO("[test] alternating high and low signals on all output pins");
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_clear(pel_pins[i]);
+            snprintf(str, sizeof(str), " %4.6f, %4.6f, %4.6f, %4.6f, %4.6f, %4.6f,", packet_buf->acs37030_vref_v, packet_buf->hold_acs37030_out_v, packet_buf->hold_out_v, packet_buf->hold_vcc_v, packet_buf->hold_vee_v, packet_buf->acs37030_current_a);
+            NRF_LOG_INFO("%s", str);
+
+            snprintf(str, sizeof(str), " %10d,     0x%04X, %3.7f, %d}", packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
+            NRF_LOG_INFO("%s", str);
        }
-        vTaskDelay(1000);
-        for (int i = 0; i < COUNTOF(pel_pins); i++)
-        {
-            nrf_gpio_pin_set(pel_pins[i]);
-            vTaskDelay(100);
-            nrf_gpio_pin_clear(pel_pins[i]);
-        }
-        vTaskDelay(1000);
    }
 }

-static void decode_and_set_resistor_pattern(uint8_t *param)
-{
-    uint16_t pattern_id = u8_to_u16(param[0], param[1]);
-
-    set_resistor_load_pattern(pattern_id);
-}
-
-static void decode_and_set_manual_resistor(uint8_t *param)
-{
-    uint16_t manual_val = u8_to_u16(param[0], param[1]);
-
-    set_resistor_load_bits(manual_val);
-}
-
 static void dev_mode_input_resistor(uint8_t *ins)
 {
    NRF_LOG_INFO("[DEV MODE] %s", __FUNCTION__);
@@ -349,36 +406,188 @@ static void dev_mode_input_resistor(uint8_t *ins)
        uint8_t ins_type : 4;
        uint8_t pkg_size;
        uint8_t mode;
-        uint8_t func_id;
-        uint8_t opcode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
        uint8_t param[];
    } *p_ins = (void *)ins;

-    switch (p_ins->opcode)
+    switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
    {
-        case 0x00:
+        case 0x0100:
+            // 3000FFFF 0100
            set_resistor_to_high_z();
            break;

-        case 0x01:
-            decode_and_set_resistor_pattern(p_ins->param);
+        case 0x0101: {
+            // 3000FFFF 0101 0001
+            uint16_t pattern_id = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+            set_resistor_load_pattern(pattern_id);
            break;
+        }

-        case 0x02:
-            decode_and_set_manual_resistor(p_ins->param);
+        case 0x0102: {
+            // 3000FFFF 0102 000F
+            uint16_t manual_val = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+            set_resistor_load_bits(manual_val);
            break;
+        }

        default:
            break;
    }
 }

+typedef struct
+{
+    uint32_t gpio;
+    const char *gpio_desc;
+} pin_map_entry_t;
+
+#define UNDEF_GPIO 0xFFFFFFFF
+static const pin_map_entry_t pin_to_gpio_table[64] = {
+    [1]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [2]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [3]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [4]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [5]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [6]  = { NRF_GPIO_PIN_MAP(0, 22), "GPIO(0, 22)" },
+    [7]  = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [8]  = { NRF_GPIO_PIN_MAP(0, 25), "GPIO(0, 25)" },
+    [9]  = { NRF_GPIO_PIN_MAP(0, 19), "GPIO(0, 19)" },
+    [10] = { NRF_GPIO_PIN_MAP(0, 21), "GPIO(0, 21)" },
+    [11] = { NRF_GPIO_PIN_MAP(1, 0), "GPIO(1, 0)" },
+    [12] = { NRF_GPIO_PIN_MAP(0, 18), "GPIO(0, 18)" },
+    [13] = { NRF_GPIO_PIN_MAP(0, 17), "GPIO(0, 17)" },
+    [14] = { NRF_GPIO_PIN_MAP(0, 20), "GPIO(0, 20)" },
+    [15] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [16] = { NRF_GPIO_PIN_MAP(0, 14), "GPIO(0, 14)" },
+    [17] = { NRF_GPIO_PIN_MAP(0, 13), "GPIO(0, 13)" },
+    [18] = { NRF_GPIO_PIN_MAP(0, 11), "GPIO(0, 11)" },
+    [19] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [20] = { NRF_GPIO_PIN_MAP(0, 15), "GPIO(0, 15)" },
+    [21] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [22] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [23] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [24] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [25] = { NRF_GPIO_PIN_MAP(1, 8), "GPIO(1, 8)" },
+    [26] = { NRF_GPIO_PIN_MAP(0, 12), "GPIO(0, 12)" },
+    [27] = { NRF_GPIO_PIN_MAP(0, 7), "GPIO(0, 7)" },
+    [28] = { NRF_GPIO_PIN_MAP(1, 9), "GPIO(1, 9)" },
+    [29] = { NRF_GPIO_PIN_MAP(0, 8), "GPIO(0, 8)" },
+    [30] = { NRF_GPIO_PIN_MAP(0, 6), "GPIO(0, 6)" },
+    [31] = { NRF_GPIO_PIN_MAP(0, 5), "GPIO(0, 5)" },
+    [32] = { NRF_GPIO_PIN_MAP(0, 27), "GPIO(0, 27)" },
+    [33] = { NRF_GPIO_PIN_MAP(0, 26), "GPIO(0, 26)" },
+    [34] = { NRF_GPIO_PIN_MAP(0, 4), "GPIO(0, 4)" },
+    [35] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [36] = { NRF_GPIO_PIN_MAP(0, 1), "GPIO(0, 1)" },
+    [37] = { NRF_GPIO_PIN_MAP(0, 29), "GPIO(0, 29)" },
+    [38] = { NRF_GPIO_PIN_MAP(0, 0), "GPIO(0, 0)" },
+    [39] = { NRF_GPIO_PIN_MAP(0, 31), "GPIO(0, 31)" },
+    [40] = { NRF_GPIO_PIN_MAP(1, 15), "GPIO(1, 15)" },
+    [41] = { NRF_GPIO_PIN_MAP(0, 2), "GPIO(0, 2)" },
+    [42] = { NRF_GPIO_PIN_MAP(0, 30), "GPIO(0, 30)" },
+    [43] = { NRF_GPIO_PIN_MAP(0, 28), "GPIO(0, 28)" },
+    [44] = { NRF_GPIO_PIN_MAP(1, 12), "GPIO(1, 12)" },
+    [45] = { NRF_GPIO_PIN_MAP(1, 14), "GPIO(1, 14)" },
+    [46] = { NRF_GPIO_PIN_MAP(0, 3), "GPIO(0, 3)" },
+    [47] = { NRF_GPIO_PIN_MAP(1, 13), "GPIO(1, 13)" },
+    [48] = { NRF_GPIO_PIN_MAP(1, 3), "GPIO(1, 3)" },
+    [49] = { NRF_GPIO_PIN_MAP(1, 10), "GPIO(1, 10)" },
+    [50] = { NRF_GPIO_PIN_MAP(1, 6), "GPIO(1, 6)" },
+    [51] = { NRF_GPIO_PIN_MAP(1, 11), "GPIO(1, 11)" },
+    [52] = { NRF_GPIO_PIN_MAP(0, 10), "GPIO(0, 10)" },
+    [53] = { NRF_GPIO_PIN_MAP(0, 9), "GPIO(0, 9)" },
+    [54] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [55] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [56] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [57] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [58] = { UNDEF_GPIO, "UNDEF_GPIO" },
+    [59] = { NRF_GPIO_PIN_MAP(1, 2), "GPIO(1, 2)" },
+    [60] = { NRF_GPIO_PIN_MAP(0, 24), "GPIO(0, 24)" },
+    [61] = { NRF_GPIO_PIN_MAP(0, 23), "GPIO(0, 23)" },
+    [62] = { NRF_GPIO_PIN_MAP(0, 16), "GPIO(0, 16)" },
+    [63] = { UNDEF_GPIO, "UNDEF_GPIO" },
+};
+
+static void set_single_pin_as_output(uint16_t pin_number, uint16_t high_low)
+{
+    const pin_map_entry_t *pin_entry = &pin_to_gpio_table[pin_number];
+
+    if (pin_entry->gpio == UNDEF_GPIO)
+    {
+        NRF_LOG_INFO("pin_number(%d) is not used", pin_number);
+        return;
+    }
+
+    if (high_low > 1) high_low = 1;
+    nrf_gpio_cfg_output(pin_entry->gpio);
+    nrf_gpio_pin_write(pin_entry->gpio, high_low);
+    NRF_LOG_INFO("pin_number(%d) = %d // pin_function_name: %s",
+                 pin_number,
+                 high_low,
+                 pin_entry->gpio_desc);
+}
+
+static void set_all_pins_as_output(uint16_t high_low)
+{
+    if (high_low > 1) high_low = 1;
+
+    for (uint16_t i = 1; i < ARRAY_SIZE(pin_to_gpio_table); i++)
+    {
+        if (pin_to_gpio_table[i].gpio != UNDEF_GPIO)
+        {
+            set_single_pin_as_output(i, high_low);
+        }
+    }
+}
+
+static void dev_mode_gpio(uint8_t *ins)
+{
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    switch (u8_to_u16(p_ins->dev_feat, p_ins->dev_feat_opcode))
+    {
+        case 0xA000: {
+            // 3000FFFF A000
+            // pelv30_default_gpio();
+            break;
+        }
+
+        case 0xA001: {
+            // 3000FFFF A001 0008 0001
+            uint16_t pin_number = uint16_big_decode(&p_ins->param[0]);
+            uint16_t high_low   = uint16_big_decode(&p_ins->param[2]);
+            set_single_pin_as_output(pin_number, high_low);
+            break;
+        }
+
+        case 0xA002: {
+            // 3000FFFF A002 0001
+            uint16_t high_low = uint16_big_decode(&p_ins->param[0]);
+            set_all_pins_as_output(high_low);
+            break;
+        }
+    }
+}
+
 static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
 {
    pel_config_t pel_cfg = {
        .anode_pin    = ANODE_PIN,
-        .cathode_pin  = CATHODE_PIN,
-        .smaple_r_pin = SAMPLE_R_PIN,
+        .ina_hi_pin   = INA_HI_PIN,
+        .smaple_i_pin = SAMPLE_I_PIN,
        .sample_v_pin = SAMPLE_V_PIN,
        .test_pin     = TP1_PIN,
        .mode         = BOARD_IOPx,
@@ -424,20 +633,14 @@ static void pel_pulse_start(void *p_arg)

    if (p_setting->is_pattern == true)
    {
-        nrf_gpio_pin_set(RELAY1_PIN);
        set_resistor_load_pattern(p_setting->pattern);
-        nrf_gpio_pin_clear(RELAY1_PIN);
    }
    else
    {
-        nrf_gpio_pin_set(RELAY1_PIN);
        set_resistor_load_bits(p_setting->bitmask);
-        nrf_gpio_pin_clear(RELAY1_PIN);
    }

-    nrf_gpio_pin_set(TP2_PIN);   // For testing
    start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
-    nrf_gpio_pin_clear(TP2_PIN); // For testing
 }

 static void pel_pulse_stop(void *p_arg)
@@ -528,25 +731,29 @@ static void pel_scan_mode_task(void *pvArg)

 static void dev_mode(uint8_t *ins, uint16_t size)
 {
+    NRF_LOG_INFO("%s", __FUNCTION__);
    struct __PACKED
    {
        uint8_t id       : 4;
        uint8_t ins_type : 4;
        uint8_t pkg_size;
        uint8_t mode;
-        uint8_t func_id;
-        uint8_t opcode;
+        uint8_t mode_opcode; // dev mode could ignore
+        uint8_t dev_feat;
+        uint8_t dev_feat_opcode;
        uint8_t param[];
    } *p_ins = (void *)ins;

-    global_memoryboard_id = p_ins->id;
-
-    switch (p_ins->func_id)
+    switch (p_ins->dev_feat)
    {
        case 0x01:
            dev_mode_input_resistor(ins);
            break;

+        case 0xA0:
+            dev_mode_gpio(ins);
+            break;
+
        default:
            break;
    }
@@ -554,6 +761,7 @@ static void dev_mode(uint8_t *ins, uint16_t size)

 static void manual_scan_mode(uint8_t *ins, uint16_t size)
 {
+    NRF_LOG_INFO("%s", __FUNCTION__);
    struct __PACKED
    {
        uint8_t id       : 4;
@@ -576,6 +784,8 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
            // 30 00 01 00
            pel_scan_msg.opcode = PEL_STOP;
            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            led_set(LED_IDLE_CONNECTED);
+            running = false;
            break;
        }

@@ -593,6 +803,8 @@ static void manual_scan_mode(uint8_t *ins, uint16_t size)
            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            running = true;
+            led_set(LED_REC);
            break;
        }

@@ -685,11 +897,15 @@ static void auto_scan_start_task(void *p_arg)

    auto_scan_start_handle = NULL;

+    running = false;
+    led_set(LED_IDLE_CONNECTED);
+
    vTaskDelete(NULL);
 }

 static void auto_scan_mode(uint8_t *ins, uint16_t size)
 {
+    NRF_LOG_INFO("%s", __FUNCTION__);
    struct __PACKED
    {
        uint8_t id       : 4;
@@ -720,6 +936,8 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
                vTaskDelete(auto_scan_start_handle);
                auto_scan_start_handle = NULL;
            }
+            running = false;
+            led_set(LED_IDLE_CONNECTED);
            taskEXIT_CRITICAL();
            break;
        }
@@ -735,11 +953,19 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
                    uint8_t payload[256];
                } param;

-                param.size = MIN(size, sizeof(param.payload)),
+                param.size = MIN(size, sizeof(param.payload));
                memcpy(param.payload, ins, param.size);
-                ASSERT(xTaskCreate(auto_scan_start_task, "auto_start", 256, &param, 4, &auto_scan_start_handle));
+
+                BaseType_t ret = xTaskCreate(auto_scan_start_task, "auto_start", 320, &param, 4, &auto_scan_start_handle);
+                if (ret != pdPASS)
+                {
+                    NRF_LOG_ERROR("auto_scan_start_task task not created.");
+                }
+
                // using a 100ms delay to ensure the parameter is copied to  to auto_scan_start_task()
                vTaskDelay(pdMS_TO_TICKS(100));
+                running = true;
+                led_set(LED_REC);
            }
            break;
        }
@@ -751,6 +977,7 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)

 static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
 {
+    NRF_LOG_INFO("%s", __FUNCTION__);
 #define R1  PEL_0P5R_MASK
 #define R2  PEL_1P0R_MASK
 #define R3  PEL_2P0R_MASK
@@ -842,16 +1069,70 @@ static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
    }
 }

-#define MANUAL_SCAN_MODE            0x01
-#define AUTO_SCAN_MODE              0x02
-#define R_EXTERNAL_CALIBRATION_MODE 0x03
+bool is_mode_running(void)
+{
+    return running;
+}
+
+static void dev_shiny_callback(TimerHandle_t xTimer)
+{
+    extern bool is_ble_connected(void);
+    if (!is_ble_connected())
+    {
+        led_set(LED_IDLE_DISCONNECTED);
+        return;
+    }
+
+    extern bool is_mode_running(void);
+    if (is_mode_running())
+    {
+        led_set(LED_REC);
+    }
+    else
+    {
+        led_set(LED_IDLE_CONNECTED);
+    }
+}
+
+#define DEV_SHINY_DELAY_MS 3000
+
+void start_dev_shiny_timer(void)
+{
+    if (dev_shiny_timer_handle == NULL)
+    {
+        dev_shiny_timer_handle = xTimerCreate("dev_shiny_timer",
+                                              pdMS_TO_TICKS(DEV_SHINY_DELAY_MS),
+                                              pdFALSE,
+                                              NULL,
+                                              dev_shiny_callback);
+
+        if (dev_shiny_timer_handle == NULL)
+        {
+            NRF_LOG_ERROR("dev_shiny_timer creation failed");
+            return;
+        }
+    }
+
+    if (xTimerStart(dev_shiny_timer_handle, 0) != pdPASS)
+    {
+        NRF_LOG_ERROR("dev_shiny_timer start failed");
+    }
+}
+
+static void vis_dev_shiny(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    led_set(LED_IDENTIFY_DEV);
+    start_dev_shiny_timer();
+}

 const elite_instance_t pel_elite_instance = {
    .cis_func = {
                 [CIS_VERSION] = cis_version,
                 },
    .vis_func = {
-                 [VIS_RST] = vis_rst,
+                 [VIS_RST]          = vis_rst,
+                 [VIS_DEVICE_SHINY] = vis_dev_shiny,
                 },
    .ris_func = {
                 [MANUAL_SCAN_MODE]            = manual_scan_mode,
@@ -877,6 +1158,8 @@ const elite_instance_t *pel_init(void)

    ASSERT(xTaskCreate(pel_scan_mode_task, "pel_scan_mode", 512, NULL, 4, NULL));

+    hot_swap_monitor_init();
+
    return &pel_elite_instance;
 }

@@ -24,7 +24,7 @@ pel_hw_t pel_hw = {
                     [OUTPUT_I_OUT_IDX]        = OUTPUT_I_OUT_CHANNEL,
                     [OUTPUT_VO_IDX]           = OUTPUT_VO_CHANNEL,
                     [OUTPUT_VC_IDX]           = OUTPUT_VC_CHANNEL,
-                     [OUTPUT_VE_IDX]           = OUTPUT_VE_CHANNEL},
+                     [OUTPUT_VE_IDX]           = OUTPUT_VE_CHANNEL },
    .adc.gain        = NRF_SAADC_GAIN1_6,
    .adc.smaple_time = NRF_SAADC_ACQTIME_3US
 };
@@ -93,26 +93,6 @@ void spim_xfer(uint32_t cs_pin,
 #define MAX_PULSE_WIDTH INT16_MAX
 #define MAX_PULSE_IDLE  INT16_MAX

-void set_anode_cathode_to_default(void)
-{
-    if (BOARD_IOPx == BOARD_IOPH)
-    {
-        nrf_gpio_pin_clear(ANODE_PIN);
-        nrf_gpio_pin_clear(SAMPLE_I_PIN);
-        nrf_gpio_pin_clear(SAMPLE_V_PIN);
-        nrf_gpio_pin_clear(TP1_PIN);
-        nrf_gpio_pin_clear(TP2_PIN);
-    }
-    else if (BOARD_IOPx == BOARD_IOPL)
-    {
-        nrf_gpio_pin_set(ANODE_PIN);
-        nrf_gpio_pin_clear(SAMPLE_I_PIN);
-        nrf_gpio_pin_clear(SAMPLE_V_PIN);
-        nrf_gpio_pin_clear(TP1_PIN);
-        nrf_gpio_pin_clear(TP2_PIN);
-    }
-}
-
 static void pel_saadc_init(pel_adc_t *p_adc)
 {
    /* stop ssadc */
@@ -204,10 +184,8 @@ void SAADC_IRQHandler(void)
 void pel_pulse_gen_init(pel_config_t cfg)
 {
    pel_hw.pulse_tmr->TASKS_STOP = 1;
-
    sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
    sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
-
    sd_nvic_DisableIRQ(SAADC_IRQn);
    sd_nvic_ClearPendingIRQ(SAADC_IRQn);

@@ -215,26 +193,50 @@ void pel_pulse_gen_init(pel_config_t cfg)
    pel_hw.adc.gain                 = cfg.gain;
    pel_hw.adc.smaple_time          = cfg.smaple_time;
    pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
-
    pel_saadc_init(&pel_hw.adc);

    // disable gpio task
-    for (int i = 0; i < 4; i++)
+    for (int i = 0; i < 5; i++)
    {
        nrf_gpiote_task_disable(i);
    }

-    set_anode_cathode_to_default();
-
    // config gpiote task
    nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
-    nrf_gpiote_task_configure(1, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-    nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(1, cfg.ina_hi_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(2, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);

-    if (cfg.test_pin != 0xFFFFFFFF)
-    {
-        nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
-    }
+    NRF_PPI->CH[0].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
+    NRF_PPI->CH[0].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // ina_hi_pin
+    NRF_PPI->CHENSET     = (1 << (0));
+
+    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
+    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // smaple_i_pin
+    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // sample_v_pin
+    NRF_PPI->CHENSET     = (1 << (1));
+
+    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
+    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
+    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+    NRF_PPI->CHENSET     = (1 << (2));
+
+    NRF_PPI->CH[3].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
+    NRF_PPI->CH[3].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
+    NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->CHENSET     = (1 << (3));
+
+    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
+    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
+    NRF_PPI->CHENSET   = (1 << (4));
+
+    NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
+    NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
+    NRF_PPI->CHENSET   = (1 << (5));
+
+    NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
+    NRF_PPI->CHENSET   = (1 << (6));

    // enable gpio task
    for (int i = 0; i < 4; i++)
@@ -242,37 +244,12 @@ void pel_pulse_gen_init(pel_config_t cfg)
        nrf_gpiote_task_enable(i);
    }

-    NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
-    NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
-    NRF_PPI->CHENSET   = (1 << (0));
-
-    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
-    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_i_pin
-    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
-    NRF_PPI->CHENSET     = (1 << (1));
-
-    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
-    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
-    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
-    NRF_PPI->CHENSET     = (1 << (2));
-
-    NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
-    NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
-    NRF_PPI->CHENSET   = (1 << (3));
-
-    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
-    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
-    NRF_PPI->CHENSET   = (1 << (4));
-
    if (cfg.test_pin != 0xFFFFFFFF)
    {
-        NRF_PPI->CH[6].EEP   = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
-        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
-        NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
-        NRF_PPI->CHENSET     = (1 << (6));
-        NRF_PPI->CH[7].EEP   = (uint32_t)&NRF_SAADC->EVENTS_END;
-        NRF_PPI->CH[7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
-        NRF_PPI->CHENSET     = (1 << (7));
+        nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+        NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4]; // test_pin
+        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
+        nrf_gpiote_task_enable(4);
    }

    pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
@@ -312,7 +289,7 @@ static void pel_pulse_gen_demo_task(void *p_arg)
 {
    pel_config_t pel_cfg = {
        .anode_pin    = ANODE_PIN,
-        .cathode_pin  = CATHODE_PIN,
+        .ina_hi_pin   = INA_HI_PIN,
        .smaple_i_pin = SAMPLE_I_PIN,
        .sample_v_pin = SAMPLE_V_PIN,
        .test_pin     = TP1_PIN,
@@ -347,7 +324,7 @@ void pel_pulse_gen_demo(void)
 }
 #endif

-void pel20_io_init(void)
+void pel30_io_init(void)
 {
    const uint32_t config_output_and_set[] = {
        INPUT_1_PIN,
@@ -391,14 +368,14 @@ void pel20_io_init(void)
    if (BOARD_IOPx == BOARD_IOPH)
    {
        nrf_gpio_pin_clear(ANODE_PIN);
-        nrf_gpio_pin_set(INA_HI_PIN);
+        nrf_gpio_pin_clear(INA_HI_PIN);
        nrf_gpio_pin_set(LED_IOPL_PIN);
        nrf_gpio_pin_clear(LED_IOPH_PIN);
    }
    else if (BOARD_IOPx == BOARD_IOPL)
    {
        nrf_gpio_pin_set(ANODE_PIN);
-        nrf_gpio_pin_clear(INA_HI_PIN);
+        nrf_gpio_pin_set(INA_HI_PIN);
        nrf_gpio_pin_clear(LED_IOPL_PIN);
        nrf_gpio_pin_set(LED_IOPH_PIN);
    }
@@ -0,0 +1,5 @@
+-----BEGIN EC PRIVATE KEY-----
+MHcCAQEEIEM6TVi/ofxCYEb2O9OYK4sNHlpwd0ZrW3yFOIeRJKqKoAoGCCqGSM49
+AwEHoUQDQgAEYUIRVGOQwmOEfsuYSufu4hHxRsQSUzh9lMBkvc3ewrPkpbfiXfa/
+vGyIM8HAY2Jemux9+FyFERXRjgj5RxOJAA==
+-----END EC PRIVATE KEY-----
@@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "."
+		},
+		{
+			"path": "../bmd380_sdk"
+		}
+	],
+	"settings": {}
+}
@@ -208,7 +208,6 @@
    <ClCompile Include="elite_mmm.c" />
    <ClCompile Include="fs.c" />
    <ClCompile Include="gd25d10c.c" />
-    <ClCompile Include="led_rgb.c" />
    <ClCompile Include="le_uart_srv.c" />
    <ClCompile Include="max14802.c" />
    <ClCompile Include="max5136.c" />
@@ -229,8 +228,6 @@
    <ClCompile Include="j_scop.c" />
    <ClCompile Include="pel.c" />
    <ClCompile Include="pel20_io.c" />
-    <ClCompile Include="pel_v3_0.c" />
-    <ClCompile Include="pel_v3_0_io.c" />
    <ClCompile Include="sw_drv.c" />
    <ClCompile Include="syscalls.c" />
    <ClCompile Include="tw1508.c" />
@@ -238,12 +235,9 @@
    <ClCompile Include="usbd.c" />
    <ClCompile Include="usbd_dfu_trigger.c" />
    <ClInclude Include="elite_mmm.h" />
-    <ClInclude Include="led_rgb.h" />
    <ClInclude Include="le_uart_srv.h" />
    <ClInclude Include="max14802.h" />
    <ClInclude Include="pel20_io.h" />
-    <ClInclude Include="pel_v3_0.h" />
-    <ClInclude Include="pel_v3_0_io.h" />
    <ClInclude Include="tw1508.h" />
    <ClInclude Include="uart_drv.h" />
    <ClInclude Include="usbd.h" />
@@ -1695,18 +1695,6 @@
    <ClCompile Include="uart.drv.c">
      <Filter>Source files</Filter>
    </ClCompile>
-    <ClCompile Include="elite_mmm.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
-    <ClCompile Include="pel_v3_0.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
-    <ClCompile Include="pel_v3_0_io.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
-    <ClCompile Include="led_rgb.c">
-      <Filter>Source files</Filter>
-    </ClCompile>
  </ItemGroup>
  <ItemGroup>
    <None Include="nRF52840_XXAA_S140_reserve.lds">
@@ -2080,18 +2068,6 @@
    <ClInclude Include="le_uart_srv.h">
      <Filter>Header files</Filter>
    </ClInclude>
-    <ClInclude Include="elite_mmm.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
-    <ClInclude Include="pel_v3_0.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
-    <ClInclude Include="pel_v3_0_io.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
-    <ClInclude Include="led_rgb.h">
-      <Filter>Header files</Filter>
-    </ClInclude>
  </ItemGroup>
  <ItemGroup>
    <Text Include="..\bmd380_sdk\external\segger_rtt\license\license.txt">
@@ -0,0 +1,47 @@
+# Call Cmake from the 'build' subfolder with the command below.
+# For using Make:
+# cmake -DCMAKE_MAKE_PROGRAM=make.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Unix Makefiles" ..
+# followed by
+# 'make' or 'cmake --build .' to build it
+#
+# For using Ninja:
+# cmake -DCMAKE_MAKE_PROGRAM=ninja.exe -DCMAKE_TOOLCHAIN_FILE="arm-none-eabi-gcc.cmake" -G "Ninja" ..
+# followed by
+# 'ninja' or 'cmake --build .' to build it
+
+set(CMAKE_SYSTEM_NAME Generic)
+set(CMAKE_SYSTEM_PROCESSOR arm)
+
+if(CMAKE_HOST_WIN32)
+    set(EXECUTESUFFIX ".exe")
+    set(ARM_TOOLCHAIN_DIR "C:/SysGCC/arm-eabi/bin")
+elseif(CMAKE_HOST_UNIX)
+    set(EXECUTESUFFIX "")
+    if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Darwin")
+        message(STATUS "Running on macOS")
+        set(ARM_TOOLCHAIN_DIR "/opt/homebrew/bin")
+    elseif(${CMAKE_HOST_SYSTEM_NAME} STREQUAL "Linux")
+        message(STATUS "Running on Linux (likely Ubuntu)")
+        set(ARM_TOOLCHAIN_DIR "/opt/arm-none-eabi/bin")
+    endif()
+else()
+    message(WARNING "Unknown host OS: ${CMAKE_HOST_SYSTEM_NAME}")
+endif()
+
+set(BINUTILS_PATH ${ARM_TOOLCHAIN_DIR}) 
+
+set(TOOLCHAIN_PREFIX arm-none-eabi-)
+
+set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+
+set(CMAKE_C_COMPILER    ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}gcc${EXECUTESUFFIX})
+set(CMAKE_ASM_COMPILER  ${CMAKE_C_COMPILER})
+set(CMAKE_CXX_COMPILER  ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}g++${EXECUTESUFFIX})
+set(CMAKE_LINKER        ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}ld${EXECUTESUFFIX})
+set(CMAKE_OBJCOPY       ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}objcopy${EXECUTESUFFIX} CACHE INTERNAL "objcopy tool")
+set(CMAKE_SIZE          ${ARM_TOOLCHAIN_DIR}/${TOOLCHAIN_PREFIX}size${EXECUTESUFFIX} CACHE INTERNAL "size tool")
+
+set(CMAKE_FIND_ROOT_PATH ${BINUTILS_PATH})
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
@@ -0,0 +1,21 @@
+cmake_minimum_required(VERSION 3.15.3)
+
+file(GLOB FREERTO_KERNEL_SOURCES "${NRF_SDK_DIR}/external/freertos/source/*.c")
+
+add_library(freertos OBJECT 
+    ${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52/port.c
+    ${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis.c
+    ${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52/port_cmsis_systick.c
+    ${NRF_SDK_DIR}/external/freertos/source/portable/MemMang/heap_4.c
+    ${FREERTO_KERNEL_SOURCES}
+)
+
+target_include_directories(freertos PUBLIC
+    ${NRF_SDK_DIR}/external/freertos/portable/CMSIS/nrf52
+    ${NRF_SDK_DIR}/external/freertos/portable/GCC/nrf52
+    ${NRF_SDK_DIR}/external/freertos/source/include
+)
+
+target_link_libraries(freertos PRIVATE 
+    prj_config
+)
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Roy_01	f4972e21f9	Merge branch 'dev/PELv2.0' into vscode	2025-08-29 17:25:17 +08:00
Roy_01	1bc166c936	config: switch project configuration to DEF_ELITE_DEV	2025-08-29 17:25:09 +08:00
Roy_01	6c323cb927	feat: PELv2.0 notify 120 bytes	2025-08-29 17:24:33 +08:00
Roy_01	116ec28fad	config: switch project configuration to PEL v2.0	2025-08-29 13:57:05 +08:00
Roy_01	a8caa10431	Merge branch 'dev/PELv3.0' into vscode	2025-08-29 10:10:08 +08:00
Roy_01	a6f3ed642e	config: switch project configuration to DEF_ELITE_DEV	2025-08-29 10:09:56 +08:00
Roy_01	f2da6d2624	feat: update PELv3.0 5-channel data(120 bytes)	2025-08-28 17:46:11 +08:00
Roy_01	74b967b5ab	style: add Black formatter for Python	2025-08-25 14:33:50 +08:00
Roy_01	cf99f4a2a2	fix: rename DEF_UART_ENABLED to DEF_UARTE_ENABLED	2025-08-20 16:35:18 +08:00
Roy_01	f1d30e5ab7	config: switch project configuration to PEL v3.0	2025-08-20 14:42:36 +08:00
Roy_01	a8f4f331d6	Merge branch 'dev/PELv3.0' into vscode	2025-08-13 17:35:03 +08:00
Roy_01	ecfaeec09a	config: switch project configuration to DEF_ELITE_DEV	2025-08-13 17:34:53 +08:00
Roy_01	7d5900b58b	fix: ADC pulse config	2025-08-12 15:44:20 +08:00
Roy_01	3603861e0e	feat: add INA_HI_PIN to ADC pulse process	2025-08-12 10:40:07 +08:00
Roy_01	e7cbc16a7b	config: switch project configuration to PEL v3.0	2025-08-12 09:38:57 +08:00
Roy_01	0f8b8b8454	Merge branch 'dev/PELv3.0' into vscode	2025-08-06 15:39:13 +08:00
Roy_01	0941c9b815	config: switch project configuration to DEF_ELITE_DEV	2025-08-06 15:39:00 +08:00
Roy_01	0f29e19c44	feat: 1. add GPIO feature in dev mode 2. update the dev_mode_input_resistor command	2025-08-06 15:38:23 +08:00
Roy_01	2c5c7e8a62	feat: rename file name and format code	2025-07-30 17:45:25 +08:00
Roy_01	26a02b23ec	feat: remove unused function and format code	2025-07-30 16:52:35 +08:00
Roy_01	271257f9bc	feat: update PELv3.0 LED and format code	2025-07-30 13:41:21 +08:00
Roy_01	18b07d05e6	fix: rename function and format code	2025-07-29 11:36:48 +08:00
Roy_01	097d589e09	config: switch project configuration to PEL v3.0	2025-07-28 16:21:24 +08:00
charles	2cb1f12c71	Merge branch 'cmake' into vscode	2025-07-23 22:28:11 +08:00
charles	07f80cdaf4	feat: integrate SPIM/TWI drivers and link math/standard libraries	2025-07-23 22:24:26 +08:00
Roy_01	b9cf000fe0	fix: renamed led_rgb.h and updated SDK file references	2025-07-23 16:03:28 +08:00
charles	100a4f5f91	Merge commit '7627b53a93b021b225cf1ee0350465407765accb' into vscode	2025-07-22 23:58:26 +08:00
charles	7627b53a93	feat: export OTA files to output folder after build	2025-07-22 23:58:15 +08:00
charles	6b3b2f0d10	Merge commit '0877359ecc027561f6ce37fddf3678f01e709b21' into vscode	2025-07-22 23:06:11 +08:00
charles	0877359ecc	feat: add CMake automation for OTA zip generation	2025-07-22 23:03:59 +08:00
Roy_01	f016799774	Merge branch 'develop/PELv3.0' into vscode	2025-07-17 16:29:57 +08:00
Roy_01	012e1458e1	config: switch project configuration to DEF_ELITE_DEV	2025-07-17 16:29:43 +08:00
Roy_01	fe5c814405	feat: updated dev_identify	2025-07-17 16:29:00 +08:00
Roy_01	7cf17ad98d	style: update LED macro	2025-07-17 16:27:23 +08:00
Roy_01	e6091b811e	feat: remove led_mode function	2025-07-17 16:25:57 +08:00
Roy_01	67ab93677a	feat: new RGB LED function	2025-07-17 16:24:26 +08:00
Roy_01	f1b34e1095	feat: updated load value	2025-07-17 16:20:05 +08:00
Roy_01	9e83dc9184	fix: 1.correct anode/sample_I/sample_V timing 2.include pel_v3_0.h for PELv3.0	2025-07-17 16:19:31 +08:00
Roy_01	73368f35a4	fix: fix memory leak by adjusting stack size from 256 to 320 (256 + 256/4)	2025-07-17 16:18:49 +08:00
Roy_01	b22c53e894	feat: new hot_swap_monitor	2025-07-17 16:18:21 +08:00
Roy_01	b725af593b	feat: updated RESET_PIN & CATHODE_PIN & HOT_SWAP_SIGNAL_PIN config	2025-07-17 16:17:43 +08:00
Roy_01	30a543f46a	feat: add and modify PEL v3.0 GPIO configuration	2025-07-17 16:16:42 +08:00
Roy_01	3c06aa717b	feat: new PEL v3.0 device code	2025-07-17 16:15:15 +08:00
Roy_01	f93ac23469	config: switch project configuration to PEL v3.0	2025-07-17 16:06:58 +08:00
Roy_01	492772a893	config: new DEF_ELITE_PEL_V3_0 config	2025-07-17 15:59:19 +08:00
chain40	ea69255b68	feat: porting for cmake prj	2025-07-16 01:03:40 +08:00
chang.chihchien	7512f2a002	feat: creat vscode workspace	2025-07-06 09:54:16 +08:00