wisetop/microchip-application-bmd380-bmd380_peripheral
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Merge branch 'dev/PELv3.0' into vscode

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This commit is contained in:
Roy_01
2025-08-13 17:35:03 +08:00
parent 0f8b8b8454 ecfaeec09a
commit a8f4f331d6
4 changed files with 47 additions and 72 deletions
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app/inc/elite_pel_v3_0.h
+2 -2
View File
@@ -12,9 +12,9 @@ extern "C"
#define VERSION_DATE_YEAR 25
#define VERSION_DATE_MONTH 8
#define VERSION_DATE_DAY 6
#define VERSION_DATE_DAY 12
#define VERSION_DATE_HOUR 15
#define VERSION_DATE_MINUTE 38
#define VERSION_DATE_MINUTE 44
#define PEL_0P5R_MASK (0x01 << 0)
#define PEL_1P0R_MASK (0x01 << 1)
app/inc/elite_pel_v3_0_io.h
+1 -1
View File
@@ -74,7 +74,7 @@ extern "C"
typedef struct
{
uint32_t anode_pin;
uint32_t cathode_pin;
uint32_t ina_hi_pin;
uint32_t smaple_i_pin;
uint32_t sample_v_pin;
uint32_t test_pin;
app/src/elite_pel_v3_0.c
+3 -5
View File
@@ -549,7 +549,7 @@ static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.ina_hi_pin = INA_HI_PIN,
.smaple_i_pin = SAMPLE_I_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
@@ -603,9 +603,7 @@ static void pel_pulse_start(void *p_arg)
set_resistor_load_bits(p_setting->bitmask);
}
nrf_gpio_pin_set(TP2_PIN); // For testing
start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
nrf_gpio_pin_clear(TP2_PIN); // For testing
}
static void pel_pulse_stop(void *p_arg)
@@ -901,7 +899,7 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
vTaskDelete(auto_scan_start_handle);
auto_scan_start_handle = NULL;
}
running = true;
running = false;
led_set(LED_IDLE_CONNECTED);
taskEXIT_CRITICAL();
break;
@@ -929,7 +927,7 @@ static void auto_scan_mode(uint8_t *ins, uint16_t size)
// using a 100ms delay to ensure the parameter is copied to to auto_scan_start_task()
vTaskDelay(pdMS_TO_TICKS(100));
running = false;
running = true;
led_set(LED_REC);
}
break;
app/src/elite_pel_v3_0_io.c
+41 -64
View File
@@ -93,26 +93,6 @@ void spim_xfer(uint32_t cs_pin,
#define MAX_PULSE_WIDTH INT16_MAX
#define MAX_PULSE_IDLE INT16_MAX
void set_anode_cathode_to_default(void)
{
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_clear(SAMPLE_I_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_clear(SAMPLE_I_PIN);
nrf_gpio_pin_clear(SAMPLE_V_PIN);
nrf_gpio_pin_clear(TP1_PIN);
nrf_gpio_pin_clear(TP2_PIN);
}
}
static void pel_saadc_init(pel_adc_t *p_adc)
{
/* stop ssadc */
@@ -204,10 +184,8 @@ void SAADC_IRQHandler(void)
void pel_pulse_gen_init(pel_config_t cfg)
{
pel_hw.pulse_tmr->TASKS_STOP = 1;
sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
sd_nvic_DisableIRQ(SAADC_IRQn);
sd_nvic_ClearPendingIRQ(SAADC_IRQn);
@@ -215,26 +193,50 @@ void pel_pulse_gen_init(pel_config_t cfg)
pel_hw.adc.gain = cfg.gain;
pel_hw.adc.smaple_time = cfg.smaple_time;
pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
pel_saadc_init(&pel_hw.adc);
// disable gpio task
for (int i = 0; i < 4; i++)
for (int i = 0; i < 5; i++)
{
nrf_gpiote_task_disable(i);
}
set_anode_cathode_to_default();
// config gpiote task
nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(1, cfg.ina_hi_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(2, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
nrf_gpiote_task_configure(3, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
if (cfg.test_pin != 0xFFFFFFFF)
{
nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
}
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // ina_hi_pin
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // smaple_i_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // sample_v_pin
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0];
NRF_PPI->FORK[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
NRF_PPI->CH[5].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[5].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->CHENSET = (1 << (5));
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CHENSET = (1 << (6));
// enable gpio task
for (int i = 0; i < 4; i++)
@@ -242,37 +244,12 @@ void pel_pulse_gen_init(pel_config_t cfg)
nrf_gpiote_task_enable(i);
}
NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->CHENSET = (1 << (0));
NRF_PPI->CH[1].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
NRF_PPI->CH[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_i_pin
NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
NRF_PPI->CHENSET = (1 << (1));
NRF_PPI->CH[2].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
NRF_PPI->CH[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
NRF_PPI->CHENSET = (1 << (2));
NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
NRF_PPI->CHENSET = (1 << (3));
NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
NRF_PPI->CHENSET = (1 << (4));
if (cfg.test_pin != 0xFFFFFFFF)
{
NRF_PPI->CH[6].EEP = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
NRF_PPI->CHENSET = (1 << (6));
NRF_PPI->CH[7].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
NRF_PPI->CH[7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
NRF_PPI->CHENSET = (1 << (7));
nrf_gpiote_task_configure(4, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
NRF_PPI->FORK[5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4]; // test_pin
NRF_PPI->CH[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[4];
nrf_gpiote_task_enable(4);
}
pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
@@ -312,7 +289,7 @@ static void pel_pulse_gen_demo_task(void *p_arg)
{
pel_config_t pel_cfg = {
.anode_pin = ANODE_PIN,
.cathode_pin = CATHODE_PIN,
.ina_hi_pin = INA_HI_PIN,
.smaple_i_pin = SAMPLE_I_PIN,
.sample_v_pin = SAMPLE_V_PIN,
.test_pin = TP1_PIN,
@@ -391,14 +368,14 @@ void pel30_io_init(void)
if (BOARD_IOPx == BOARD_IOPH)
{
nrf_gpio_pin_clear(ANODE_PIN);
nrf_gpio_pin_set(INA_HI_PIN);
nrf_gpio_pin_clear(INA_HI_PIN);
nrf_gpio_pin_set(LED_IOPL_PIN);
nrf_gpio_pin_clear(LED_IOPH_PIN);
}
else if (BOARD_IOPx == BOARD_IOPL)
{
nrf_gpio_pin_set(ANODE_PIN);
nrf_gpio_pin_clear(INA_HI_PIN);
nrf_gpio_pin_set(INA_HI_PIN);
nrf_gpio_pin_clear(LED_IOPL_PIN);
nrf_gpio_pin_set(LED_IOPH_PIN);
}