Merge branch 'dev/PELv3.0' into develp

config: switch project configuration to DEF_ELITE_DEV
feat: updated dev_identify
2025-07-15 10:41:14 +08:00 · 2025-07-15 10:41:00 +08:00 · 2025-07-14 16:03:49 +08:00 · 2025-07-14 14:33:08 +08:00 · 2025-07-11 16:13:01 +08:00 · 2025-07-10 14:15:30 +08:00
27 changed files with 2272 additions and 177 deletions
@@ -1,16 +1,13 @@
-#include "nrf_gpio.h"
-#include "nrf_log.h"
-#include "nrf_spim.h"
+#include "app_config.h"

+#if (DEF_APA102_2020_ENABLED)
 #include "apa102_2020.h"

+#include "elite_board.h"
+
 #include "FreeRTOS.h"
 #include "task.h"

-#if (DEF_APA102_2020_ENABLED)
-
-#define DISP_LED_COLOR 0
-
 typedef struct
 {
    uint8_t brightness : 5;
@@ -2,16 +2,17 @@
 #define __APA102_2020_H__

 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif

 #include "app_config.h"
-#include "elite_board.h"
-#include "led_drv_if.h"

 #if (DEF_APA102_2020_ENABLED)

-extern const led_drv_if_t apa102_drv;
+#include "led_drv_if.h"
+
+    extern const led_drv_if_t apa102_drv;

 #endif /* ! DEF_APA102_2020_ENABLED */

@@ -108,7 +108,9 @@ extern "C"
 #define DEF_ELITE_DEV                               0x00000000
 #define DEF_ELITE_EDC_V2_0                          0x00020109
 #define DEF_ELITE_PEL_V2_0                          0x00070001
+#define DEF_ELITE_PEL_V3_0                          0x00070002
 #define DEF_ELITE_CPG_V1_1                          0x00080001
+#define DEF_ELITE_MMM_V1_0                          0x00090001
 #define DEF_ELITE_MODEL                             DEF_ELITE_DEV

 #define DEF_ELITE_DEMO_W_SOFTDEVICE                 0
@@ -123,9 +125,10 @@ extern "C"

 #define DEF_TW1508_ENABLED      0

-#define DEF_LED_COUNT           0
 #define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0

 #define DEF_ADC_DRV_ENABLED     0
 #define DEF_ADS8691_ENABLED     0
@@ -148,6 +151,8 @@ extern "C"

 #define DEF_USBD_ENABLED        1

+#define DEF_UART_ENABLED        0
+
 #elif (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
 #define ELITE_DEVICE_NAME       "Elite-EDC"
 #define ELITE_HW_NAME           "Elite-EDCv2.0"
@@ -158,9 +163,10 @@ extern "C"

 #define DEF_TW1508_ENABLED      0

-#define DEF_LED_COUNT           12
 #define DEF_LED_DRV_ENABLED     1
+#define DEF_LED_COUNT           12
 #define DEF_APA102_2020_ENABLED 1
+#define DEF_RGB_ENABLED         0

 #define DEF_ADC_DRV_ENABLED     1
 #define DEF_ADS8691_ENABLED     1
@@ -183,6 +189,8 @@ extern "C"

 #define DEF_USBD_ENABLED        1

+#define DEF_UART_ENABLED        0
+
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
 #define BOARD_IOPH              1
 #define BOARD_IOPL              0
@@ -197,9 +205,10 @@ extern "C"

 #define DEF_TW1508_ENABLED      0

-#define DEF_LED_COUNT           0
 #define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0

 #define DEF_ADC_DRV_ENABLED     1
 #define DEF_ADS8691_ENABLED     0
@@ -222,6 +231,50 @@ extern "C"

 #define DEF_USBD_ENABLED        1

+#define DEF_UART_ENABLED        0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#define BOARD_IOPH              1
+#define BOARD_IOPL              0
+
+#define ELITE_DEVICE_NAME       "Elite-PEL"
+#define ELITE_HW_NAME           "Elite-PELv3.0"
+#define BOARD_IOPx              BOARD_IOPH
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    7
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    2
+
+#define DEF_TW1508_ENABLED      0
+
+#define DEF_LED_DRV_ENABLED     1
+#define DEF_LED_COUNT           1
+#define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         1
+
+#define DEF_ADC_DRV_ENABLED     1
+#define DEF_ADS8691_ENABLED     0
+#define DEF_BULTIN_ADC_ENABED   1
+
+#define DEF_DAC_DRV_ENABLED     0
+#define DEF_MAX5136_ENABLED     0
+
+#define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
+#define DEF_ADGS1412_ENABLED    0
+
+#define DEF_FS_ENABLED          0
+#define DEF_FS_RTT_DIR          0
+#define DEF_GD25D10C_ENABLED    0
+
+#define DEF_BTN_ENABLED         0
+
+#define DEF_RTT_JSCOP_ENABLED   0
+
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UART_ENABLED        0
+
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #define ELITE_DEVICE_NAME       "Elite-CPG"
 #define ELITE_HW_NAME           "Elite-CPGv1.1"
@@ -232,9 +285,10 @@ extern "C"

 #define DEF_TW1508_ENABLED      1

-#define DEF_LED_COUNT           0
 #define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
 #define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0

 #define DEF_ADC_DRV_ENABLED     0
 #define DEF_ADS8691_ENABLED     0
@@ -257,6 +311,46 @@ extern "C"

 #define DEF_USBD_ENABLED        1

+#define DEF_UARTE_ENABLED       0
+
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+#define ELITE_DEVICE_NAME       "Elite-MMM"
+#define ELITE_HW_NAME           "Elite-MMM"
+#define MAJOR_PRODUCT_NUMBER    0
+#define MINOR_PRODUCT_NUMBER    9
+#define MAJOR_VERSION_NUMBER    0
+#define MINOR_VERSION_NUMBER    1
+
+#define DEF_TW1508_ENABLED      0
+
+#define DEF_LED_DRV_ENABLED     0
+#define DEF_LED_COUNT           0
+#define DEF_APA102_2020_ENABLED 0
+#define DEF_RGB_ENABLED         0
+
+#define DEF_ADC_DRV_ENABLED     0
+#define DEF_ADS8691_ENABLED     0
+#define DEF_BULTIN_ADC_ENABED   0
+
+#define DEF_DAC_DRV_ENABLED     0
+#define DEF_MAX5136_ENABLED     0
+
+#define DEF_SW_DRV_ENABLED      0
+#define DEF_MAX14802_ENABLED    0
+#define DEF_ADGS1412_ENABLED    0
+
+#define DEF_FS_ENABLED          0
+#define DEF_FS_RTT_DIR          0
+#define DEF_GD25D10C_ENABLED    0
+
+#define DEF_BTN_ENABLED         0
+
+#define DEF_RTT_JSCOP_ENABLED   0
+
+#define DEF_USBD_ENABLED        1
+
+#define DEF_UARTE_ENABLED       1
+
 #endif

 #define BLE_ELITE_SRV_ENABLED   1
@@ -294,7 +388,6 @@ extern "C"
 #define BLE_UART_SRV_ENABLED                       1
 #define BLE_UART_OBSERVER_PRIO                     3
 #define NRF_UARTE_ENABLED                          1
-#define DEF_UARTE_ENABLED                          1

 // DFU
 #define NRF_DFU_TRANSPORT_BLE                      1
@@ -205,8 +205,10 @@
    <ClCompile Include="dac_drv.c" />
    <ClCompile Include="elite_dev.c" />
    <ClCompile Include="edc20_cycle_iv_mode.c" />
+    <ClCompile Include="elite_mmm.c" />
    <ClCompile Include="fs.c" />
    <ClCompile Include="gd25d10c.c" />
+    <ClCompile Include="led_rgb.c" />
    <ClCompile Include="le_uart_srv.c" />
    <ClCompile Include="max14802.c" />
    <ClCompile Include="max5136.c" />
@@ -227,15 +229,21 @@
    <ClCompile Include="j_scop.c" />
    <ClCompile Include="pel.c" />
    <ClCompile Include="pel20_io.c" />
+    <ClCompile Include="pel_v3_0.c" />
+    <ClCompile Include="pel_v3_0_io.c" />
    <ClCompile Include="sw_drv.c" />
    <ClCompile Include="syscalls.c" />
    <ClCompile Include="tw1508.c" />
    <ClCompile Include="uart.drv.c" />
    <ClCompile Include="usbd.c" />
    <ClCompile Include="usbd_dfu_trigger.c" />
+    <ClInclude Include="elite_mmm.h" />
+    <ClInclude Include="led_rgb.h" />
    <ClInclude Include="le_uart_srv.h" />
    <ClInclude Include="max14802.h" />
    <ClInclude Include="pel20_io.h" />
+    <ClInclude Include="pel_v3_0.h" />
+    <ClInclude Include="pel_v3_0_io.h" />
    <ClInclude Include="tw1508.h" />
    <ClInclude Include="uart_drv.h" />
    <ClInclude Include="usbd.h" />
@@ -1695,6 +1695,18 @@
    <ClCompile Include="uart.drv.c">
      <Filter>Source files</Filter>
    </ClCompile>
+    <ClCompile Include="elite_mmm.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="pel_v3_0.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="pel_v3_0_io.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
+    <ClCompile Include="led_rgb.c">
+      <Filter>Source files</Filter>
+    </ClCompile>
  </ItemGroup>
  <ItemGroup>
    <None Include="nRF52840_XXAA_S140_reserve.lds">
@@ -2068,6 +2080,18 @@
    <ClInclude Include="le_uart_srv.h">
      <Filter>Header files</Filter>
    </ClInclude>
+    <ClInclude Include="elite_mmm.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="pel_v3_0.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="pel_v3_0_io.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
+    <ClInclude Include="led_rgb.h">
+      <Filter>Header files</Filter>
+    </ClInclude>
  </ItemGroup>
  <ItemGroup>
    <Text Include="..\bmd380_sdk\external\segger_rtt\license\license.txt">
@@ -104,8 +104,12 @@ static BtnEvent_t btn_event(void)
 static void btn_event_shortx1_cb(void)
 {
    NRF_LOG_INFO("BTN_EVENT_SHORTx1");
+#if (DEF_APA102_2020_ENABLED)
    const struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
-    static int idx                  = 0;
+#elif (DEF_RGB_ENABLED)
+    const struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
+#endif
+    static int idx = 0;
    led_set(color[idx++ % COUNTOF(color)]);
 }

@@ -119,7 +123,7 @@ static void btn_event_shortx2_cb(void)
        led_set(LED_BLUE);
        vTaskDelay(pdMS_TO_TICKS(250));
    }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }

 static void btn_event_shortx3_cb(void)
@@ -131,21 +135,25 @@ static void btn_event_shortx3_cb(void)
        vTaskDelay(pdMS_TO_TICKS(250));
        led_set(LED_CYAN);
        vTaskDelay(pdMS_TO_TICKS(250));
-        led_set(LED_IDEL_DISCONNECT);
+        led_set(LED_IDLE_DISCONNECTED);
    }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }

 static void btn_event_long(void)
 {
    NRF_LOG_INFO("BTN_EVENT_LONG");
+#if (DEF_APA102_2020_ENABLED)
    led_set(LED_ORANGE);
+#elif (DEF_RGB_ENABLED)
+    led_set(LED_YELLOW);
+#endif
    if (!wait_released(TIME_PRESS_LONG))
    {
        led_set(LED_OFF);
        elite_board_power_off();
    }
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
 }

 static void btn_task(void *pvArg)
@@ -190,5 +198,3 @@ void btn_init(void)
 }

 #endif /* ! DEF_BTN_ENABLED */
-
-
@@ -1,20 +1,24 @@
 #include "app_config.h"
-#include "elite_board.h"
-
-#include "edc.h"
-#include "elite.h"
-#include "elite_adc.h"
-#include "elite_correction.h"
-#include "elite_dac.h"
+#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)

 #include "adc_drv.h"
 #include "dac_drv.h"
+#include "edc.h"
+#include "elite.h"
+#include "elite_adc.h"
+#include "elite_board.h"
+#include "elite_correction.h"
+#include "elite_dac.h"
 #include "led_drv.h"
 #include "sw_drv.h"

 #include "nrf_log.h"

-#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
+#include "timers.h"
+
+#define DEV_IDENTIFICATION_DELAY_MS 3000
+
+static TimerHandle_t dev_identify_timer_handle = NULL;

 extern ret_code_t le_event_update(uint8_t *p_value, uint16_t len);

@@ -913,22 +917,58 @@ static void vis_rst(uint8_t *ins, uint16_t size)

    uint16_t volt = Usercode_Correction_to_DAC(edc.instru.VoutGainLv, 25000);
    dac_write_through(DAC0, volt);
-
-    led_mode(NO_EVENT);
 }
 static void vis_sti(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
 static void vis_int(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }

-static void vis_device_shiny(uint8_t *ins, uint16_t size)
+static void device_identification_callback(TimerHandle_t xTimer)
 {
-    NRF_LOG_INFO("%s", __FUNCTION__);
-    led_set(LED_IDENTICY_DEV);
+    extern bool is_ble_connected(void);
+    if (!is_ble_connected())
+    {
+        led_set(LED_IDLE_DISCONNECTED);
+        return;
+    }
+
+    extern bool is_mode_running(void);
+    if (is_mode_running())
+    {
+        led_set(LED_REC);
+    }
+    else
+    {
+        led_set(LED_IDLE_CONNECTED);
+    }
 }

-static void vis_shiny_dis(uint8_t *ins, uint16_t size)
+void start_device_identification_timer(void)
+{
+    if (dev_identify_timer_handle == NULL)
+    {
+        dev_identify_timer_handle = xTimerCreate("dev_identify_timer",
+                                                 pdMS_TO_TICKS(DEV_IDENTIFICATION_DELAY_MS),
+                                                 pdFALSE,
+                                                 NULL,
+                                                 device_identification_callback);
+
+        if (dev_identify_timer_handle == NULL)
+        {
+            NRF_LOG_ERROR("dev_identify_timer creation failed");
+            return;
+        }
+    }
+
+    if (xTimerStart(dev_identify_timer_handle, 0) != pdPASS)
+    {
+        NRF_LOG_ERROR("dev_identify_timer start failed");
+    }
+}
+
+static void vis_dev_shiny(uint8_t *ins, uint16_t size)
 {
    NRF_LOG_INFO("%s", __FUNCTION__);
-    led_set(LED_IDEL_CONNECTED);
+    led_set(LED_IDENTIFY_DEV);
+    start_device_identification_timer();
 }

 static void curve_iv(uint8_t *ins, uint16_t size) { NRF_LOG_INFO("%s", __FUNCTION__); }
@@ -970,8 +1010,7 @@ elite_instance_t edc20_elite_instance = {
                 [VIS_RST]          = vis_rst,
                 [VIS_STI]          = vis_sti,
                 [VIS_INT]          = vis_int,
-                 [VIS_DEVICE_SHINY] = vis_device_shiny,
-                 [VIS_SHINY_DIS]    = vis_shiny_dis,
+                 [VIS_DEVICE_SHINY] = vis_dev_shiny,
                 },
    .ris_func = {
                 [CURVE_IV]                  = curve_iv,
@@ -311,6 +311,7 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
        NRF_LOG_INFO("%s", info);
    }

+    led_set(LED_REC);
    dac_write_through(OUT_0, mV_out_0(&dac_param));

    dac_param.mV_output = dac_param.mV_start;
@@ -350,6 +351,7 @@ static void edc20_cycle_iv_mode_task(void *p_arg)
    edc20_dac_tim_stop();
    edc20_adc_tim_stop();
    dac_init();
+    led_set(LED_IDLE_CONNECTED);

    if (1)
    {
@@ -445,6 +447,11 @@ static uint32_t convt_uS_step(uint32_t idx)
    }
 }

+bool is_mode_running(void)
+{
+    return running;
+}
+
 void edc20_cycle_iv_mode_start(uint8_t *ins, uint16_t size)
 {
    /*
@@ -6,8 +6,12 @@
 #include "edc.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
 #include "pel.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#include "pel_v3_0.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #include "cpg.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+#include "elite_mmm.h"
 #else
 #error "Unknown DEF_ELITE_MODEL"
 #endif
@@ -107,8 +111,12 @@ void elite_init(void)
    p_instance = edc.p_elite_instance;
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
    p_instance = pel_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    p_instance = pel_init();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
    p_instance = cpg_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+    p_instance = mmm_init();
 #else
 #error "Unknown DEF_ELITE_MODEL"
 #endif
@@ -6,6 +6,8 @@ void elite_board_init(void)
    edc20_io_init();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
    pel20_io_init();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    pel20_io_init();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
    cpg11_io_init();
 #endif
@@ -20,6 +22,9 @@ void elite_board_demo(void)
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
    extern void pel_pulse_gen_demo(void);
    pel_pulse_gen_demo();
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+    extern void pel_pulse_gen_demo(void);
+    pel_pulse_gen_demo();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
    cpg_pulse_default_demo_ext();
 #endif
@@ -32,6 +37,7 @@ void elite_board_power_off(void)
 #if (DEF_ELITE_MODEL == DEF_ELITE_EDC_V2_0)
    edc20_io_power_off();
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #endif
 }
@@ -40,7 +46,7 @@ void elite_drv_init(void)
 {
    btn_init();
    led_init();
-    led_set(LED_IDEL_DISCONNECT);
+    led_set(LED_IDLE_DISCONNECTED);
    sw_init();
    adc_init();
    dac_init();
@@ -21,8 +21,11 @@ extern "C"
 #include "edc20_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V2_0)
 #include "pel20_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#include "pel_v3_0_io.h"
 #elif (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
 #include "cpg11_io.h"
+#elif (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
 #else
 #error "Not implemented xxx_io.h"
 #endif
@@ -2,7 +2,8 @@
 #define __ELITE_DEF_H__

 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif

 #include <stdint.h>
@@ -20,32 +21,32 @@ extern "C" {
 #define VIS_DEVICE_SHINY 0x10
 #define VIS_SHINY_DIS    0x20

-// RIS (real instruction)
-enum all_mode_e
-{
-    CURVE_IV                  = 0x01, // I-V Curve
-    CURVE_IV_CY               = 0x02, // Cycle I-V
-    CURVE_VO                  = 0x03, // Function Generator
-    CURVE_RT                  = 0x04, // R-T Graph
-    CURVE_VT                  = 0x05, // V-T Graph
-    CURVE_IT                  = 0x06, // I-T Graph
-    CURVE_CC                  = 0x07, // Constant Current (CC)
-    CURVE_OCP                 = 0x08, // Open Circuit Potential (OCP)
-    CURVE_CV                  = 0x09, // Cyclic Voltammetry (CV)
-    CURVE_LSV                 = 0x0A, // Linear Sweep Voltammetry (LSV)
-    CURVE_CA                  = 0x0B, // Chronoamperometric Graph (CA)
-    CURVE_CP                  = 0x0C, // Chronopotentiometry (CP)
-    CURVE_UNI_PULSE           = 0x0D, // Pulse Sensing (universal pulse)
-    CURVE_DPV                 = 0x0E, // Differential Pulse Voltammetry (DPV)
-    CURVE_DPV_ADVANCE         = 0x0F,
-    CURVE_DPV_SMPRATE         = 0x10,
-    CURVE_DPV_ADVANCE_SMPRATE = 0x11,
-    CURVE_EIS                 = 0x12,
-    CURVE_CF                  = 0x13, // Constant Frequency(CF)
-    CURVE_CALI                = 0xF1,
-    SET_SAMPLE_RATE           = 0xE0,
-    DEV_MODE                  = 0xFF, // Develop Mode
-};
+    // RIS (real instruction)
+    enum all_mode_e
+    {
+        CURVE_IV                  = 0x01, // I-V Curve
+        CURVE_IV_CY               = 0x02, // Cycle I-V
+        CURVE_VO                  = 0x03, // Function Generator
+        CURVE_RT                  = 0x04, // R-T Graph
+        CURVE_VT                  = 0x05, // V-T Graph
+        CURVE_IT                  = 0x06, // I-T Graph
+        CURVE_CC                  = 0x07, // Constant Current (CC)
+        CURVE_OCP                 = 0x08, // Open Circuit Potential (OCP)
+        CURVE_CV                  = 0x09, // Cyclic Voltammetry (CV)
+        CURVE_LSV                 = 0x0A, // Linear Sweep Voltammetry (LSV)
+        CURVE_CA                  = 0x0B, // Chronoamperometric Graph (CA)
+        CURVE_CP                  = 0x0C, // Chronopotentiometry (CP)
+        CURVE_UNI_PULSE           = 0x0D, // Pulse Sensing (universal pulse)
+        CURVE_DPV                 = 0x0E, // Differential Pulse Voltammetry (DPV)
+        CURVE_DPV_ADVANCE         = 0x0F,
+        CURVE_DPV_SMPRATE         = 0x10,
+        CURVE_DPV_ADVANCE_SMPRATE = 0x11,
+        CURVE_EIS                 = 0x12,
+        CURVE_CF                  = 0x13, // Constant Frequency(CF)
+        CURVE_CALI                = 0xF1,
+        SET_SAMPLE_RATE           = 0xE0,
+        DEV_MODE                  = 0xFF, // Develop Mode
+    };

 // CIS (control instruction)
 #define CIS_VERSION        0x40
@@ -62,7 +63,7 @@ enum all_mode_e
 #define CTL_RD_ADC         0x7A
 #define CTL_RESET          0x11

-// mode parameter
+    // mode parameter

 #define VMAX(v1, v2)       ((v1 >= v2) ? v1 : v2)
 #define VMIN(v1, v2)       ((v1 < v2) ? v1 : v2)
@@ -100,18 +101,12 @@ enum all_mode_e
 #define COLOR_WHITE        0x09
 #define COLOR_YELLOWGREEN  0x0A

-#define BT_WAIT            0x01
-#define NO_EVENT           0x02
-#define PRE_WORK           0x03
-#define WORKING            0x04
-#define POST_WORK          0x05
-
-typedef struct
-{
-    void (*cis_func[256])(uint8_t *ins, uint16_t size);
-    void (*vis_func[256])(uint8_t *ins, uint16_t size);
-    void (*ris_func[256])(uint8_t *ins, uint16_t size);
-} elite_instance_t;
+    typedef struct
+    {
+        void (*cis_func[256])(uint8_t *ins, uint16_t size);
+        void (*vis_func[256])(uint8_t *ins, uint16_t size);
+        void (*ris_func[256])(uint8_t *ins, uint16_t size);
+    } elite_instance_t;

 #ifdef __cplusplus
 }
@@ -0,0 +1,256 @@
+#include "elite_mmm.h"
+
+#include "nrf_gpio.h"
+#include "nrf_log.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_MMM_V1_0)
+
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  6
+#define VERSION_DATE_DAY    4
+#define VERSION_DATE_HOUR   16
+#define VERSION_DATE_MINUTE 44
+static void cis_version(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    uint8_t cis_ver[] = {
+        CIS_VERSION,
+        VERSION_DATE_YEAR,
+        VERSION_DATE_MONTH,
+        VERSION_DATE_DAY,
+        VERSION_DATE_HOUR,
+        VERSION_DATE_MINUTE,
+    };
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)cis_ver, sizeof(cis_ver));
+}
+
+static void vis_rst(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+}
+
+#define UNDEF_GPIO 0xFFFFFFFF
+
+// The GPIO corresponding to the pin
+const uint32_t pin_to_gpio_table[] = {
+    [6]  = NRF_GPIO_PIN_MAP(0, 22),
+    [8]  = NRF_GPIO_PIN_MAP(0, 25),
+    [9]  = NRF_GPIO_PIN_MAP(0, 19),
+    [10] = NRF_GPIO_PIN_MAP(0, 21),
+    [11] = NRF_GPIO_PIN_MAP(1, 00),
+    [12] = NRF_GPIO_PIN_MAP(0, 18),
+    [13] = NRF_GPIO_PIN_MAP(0, 17),
+    [14] = NRF_GPIO_PIN_MAP(0, 20),
+    [16] = NRF_GPIO_PIN_MAP(0, 14),
+    [17] = NRF_GPIO_PIN_MAP(0, 13),
+    [18] = NRF_GPIO_PIN_MAP(0, 11),
+    [20] = NRF_GPIO_PIN_MAP(0, 15),
+    [25] = NRF_GPIO_PIN_MAP(1, 8),
+    [26] = NRF_GPIO_PIN_MAP(0, 12),
+    [27] = NRF_GPIO_PIN_MAP(0, 7),
+    [28] = NRF_GPIO_PIN_MAP(1, 9),
+    [29] = NRF_GPIO_PIN_MAP(0, 8),
+    [30] = NRF_GPIO_PIN_MAP(0, 6),
+    [31] = NRF_GPIO_PIN_MAP(0, 5),
+    [32] = NRF_GPIO_PIN_MAP(0, 27),
+    [33] = NRF_GPIO_PIN_MAP(0, 26),
+    [34] = NRF_GPIO_PIN_MAP(0, 4),
+    [36] = NRF_GPIO_PIN_MAP(0, 1),
+    [37] = NRF_GPIO_PIN_MAP(0, 29),
+    [38] = NRF_GPIO_PIN_MAP(0, 0),
+    [39] = NRF_GPIO_PIN_MAP(0, 31),
+    [40] = NRF_GPIO_PIN_MAP(1, 15),
+    [41] = NRF_GPIO_PIN_MAP(0, 2),
+    [42] = NRF_GPIO_PIN_MAP(0, 30),
+    [43] = NRF_GPIO_PIN_MAP(0, 28),
+    [44] = NRF_GPIO_PIN_MAP(1, 12),
+    [45] = NRF_GPIO_PIN_MAP(1, 14),
+    [46] = NRF_GPIO_PIN_MAP(0, 3),
+    [47] = NRF_GPIO_PIN_MAP(1, 13),
+    [48] = NRF_GPIO_PIN_MAP(1, 3),
+    [49] = NRF_GPIO_PIN_MAP(1, 10),
+    [50] = NRF_GPIO_PIN_MAP(1, 6),
+    [51] = NRF_GPIO_PIN_MAP(1, 11),
+    [52] = NRF_GPIO_PIN_MAP(0, 10),
+    [53] = NRF_GPIO_PIN_MAP(0, 9),
+    [59] = NRF_GPIO_PIN_MAP(1, 2),
+    [60] = NRF_GPIO_PIN_MAP(0, 24),
+    [61] = NRF_GPIO_PIN_MAP(0, 23),
+    [62] = NRF_GPIO_PIN_MAP(0, 16),
+};
+
+static uint32_t bmd380pins_convert_to_gpio(uint32_t pin)
+{
+    uint32_t gpio;
+
+    switch (pin)
+    {
+        case 6:
+        case 8:
+        case 9:
+        case 10:
+        case 11:
+        case 12:
+        case 13:
+        case 14:
+        case 16:
+        case 17:
+        case 18:
+        case 20:
+        case 25:
+        case 26:
+        case 27:
+        case 28:
+        case 29:
+        case 30:
+        case 31:
+        case 32:
+        case 33:
+        case 34:
+        case 36:
+        case 37:
+        case 38:
+        case 39:
+        case 40:
+        case 41:
+        case 42:
+        case 43:
+        case 44:
+        case 45:
+        case 46:
+        case 47:
+        case 48:
+        case 49:
+        case 50:
+        case 51:
+        case 52:
+        case 53:
+        case 59:
+        case 60:
+        case 61:
+        case 62:
+            gpio = pin_to_gpio_table[pin];
+            break;
+        default:
+            gpio = UNDEF_GPIO;
+            NRF_LOG_INFO("UNDEF_GPIO: pin %d can't convert to gpio number", pin);
+            break;
+    }
+
+    return gpio;
+}
+
+static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low)
+{
+    uint32_t gpio = bmd380pins_convert_to_gpio(pin);
+
+    if (gpio != UNDEF_GPIO)
+    {
+        nrf_gpio_cfg_output(gpio);
+        nrf_gpio_pin_write(gpio, high_low);
+        NRF_LOG_INFO("set pin %d (gpio %d) = %d", pin, gpio, high_low);
+    }
+}
+
+/*
+    dev_mode_gpio_function
+    (1)0x3000FFA000ppss
+            -func: set_bmd380_pin_signal
+            -pp: pin number     06h-3Fh
+                06h: P0.22_GPIO
+                08h: P0.25_GPIO
+                ......
+                3Eh: P0.16_GPIO
+            -ss: signal         00h-01h
+                00h: low
+                01h: high
+
+    (2)0x3000FFA001ss
+        -func: set_bmd380 all pin signal high/low
+        -ss: signal         00h-01h
+            00h: low
+            01h: high
+*/
+void dev_mode_gpio_function(uint8_t *ins)
+{
+    struct __PACKED
+    {
+        uint8_t id     : 4;
+        uint8_t        : 4;
+        uint16_t magic : 16;
+        uint8_t dev_opcode;
+        uint8_t gpio_function_opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    switch (p_ins->gpio_function_opcode)
+    {
+        case 0x00: {
+            uint32_t pin      = p_ins->param[0];
+            uint32_t high_low = p_ins->param[1];
+            set_bmd380_pin_signal(pin, high_low);
+            break;
+        }
+
+        case 0x01: {
+            uint32_t high_low    = p_ins->param[0];
+            uint32_t set_pin[44] = { 6, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61, 62 };
+
+            for (int i = 0; i < sizeof(set_pin) / sizeof(set_pin[0]); i++)
+            {
+                set_bmd380_pin_signal(set_pin[i], high_low);
+            }
+            break;
+        }
+    }
+}
+
+#define MAGIC_NUM 0xFF00
+static void dev_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id     : 4;
+        uint8_t        : 4;
+        uint16_t magic : 16;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    if (p_ins->magic != MAGIC_NUM)
+    {
+        return;
+    }
+
+    // TODO...
+    switch (p_ins->opcode)
+    {
+        case 0xA0:
+            dev_mode_gpio_function(ins);
+            break;
+
+        default:
+            break;
+    }
+}
+
+const elite_instance_t mmm_elite_instance = {
+    .cis_func = {
+                 [CIS_VERSION] = cis_version,
+                 },
+    .vis_func = {
+                 [VIS_RST] = vis_rst,
+                 },
+    .ris_func = {
+                 [DEV_MODE] = dev_mode,
+                 }
+};
+
+const elite_instance_t *mmm_init(void)
+{
+    return &mmm_elite_instance;
+}
+
+#endif /* !DEF_ELITE_MODEL */
@@ -0,0 +1,18 @@
+#ifndef __ELITE_MMM_H__
+#define __ELITE_MMM_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite.h"
+
+    const elite_instance_t *mmm_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __ELITE_MMM_H__ */
@@ -337,4 +337,9 @@ ret_code_t le_event_async_notify(uint8_t *p_value, uint16_t len, uint32_t ms_to_
    return ret;
 }

+bool is_ble_connected(void)
+{
+    return (elite_context.conn_handle != BLE_CONN_HANDLE_INVALID);
+}
+
 #endif // NRF_MODULE_ENABLED(BLE_ELITE)
@@ -27,10 +27,10 @@ extern "C"

 #if NRF_MODULE_ENABLED(BLE_UART_SRV)

-#define BLE_UUID_UART_SERVICE   0x0001 /**< The UUID of the Service. */
-#define BLE_UUID_UART_RX_CHAR   0x0002 /**< The UUID of the RX Characteristic. */
-#define BLE_UUID_UART_TX_CHAR   0x0003 /**< The UUID of the TX Characteristic. */
-#define BLE_UUID_UART_BAUD_CHAR 0x0004 /**< The UUID of the Baud Characteristic. */
+#define BLE_UUID_UART_SERVICE   0xFFF8 /**< The UUID of the Service. */
+#define BLE_UUID_UART_RX_CHAR   0xFFF9 /**< The UUID of the RX Characteristic. */
+#define BLE_UUID_UART_TX_CHAR   0xFFFA /**< The UUID of the TX Characteristic. */
+#define BLE_UUID_UART_BAUD_CHAR 0xFFFB /**< The UUID of the Baud Characteristic. */

 #define BLE_UART_BASE_UUID                                                                                 \
    {                                                                                                      \
@@ -197,20 +197,17 @@ static ret_code_t add_baud_characteristic(uint16_t uuid, uint8_t uuid_type, ble_
 void le_uart_srv_init(void)
 {
    ret_code_t err_code;
-    ble_uuid128_t nus_base_uuid = BLE_UART_BASE_UUID;
-    uint8_t uuid_type           = 0;
-    ble_uuid_t ble_uuid;
+    uint8_t uuid_type = 0;

    /**@snippet [Adding proprietary Service to the SoftDevice] */

-    // Add a custom base UUID.
-    err_code = sd_ble_uuid_vs_add(&nus_base_uuid, &uuid_type);
-    APP_ERROR_CHECK(err_code);
+    ble_uuid_t ble_uuid = {
+        .type = BLE_UUID_TYPE_BLE,
+        .uuid = BLE_UUID_UART_SERVICE,
+    };

    // Add the service.
-    ble_uuid.type = uuid_type;
-    ble_uuid.uuid = BLE_UUID_UART_SERVICE;
-    err_code      = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
+    err_code = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
                                        &ble_uuid,
                                        &ble_uart_context.service_handle);
    APP_ERROR_CHECK(err_code);
@@ -1,3 +1,5 @@
+#include "app_config.h"
+#if (DEF_LED_DRV_ENABLED)
 #include "led_drv.h"

 #include "nrf_log.h"
@@ -9,60 +11,15 @@
 #if (DEF_APA102_2020_ENABLED)
 #include "apa102_2020.h"
 static const led_drv_if_t *p_inst = &apa102_drv;
+
+#elif (DEF_RGB_ENABLED)
+#include "led_rgb.h"
+static const led_drv_if_t *p_inst = &led_rgb_drv;
+
 #else
 static led_drv_if_t *p_inst = NULL;
 #endif

-#if (DEF_LED_DRV_ENABLED)
-
-static bool btWaitLedFlag   = 0;
-static bool noEventLedFlag  = 0;
-static bool preWorkLedFlag  = 0;
-static bool workingLedFlag  = 0;
-static bool postWorkLedFlag = 0;
-
-int32_t led_mode(uint16_t mode_status)
-{
-    btWaitLedFlag   = 0;
-    noEventLedFlag  = 0;
-    preWorkLedFlag  = 0;
-    workingLedFlag  = 0;
-    postWorkLedFlag = 0;
-
-    switch (mode_status)
-    {
-        case BT_WAIT:
-            btWaitLedFlag = 1;
-            NRF_LOG_INFO("%s(BT_WAIT) is unimplemented.", __FUNCTION__);
-            break;
-
-        case NO_EVENT:
-            noEventLedFlag = 1;
-            NRF_LOG_INFO("%s(NO_EVENT) is unimplemented.", __FUNCTION__);
-            break;
-
-        case PRE_WORK:
-            preWorkLedFlag = 1;
-            NRF_LOG_INFO("%s(PRE_WORK) is unimplemented.", __FUNCTION__);
-            break;
-
-        case WORKING:
-            workingLedFlag = 1;
-            NRF_LOG_INFO("%s(WORKING) is unimplemented.", __FUNCTION__);
-            break;
-
-        case POST_WORK:
-            postWorkLedFlag = 1;
-            NRF_LOG_INFO("%s(POST_WORK) is unimplemented.", __FUNCTION__);
-            break;
-
-        default:
-            NRF_LOG_INFO("%s(default) is unimplemented.", __FUNCTION__);
-            break;
-    }
-    return 0;
-}
-
 int32_t led_set(struct led_color color)
 {
    if (p_inst == NULL)
@@ -111,7 +68,14 @@ int32_t led_init(void)
 int32_t led_as_rainbow(void)
 {
    uint8_t color_idx;
+
+#if (DEF_APA102_2020_ENABLED)
    struct led_color color[6] = { LED_RED, LED_ORANGE, LED_YELLOW, LED_GREEN, LED_BLUE, LED_PURPLE };
+#endif
+
+#if (DEF_RGB_ENABLED)
+    struct led_color color[6] = { LED_RED, LED_YELLOW, LED_GREEN, LED_CYAN, LED_BLUE, LED_PURPLE };
+#endif

    for (int i = 0; i < DEF_LED_COUNT; i++)
    {
@@ -2,7 +2,8 @@
 #define __LED_DRV_H__

 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif

 #include "app_config.h"
@@ -11,6 +12,7 @@ extern "C" {
 #define LED_DRV_ERROR   (-1)
 #define LED_DRV_SUCCESS (0)

+#if (DEF_APA102_2020_ENABLED)
 #define LED_NONE                        \
    (struct led_color)                  \
    {                                   \
@@ -51,41 +53,45 @@ extern "C" {
    {                                   \
        .R = 0xFF, .G = 0x00, .B = 0xFF \
    }
-#define LED_ORANGE                      \
-    (struct led_color)                  \
-    {                                   \
-        .R = 0xFF, .G = 0x58, .B = 0x09 \
-    }

-#define LED_OFF             LED_NONE
-#define LED_ON              LED_GREEN
-#define LED_ERROR           LED_RED
-#define LED_IDEL_DISCONNECT LED_YELLOW
-#define LED_IDEL_CONNECTED  LED_GREEN
-#define LED_REC             LED_CYAN
-#define LED_IDENTICY_DEV    LED_PURPLE
-#define LED_BUTTON_PRESS    LED_YELLOW
+#elif (DEF_RGB_ENABLED)
+#define LED_NONE \
+    (struct led_color) { .R = 0, .G = 0, .B = 0 }
+#define LED_RED \
+    (struct led_color) { .R = 1, .G = 0, .B = 0 }
+#define LED_YELLOW \
+    (struct led_color) { .R = 1, .G = 1, .B = 0 }
+#define LED_WHITE \
+    (struct led_color) { .R = 1, .G = 1, .B = 1 }
+#define LED_GREEN \
+    (struct led_color) { .R = 0, .G = 1, .B = 0 }
+#define LED_CYAN \
+    (struct led_color) { .R = 0, .G = 1, .B = 1 }
+#define LED_BLUE \
+    (struct led_color) { .R = 0, .G = 0, .B = 1 }
+#define LED_PURPLE \
+    (struct led_color) { .R = 1, .G = 0, .B = 1 }
+#endif

-#define BT_WAIT             0x01
-#define NO_EVENT            0x02
-#define PRE_WORK            0x03
-#define WORKING             0x04
-#define POST_WORK           0x05
+#define LED_OFF               LED_NONE
+#define LED_ON                LED_GREEN
+#define LED_ERROR             LED_RED
+#define LED_IDLE_DISCONNECTED LED_YELLOW
+#define LED_IDLE_CONNECTED    LED_GREEN
+#define LED_REC               LED_CYAN
+#define LED_IDENTIFY_DEV      LED_PURPLE
+#define LED_BUTTON_PRESS      LED_YELLOW

 #if (DEF_LED_DRV_ENABLED)
-    int32_t
-    led_init(void);
-int32_t led_set(struct led_color color);
-int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
-int32_t led_mode(uint16_t mode_status);
-int32_t led_as_rainbow(void);
+    int32_t led_init(void);
+    int32_t led_set(struct led_color color);
+    int32_t led_single_led_set(uint32_t idx, struct led_color color, uint8_t brightness);
+    int32_t led_as_rainbow(void);

 #else
-
 #define led_init()
 #define led_set(x)
 #define led_single_led_set(x, y, z)
-#define led_mode(x)
 #define led_as_rainbow(x)

 #endif /* ! DEF_LED_DRV_ENABLED */
@@ -0,0 +1,47 @@
+
+#include "app_config.h"
+
+#if (DEF_RGB_ENABLED)
+#include "led_rgb.h"
+
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+
+static const uint32_t r_pins[DEF_LED_COUNT] = LED_R_PINS;
+static const uint32_t g_pins[DEF_LED_COUNT] = LED_G_PINS;
+static const uint32_t b_pins[DEF_LED_COUNT] = LED_B_PINS;
+static uint32_t led_count                   = 0;
+
+int32_t rgb_led_set(uint32_t idx, struct led_color color, uint8_t brightness)
+{
+    if (idx >= led_count) return 1;
+    nrf_gpio_pin_write(r_pins[idx], color.R ? 0 : 1);
+    nrf_gpio_pin_write(g_pins[idx], color.G ? 0 : 1);
+    nrf_gpio_pin_write(b_pins[idx], color.B ? 0 : 1);
+    return 0;
+}
+
+int32_t rgb_init(uint32_t cnt)
+{
+    led_count = cnt;
+    for (uint8_t i = 0; i < led_count; i++)
+    {
+        nrf_gpio_cfg_output(r_pins[i]);
+        nrf_gpio_cfg_output(g_pins[i]);
+        nrf_gpio_cfg_output(b_pins[i]);
+        /* all dark */
+        nrf_gpio_pin_set(r_pins[i]);
+        nrf_gpio_pin_set(g_pins[i]);
+        nrf_gpio_pin_set(b_pins[i]);
+    }
+
+    return 0;
+}
+
+const led_drv_if_t led_rgb_drv = {
+    .init = rgb_init,
+    .set  = rgb_led_set,
+};
+
+#endif /* ! DEF_RGB_ENABLED */
@@ -0,0 +1,26 @@
+#ifndef __LED_RGB_H__
+#define __LED_RGB_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+
+#include "elite_board.h"
+#include "led_drv_if.h"
+#if (DEF_RGB_ENABLED)
+
+#if !(defined(LED_R_PINS) && defined(LED_G_PINS) && defined(LED_B_PINS))
+#error "LED_R_PINS, LED_G_PINS and LED_B_PINS must all be defined"
+#endif
+    extern const led_drv_if_t led_rgb_drv;
+
+#endif /* ! DEF_RGB_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __LED_RGB_H__ */
@@ -42,13 +42,13 @@ static void le_evt_handler(ble_evt_t const *p_ble_evt, void *p_context)
            NRF_LOG_INFO("Connect to peer.");
            err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_CONN, p_ble_evt->evt.gap_evt.conn_handle, 8);
            APP_ERROR_CHECK(err_code);
-            led_set(LED_IDEL_CONNECTED);
+            led_set(LED_IDLE_CONNECTED);
            break;
        case BLE_GAP_EVT_DISCONNECTED:
            NRF_LOG_INFO("Disconnect from peer.");
            err_code = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_ADV, p_ble_evt->evt.gap_evt.conn_handle, 0);
            APP_ERROR_CHECK(err_code);
-            led_set(LED_IDEL_DISCONNECT);
+            led_set(LED_IDLE_DISCONNECTED);
            break;
        case BLE_GAP_EVT_PHY_UPDATE_REQUEST: {
            NRF_LOG_INFO("PHY update response. (AUTO)");
@@ -0,0 +1,966 @@
+#include "app_config.h"
+#include "app_error.h"
+
+#include "elite_board.h"
+#include "pel_v3_0.h"
+
+#include "elite_def.h"
+
+#include "nrf_delay.h"
+#include "nrf_gpio.h"
+#include "nrf_log.h"
+
+#include "adc_drv.h"
+
+#include "FreeRTOS.h"
+#include "message_buffer.h"
+#include "pel_v3_0_io.h"
+#include "queue.h"
+#include "semphr.h"
+#include "stream_buffer.h"
+#include "task.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+
+#include "FreeRTOS.h"
+#include "nrfx_gpiote.h"
+#include "timers.h"
+#define DEBOUNCE_DELAY_MS     30
+#define HOT_SWAP_IS_CONNECTED 0
+#define VCC_DUT1_output_en()  nrf_gpio_pin_set(HOT_SWAP_1_PIN)
+#define VCC_DUT1_output_dis() nrf_gpio_pin_clear(HOT_SWAP_1_PIN)
+static TimerHandle_t debounce_timer = NULL;
+
+static void debounce_timer_callback(TimerHandle_t xTimer)
+{
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}
+
+static void hot_swap_gpiote_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
+{
+    // only handle timer, not handle GPIO
+    if (debounce_timer != NULL)
+    {
+        // reset and start debounce timer
+        xTimerStopFromISR(debounce_timer, NULL);
+        xTimerStartFromISR(debounce_timer, NULL);
+    }
+}
+
+void hot_swap_monitor_init(void)
+{
+    nrfx_gpiote_in_config_t config = {
+        .hi_accuracy     = 0,
+        .is_watcher      = 0,
+        .pull            = NRF_GPIO_PIN_PULLUP,
+        .sense           = NRF_GPIOTE_POLARITY_TOGGLE,
+        .skip_gpio_setup = 0
+    };
+
+    nrfx_gpiote_init();
+    nrfx_gpiote_in_init(HOT_SWAP_SIGNAL_PIN, &config, hot_swap_gpiote_handler);
+    nrfx_gpiote_in_event_enable(HOT_SWAP_SIGNAL_PIN, true);
+
+    debounce_timer = xTimerCreate("debounce", pdMS_TO_TICKS(DEBOUNCE_DELAY_MS), pdFALSE, NULL, debounce_timer_callback);
+    if (debounce_timer == NULL)
+    {
+        NRF_LOG_ERROR("Failed to create debounce timer");
+        return;
+    }
+
+    // initial HOT_SWAP_1_PIN
+    bool state = nrf_gpio_pin_read(HOT_SWAP_SIGNAL_PIN);
+    if (state == HOT_SWAP_IS_CONNECTED)
+    {
+        NRF_LOG_INFO("VCC_DUT1 enable");
+        VCC_DUT1_output_en();
+    }
+    else
+    {
+        NRF_LOG_INFO("VCC_DUT1 disable");
+        VCC_DUT1_output_dis();
+    }
+}
+
+typedef struct
+{
+    uint32_t pattern_index;
+    uint32_t resistor_mask;
+    float resistor_conductance;
+} resistor_t;
+
+typedef struct
+{
+    resistor_t resistor;
+    bool use_pattern_index;
+} load_config_t;
+
+static load_config_t load_config;
+
+static float _load_set(uint32_t mask)
+{
+    typedef struct
+    {
+        float val;
+        uint32_t pin;
+        uint32_t mask;
+    } input_pin_t;
+
+    const input_pin_t input_pin_tab[] = {
+        {  0.6,  INPUT_1_PIN,  PEL_0P5R_MASK},
+        {  1.2,  INPUT_2_PIN,  PEL_1P0R_MASK},
+        {  2.2,  INPUT_3_PIN,  PEL_2P0R_MASK},
+        {  4.1,  INPUT_4_PIN,  PEL_4P0R_MASK},
+        {  8.4,  INPUT_5_PIN,  PEL_8P0R_MASK},
+        { 16.3,  INPUT_6_PIN, PEL_16P2R_MASK},
+        { 32.7,  INPUT_7_PIN, PEL_32P4R_MASK},
+        { 62.3,  INPUT_8_PIN, PEL_63P4R_MASK},
+        {129.8,  INPUT_9_PIN,  PEL_127R_MASK},
+        {270.0, INPUT_10_PIN,  PEL_255R_MASK},
+        {510.0, INPUT_11_PIN,  PEL_511R_MASK},
+        {998.0, INPUT_12_PIN, PEL_1000R_MASK},
+    };
+
+    float ohms                = 0;
+    float sum_of_conductances = 0;
+
+    for (int32_t i = COUNTOF(input_pin_tab) - 1; i >= 0; i--)
+    {
+        if (input_pin_tab[i].mask & mask)
+        {
+            nrf_gpio_pin_clear(input_pin_tab[i].pin);
+            ohms                += input_pin_tab[i].val;
+            sum_of_conductances += 1 / input_pin_tab[i].val;
+            NRF_LOG_INFO("enable R%-2d(" NRF_LOG_FLOAT_MARKER "ohm)", i + 1, NRF_LOG_FLOAT(input_pin_tab[i].val));
+        }
+        else
+        {
+            nrf_gpio_pin_set(input_pin_tab[i].pin);
+        }
+    }
+
+    if (mask == 0)
+    {
+        NRF_LOG_INFO("disable R1~R12");
+    }
+    return sum_of_conductances;
+}
+
+static void set_resistor_load_bits(uint32_t mask)
+{
+    load_config.use_pattern_index             = false;
+    load_config.resistor.pattern_index        = 0;
+    load_config.resistor.resistor_mask        = mask;
+    load_config.resistor.resistor_conductance = _load_set(load_config.resistor.resistor_mask);
+}
+
+static void set_resistor_load_pattern(uint32_t index)
+{
+    const resistor_t pattern_tab[] = {
+        { 1, 0b0000000000000111},
+        { 2, 0b0000000000000011},
+        { 3, 0b0000000000000101},
+        { 4, 0b0000000000000001},
+        { 5, 0b0000000000001110},
+        { 6, 0b0000000000000110},
+        { 7, 0b0000000000001010},
+        { 8, 0b0000000000000010},
+        { 9, 0b0000000000011100},
+        {10, 0b0000000000001100},
+        {11, 0b0000000000010100},
+        {12, 0b0000000000000100},
+        {13, 0b0000000000111000},
+        {14, 0b0000000000011000},
+        {15, 0b0000000000101000},
+        {16, 0b0000000000001000},
+        {17, 0b0000000001110000},
+        {18, 0b0000000000110000},
+        {19, 0b0000000001010000},
+        {20, 0b0000000000010000},
+        {21, 0b0000000011100000},
+        {22, 0b0000000001100000},
+        {23, 0b0000000010100000},
+        {24, 0b0000000000100000},
+        {25, 0b0000000111000000},
+        {26, 0b0000000011000000},
+        {27, 0b0000000101000000},
+        {28, 0b0000000001000000},
+        {29, 0b0000001110000000},
+        {30, 0b0000000110000000},
+        {31, 0b0000001010000000},
+        {32, 0b0000000010000000},
+        {33, 0b0000011100000000},
+        {34, 0b0000001100000000},
+        {35, 0b0000010100000000},
+        {36, 0b0000000100000000},
+        {37, 0b0000111000000000},
+        {38, 0b0000011000000000},
+        {39, 0b0000101000000000},
+        {40, 0b0000001000000000},
+        {41, 0b0000110000000000},
+        {42, 0b0000010000000000},
+        {43, 0b0000100000000000},
+    };
+
+    for (int32_t i = 0; i < ARRAY_SIZE(pattern_tab); i++)
+    {
+        if (pattern_tab[i].pattern_index == index)
+        {
+            load_config.use_pattern_index             = true;
+            load_config.resistor.pattern_index        = index;
+            load_config.resistor.resistor_mask        = pattern_tab[i].resistor_mask;
+            load_config.resistor.resistor_conductance = _load_set(load_config.resistor.resistor_mask);
+            break;
+        }
+    }
+}
+
+static void set_resistor_to_high_z(void)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    set_resistor_load_bits(0);
+}
+
+typedef struct
+{
+    uint32_t setting_pattern_id_max;
+    uint32_t setting_pattern_id_min;
+    uint16_t setting_notify_cnt_every_pattern;
+} auto_scan_mode_params_t;
+
+typedef struct
+{
+    union
+    {
+        uint32_t value;
+        uint32_t bitmask;
+        uint32_t pattern;
+    };
+    bool is_pattern;
+} resistor_setting_t;
+
+typedef struct
+{
+    uint32_t count;
+    uint32_t drop;
+    bool the_last_record_flag;
+    void (*complete_cb)(void);
+} notify_setting_t;
+
+typedef struct
+{
+    uint32_t opcode;
+    union
+    {
+        uint32_t raw[256 / sizeof(uint32_t)];
+        resistor_setting_t resistor_setting;
+        notify_setting_t notify_setting;
+    };
+} pel_scan_msg_t;
+
+static uint8_t global_memoryboard_id        = 0xFF;
+static SemaphoreHandle_t auto_scan_cplt_sem = NULL;
+static SemaphoreHandle_t adc_convt_cplt_sem = NULL;
+static MessageBufferHandle_t pel_scan_msqQ  = NULL;
+
+static void vis_rst(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+}
+
+static void cis_version(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    uint8_t cis_ver[] = {
+        CIS_VERSION,
+        VERSION_DATE_YEAR,
+        VERSION_DATE_MONTH,
+        VERSION_DATE_DAY,
+        VERSION_DATE_HOUR,
+        VERSION_DATE_MINUTE,
+    };
+    extern ret_code_t le_data_update(uint8_t * p_value, uint16_t len);
+    le_data_update((void *)cis_ver, sizeof(cis_ver));
+}
+
+static void send_start_package(void *packet_buf, uint32_t packet_len)
+{
+    for (uint32_t i = 0; i < 4; i++)
+    {
+        ret_code_t le_event_notify(uint8_t * p_value, uint16_t len);
+        nrf_gpio_pin_set(TP2_PIN);
+        ret_code_t ret = le_event_notify(packet_buf, packet_len);
+        nrf_gpio_pin_clear(TP2_PIN);
+
+        vTaskDelay(pdMS_TO_TICKS(10));
+
+        NRF_LOG_HEXDUMP_INFO(packet_buf, packet_len);
+        NRF_LOG_INFO("\n");
+    }
+}
+
+static void pel_scan_mode_notify(scan_mode_notify_packet_t *packet_buf, uint32_t packet_len)
+{
+    int32_t adc_raw[COUNTOF(pel_hw.adc.results)] = { 0 };
+
+    for (int i = 0; i < COUNTOF(pel_hw.adc.results); i++)
+    {
+        adc_raw[i] = pel_hw.adc.results[i];
+    }
+
+    adc_read_mutiple_channels_convert_milivolt(adc_raw, pel_hw.adc.results_f, COUNTOF(pel_hw.adc.channels));
+
+    packet_buf->mem_board_id = global_memoryboard_id;
+    packet_buf->packet_seq++;
+    packet_buf->notify_time      = xTaskGetTickCount();
+    packet_buf->output_vo_raw    = pel_hw.adc.results[2];
+    packet_buf->output_vc_raw    = pel_hw.adc.results[3];
+    packet_buf->output_ve_raw    = pel_hw.adc.results[4];
+    packet_buf->hold_OUT_v       = pel_hw.adc.results_f[2] * 10 / 1000;
+    packet_buf->hold_VCC_v       = pel_hw.adc.results_f[3] * 10 / 1000;
+    packet_buf->hold_VEE_v       = pel_hw.adc.results_f[4] * 10 / 1000;
+    packet_buf->resis_pattern_id = load_config.resistor.pattern_index;
+    packet_buf->resis_bitsmask   = load_config.resistor.resistor_mask;
+    packet_buf->resis_g_value    = load_config.resistor.resistor_conductance;
+    packet_buf->val_1            = 0xFFFFFFFF;
+    packet_buf->val_2            = 0xFFFFFFFF;
+    packet_buf->val_3            = 0xFFFF;
+    ret_code_t ret               = le_event_async_notify((void *)packet_buf, packet_len, pdMS_TO_TICKS(5));
+
+    // NRF_LOG_HEXDUMP_INFO(packet_buf,packet_len);
+    {
+        char str[128];
+        snprintf(str, sizeof(str), "{%3d, %3d, %10lu, %10lu, %10lu, %10lu, %2.7f, %2.7f, %2.7f, %5d, 0x%04X, %.7f, %d}", packet_buf->mem_board_id, packet_buf->packet_seq, packet_buf->notify_time, packet_buf->output_vo_raw, packet_buf->output_vc_raw, packet_buf->output_ve_raw, packet_buf->hold_OUT_v, packet_buf->hold_VCC_v, packet_buf->hold_VEE_v, packet_buf->resis_pattern_id, packet_buf->resis_bitsmask, packet_buf->resis_g_value, packet_buf->mode_complete);
+        NRF_LOG_INFO("%s", str);
+    }
+}
+
+void test_gpio_task(void *pArg)
+{
+    const uint32_t pel_pins[] = {
+        INPUT_1_PIN,
+        INPUT_2_PIN,
+        INPUT_3_PIN,
+        INPUT_4_PIN,
+        INPUT_5_PIN,
+        INPUT_6_PIN,
+        INPUT_7_PIN,
+        INPUT_8_PIN,
+        INPUT_9_PIN,
+        INPUT_10_PIN,
+        INPUT_11_PIN,
+        INPUT_12_PIN,
+        ANODE_PIN,
+        CATHODE_PIN,
+        SAMPLE_I_PIN,
+        SAMPLE_V_PIN
+    };
+
+    for (;;)
+    {
+
+        NRF_LOG_INFO("[test] all output pin set low");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+
+        NRF_LOG_INFO("[test] all output pin set high");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_set(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+
+        NRF_LOG_INFO("[test] alternating high and low signals on all output pins");
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+        for (int i = 0; i < COUNTOF(pel_pins); i++)
+        {
+            nrf_gpio_pin_set(pel_pins[i]);
+            vTaskDelay(100);
+            nrf_gpio_pin_clear(pel_pins[i]);
+        }
+        vTaskDelay(1000);
+    }
+}
+
+static void decode_and_set_resistor_pattern(uint8_t *param)
+{
+    uint16_t pattern_id = u8_to_u16(param[0], param[1]);
+
+    set_resistor_load_pattern(pattern_id);
+}
+
+static void decode_and_set_manual_resistor(uint8_t *param)
+{
+    uint16_t manual_val = u8_to_u16(param[0], param[1]);
+
+    set_resistor_load_bits(manual_val);
+}
+
+static void dev_mode_input_resistor(uint8_t *ins)
+{
+    NRF_LOG_INFO("[DEV MODE] %s", __FUNCTION__);
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t func_id;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    switch (p_ins->opcode)
+    {
+        case 0x00:
+            set_resistor_to_high_z();
+            break;
+
+        case 0x01:
+            decode_and_set_resistor_pattern(p_ins->param);
+            break;
+
+        case 0x02:
+            decode_and_set_manual_resistor(p_ins->param);
+            break;
+
+        default:
+            break;
+    }
+}
+
+static void start_adc_pulse(uint32_t pusle_cnt, void (*convt_done_cb)(void))
+{
+    pel_config_t pel_cfg = {
+        .anode_pin    = ANODE_PIN,
+        .cathode_pin  = CATHODE_PIN,
+        .smaple_i_pin = SAMPLE_I_PIN,
+        .sample_v_pin = SAMPLE_V_PIN,
+        .test_pin     = TP1_PIN,
+        .mode         = BOARD_IOPx,
+        .point_us     = {
+                         10000,
+                         3,
+                         5,
+                         2,
+                         0,
+                         },
+        .pulse_cnt            = pusle_cnt,
+        .gain                 = NRF_SAADC_GAIN1_6,
+        .smaple_time          = NRF_SAADC_ACQTIME_10US,
+        .adc_timing_shift     = 0,
+        .convt_new_arrival_cb = convt_done_cb,
+    };
+
+    pel_pulse_gen_init(pel_cfg);
+    pel_pulse_gen_start();
+}
+
+static void stop_adc_pulse(void)
+{
+    pel_pulse_gen_stop();
+}
+
+static void adc_event_end_cb(void)
+{
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    xSemaphoreGiveFromISR(adc_convt_cplt_sem, &xHigherPriorityTaskWoken);
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+}
+
+static void pel_pulse_start(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    resistor_setting_t *p_setting = p_arg;
+
+    stop_adc_pulse();
+
+    vTaskDelay(pdMS_TO_TICKS(20));
+
+    if (p_setting->is_pattern == true)
+    {
+        set_resistor_load_pattern(p_setting->pattern);
+    }
+    else
+    {
+        set_resistor_load_bits(p_setting->bitmask);
+    }
+
+    nrf_gpio_pin_set(TP2_PIN);   // For testing
+    start_adc_pulse(0xFFFFFFFF, adc_event_end_cb);
+    nrf_gpio_pin_clear(TP2_PIN); // For testing
+}
+
+static void pel_pulse_stop(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    UNUSED_PARAMETER(p_arg);
+
+    stop_adc_pulse();
+    set_resistor_to_high_z();
+}
+
+#define MODE_COMPLETE (0xA)
+static void pel_pulse_notify(void *p_arg)
+{
+    NRF_LOG_INFO("%s()", __FUNCTION__);
+
+    notify_setting_t *p_setting = p_arg;
+
+    static scan_mode_notify_packet_t packet_buf = { 0 };
+
+    xSemaphoreTake(adc_convt_cplt_sem, 0);
+
+    for (uint32_t i = 0; i < p_setting->drop; i++)
+    {
+        xSemaphoreTake(adc_convt_cplt_sem, pdMS_TO_TICKS(1000));
+    }
+
+    for (uint32_t i = 0; i < p_setting->count; i++)
+    {
+        xSemaphoreTake(adc_convt_cplt_sem, pdMS_TO_TICKS(1000));
+
+        if (p_setting->the_last_record_flag && (i == p_setting->count - 1))
+        {
+            packet_buf.mode_complete |= MODE_COMPLETE;
+        }
+        else
+        {
+            packet_buf.mode_complete &= ~MODE_COMPLETE;
+        }
+
+        nrf_gpio_pin_set(TP2_PIN);
+        pel_scan_mode_notify(&packet_buf, sizeof(packet_buf));
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+
+    if (p_setting->complete_cb)
+    {
+        p_setting->complete_cb();
+    }
+}
+
+#define PEL_START        0x00
+#define PEL_SET_RESISTOR 0x01
+#define PEL_STOP         0x02
+#define PEL_NOTIFY       0x03
+
+static void pel_scan_mode_task(void *pvArg)
+{
+    uint8_t recv[sizeof(pel_scan_msg_t)];
+
+    for (;;)
+    {
+        pel_scan_msg_t *p  = (void *)recv;
+        uint32_t recv_size = xMessageBufferReceive(pel_scan_msqQ, recv, sizeof(recv), portMAX_DELAY);
+        if (recv_size)
+        {
+            switch (p->opcode)
+            {
+                case PEL_START:
+                    pel_pulse_start(&p->resistor_setting);
+                    break;
+                case PEL_SET_RESISTOR:
+                    pel_pulse_start(&p->resistor_setting);
+                    break;
+                case PEL_STOP:
+                    pel_pulse_stop(NULL);
+                    break;
+                case PEL_NOTIFY:
+                    pel_pulse_notify(&p->notify_setting);
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+}
+
+static void dev_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t func_id;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    switch (p_ins->func_id)
+    {
+        case 0x01:
+            dev_mode_input_resistor(ins);
+            break;
+
+        default:
+            break;
+    }
+}
+
+static void manual_scan_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    static pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // manual_scan_mode stop
+            // 30 00 01 00
+            pel_scan_msg.opcode = PEL_STOP;
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        case 0x01: {
+            // manual_scan_mode start
+            // 30 00 01 01  00 01  00 05  00 0A  00 03 (pattern_index)
+            // 30 00 01 01  00 00  00 F0  00 0A  00 03 (resistor_mask)
+            send_start_package((void *)&packet_buf, sizeof(packet_buf));
+            pel_scan_msg.opcode                      = PEL_START;
+            pel_scan_msg.resistor_setting.is_pattern = u8_to_u16(p_ins->param[0], p_ins->param[1]) & 0x01;
+            pel_scan_msg.resistor_setting.value      = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+            pel_scan_msg.opcode               = PEL_NOTIFY;
+            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        case 0x02: {
+            // manual_scan_mode set resistor
+            // 30 00 01 02  00 01  00 07  00 0A  00 03 (pattern_index)
+            // 30 00 01 02  00 00  00 F0  00 0A  00 03 (resistor_mask)
+            pel_scan_msg.opcode                      = PEL_SET_RESISTOR;
+            pel_scan_msg.resistor_setting.is_pattern = u8_to_u16(p_ins->param[0], p_ins->param[1]) & 0x01;
+            pel_scan_msg.resistor_setting.value      = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+            pel_scan_msg.opcode               = PEL_NOTIFY;
+            pel_scan_msg.notify_setting.drop  = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+            pel_scan_msg.notify_setting.count = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+static void auto_scan_complete(void)
+{
+    xSemaphoreGive(auto_scan_cplt_sem);
+}
+
+static void wait_auto_scan_complete(void)
+{
+    xSemaphoreTake(auto_scan_cplt_sem, portMAX_DELAY);
+}
+
+static TaskHandle_t auto_scan_start_handle = NULL;
+
+static void auto_scan_start_task(void *p_arg)
+{
+    uint8_t ins_buf[256];
+
+    struct
+    {
+        uint32_t size;
+        uint8_t payload[];
+    } *p = (void *)p_arg;
+
+    memcpy(ins_buf, p->payload, MIN(p->size, sizeof(ins_buf)));
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)&ins_buf[0];
+
+    pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    uint16_t pattern_max                             = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+    uint16_t pattern_min                             = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+    pel_scan_msg.notify_setting.the_last_record_flag = false;
+
+    send_start_package((void *)&packet_buf, sizeof(packet_buf));
+
+    for (uint16_t i = pattern_max; i >= pattern_min; i--)
+    {
+        pel_scan_msg.opcode                      = PEL_START;
+        pel_scan_msg.resistor_setting.is_pattern = true;
+        pel_scan_msg.resistor_setting.value      = i;
+        ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+        pel_scan_msg.opcode                     = PEL_NOTIFY;
+        pel_scan_msg.notify_setting.drop        = u8_to_u16(p_ins->param[4], p_ins->param[5]);
+        pel_scan_msg.notify_setting.count       = u8_to_u16(p_ins->param[6], p_ins->param[7]);
+        pel_scan_msg.notify_setting.complete_cb = auto_scan_complete;
+        if (i == pattern_min)
+        {
+            pel_scan_msg.notify_setting.the_last_record_flag = true;
+        }
+        ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+
+        wait_auto_scan_complete();
+    }
+
+    pel_scan_msg.opcode = PEL_STOP;
+    ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+
+    auto_scan_start_handle = NULL;
+
+    vTaskDelete(NULL);
+}
+
+static void auto_scan_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    global_memoryboard_id = p_ins->id;
+
+    pel_scan_msg_t pel_scan_msg;
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // auto_scan_mode stop
+            // 30 00 02 00
+            taskENTER_CRITICAL();
+            if (auto_scan_start_handle)
+            {
+                ASSERT(xMessageBufferReset(pel_scan_msqQ));
+
+                pel_scan_msg.opcode = PEL_STOP;
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), 0));
+
+                vTaskDelete(auto_scan_start_handle);
+                auto_scan_start_handle = NULL;
+            }
+            taskEXIT_CRITICAL();
+            break;
+        }
+
+        case 0x01: {
+            // auto_scan_mode start
+            // 30 00 02 01  00 1C  00 01  00 0A  00 05
+            if (auto_scan_start_handle == NULL)
+            {
+                struct
+                {
+                    uint32_t size;
+                    uint8_t payload[256];
+                } param;
+
+                param.size = MIN(size, sizeof(param.payload));
+                memcpy(param.payload, ins, param.size);
+
+                BaseType_t ret = xTaskCreate(auto_scan_start_task, "auto_start", 320, &param, 4, &auto_scan_start_handle);
+                if (ret != pdPASS)
+                {
+                    NRF_LOG_ERROR("auto_scan_start_task task not created.");
+                }
+
+                // using a 100ms delay to ensure the parameter is copied to  to auto_scan_start_task()
+                vTaskDelay(pdMS_TO_TICKS(100));
+            }
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+static void R_external_calibration_mode(uint8_t *ins, uint16_t size)
+{
+    NRF_LOG_INFO("%s", __FUNCTION__);
+#define R1  PEL_0P5R_MASK
+#define R2  PEL_1P0R_MASK
+#define R3  PEL_2P0R_MASK
+#define R4  PEL_4P0R_MASK
+#define R5  PEL_8P0R_MASK
+#define R6  PEL_16P2R_MASK
+#define R7  PEL_32P4R_MASK
+#define R8  PEL_63P4R_MASK
+#define R9  PEL_127R_MASK
+#define R10 PEL_255R_MASK
+#define R11 PEL_511R_MASK
+#define R12 PEL_1000R_MASK
+
+    struct __PACKED
+    {
+        uint8_t id       : 4;
+        uint8_t ins_type : 4;
+        uint8_t pkg_size;
+        uint8_t mode;
+        uint8_t opcode;
+        uint8_t param[];
+    } *p_ins = (void *)ins;
+
+    uint32_t calibration_bits_pattern_tab[] = {
+        R1,
+        R2,
+        R1 | R2,
+        R3,
+        R2 | R3,
+        R4,
+        R3 | R4,
+        R5,
+        R4 | R5,
+        R6,
+        R5 | R6,
+        R7,
+        R6 | R7,
+        R8,
+        R7 | R8,
+    };
+
+    global_memoryboard_id = p_ins->id;
+
+    static pel_scan_msg_t pel_scan_msg;
+    scan_mode_notify_packet_t packet_buf = { 0 };
+
+    switch (p_ins->opcode)
+    {
+        case 0x00: {
+            // R_external_calibration_mode stop
+            // 30 00 03 00
+            break;
+        }
+
+        case 0x01: {
+            // R_external_calibration_mode start with drop n * 10ms
+            // 30 00 03 01  00 0A  00 05
+            pel_scan_msg.notify_setting.the_last_record_flag = false;
+
+            send_start_package((void *)&packet_buf, sizeof(packet_buf));
+
+            for (uint16_t i = 0; i < COUNTOF(calibration_bits_pattern_tab); i++)
+            {
+                pel_scan_msg.opcode                      = PEL_START;
+                pel_scan_msg.resistor_setting.is_pattern = false;
+                pel_scan_msg.resistor_setting.value      = calibration_bits_pattern_tab[i];
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.resistor_setting), pdMS_TO_TICKS(500)));
+
+                pel_scan_msg.opcode                     = PEL_NOTIFY;
+                pel_scan_msg.notify_setting.drop        = u8_to_u16(p_ins->param[0], p_ins->param[1]);
+                pel_scan_msg.notify_setting.count       = u8_to_u16(p_ins->param[2], p_ins->param[3]);
+                pel_scan_msg.notify_setting.complete_cb = auto_scan_complete;
+                if (i == COUNTOF(calibration_bits_pattern_tab) - 1)
+                {
+                    pel_scan_msg.notify_setting.the_last_record_flag = true;
+                }
+                ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode) + sizeof(pel_scan_msg.notify_setting), pdMS_TO_TICKS(500)));
+
+                wait_auto_scan_complete();
+            }
+
+            pel_scan_msg.opcode = PEL_STOP;
+            ASSERT(xMessageBufferSend(pel_scan_msqQ, &pel_scan_msg, sizeof(pel_scan_msg.opcode), pdMS_TO_TICKS(500)));
+            break;
+        }
+
+        default:
+            break;
+    }
+}
+
+#define MANUAL_SCAN_MODE            0x01
+#define AUTO_SCAN_MODE              0x02
+#define R_EXTERNAL_CALIBRATION_MODE 0x03
+
+const elite_instance_t pel_elite_instance = {
+    .cis_func = {
+                 [CIS_VERSION] = cis_version,
+                 },
+    .vis_func = {
+                 [VIS_RST] = vis_rst,
+                 },
+    .ris_func = {
+                 [MANUAL_SCAN_MODE]            = manual_scan_mode,
+                 [AUTO_SCAN_MODE]              = auto_scan_mode,
+                 [R_EXTERNAL_CALIBRATION_MODE] = R_external_calibration_mode,
+                 [DEV_MODE]                    = dev_mode,
+                 }
+};
+
+const elite_instance_t *pel_init(void)
+{
+    NRF_LOG_INFO("[Board] FW ver: %02d%02d%02d %02d:%02d", VERSION_DATE_YEAR, VERSION_DATE_MONTH, VERSION_DATE_DAY, VERSION_DATE_HOUR, VERSION_DATE_MINUTE);
+    NRF_LOG_INFO("[Board] %s", BOARD_IOPx ? "IOPH" : "IOPL");
+
+    auto_scan_cplt_sem = xSemaphoreCreateBinary();
+    ASSERT(auto_scan_cplt_sem);
+
+    adc_convt_cplt_sem = xSemaphoreCreateBinary();
+    ASSERT(adc_convt_cplt_sem);
+
+    pel_scan_msqQ = xMessageBufferCreate(1024);
+    ASSERT(pel_scan_msqQ);
+
+    ASSERT(xTaskCreate(pel_scan_mode_task, "pel_scan_mode", 512, NULL, 4, NULL));
+
+    hot_swap_monitor_init();
+
+    return &pel_elite_instance;
+}
+
+#endif
@@ -0,0 +1,59 @@
+#ifndef __PEL_V3_0_H__
+#define __PEL_V3_0_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite.h"
+#include "elite_board.h"
+
+#define VERSION_DATE_YEAR   25
+#define VERSION_DATE_MONTH  7
+#define VERSION_DATE_DAY    10
+#define VERSION_DATE_HOUR   14
+#define VERSION_DATE_MINUTE 15
+
+#define PEL_0P5R_MASK       (0x01 << 0)
+#define PEL_1P0R_MASK       (0x01 << 1)
+#define PEL_2P0R_MASK       (0x01 << 2)
+#define PEL_4P0R_MASK       (0x01 << 3)
+#define PEL_8P0R_MASK       (0x01 << 4)
+#define PEL_16P2R_MASK      (0x01 << 5)
+#define PEL_32P4R_MASK      (0x01 << 6)
+#define PEL_63P4R_MASK      (0x01 << 7)
+#define PEL_127R_MASK       (0x01 << 8)
+#define PEL_255R_MASK       (0x01 << 9)
+#define PEL_511R_MASK       (0x01 << 10)
+#define PEL_1000R_MASK      (0x01 << 11)
+
+    typedef struct __PACKED
+    {
+        uint16_t mem_board_id : 8;
+        uint16_t packet_seq   : 8;
+        uint32_t notify_time;
+        int32_t output_vo_raw;
+        int32_t output_vc_raw;
+        int32_t output_ve_raw;
+        float hold_OUT_v;
+        float hold_VCC_v;
+        float hold_VEE_v;
+        uint16_t resis_pattern_id;
+        uint16_t resis_bitsmask;
+        float resis_g_value;
+        uint32_t mode_complete : 4;
+        uint32_t rsvd          : 28;
+        uint32_t val_1;
+        uint32_t val_2;
+        uint16_t val_3;
+    } scan_mode_notify_packet_t;
+
+    const elite_instance_t *pel_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __PEL_V3_0_H__ */
@@ -0,0 +1,434 @@
+#include "app_config.h"
+#include "elite_board.h"
+
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+
+#include "nrf_spim.h"
+#include "nrf_timer.h"
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "task.h"
+
+#include "SEGGER_RTT.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+
+pel_hw_t pel_hw = {
+    .pulse_tmr    = NRF_TIMER3,
+    .pulse_irq_n  = TIMER3_IRQn,
+    .pulse_cnt    = 0,
+    .adc.channels = {
+                     [OUTPUT_ACS37030_REF_IDX] = OUTPUT_ACS37030_VREF_CHANNEL,
+                     [OUTPUT_I_OUT_IDX]        = OUTPUT_I_OUT_CHANNEL,
+                     [OUTPUT_VO_IDX]           = OUTPUT_VO_CHANNEL,
+                     [OUTPUT_VC_IDX]           = OUTPUT_VC_CHANNEL,
+                     [OUTPUT_VE_IDX]           = OUTPUT_VE_CHANNEL},
+    .adc.gain        = NRF_SAADC_GAIN1_6,
+    .adc.smaple_time = NRF_SAADC_ACQTIME_3US
+};
+
+void spim_xfer(uint32_t cs_pin,
+               nrf_spim_mode_t spi_mode,
+               uint8_t *p_tx_buffer,
+               uint16_t tx_buffer_length,
+               uint8_t *p_rx_buf,
+               uint16_t rx_buffer_length)
+{
+    __disable_irq();
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+
+    switch (spi_mode)
+    {
+        default:
+        case NRF_SPIM_MODE_0:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_1:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_2:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos);
+            break;
+
+        case NRF_SPIM_MODE_3:
+            NRF_SPIM3->CONFIG = (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos) |
+                                (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) |
+                                (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos);
+            break;
+    }
+
+    NRF_SPIM3->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+
+    NRF_SPIM3->TXD.MAXCNT = tx_buffer_length;
+    NRF_SPIM3->TXD.PTR    = (uint32_t)p_tx_buffer;
+
+    NRF_SPIM3->RXD.MAXCNT = rx_buffer_length;
+    NRF_SPIM3->RXD.PTR    = (uint32_t)p_rx_buf;
+
+    nrf_gpio_pin_clear(cs_pin);
+
+    NRF_SPIM3->EVENTS_END  = 0;
+    NRF_SPIM3->TASKS_START = 1;
+    do {
+    } while (NRF_SPIM3->EVENTS_END == 0);
+
+    nrf_gpio_pin_set(cs_pin);
+
+    __enable_irq();
+}
+
+#define MIN_PULSE_WIDTH 2
+#define MIN_PULSE_IDLE  2
+#define MAX_PULSE_WIDTH INT16_MAX
+#define MAX_PULSE_IDLE  INT16_MAX
+
+void set_anode_cathode_to_default(void)
+{
+    if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_I_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_pin_clear(SAMPLE_I_PIN);
+        nrf_gpio_pin_clear(SAMPLE_V_PIN);
+        nrf_gpio_pin_clear(TP1_PIN);
+        nrf_gpio_pin_clear(TP2_PIN);
+    }
+}
+
+static void pel_saadc_init(pel_adc_t *p_adc)
+{
+    /* stop ssadc */
+    NRF_SAADC->EVENTS_STOPPED = 0;
+    NRF_SAADC->TASKS_STOP     = 1;
+    do {
+    } while (NRF_SAADC->EVENTS_STOPPED == 0);
+
+    /* disable ssadc */
+    NRF_SAADC->ENABLE = 0;
+
+    /*
+        ref: p.381, nrf52840_PS_v1.1.pdf
+        Note: Oversampling should only be used when a single input channel is enabled, as averaging is
+        performed over all enabled channels.
+    */
+    NRF_SAADC->OVERSAMPLE = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass;
+    NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit;
+    /* config analog inputs */
+    for (uint32_t i = 0; i < COUNTOF(NRF_SAADC->CH); i++)
+    {
+        if (i < COUNTOF(p_adc->channels))
+        {
+            NRF_SAADC->CH[i].PSELP = NRF_SAADC_INPUT_AIN0 + p_adc->channels[i];
+            NRF_SAADC->CH[i].PSELN = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG =
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESP_Pos) |
+                (NRF_SAADC_RESISTOR_DISABLED << SAADC_CH_CONFIG_RESN_Pos) |
+                (p_adc->gain << SAADC_CH_CONFIG_GAIN_Pos) |
+                (NRF_SAADC_REFERENCE_INTERNAL << SAADC_CH_CONFIG_REFSEL_Pos) |
+                (p_adc->smaple_time << SAADC_CH_CONFIG_TACQ_Pos) |
+                (NRF_SAADC_MODE_SINGLE_ENDED << SAADC_CH_CONFIG_MODE_Pos) |
+                (NRF_SAADC_BURST_DISABLED << SAADC_CH_CONFIG_BURST_Pos);
+        }
+        else
+        {
+            NRF_SAADC->CH[i].PSELP  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].PSELN  = NRF_SAADC_INPUT_DISABLED;
+            NRF_SAADC->CH[i].CONFIG = 0;
+        }
+    }
+    /* enable ssadc */
+    NRF_SAADC->INTENSET      = NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END;
+    NRF_SAADC->ENABLE        = 1;
+    NRF_SAADC->RESULT.PTR    = (uint32_t)p_adc->results;
+    NRF_SAADC->RESULT.MAXCNT = COUNTOF(p_adc->results);
+}
+
+void TIMER3_IRQHandler(void)
+{
+    if (pel_hw.pulse_tmr->EVENTS_COMPARE[0])
+    {
+        pel_hw.pulse_tmr->EVENTS_COMPARE[0] = 0;
+
+        pel_hw.pulse_is_running = 1;
+
+        if (pel_hw.pulse_cnt)
+        {
+            pel_hw.pulse_cnt--;
+        }
+    }
+}
+
+void SAADC_IRQHandler(void)
+{
+    if (NRF_SAADC->EVENTS_STARTED)
+    {
+        NRF_SAADC->EVENTS_STARTED = 0;
+        if (pel_hw.pulse_cnt == 0)
+        {
+            pel_hw.pulse_tmr->TASKS_STOP = 1;
+        }
+        return;
+    }
+
+    if (NRF_SAADC->EVENTS_END)
+    {
+        NRF_SAADC->EVENTS_END    = 0;
+        NRF_SAADC->RESULT.PTR    = (uint32_t)pel_hw.adc.results;
+        NRF_SAADC->RESULT.MAXCNT = COUNTOF(pel_hw.adc.results);
+        pel_hw.pulse_is_running  = 0;
+        if (pel_hw.adc.convt_new_arrival_cb)
+        {
+            pel_hw.adc.convt_new_arrival_cb();
+        }
+    }
+}
+
+void pel_pulse_gen_init(pel_config_t cfg)
+{
+    pel_hw.pulse_tmr->TASKS_STOP = 1;
+
+    sd_nvic_DisableIRQ(pel_hw.pulse_irq_n);
+    sd_nvic_ClearPendingIRQ(pel_hw.pulse_irq_n);
+
+    sd_nvic_DisableIRQ(SAADC_IRQn);
+    sd_nvic_ClearPendingIRQ(SAADC_IRQn);
+
+    pel_hw.pulse_cnt                = cfg.pulse_cnt;
+    pel_hw.adc.gain                 = cfg.gain;
+    pel_hw.adc.smaple_time          = cfg.smaple_time;
+    pel_hw.adc.convt_new_arrival_cb = cfg.convt_new_arrival_cb;
+
+    pel_saadc_init(&pel_hw.adc);
+
+    // disable gpio task
+    for (int i = 0; i < 4; i++)
+    {
+        nrf_gpiote_task_disable(i);
+    }
+
+    set_anode_cathode_to_default();
+
+    // config gpiote task
+    nrf_gpiote_task_configure(0, cfg.anode_pin, NRF_GPIOTE_POLARITY_TOGGLE, (cfg.mode == 0) ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(1, cfg.smaple_i_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    nrf_gpiote_task_configure(2, cfg.sample_v_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        nrf_gpiote_task_configure(3, cfg.test_pin, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
+    }
+
+    // enable gpio task
+    for (int i = 0; i < 4; i++)
+    {
+        nrf_gpiote_task_enable(i);
+    }
+
+    NRF_PPI->CH[0].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[0];
+    NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->CHENSET   = (1 << (0));
+
+    NRF_PPI->CH[1].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[1];
+    NRF_PPI->CH[1].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1]; // smaple_i_pin
+    NRF_PPI->FORK[1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2]; // sample_v_pin
+    NRF_PPI->CHENSET     = (1 << (1));
+
+    NRF_PPI->CH[2].EEP   = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[2];
+    NRF_PPI->CH[2].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[1];
+    NRF_PPI->FORK[2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[2];
+    NRF_PPI->CHENSET     = (1 << (2));
+
+    NRF_PPI->CH[3].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[3];
+    NRF_PPI->CH[3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[0]; // anode_pin
+    NRF_PPI->CHENSET   = (1 << (3));
+
+    NRF_PPI->CH[4].EEP = (uint32_t)&pel_hw.pulse_tmr->EVENTS_COMPARE[4];
+    NRF_PPI->CH[4].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
+    NRF_PPI->CHENSET   = (1 << (4));
+
+    if (cfg.test_pin != 0xFFFFFFFF)
+    {
+        NRF_PPI->CH[6].EEP   = (uint32_t)&NRF_SAADC->EVENTS_STARTED;
+        NRF_PPI->CH[6].TEP   = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
+        NRF_PPI->FORK[6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3]; // test_pin
+        NRF_PPI->CHENSET     = (1 << (6));
+        NRF_PPI->CH[7].EEP   = (uint32_t)&NRF_SAADC->EVENTS_END;
+        NRF_PPI->CH[7].TEP   = (uint32_t)&NRF_GPIOTE->TASKS_OUT[3];
+        NRF_PPI->CHENSET     = (1 << (7));
+    }
+
+    pel_hw.pulse_tmr->PRESCALER = NRF_TIMER_FREQ_16MHz;
+    pel_hw.pulse_tmr->MODE      = NRF_TIMER_MODE_TIMER;
+    pel_hw.pulse_tmr->BITMODE   = NRF_TIMER_BIT_WIDTH_32;
+    pel_hw.pulse_tmr->CC[0]     = cfg.point_us[0] * 16;
+    pel_hw.pulse_tmr->CC[1]     = pel_hw.pulse_tmr->CC[0] + cfg.point_us[1] * 16;
+    pel_hw.pulse_tmr->CC[2]     = pel_hw.pulse_tmr->CC[1] + cfg.point_us[2] * 16;
+    pel_hw.pulse_tmr->CC[3]     = pel_hw.pulse_tmr->CC[2] + cfg.point_us[3] * 16;
+    pel_hw.pulse_tmr->CC[4]     = pel_hw.pulse_tmr->CC[3] + cfg.point_us[4] * 16 + cfg.adc_timing_shift;
+    pel_hw.pulse_tmr->CC[5]     = pel_hw.pulse_tmr->CC[4];
+    pel_hw.pulse_tmr->SHORTS    = NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK;
+    pel_hw.pulse_tmr->INTENSET  = NRF_TIMER_INT_COMPARE0_MASK;
+
+    sd_nvic_SetPriority(SAADC_IRQn, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(SAADC_IRQn);
+
+    sd_nvic_SetPriority(pel_hw.pulse_irq_n, _PRIO_APP_HIGH);
+    sd_nvic_EnableIRQ(pel_hw.pulse_irq_n);
+}
+
+void pel_pulse_gen_start(void)
+{
+    pel_hw.pulse_tmr->TASKS_START = 1;
+}
+
+void pel_pulse_gen_stop(void)
+{
+    pel_hw.pulse_cnt = 0;
+    do {
+    } while (pel_hw.pulse_is_running == 1);
+    pel_hw.adc.convt_new_arrival_cb = NULL;
+}
+
+#if (DEF_ELITE_DEMO_W_SOFTDEVICE == 1) || (DEF_ELITE_DEMO_WO_SOFTDEVICE == 1)
+static void pel_pulse_gen_demo_task(void *p_arg)
+{
+    pel_config_t pel_cfg = {
+        .anode_pin    = ANODE_PIN,
+        .cathode_pin  = CATHODE_PIN,
+        .smaple_i_pin = SAMPLE_I_PIN,
+        .sample_v_pin = SAMPLE_V_PIN,
+        .test_pin     = TP1_PIN,
+        .mode         = BOARD_IOPx,
+        .point_us     = {
+                         10000,
+                         3,
+                         5,
+                         2,
+                         0,
+                         },
+        .pulse_cnt        = 0xFFFFFFFF,
+        .gain             = NRF_SAADC_GAIN1_6,
+        .smaple_time      = NRF_SAADC_ACQTIME_10US,
+        .adc_timing_shift = 0,
+    };
+
+    pel_pulse_gen_init(pel_cfg);
+
+    pel_pulse_gen_start();
+
+    for (;;)
+    {
+        static uint32_t i = 0;
+        vTaskDelay(pdMS_TO_TICKS(pel_cfg.point_us[0] / 1000));
+        SEGGER_RTT_printf(0, "%d, %d, %d, %d, %d, %d\r\n", i++, pel_hw.adc.results[0], pel_hw.adc.results[1], pel_hw.adc.results[2], pel_hw.adc.results[3], pel_hw.adc.results[4]);
+    }
+}
+
+void pel_pulse_gen_demo(void)
+{
+}
+#endif
+
+void pel20_io_init(void)
+{
+    const uint32_t config_output_and_set[] = {
+        INPUT_1_PIN,
+        INPUT_2_PIN,
+        INPUT_3_PIN,
+        INPUT_4_PIN,
+        INPUT_5_PIN,
+        INPUT_6_PIN,
+        INPUT_7_PIN,
+        INPUT_8_PIN,
+        INPUT_9_PIN,
+        INPUT_10_PIN,
+        INPUT_11_PIN,
+        INPUT_12_PIN
+    };
+
+    const uint32_t config_output_and_clear[] = {
+        TP1_PIN,
+        TP2_PIN,
+        SAMPLE_I_PIN,
+        SAMPLE_V_PIN,
+        HOT_SWAP_1_PIN
+    };
+
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_set); i++)
+    {
+        nrf_gpio_pin_set(config_output_and_set[i]);
+        nrf_gpio_cfg_output(config_output_and_set[i]);
+    }
+
+    for (int i = 0; i < ARRAY_SIZE(config_output_and_clear); i++)
+    {
+        nrf_gpio_pin_clear(config_output_and_clear[i]);
+        nrf_gpio_cfg_output(config_output_and_clear[i]);
+    }
+
+    nrf_gpio_cfg_input(RESET_PIN, NRF_GPIO_PIN_NOPULL);
+    nrf_gpio_cfg_input(CATHODE_PIN, NRF_GPIO_PIN_NOPULL);
+    nrf_gpio_cfg_input(HOT_SWAP_SIGNAL_PIN, NRF_GPIO_PIN_PULLUP);
+
+    if (BOARD_IOPx == BOARD_IOPH)
+    {
+        nrf_gpio_pin_clear(ANODE_PIN);
+        nrf_gpio_pin_set(INA_HI_PIN);
+        nrf_gpio_pin_set(LED_IOPL_PIN);
+        nrf_gpio_pin_clear(LED_IOPH_PIN);
+    }
+    else if (BOARD_IOPx == BOARD_IOPL)
+    {
+        nrf_gpio_pin_set(ANODE_PIN);
+        nrf_gpio_pin_clear(INA_HI_PIN);
+        nrf_gpio_pin_clear(LED_IOPL_PIN);
+        nrf_gpio_pin_set(LED_IOPH_PIN);
+    }
+
+    nrf_gpio_cfg_output(ANODE_PIN);
+    nrf_gpio_cfg_output(INA_HI_PIN);
+    nrf_gpio_cfg_output(LED_IOPL_PIN);
+    nrf_gpio_cfg_output(LED_IOPH_PIN);
+
+    // Config spi module
+    nrf_gpio_pin_set(WP_MEM_PIN);
+    nrf_gpio_pin_set(CS_MEM_PIN);
+    nrf_gpio_pin_clear(SPIM_MOSI_PIN);
+    nrf_gpio_pin_clear(SPIM_CLK_PIN);
+    nrf_gpio_cfg_output(WP_MEM_PIN);
+    nrf_gpio_cfg_output(CS_MEM_PIN);
+    nrf_gpio_cfg_output(SPIM_MOSI_PIN);
+    nrf_gpio_cfg_output(SPIM_CLK_PIN);
+    nrf_gpio_cfg_input(SPIM_MISO_PIN, NRF_GPIO_PIN_NOPULL);
+
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos;
+    NRF_SPIM3->ORC             = 0x00000000;
+    NRF_SPIM3->FREQUENCY       = SPIM_FREQUENCY_FREQUENCY_M32;
+    NRF_SPIM3->CSNPOL          = SPIM_CSNPOL_CSNPOL_LOW;
+    NRF_SPIM3->IFTIMING.CSNDUR = 8;
+    NRF_SPIM3->PSEL.CSN        = CS_MEM_PIN;
+    NRF_SPIM3->PSEL.SCK        = SPIM_CLK_PIN;
+    NRF_SPIM3->PSEL.MOSI       = SPIM_MOSI_PIN;
+    NRF_SPIM3->PSEL.MISO       = SPIM_MISO_PIN;
+    NRF_SPIM3->ENABLE          = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;
+}
+
+#endif
@@ -0,0 +1,129 @@
+#ifndef __PEL_V3_0_IO_H__
+#define __PEL_V3_0_IO_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "app_config.h"
+#include "elite_board.h"
+#include "nrf_gpio.h"
+#include "nrf_saadc.h"
+#include "nrf_spim.h"
+
+#if (DEF_ELITE_MODEL == DEF_ELITE_PEL_V3_0)
+#define INPUT_1_PIN         NRF_GPIO_PIN_MAP(0, 15)
+#define INPUT_2_PIN         NRF_GPIO_PIN_MAP(0, 13)
+#define INPUT_3_PIN         NRF_GPIO_PIN_MAP(0, 20)
+#define INPUT_4_PIN         NRF_GPIO_PIN_MAP(1, 0)
+#define INPUT_5_PIN         NRF_GPIO_PIN_MAP(0, 25)
+#define INPUT_6_PIN         NRF_GPIO_PIN_MAP(0, 11)
+#define INPUT_7_PIN         NRF_GPIO_PIN_MAP(0, 14)
+#define INPUT_8_PIN         NRF_GPIO_PIN_MAP(0, 17)
+#define INPUT_9_PIN         NRF_GPIO_PIN_MAP(1, 8)
+#define INPUT_10_PIN        NRF_GPIO_PIN_MAP(0, 21)
+#define INPUT_11_PIN        NRF_GPIO_PIN_MAP(0, 19)
+#define INPUT_12_PIN        NRF_GPIO_PIN_MAP(0, 22)
+
+#define RESET_PIN           NRF_GPIO_PIN_MAP(0, 18)
+#define TP1_PIN             NRF_GPIO_PIN_MAP(0, 5)
+#define TP2_PIN             NRF_GPIO_PIN_MAP(0, 26)
+#define SAMPLE_I_PIN        NRF_GPIO_PIN_MAP(1, 11)
+#define SAMPLE_V_PIN        NRF_GPIO_PIN_MAP(1, 6)
+#define ANODE_PIN           NRF_GPIO_PIN_MAP(0, 7)
+#define CATHODE_PIN         NRF_GPIO_PIN_MAP(0, 8)
+#define HOT_SWAP_1_PIN      NRF_GPIO_PIN_MAP(0, 1)
+#define HOT_SWAP_SIGNAL_PIN NRF_GPIO_PIN_MAP(0, 0)
+#define INA_HI_PIN          NRF_GPIO_PIN_MAP(1, 12)
+
+#define WP_MEM_PIN          NRF_GPIO_PIN_MAP(0, 12)
+#define CS_MEM_PIN          NRF_GPIO_PIN_MAP(0, 6)
+#define SPIM_MOSI_PIN       NRF_GPIO_PIN_MAP(0, 27)
+#define SPIM_CLK_PIN        NRF_GPIO_PIN_MAP(0, 4)
+#define SPIM_MISO_PIN       NRF_GPIO_PIN_MAP(1, 9)
+
+#define LED_IOPL_PIN        NRF_GPIO_PIN_MAP(0, 24) // pin60
+#define LED_IOPH_PIN        NRF_GPIO_PIN_MAP(0, 16) // pin62
+
+#define LED_R_PINS              \
+    {                           \
+        NRF_GPIO_PIN_MAP(1, 13) \
+    }
+#define LED_G_PINS             \
+    {                          \
+        NRF_GPIO_PIN_MAP(1, 3) \
+    }
+#define LED_B_PINS              \
+    {                           \
+        NRF_GPIO_PIN_MAP(1, 10) \
+    }
+
+#define OUTPUT_ACS37030_VREF_CHANNEL 7
+#define OUTPUT_I_OUT_CHANNEL         4
+#define OUTPUT_VO_CHANNEL            5
+#define OUTPUT_VC_CHANNEL            0
+#define OUTPUT_VE_CHANNEL            1
+
+#define OUTPUT_ACS37030_REF_IDX      0
+#define OUTPUT_I_OUT_IDX             1
+#define OUTPUT_VO_IDX                2
+#define OUTPUT_VC_IDX                3
+#define OUTPUT_VE_IDX                4
+
+    typedef struct
+    {
+        uint32_t anode_pin;
+        uint32_t cathode_pin;
+        uint32_t smaple_i_pin;
+        uint32_t sample_v_pin;
+        uint32_t test_pin;
+        uint32_t point_us[5]; // toggle point timestamp
+        uint32_t pulse_cnt;   // min: 1, max: 0xFFFFFFFF
+        uint32_t mode;        // 0: IOPL mode, 1: IOPH mode
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        int32_t adc_timing_shift;
+        void (*convt_new_arrival_cb)(void);
+    } pel_config_t;
+
+    typedef struct
+    {
+        nrf_saadc_gain_t gain;
+        nrf_saadc_acqtime_t smaple_time;
+        uint32_t channels[5];
+        int16_t results[5];
+        float results_f[5];
+        void (*convt_new_arrival_cb)(void);
+    } pel_adc_t;
+
+    typedef struct
+    {
+        NRF_TIMER_Type *pulse_tmr;
+        uint32_t pulse_irq_n;
+        uint32_t pulse_cnt;
+        uint32_t pulse_is_running;
+        pel_adc_t adc;
+    } pel_hw_t;
+
+    extern pel_hw_t pel_hw;
+
+    void spim_xfer(uint32_t cs_pin,
+                   nrf_spim_mode_t spi_mode,
+                   uint8_t *p_tx_buffer,
+                   uint16_t tx_buffer_length,
+                   uint8_t *p_rx_buf,
+                   uint16_t rx_buffer_length);
+
+    void pel20_io_init(void);
+    void pel_pulse_gen_init(pel_config_t cfg);
+    void pel_pulse_gen_start(void);
+    void pel_pulse_gen_stop(void);
+
+#endif /* ! DEF_ELITE_MODEL */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! __PEL_V3_0_IO_H__ */
@@ -207,7 +207,7 @@ void uart_init(void)
    NRF_UARTE0->PSEL.RXD = UART_RX_PIN | (UARTE_PSEL_RXD_CONNECT_Connected << UARTE_PSEL_RXD_CONNECT_Pos);
    NRF_UARTE0->PSEL.CTS = 0;
    NRF_UARTE0->PSEL.RTS = 0;
-    NRF_UARTE0->CONFIG   = UARTE_CONFIG_STOP_Msk;
+    NRF_UARTE0->CONFIG   = 0;
    NRF_UARTE0->BAUDRATE = UARTE_BAUDRATE_BAUDRATE_Baud115200;
    NRF_UARTE0->ENABLE   = UARTE_ENABLE_ENABLE_Enabled;

@@ -16,9 +16,10 @@ extern "C"
    int uart_recv(void *p_data, uint32_t max_size);
    ret_code_t uart_set_baud(uint32_t baudrate);
 #else
-    #define uart_init()
-    #define uart_send(...) ;
-    #define uart_recv(...) ;
+#define uart_init()
+#define uart_send(...) ;
+#define uart_recv(...) ;
+#define uart_set_baud(...)
 #endif /* ! DEF_UARTE_ENABLED */

 #ifdef __cplusplus
Author	SHA1	Message	Date
Roy_01	a0f36b41dd	Merge branch 'dev/PELv3.0' into develp	2025-07-15 10:41:14 +08:00
Roy_01	19d8a2aeaa	config: switch project configuration to DEF_ELITE_DEV	2025-07-15 10:41:00 +08:00
Roy_01	edda0d6d78	feat: updated dev_identify	2025-07-14 16:03:49 +08:00
Roy_01	b5e1853b8f	style: update LED macro	2025-07-14 14:33:08 +08:00
Roy_01	1fd5ce8092	feat: remove led_mode function	2025-07-11 16:13:01 +08:00
Roy_01	ba82028898	feat: new RGB LED function	2025-07-10 14:15:30 +08:00
Roy_01	04df659d2d	feat: updated load value	2025-07-03 13:47:09 +08:00
Roy_01	bcce587aa3	fix: 1.correct anode/sample_I/sample_V timing 2.include pel_v3_0.h for PELv3.0	2025-07-02 15:55:34 +08:00
Roy_01	d9a68724ba	fix: fix memory leak by adjusting stack size from 256 to 320 (256 + 256/4)	2025-07-01 15:51:36 +08:00
Roy_01	e092b19ddb	feat: new hot_swap_monitor	2025-06-27 17:15:06 +08:00
Roy_01	d6efaf7059	feat: updated RESET_PIN & CATHODE_PIN & HOT_SWAP_SIGNAL_PIN config	2025-06-27 17:13:35 +08:00
Roy_01	8caf9e7d93	feat: add and modify PEL v3.0 GPIO configuration	2025-06-26 17:43:25 +08:00
Roy_01	89d1c12f51	feat: new PEL v3.0 device code	2025-06-26 14:16:11 +08:00
Roy_01	59bf2995e6	config: switch project configuration to PEL v3.0	2025-06-26 14:10:05 +08:00
Roy_01	f6ae3ec1b9	config: new DEF_ELITE_PEL_V3_0 config	2025-06-26 09:59:10 +08:00
Roy_01	13a3bc2bac	config: let each device decide DEF_UARTE_ENABLED	2025-06-12 10:08:27 +08:00
Roy_01	057cd37031	Merge branch 'dev/MMMv1.0' into develp	2025-06-12 10:07:46 +08:00
Roy_01	2fe3c96281	config: switch project configuration to DEF_ELITE_DEV	2025-06-11 16:35:03 +08:00
chain40	8c90802ce3	Merge branch 'ble_uart' into develop	2025-06-10 22:08:42 +08:00
chain40	0cd2355014	fix: Replace custom UUID with BLE UUID for ble uart	2025-06-10 22:08:30 +08:00
Roy_01	41decad72e	feat: new MMMv1.0 device	2025-06-04 16:44:38 +08:00
Roy_01	57e6ab5af2	config: new DEF_ELITE_MMM_V1_0 config	2025-06-04 16:20:09 +08:00
chain40	453278fa33	Merge branch 'ble_uart' into develop	2025-05-26 21:00:51 +08:00
chain40	b94ad89af7	fix: use one stop bit	2025-05-26 20:52:01 +08:00
chain40	41227c9877	Merge branch 'ble_uart' into develop	2025-05-21 20:56:22 +08:00