Compare commits
20 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 51e447db3b | |||
| 80ea8a6772 | |||
| 08c2de8c43 | |||
| db47c14537 | |||
| fc811cef35 | |||
| eda0943fd3 | |||
| ee203f45fd | |||
| de4ede4187 | |||
| b5baead500 | |||
| f9c7d04647 | |||
| e430cd41fc | |||
| 8f3f44bc40 | |||
| 3142f007b1 | |||
| a1eb286365 | |||
| 7369ea8430 | |||
| 1540745ce5 | |||
| 9fd06428c3 | |||
| 24b0889532 | |||
| 853151a83a | |||
| e51def4f9f |
+21
-38
@@ -13,7 +13,7 @@
|
||||
=======================*/
|
||||
|
||||
#define MEM_BUFFER_SIZE SPI_TX_BUFFER_SIZE
|
||||
#define MEM_SWITCH_THRESHOLD 7000 //max:7K bytes
|
||||
#define MEM_SWITCH_THRESHOLD 0xBB8 //max:3K bytes
|
||||
|
||||
#define MSM_REG_WRITE 0x01
|
||||
#define MEM_INS_WRITE 0x02
|
||||
@@ -71,22 +71,14 @@ void master_switch_memory();
|
||||
|
||||
//static void central_handle_notify(uint8_t notify_length, uint8_t *notify_value){
|
||||
|
||||
#define RAM_INS_LEN 3
|
||||
#define RAM_RED_HEADER_LEN 3
|
||||
#define RAM_RED_TAILER_LEN 8
|
||||
#define ELITE_NOTIFY_LEN 120
|
||||
#define RAM_RED_CTX_LEN (RAM_INS_LEN + RAM_RED_HEADER_LEN + RAM_RED_TAILER_LEN + ELITE_NOTIFY_LEN)
|
||||
|
||||
uint8_t spi_buffer0[256];
|
||||
uint8_t spi_buffer1[256];
|
||||
uint8_t recv_ins[RAM_RED_CTX_LEN] = {0};
|
||||
uint8_t recv_ins[26] = {0};
|
||||
static uint8_t green_wrong = 0;
|
||||
static uint8_t green_retry_cnt = 0;
|
||||
|
||||
static void central_handle_notify()
|
||||
{
|
||||
static uint8_t check_buffer[RAM_RED_CTX_LEN] = {0};
|
||||
static uint8_t tailer[RAM_RED_TAILER_LEN] = {0};
|
||||
static void central_handle_notify(){
|
||||
static uint8_t check_buffer[29] = {0};
|
||||
static uint8_t spi_buffer_index = 0;
|
||||
static uint8_t wrong = 0;
|
||||
static uint8_t retry_cnt = 0;
|
||||
@@ -98,10 +90,11 @@ static void central_handle_notify()
|
||||
uint8_t counter;
|
||||
|
||||
// localize current buffer
|
||||
if (spi_buffer_index) {
|
||||
if(spi_buffer_index){
|
||||
spi_buffer_index = ~spi_buffer_index;
|
||||
p = spi_buffer0;
|
||||
} else {
|
||||
}
|
||||
else{
|
||||
spi_buffer_index = ~spi_buffer_index;
|
||||
p = spi_buffer1;
|
||||
}
|
||||
@@ -111,7 +104,7 @@ static void central_handle_notify()
|
||||
|
||||
// update offset
|
||||
uint32_t cnt_offset = not_offset;
|
||||
not_offset = cnt_offset + RAM_RED_HEADER_LEN + notify_length + RAM_RED_TAILER_LEN;
|
||||
not_offset = cnt_offset + 3 + notify_length;
|
||||
|
||||
p[0] = MEM_INS_WRITE; // instruction
|
||||
p[1] = (uint8_t)((cnt_offset >> 8) & 0xFF); // address
|
||||
@@ -119,19 +112,10 @@ static void central_handle_notify()
|
||||
p[3] = 0xFF; // data header
|
||||
p[4] = counter; // data counter
|
||||
p[5] = notify_length; // data content length
|
||||
|
||||
memcpy(p + 6, notify_value, notify_length); // data content
|
||||
|
||||
tailer[0] = wrong;
|
||||
tailer[1] = retry_cnt;
|
||||
tailer[2] = green_wrong;
|
||||
tailer[3] = green_retry_cnt;
|
||||
tailer[4] = mem_sel & 0x01;
|
||||
tailer[5] = 0xFF;
|
||||
tailer[6] = counter;
|
||||
tailer[7] = notify_length;
|
||||
memcpy(p + 6 + notify_length, tailer, RAM_RED_TAILER_LEN); // tailer content
|
||||
|
||||
central_spi_send(p, RAM_RED_CTX_LEN);
|
||||
central_spi_send(p, notify_length + 6);
|
||||
|
||||
// read RAM
|
||||
recv_ins[0] = 0x03; //read RAM
|
||||
@@ -142,7 +126,7 @@ static void central_handle_notify()
|
||||
|
||||
while (1) {
|
||||
// compare data
|
||||
for (i=3; i<RAM_RED_CTX_LEN; i++) {
|
||||
for (i=3; i<26; i++) {
|
||||
if (p[i]!=check_buffer[i]) {
|
||||
write_again = true;
|
||||
break;
|
||||
@@ -155,7 +139,7 @@ static void central_handle_notify()
|
||||
write_limit++;
|
||||
|
||||
//write RAM
|
||||
central_spi_send(p, RAM_RED_CTX_LEN);
|
||||
central_spi_send(p, notify_length + 6);
|
||||
|
||||
// read RAM
|
||||
recv_ins[0] = 0x03; //read RAM
|
||||
@@ -167,13 +151,13 @@ static void central_handle_notify()
|
||||
break;
|
||||
}
|
||||
|
||||
if (write_limit >= 2) {
|
||||
if (write_limit >= 1) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for (i=3; i<RAM_RED_CTX_LEN; i++) {
|
||||
if (p[i] != check_buffer[i]) {
|
||||
for (i=3; i<26; i++) {
|
||||
if (p[i]!=check_buffer[i]) {
|
||||
wrong_flag = true;
|
||||
break;
|
||||
}
|
||||
@@ -183,7 +167,7 @@ static void central_handle_notify()
|
||||
wrong++;
|
||||
}
|
||||
|
||||
memset(p, 0, RAM_RED_CTX_LEN);
|
||||
memset(p,0,notify_length + 6);
|
||||
|
||||
notify_handle_done = true;
|
||||
|
||||
@@ -197,8 +181,7 @@ static void central_handle_notify()
|
||||
}
|
||||
}
|
||||
|
||||
void master_switch_memory()
|
||||
{
|
||||
void master_switch_memory() {
|
||||
uint16_t cnt_offset = not_offset;
|
||||
not_offset = MEM_META_LENGTH;
|
||||
static uint8_t check_green_buffer[10] = {0};
|
||||
@@ -231,7 +214,7 @@ void master_switch_memory()
|
||||
while (1) {
|
||||
// compare data
|
||||
for (i=3; i<7; i++) {
|
||||
if (p[i] != check_green_buffer[i]) {
|
||||
if (p[i]!=check_green_buffer[i]) {
|
||||
write_again = true;
|
||||
break;
|
||||
}
|
||||
@@ -255,13 +238,13 @@ void master_switch_memory()
|
||||
break;
|
||||
}
|
||||
|
||||
if (write_limit >= 2) {
|
||||
if (write_limit >= 1) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for (i=3; i<7; i++) {
|
||||
if (p[i] != check_green_buffer[i]) {
|
||||
if (p[i]!=check_green_buffer[i]) {
|
||||
wrong_flag = true;
|
||||
break;
|
||||
}
|
||||
@@ -271,7 +254,7 @@ void master_switch_memory()
|
||||
green_wrong++;
|
||||
}
|
||||
|
||||
memset(p, 0, 7);
|
||||
memset(p,0,7);
|
||||
|
||||
// switch memory
|
||||
mem_sel++;
|
||||
|
||||
Reference in New Issue
Block a user