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29 Commits

Author SHA1 Message Date
Roy 51e447db3b test 1 to 8 2021-11-01 09:54:00 +08:00
Roy 80ea8a6772 r/w twice 2021-10-25 10:33:27 +08:00
Roy 08c2de8c43 debug 1 to 8 2021-10-05 16:17:48 +08:00
Roy db47c14537 set limit of writing Ram 5 times 2021-10-01 10:09:29 +08:00
Roy fc811cef35 read and write Ram twice 2021-09-27 19:12:20 +08:00
Roy eda0943fd3 spi speed 8M 2021-09-27 17:17:02 +08:00
Roy ee203f45fd use check buf 2021-09-27 14:22:45 +08:00
Roy de4ede4187 use check buf 2021-09-24 17:59:35 +08:00
Roy b5baead500 delay 10us after change mem_select 2021-09-23 11:34:12 +08:00
Roy f9c7d04647 send data and read data(spi) 2021-09-23 10:33:59 +08:00
Roy e430cd41fc send data and read data(spi) 2021-09-23 10:31:42 +08:00
Roy 8f3f44bc40 test memory board 2021-09-14 14:32:05 +08:00
Roy 3142f007b1 test memory board 2021-09-14 12:24:02 +08:00
Roy a1eb286365 look Ram data(spi) 2021-08-25 14:45:07 +08:00
Roy 7369ea8430 test 2021-08-19 17:14:09 +08:00
Roy 1540745ce5 test pin 2021-08-19 12:47:38 +08:00
Roy 9fd06428c3 check ram data 2021-08-17 13:40:32 +08:00
Roy 24b0889532 check ram data 2021-08-13 13:10:37 +08:00
Roy 853151a83a check ram data 2021-08-13 10:30:13 +08:00
Roy e51def4f9f check ram data 2021-08-12 14:33:25 +08:00
Roy e21067e610 take away notify_counter 2021-08-02 09:18:24 +08:00
Roy 3386ca9456 notify data clear 2021-07-29 15:35:01 +08:00
Roy b0aee65916 use two buffer to save spi data 2021-07-28 09:46:20 +08:00
Roy 2d851c2f7c fix CIS return date (insert data length) 2021-07-20 17:43:46 +08:00
Roy 00bf501980 fix CIS return date 2021-07-20 16:37:17 +08:00
Roy 0a5b58c9be fix master_switch_memory 2021-06-24 17:15:12 +08:00
Roy b974e72570 improve ram_sw 2021-06-24 11:52:15 +08:00
Roy 5aad69f236 take away Board_GLED 2021-06-22 16:53:13 +08:00
Roy 1210b674b1 attempt to improve MEM_REQ 2021-06-21 16:15:42 +08:00
5 changed files with 210 additions and 60 deletions
@@ -27,8 +27,9 @@
#define CIS_BUFF_PREFIX 3
#define CIS_BUFF_SUFFIX 2
#define CIS_DATA_LEN 50
static uint16_t CIS_length = 10;
static char CIS_data[50];
static char CIS_data[CIS_DATA_LEN];
static void mem_central_event();
static void mem_recv_ins();
@@ -378,7 +379,27 @@ static void mem_central_get_cis(uint8_t handle){
}
static void mem_read_data_and_return(){
// CIS_BUFF_SUFFIX = {0,0}
/*
* CIS data formate:
* Elite send to central:
* +------------+------------------+
* | Header(1B) | Payload(nB) |
* +------------+------------------+
* |d0(recv_len)| d1, d2, d3, ... |
* +------------+------------------+
* ex: | 0x03 | 0x10,0xC0,0x01 | <--- barrery data
* +------------+------------------+
*
* central send to controller:
* +--------------------+------------------+
* | Header(3B) | Payload |
* +---+---+------------+------------------+
* | 4 | 0 | ret_length | d1, d2, d3, ... |
* +---+---+------------+------------------+
* ex: | 4 | 0 | 0x14 | 0x10,0xC0,0x01 | <--- barrery data
* +---+---+------------+------------------+
*
*/
// add prefix and suffix to sync communication
uint16_t ret_length;
@@ -386,7 +407,7 @@ static void mem_read_data_and_return(){
if (CIS_length < 22) {
ret_length = 20;
} else {
ret_length = CIS_length - 2;
ret_length = CIS_length - CIS_BUFF_PREFIX;
}
CIS_data[0] = 4;
@@ -395,7 +416,9 @@ static void mem_read_data_and_return(){
CIS_data[CIS_length++] = 0;
CIS_data[CIS_length++] = 0;
UART_write(uart_handle, CIS_data, ret_length + 3);
UART_write(uart_handle, CIS_data, ret_length + CIS_BUFF_PREFIX);
memset(CIS_data, 0, CIS_DATA_LEN);
}
static void mem_connection_timeout(){
@@ -13,7 +13,7 @@
=======================*/
#define MEM_BUFFER_SIZE SPI_TX_BUFFER_SIZE
#define MEM_SWITCH_THRESHOLD 0x1C00 //max:7K bytes
#define MEM_SWITCH_THRESHOLD 0xBB8 //max:3K bytes
#define MSM_REG_WRITE 0x01
#define MEM_INS_WRITE 0x02
@@ -37,14 +37,14 @@ static uint8_t notify_value[250] = {0};
p += len; \
} while (0)
#define central_mem_init() \
do { \
master_tx_buffer[0] = MSM_REG_WRITE; \
master_tx_buffer[1] = 0b01000011; \
central_mem_select(1); \
central_spi_send(2); \
central_mem_select(0); \
central_spi_send(2); \
#define central_mem_init() \
do { \
master_tx_buffer[0] = MSM_REG_WRITE; \
master_tx_buffer[1] = 0b01000011; \
central_mem_select(1); \
central_spi_send(master_tx_buffer, 2); \
central_mem_select(0); \
central_spi_send(master_tx_buffer, 2); \
} while (0)
@@ -70,77 +70,198 @@ static void central_reset(){
void master_switch_memory();
//static void central_handle_notify(uint8_t notify_length, uint8_t *notify_value){
static uint8_t notify_counter = 0;
uint8_t spi_buffer0[256];
uint8_t spi_buffer1[256];
uint8_t recv_ins[26] = {0};
static uint8_t green_wrong = 0;
static uint8_t green_retry_cnt = 0;
static void central_handle_notify(){
// These code should be executed if we have a real reset PIN
// if (flag_mask(EVT_PIN_RESET)) {
// // ignore all incoming notify;
// flag_disable(EVT_PIN_RESET);
// central_reset();
// return;
// }
// char noti_ack[10] = {0, 0, 0xA3, 0x29, 46, 80, 55, 55, 0, 0};
// if(notify_counter >= 100){
// notify_counter = 0;
// UART_write(uart_handle, noti_ack, 10);
// }
uint8_t counter = not_counter ++;
static uint8_t check_buffer[29] = {0};
static uint8_t spi_buffer_index = 0;
static uint8_t wrong = 0;
static uint8_t retry_cnt = 0;
int i;
bool wrong_flag = false;
bool write_again = false;
uint8_t write_limit = 0;
uint8_t *p;
uint8_t counter;
// localize current buffer
uint8_t *p = master_tx_buffer;
if(spi_buffer_index){
spi_buffer_index = ~spi_buffer_index;
p = spi_buffer0;
}
else{
spi_buffer_index = ~spi_buffer_index;
p = spi_buffer1;
}
counter = not_counter;
not_counter = not_counter + 1;
// update offset
uint32_t cnt_offset = not_offset;
not_offset = cnt_offset + 3 + notify_length;
*p++ = MEM_INS_WRITE; // instruction
*p++ = (uint8_t)((cnt_offset >> 8) & 0xFF); // address
*p++ = (uint8_t)(cnt_offset & 0xFF); // address
*p++ = 0xFF; // data header
*p++ = counter; // data counter
*p++ = notify_length; // data content length
unsafe_memcpy(p, notify_value, notify_length); // data content
p[0] = MEM_INS_WRITE; // instruction
p[1] = (uint8_t)((cnt_offset >> 8) & 0xFF); // address
p[2] = (uint8_t)(cnt_offset & 0xFF); // address
p[3] = 0xFF; // data header
p[4] = counter; // data counter
p[5] = notify_length; // data content length
memcpy(p + 6, notify_value, notify_length); // data content
central_spi_send(p, notify_length + 6);
// read RAM
recv_ins[0] = 0x03; //read RAM
recv_ins[1] = (uint8_t)((cnt_offset >> 8) & 0xFF); // address
recv_ins[2] = (uint8_t)(cnt_offset & 0xFF); // address
central_spi_recv(recv_ins, check_buffer);
while (1) {
// compare data
for (i=3; i<26; i++) {
if (p[i]!=check_buffer[i]) {
write_again = true;
break;
}
}
if (write_again) {
write_again = false;
retry_cnt++;
write_limit++;
//write RAM
central_spi_send(p, notify_length + 6);
// read RAM
recv_ins[0] = 0x03; //read RAM
recv_ins[1] = (uint8_t)((cnt_offset >> 8) & 0xFF); // address
recv_ins[2] = (uint8_t)(cnt_offset & 0xFF); // address
central_spi_recv(recv_ins, check_buffer);
} else {
break;
}
if (write_limit >= 1) {
break;
}
}
for (i=3; i<26; i++) {
if (p[i]!=check_buffer[i]) {
wrong_flag = true;
break;
}
}
if (wrong_flag) {
wrong++;
}
memset(p,0,notify_length + 6);
central_spi_send(p - master_tx_buffer);
notify_handle_done = true;
// if (central_pi3_not_busy() && ((not_offset >= MEM_SWITCH_THRESHOLD) || flag_mask(EVT_PIN_REQST))) {
if (ram_sw){
master_switch_memory();
ram_sw = false;
}
else if (central_pi3_not_busy() && (not_offset >= MEM_SWITCH_THRESHOLD)) {
// flag_disable(EVT_PIN_REQST);
master_switch_memory();
ram_sw = false;
}
// central_pin_output(Board_GLED, not_counter & 0x10);
}
void master_switch_memory() {
uint16_t cnt_offset = not_offset;
not_offset = MEM_META_LENGTH;
static uint8_t check_green_buffer[10] = {0};
int i;
bool wrong_flag = false;
bool write_again = false;
uint8_t write_limit = 0;
// localize current buffer
uint8_t *p = master_tx_buffer;
*p++ = MEM_INS_WRITE; // instruction
*p++ = 0; // address
*p++ = 0; // address
*p++ = (uint8_t)((cnt_offset >> 8) & 0xFF); // data: notify data length
*p++ = (uint8_t)(cnt_offset & 0xFF); // data: notify data length
*p++ = 0;
*p++ = 0;
p[0] = MEM_INS_WRITE; // instruction
p[1] = 0; // address
p[2] = 0; // address
p[3] = (uint8_t)((cnt_offset >> 8) & 0xFF); // data: notify data length
p[4] = (uint8_t)(cnt_offset & 0xFF); // data: notify data length
p[5] = 0;
p[6] = 0;
central_spi_send(p - master_tx_buffer);
central_spi_send(p, 7);
// read RAM
recv_ins[0] = 0x03; //read RAM
recv_ins[1] = p[1]; // address
recv_ins[2] = p[2]; // address
central_spi_recv(recv_ins, check_green_buffer);
while (1) {
// compare data
for (i=3; i<7; i++) {
if (p[i]!=check_green_buffer[i]) {
write_again = true;
break;
}
}
if (write_again) {
write_again = false;
green_retry_cnt++;
write_limit++;
//write RAM
central_spi_send(p, 7);
// read RAM
recv_ins[0] = 0x03; //read RAM
recv_ins[1] = p[1]; // address
recv_ins[2] = p[2]; // address
central_spi_recv(recv_ins, check_green_buffer);
} else {
break;
}
if (write_limit >= 1) {
break;
}
}
for (i=3; i<7; i++) {
if (p[i]!=check_green_buffer[i]) {
wrong_flag = true;
break;
}
}
if (wrong_flag) {
green_wrong++;
}
memset(p,0,7);
// switch memory
mem_sel++;
central_mem_select(mem_sel & 0x01);
central_pin_output(Board_GLED, mem_sel & 0x10);
CPUdelay(10 * 16); // 10us
}
#endif
@@ -38,16 +38,16 @@ static void SPI_reopen(){
SPI_Params_init(&spi_parameter);
spi_parameter.transferMode = SPI_MODE_BLOCKING;
spi_parameter.mode = SPI_MASTER;
spi_parameter.bitRate = 12000000;
spi_parameter.bitRate = 8000000;
spi_parameter.transferTimeout = 1000;
spi_parameter.dataSize = 8;
spi_parameter.frameFormat = SPI_POL0_PHA0;
central_spi_handle = SPI_open(Board_SPI0, &spi_parameter);
}
#define central_spi_send(len) \
#define central_spi_send(data, len) \
do { \
central_spi_transaction.txBuf = master_tx_buffer; \
central_spi_transaction.txBuf = data; \
central_spi_transaction.rxBuf = NULL; \
central_spi_transaction.count = (len); \
central_pin_output(Board_SPI_CS, 0); \
@@ -55,4 +55,13 @@ static void SPI_reopen(){
central_pin_output(Board_SPI_CS, 1); \
} while (0)
#define central_spi_recv(ins, data) \
do { \
central_spi_transaction.txBuf = ins; \
central_spi_transaction.rxBuf = data; \
central_pin_output(Board_SPI_CS, 0); \
SPI_transfer(central_spi_handle, &central_spi_transaction); \
central_pin_output(Board_SPI_CS, 1); \
} while (0)
#endif // CENTRAL_SPI_H
@@ -49,7 +49,7 @@
#define EVT_MEM_NOTIFY_HANDLE 0x0040
#define EVT_MEM_UART_ROUTINE 0x0080
static uint16_t EventMask = 0;
uint16_t EventMask = 0;
/**
* event table entry.
@@ -1614,9 +1614,7 @@ static void SimpleBLECentral_processGATTMsg(gattMsgEvent_t *pMsg)
// CIS_length = CIS_BUFF_PREFIX + pMsg->msg.readRsp.len;
uint8_t recv_len = pMsg->msg.readRsp.pValue[0];
CIS_length = CIS_BUFF_PREFIX + recv_len;
for(int i=0 ; i<recv_len ; i++){
CIS_data[CIS_BUFF_PREFIX + i] = pMsg->msg.readRsp.pValue[i];
}
memcpy(CIS_data + CIS_BUFF_PREFIX, &pMsg->msg.readRsp.pValue[1] , recv_len);
flag_notify(EVT_MEM_RETURN_DATA);
#ifndef BOOSTXL_CC2650MA
// char ret[7];
@@ -1689,7 +1687,6 @@ static void SimpleBLECentral_processGATTMsg(gattMsgEvent_t *pMsg)
else if (pMsg->method == ATT_HANDLE_VALUE_NOTI){
if((procedureInProgress == FALSE) && (!flag_mask(EVT_MEM_NOTIFY_HANDLE))){
notify_counter ++;
attHandleValueNoti_t *att_notify = (attHandleValueNoti_t *)(&pMsg->msg);
// central_handle_notify(att_notify->len, att_notify->pValue);
notify_length = att_notify->len;