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13 Commits
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@@ -1,14 +1,14 @@
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no device y=ax+b MAC a+ b+ a- b- avg
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1 c6be c6be 18:04:ED:37:C6:BE 2270 -7040 2259 -14129 4.15063496100114
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2 8cd0 8cd0 00:81:F9:E4:8C:D0 2199 -4616 2162 -16396 4.67288597901671
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3 c694 c694 18:04:ED:37:C6:94 2354 -12824 2354 -11216 4.34663132771076
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4 c6c7 c6c7 18:04:ED:37:C6:C7 2199 -7238 2221 -15702 4.63164432837751
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5 9b97 9b97 00:81:F9:E4:9B:97 2227 -9846 2151 -26609 4.75015860006776
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6 c6df c6df 18:04:ED:37:C6:DF 2132 -3844 2054 -21545 4.89066238118665
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1 c6be c6be 1804ED37C6BE 2270 -7040 2259 -14129 4.15063496100114
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2 8cd0 8cd0 0081F9E48CD0 2199 -4616 2162 -16396 4.67288597901671
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3 c694 c694 1804ED37C694 2354 -12824 2354 -11216 4.34663132771076
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4 c6c7 c6c7 1804ED37C6C7 2199 -7238 2221 -15702 4.63164432837751
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5 9b97 9b97 0081F9E49B97 2227 -9846 2151 -26609 4.75015860006776
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6 c6df c6df 1804ED37C6DF 2132 -3844 2054 -21545 4.89066238118665
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7 c652 c652 18:04:ED:37:C6:52 2024 -7687 2086 -11283 4.88850143182858
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8 c5ed c5ed 18:04:ED:37:C5:ED 2231 -1711 2353 -70845 4.45265043545859
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9 9bef 9bef 00:81:F9:E4:9B:EF 2383 -8585 2415 -20347 4.2758539244186
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10 8b50 8b50 00:81:F9:E4:8B:50 2366 -15223 2402 -24971 4.35162291666667
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9 9bef 9bef 0081F9E49BEF 2383 -8585 2415 -20347 4.2758539244186
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10 8b50 8b50 00:81:F9:E4:8B:50 2369 -11005 2360 -11797 4.30475635707671
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11 c641 c641 18:04:ED:37:C6:41 2090 4616 1997 -40665 5.07591391714942
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12 E8E6 E8E6 A4:DA:32:D4:E8:E6 2306 -88454 2418 -15140 4.2686494968089
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13 E73B E73B A4:DA:32:D4:E7:3B 2262 -564 2298 44746 4.35551198222141
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+4
-4
@@ -2,17 +2,17 @@
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<launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging">
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650em_app}"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="simple_peripheral_cc2650em_app"/>
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<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650em_app}"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
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<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
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<listEntry value="/simple_peripheral_cc2650em_app"/>
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</listAttribute>
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+3
-3
@@ -1,6 +1,6 @@
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#
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# This file was generated based on the configuration script:
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# C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\app_ble.cfg
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# /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/app_ble.cfg
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#
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# This makefile may be included in other makefiles that need to build
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# the libraries containing the compiled source files generated as
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@@ -14,9 +14,9 @@
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#
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# The absolute path to the generated source directory (at the time the
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# sources were generated) is:
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# C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\config\src
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# /home/alan/ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
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#
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GEN_SRC_DIR ?= ../../config/src
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GEN_SRC_DIR ?= ../../../ti/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src
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ifeq (,$(wildcard $(GEN_SRC_DIR)))
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$(error "ERROR: GEN_SRC_DIR must be set to the directory containing the generated sources")
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BIN
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+15
-15
@@ -1,29 +1,29 @@
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XOPTS = -I"C:/ti/xdctools_3_32_00_06_core/packages/" -Dxdc_target_types__=C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
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XOPTS = -I"/home/alan/ti/xdctools_3_32_01_22_core/packages/" -Dxdc_target_types__=/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
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vpath % C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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vpath %.c C:/ti/xdctools_3_32_00_06_core/packages/
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vpath % /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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vpath %.c /home/alan/ti/xdctools_3_32_01_22_core/packages/
|
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CCOPTS = --endian=little -mv7M3 --abi=eabi -q -ms --opt_for_speed=0 --program_level_compile -o3 -g --optimize_with_debug -Dti_sysbios_knl_Task_minimizeLatency__D=FALSE -Dti_sysbios_family_arm_cc26xx_Boot_driverlibVersion=2 -Dti_sysbios_knl_Clock_stopCheckNext__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_enableException__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_disablePriority__D=32U -Dti_sysbios_family_arm_m3_Hwi_numSparseInterrupts__D=0U
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||||
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||||
XDC_ROOT = C:/ti/xdctools_3_32_00_06_core/packages/
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||||
XDC_ROOT = /home/alan/ti/xdctools_3_32_01_22_core/packages/
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||||
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||||
BIOS_ROOT = C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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BIOS_ROOT = /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
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||||
BIOS_DEFS = -Dti_sysbios_BIOS_swiEnabled__D=TRUE -Dti_sysbios_BIOS_taskEnabled__D=TRUE -Dti_sysbios_BIOS_clockEnabled__D=TRUE -Dti_sysbios_BIOS_runtimeCreatesEnabled__D=TRUE -Dti_sysbios_knl_Task_moduleStateCheckFlag__D=FALSE -Dti_sysbios_knl_Task_objectCheckFlag__D=FALSE -Dti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Swi_DISABLE_ALL_HOOKS -Dti_sysbios_BIOS_smpEnabled__D=FALSE -Dti_sysbios_Build_useHwiMacros -Dti_sysbios_knl_Swi_numPriorities__D=6 -Dti_sysbios_knl_Task_deleteTerminatedTasks__D=FALSE -Dti_sysbios_knl_Task_numPriorities__D=6 -Dti_sysbios_knl_Task_checkStackFlag__D=FALSE -Dti_sysbios_knl_Task_initStackFlag__D=TRUE -Dti_sysbios_knl_Task_DISABLE_ALL_HOOKS -Dti_sysbios_knl_Clock_TICK_SOURCE=ti_sysbios_knl_Clock_TickSource_TIMER -Dti_sysbios_knl_Clock_TICK_MODE=ti_sysbios_knl_Clock_TickMode_DYNAMIC -Dti_sysbios_hal_Core_delegate_getId=ti_sysbios_hal_CoreNull_getId__E -Dti_sysbios_hal_Core_delegate_interruptCore=ti_sysbios_hal_CoreNull_interruptCore__E -Dti_sysbios_hal_Core_delegate_lock=ti_sysbios_hal_CoreNull_lock__E -Dti_sysbios_hal_Core_delegate_unlock=ti_sysbios_hal_CoreNull_unlock__E -Dti_sysbios_hal_Core_numCores__D=1 -Dti_sysbios_hal_CoreNull_numCores__D=1 -Dti_sysbios_utils_Load_taskEnabled__D=TRUE -Dti_sysbios_utils_Load_swiEnabled__D=FALSE -Dti_sysbios_utils_Load_hwiEnabled__D=FALSE -Dti_sysbios_family_arm_m3_Hwi_dispatcherSwiSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherTaskSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherAutoNestingSupport__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_dispatcherIrpTrackingSupport__D=TRUE -Dti_sysbios_knl_Semaphore_supportsEvents__D=FALSE -Dti_sysbios_knl_Semaphore_supportsPriority__D=FALSE -Dxdc_runtime_Assert_DISABLE_ALL -Dxdc_runtime_Log_DISABLE_ALL
|
||||
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||||
BIOS_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
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BIOS_INC = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
|
||||
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TARGET_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
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TARGET_INC = -I"/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
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||||
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||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="/home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="/home/alan/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -I/home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
|
||||
CC = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
ASM = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
AR = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armar rq
|
||||
CC = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
ASM = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
AR = /home/alan/ti/ccs900/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armar rq
|
||||
|
||||
DEL = C:/ti/xdctools_3_32_00_06_core/packages/../bin/rm -f
|
||||
CP = C:/ti/xdctools_3_32_00_06_core/packages/../bin/cp -f
|
||||
DEL = rm -f
|
||||
CP = cp -f
|
||||
|
||||
define RM
|
||||
$(if $(wildcard $1),$(DEL) $1,:)
|
||||
@@ -100,8 +100,8 @@ rom_sysbios.obj: BIOS.c knl/Clock.c knl/Idle.c knl/Intrinsics.c knl/Event.c knl/
|
||||
rom_sysbios.aem3: rom_sysbios.obj m3_Hwi_asm.obj m3_Hwi_asm_switch.obj m3_IntrinsicsSupport_asm.obj m3_TaskSupport_asm.obj
|
||||
@-$(call RM, $@)
|
||||
@echo arem3 $^ ...
|
||||
@$(AR) $@ $^ C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
|
||||
@$(AR) $@ $^ /home/alan/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/rom/cortexm/cc26xx/golden/CC26xx/rom_sysbios_config.obj
|
||||
|
||||
clean:
|
||||
@$(DEL) ..\makefile.libs
|
||||
@$(DEL) ../makefile.libs
|
||||
@-$(call RM, *)
|
||||
|
||||
BIN
Binary file not shown.
BIN
Binary file not shown.
+1
-1
@@ -10,5 +10,5 @@
|
||||
<rts value="libc.a"/>
|
||||
<createSlaveProjects value=""/>
|
||||
<connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
|
||||
<isTargetManual value="true"/>
|
||||
<isTargetManual value="false"/>
|
||||
</projectOptions>
|
||||
|
||||
+4
-4
@@ -1,14 +1,14 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging">
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <PropertyValues> <property id="ConnectOnStartup"> <curValue>1</curValue> </property> <property id="EnableInstalledBreakpoint"> <curValue>1</curValue> </property> <property id="IgnoreSoftLaunchFailures"> <curValue>0</curValue> </property> </PropertyValues> "/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650lp_app}"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650lp_app}"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="${build_artifact:simple_peripheral_cc2650lp_app}"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="simple_peripheral_cc2650lp_app"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="simple_peripheral_cc2650lp_app"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="simple_peripheral_cc2650lp_app"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650lp_app}"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650lp_app.out"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650lp_app.out"/>
|
||||
<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.CC2640F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650lp\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650lp_app.out"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/simple_peripheral_cc2650lp_app"/>
|
||||
</listAttribute>
|
||||
|
||||
+517
-517
File diff suppressed because it is too large
Load Diff
BIN
Binary file not shown.
BIN
Binary file not shown.
BIN
Binary file not shown.
BIN
Binary file not shown.
+9
-9
@@ -1,12 +1,12 @@
|
||||
|
||||
XOPTS = -I"C:/ti/xdctools_3_32_00_06_core/packages/" -Dxdc_target_types__=C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
|
||||
XOPTS = -I"C:/ti/xdctools_3_32_02_25_core/packages/" -Dxdc_target_types__=C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
|
||||
|
||||
vpath % C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
|
||||
vpath %.c C:/ti/xdctools_3_32_00_06_core/packages/
|
||||
vpath %.c C:/ti/xdctools_3_32_02_25_core/packages/
|
||||
|
||||
CCOPTS = --endian=little -mv7M3 --abi=eabi -q -ms --opt_for_speed=0 --program_level_compile -o3 -g --optimize_with_debug -Dti_sysbios_knl_Task_minimizeLatency__D=FALSE -Dti_sysbios_family_arm_cc26xx_Boot_driverlibVersion=2 -Dti_sysbios_knl_Clock_stopCheckNext__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_enableException__D=TRUE -Dti_sysbios_family_arm_m3_Hwi_disablePriority__D=32U -Dti_sysbios_family_arm_m3_Hwi_numSparseInterrupts__D=0U
|
||||
|
||||
XDC_ROOT = C:/ti/xdctools_3_32_00_06_core/packages/
|
||||
XDC_ROOT = C:/ti/xdctools_3_32_02_25_core/packages/
|
||||
|
||||
BIOS_ROOT = C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/ti/sysbios/
|
||||
|
||||
@@ -16,14 +16,14 @@ BIOS_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/pa
|
||||
|
||||
TARGET_INC = -I"C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/"
|
||||
|
||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
INCS = $(BIOS_INC) $(TARGET_INC) --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/icall/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/roles" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/dev_info" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/profiles/simple_profile" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/heapmgr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/controller/cc26xx/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/target" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/target/_common/cc26xx" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/hal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/osal/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/sdata" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/services/src/saddr" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/components/icall/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/inc" --include_path="C:/ti/simplelink/ble_sdk_2_02_02_25/src/rom" --include_path="C:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/cc26xxware_2_24_03_17272" -IC:/ti/tirtos_cc13xx_cc26xx_2_21_01_08/products/bios_6_46_01_38/packages/
|
||||
|
||||
CC = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
ASM = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/include
|
||||
AR = C:/ti/ccs1010/ccs/tools/compiler/ti-cgt-arm_20.2.1.LTS/bin/armar rq
|
||||
CC = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include
|
||||
ASM = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armcl -c $(CCOPTS) -I C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/include
|
||||
AR = C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.4.LTS/bin/armar rq
|
||||
|
||||
DEL = C:/ti/xdctools_3_32_00_06_core/packages/../bin/rm -f
|
||||
CP = C:/ti/xdctools_3_32_00_06_core/packages/../bin/cp -f
|
||||
DEL = C:/ti/xdctools_3_32_02_25_core/packages/../bin/rm -f
|
||||
CP = C:/ti/xdctools_3_32_02_25_core/packages/../bin/cp -f
|
||||
|
||||
define RM
|
||||
$(if $(wildcard $1),$(DEL) $1,:)
|
||||
|
||||
BIN
Binary file not shown.
BIN
Binary file not shown.
+1
-1
@@ -10,5 +10,5 @@
|
||||
<rts value="libc.a"/>
|
||||
<createSlaveProjects value=""/>
|
||||
<connection value="common/targetdb/connections/TIXDS110_Connection.xml"/>
|
||||
<isTargetManual value="true"/>
|
||||
<isTargetManual value="false"/>
|
||||
</projectOptions>
|
||||
|
||||
+5
-5
@@ -330,11 +330,6 @@
|
||||
<type>1</type>
|
||||
<locationURI>SRC_COMMON/hal/src/common/hal_assert.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>HAL/Include/hal_UART.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>SRC_COMMON/hal/src/inc/hal_UART.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>HAL/Include/hal_adc.h</name>
|
||||
<type>1</type>
|
||||
@@ -380,6 +375,11 @@
|
||||
<type>1</type>
|
||||
<locationURI>SRC_COMMON/hal/src/inc/hal_timer.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>HAL/Include/hal_UART.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>SRC_COMMON/hal/src/inc/hal_UART.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>HAL/Target/CC2650</name>
|
||||
<type>2</type>
|
||||
|
||||
@@ -150,10 +150,6 @@ extern const PIN_Config BoardGpioInitTable[];
|
||||
#define Board_UART_TX Board_BP_UART_Rx /* RXD */
|
||||
#define Board_UART_RX Board_BP_UART_Tx /* TXD */
|
||||
|
||||
|
||||
/* Borshin Mapping outputs */
|
||||
#define Board_CLP DIO4
|
||||
|
||||
///*
|
||||
// * SPI0 interface with DBS chip 2.0
|
||||
// */
|
||||
|
||||
@@ -74,7 +74,6 @@
|
||||
|
||||
const PIN_Config BoardGpioInitTable[] = {
|
||||
|
||||
// Board_CLP | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* GPIO_4 initially off */
|
||||
Board_RLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* LED initially off */
|
||||
Board_GLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* LED initially off */
|
||||
Board_BTN1 | PIN_INPUT_EN | PIN_PULLUP | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS, /* Button is active low */
|
||||
|
||||
@@ -75,8 +75,6 @@ extern const PIN_Config BoardGpioInitTable[];
|
||||
#define Board_LED_ON 1
|
||||
#define Board_LED_OFF 0
|
||||
|
||||
|
||||
|
||||
/* Discrete inputs */
|
||||
#define Board_BTN1 IOID_13
|
||||
#define Board_BTN2 IOID_14
|
||||
|
||||
+4
-4
@@ -64,10 +64,10 @@ struct _StiCaliStiTable{
|
||||
|
||||
#elif defined(BOARD_00_81_F9_E4_8B_50)
|
||||
{
|
||||
.p_ch.coefficient = 2366,
|
||||
.p_ch.offset = -15223,
|
||||
.n_ch.coefficient = 2402,
|
||||
.n_ch.offset = -24971
|
||||
.p_ch.coefficient = 2369,
|
||||
.p_ch.offset = -11004,
|
||||
.n_ch.coefficient = 2360,
|
||||
.n_ch.offset = -11796
|
||||
};
|
||||
|
||||
#elif defined(BOARD_00_81_F9_E4_9B_97)
|
||||
|
||||
+1
-1
@@ -2,7 +2,7 @@
|
||||
#ifndef NEU_CALI_TABLE
|
||||
#define NEU_CALI_TABLE
|
||||
|
||||
#define BOARD_18_04_ED_37_C6_41
|
||||
#define BOARD_TEST
|
||||
|
||||
typedef struct _SingleChannelCali{
|
||||
uint16_t Gain[4];
|
||||
|
||||
+138
@@ -0,0 +1,138 @@
|
||||
|
||||
#ifndef DBS_OBJECT_H
|
||||
#define DBS_OBJECT_H
|
||||
|
||||
#include "neu/headstage_spi.h"
|
||||
|
||||
#define SYS_RESERVED_INDEX 0
|
||||
#define SYS_GENERAL_ENABLE_INDEX 1
|
||||
#define SYS_LNA_BIOS1_INDEX 2
|
||||
#define SYS_LNA_BIOS2_INDEX 3
|
||||
|
||||
#define REC_CHANNEL_INDEX 0
|
||||
#define REC_GAIN_INDEX 1
|
||||
#define REC_ADC_CLOCK_INDEX 2
|
||||
|
||||
#define STI_ENABLE_INDEX 0
|
||||
#define STI_DURATION0_INDEX 1
|
||||
#define STI_DURATION1_INDEX 2
|
||||
#define STI_DURATION2_INDEX 3
|
||||
#define STI_DURATION3_INDEX 4
|
||||
#define STI_AMP_POS_INDEX 5
|
||||
#define STI_AMP_NEG_INDEX 6
|
||||
#define STI_POLARITY_INDEX 7
|
||||
#define STI_CYCLE_CH01_INDEX 8
|
||||
#define STI_CYCLE_CH23_INDEX 9
|
||||
#define STI_CYCLE_CH45_INDEX 10
|
||||
#define STI_CYCLE_CH67_INDEX 11
|
||||
#define STI_CLK_RATIO_INDEX 12
|
||||
#define STI_ARBITRARY_EN_INDEX 13
|
||||
#define STI_MODE_INDEX 14
|
||||
|
||||
//#define DBS_REGISTER \
|
||||
// uint8_t address; \
|
||||
// void (*write_reg) (DBSRegister *self, uint32_t reg_value); \
|
||||
// uint32_t (*read_reg) (DBSRegister *self)
|
||||
|
||||
typedef struct _DBSRegister{
|
||||
uint8_t address;
|
||||
bool WriteRegister, CheckRegister;
|
||||
void (*write_reg) (struct _DBSRegister *self, uint16_t reg_value);
|
||||
void (*read_reg) (struct _DBSRegister *self);
|
||||
}DBSRegister;
|
||||
|
||||
void write_reg(DBSRegister *self, uint16_t reg_value){
|
||||
spi_txbuf[0] = 0x80 | self->address;
|
||||
spi_txbuf[1] = (reg_value >> 8) & 0xFF ;
|
||||
spi_txbuf[2] = reg_value & 0xFF;
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
void read_reg(DBSRegister *self){
|
||||
spi_txbuf[0] = 0x7F & self->address;
|
||||
spi_txbuf[1] = 0x7F & self->address; // it's don't care actually
|
||||
spi_txbuf[2] = 0x7F & self->address; // it's don't care actually
|
||||
SPICallBack = READ_REG;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
|
||||
static uint16_t sys_register_default_value[4] = {
|
||||
0x0000,
|
||||
0x40F2,
|
||||
0x0210,
|
||||
0x4210
|
||||
};
|
||||
static uint16_t rec_register_value[3];
|
||||
static uint16_t sti_register_value[15];
|
||||
|
||||
static DBSRegister sys_register[4];
|
||||
static DBSRegister rec_register[3];
|
||||
static DBSRegister sti_register[15];
|
||||
|
||||
static void InitSysRegister(){
|
||||
sys_register[SYS_RESERVED_INDEX].address = 0x00;
|
||||
sys_register[SYS_GENERAL_ENABLE_INDEX].address = 47; // general enable
|
||||
sys_register[SYS_LNA_BIOS1_INDEX].address = 57;
|
||||
sys_register[SYS_LNA_BIOS2_INDEX].address = 58;
|
||||
|
||||
for(int i=0 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
|
||||
sys_register[i].WriteRegister = false;
|
||||
sys_register[i].CheckRegister = false;
|
||||
sys_register[i].write_reg = &write_reg;
|
||||
sys_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitRecRegister(){
|
||||
rec_register[REC_CHANNEL_INDEX].address = 48;
|
||||
rec_register[REC_GAIN_INDEX].address = 49;
|
||||
rec_register[REC_ADC_CLOCK_INDEX].address = 51; // sampling rate
|
||||
|
||||
for(int i=0 ; i<sizeof(rec_register)/sizeof(DBSRegister) ; i++){
|
||||
rec_register[i].WriteRegister = false;
|
||||
rec_register[i].CheckRegister = false;
|
||||
rec_register[i].write_reg = &write_reg;
|
||||
rec_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitStiRegister(){
|
||||
sti_register[STI_ENABLE_INDEX].address = 46;
|
||||
sti_register[STI_DURATION0_INDEX].address = 1;
|
||||
sti_register[STI_DURATION1_INDEX].address = 2;
|
||||
sti_register[STI_DURATION2_INDEX].address = 3;
|
||||
sti_register[STI_DURATION3_INDEX].address = 4;
|
||||
sti_register[STI_AMP_POS_INDEX].address = 37;
|
||||
sti_register[STI_AMP_NEG_INDEX].address = 38;
|
||||
sti_register[STI_POLARITY_INDEX].address = 40;
|
||||
sti_register[STI_CYCLE_CH01_INDEX].address = 42;
|
||||
sti_register[STI_CYCLE_CH23_INDEX].address = 43;
|
||||
sti_register[STI_CYCLE_CH45_INDEX].address = 44;
|
||||
sti_register[STI_CYCLE_CH67_INDEX].address = 45;
|
||||
sti_register[STI_CLK_RATIO_INDEX].address = 52;
|
||||
sti_register[STI_ARBITRARY_EN_INDEX].address = 54;
|
||||
sti_register[STI_MODE_INDEX].address = 56;
|
||||
|
||||
for(int i=0 ; i<sizeof(sti_register)/sizeof(DBSRegister) ; i++){
|
||||
sti_register[i].WriteRegister = false;
|
||||
sti_register[i].CheckRegister = false;
|
||||
sti_register[i].write_reg = &write_reg;
|
||||
sti_register[i].read_reg = &read_reg;
|
||||
}
|
||||
}
|
||||
|
||||
static void InitDBSRegister(){
|
||||
InitSysRegister();
|
||||
InitRecRegister();
|
||||
InitStiRegister();
|
||||
|
||||
// for(int i=1 ; i<sizeof(sys_register)/sizeof(DBSRegister) ; i++){
|
||||
for(int i=1 ; i<4 ; i++){
|
||||
sys_register[i].WriteRegister = true;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
}
|
||||
|
||||
#endif
|
||||
+166
-376
@@ -160,13 +160,17 @@ static void FlushNotify();
|
||||
#define NEU_REC_PARAM 0x20
|
||||
#define NEU_MULTI_STI 0x40
|
||||
#define NEU_TEST_INS 0x60
|
||||
#define RIS_STOP_STI 0x80
|
||||
#define RIS_REC_ON_CHANGE 0x80
|
||||
#define RIS_STI_ON_CHANGE 0xA0
|
||||
|
||||
/** event */
|
||||
#define EVT_NEU_SPI 0x0001 /**< spi transaction event */
|
||||
#define EVT_NEU_LED 0x0002 /**< set led event */
|
||||
#define EVT_NEU_CHECK 0x0004 /**< check neulive single instruction */
|
||||
#define EVT_NEU_REG_SPI 0x0008 /** register spi event */
|
||||
#define EVT_NEU_PREPARE 0x0010 /** prepare to record or stimulate **/
|
||||
#define EVT_NEU_REC 0x0020
|
||||
#define EVT_NEU_STI 0x0040
|
||||
|
||||
/** clock setting */
|
||||
#define NEU_SYS_CLK 2000000 /**< 10Mhz */
|
||||
@@ -267,27 +271,6 @@ typedef enum{
|
||||
#define POSITIVE_CHANNEL 1
|
||||
#define NEGATIVE_CHANNEL 0
|
||||
|
||||
|
||||
// Declare for FFT ( ft. Borshin )
|
||||
|
||||
#define THRESHOLD 30000000
|
||||
static uint8_t numFFT = 16; // user define
|
||||
static uint8_t step = 32; // which is numFFT/2
|
||||
static uint8_t stageFFT = 4; // which is log2(numFFT)
|
||||
int testing_sig = 0;
|
||||
|
||||
|
||||
static int twiddle_real[16] = {10000, 9238, 7071, 3826, 0, -3827, -7072, -9239, -10000, -9239, \
|
||||
-7072, -3827, -1, 3826, 7071, 9238};
|
||||
|
||||
static int twiddle_imag[16] = { 0, -3827, -7072, -9239, -10000, -9239, -7072, -3827, -1, 3826, \
|
||||
7071, 9238, 10000, 9238, 7071, 3826};
|
||||
|
||||
|
||||
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT);
|
||||
static void BitReverse(int* BR_Array, int numFFT);
|
||||
static void CLP(uint8_t buf2, uint8_t buf1);
|
||||
static int ADC_U2S( uint16_t unsigned_buff);
|
||||
// clang-format on
|
||||
|
||||
/*****************
|
||||
@@ -319,7 +302,7 @@ static int ADC_U2S( uint16_t unsigned_buff);
|
||||
#include "string.h"
|
||||
#include "headstage_rec_ins.h"
|
||||
#include "headstage_sti_ins.h"
|
||||
|
||||
#include "headstage_dbs_object.h"
|
||||
|
||||
/*
|
||||
* todo: need to define some procedure to detect this device status
|
||||
@@ -359,56 +342,8 @@ static void headstage_init() {
|
||||
#undef THREE_POINT_THREE_VOLT
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_append_notify_data
|
||||
*/
|
||||
#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
|
||||
static void headstage_neu_append_notify_data() {
|
||||
|
||||
uint8_t channel = spi_rxbuf[0];
|
||||
|
||||
// close-reopen SPI, if the first channel received is invalid
|
||||
if(IsFirstData){
|
||||
// start record
|
||||
if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
|
||||
IsFirstData = false;
|
||||
}
|
||||
// restart SPI
|
||||
else{
|
||||
SPI_close(headstage_spi_handle);
|
||||
ReopenSPI();
|
||||
IsFirstData = true;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// discard illegal channel
|
||||
// uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
|
||||
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
|
||||
// illegal channel
|
||||
return;
|
||||
}
|
||||
|
||||
uint8_t not_buf[3];
|
||||
not_buf[0] = channel; // ch
|
||||
not_buf[1] = spi_rxbuf[1];
|
||||
not_buf[2] = spi_rxbuf[2];
|
||||
// Borshin closed-loop start here <<<<<<<<<<<<<<<<<<<<---->>>>>>>>>>>>>>>>>>>>----------------------
|
||||
CLP(not_buf[1], not_buf[2]); // This function input is 12-bit value
|
||||
// the function will buffer 16-point then
|
||||
// perform 16-point FFT.
|
||||
// Afterwards, calculate sum of PSD then
|
||||
// decided if HVS happened. (GPIO_4)
|
||||
|
||||
uint8_t data_size = headstage_notify_append_data(not_buf);
|
||||
|
||||
if (data_size >= BLE_NOT_BUFF_SIZE) {
|
||||
headstage_notify_flip_buffer();
|
||||
headstage_notify_send();
|
||||
}
|
||||
}
|
||||
|
||||
static void headstage_neu_state_spi();
|
||||
static void headstage_neu_spi();
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_event
|
||||
@@ -417,93 +352,27 @@ static void headstage_neu_state_spi();
|
||||
*/
|
||||
|
||||
static void headstage_neu_event() {
|
||||
if (EVENT_MASK == 0) {
|
||||
// fast return
|
||||
return;
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_NEU_SPI)) {
|
||||
flag_disable(EVT_NEU_SPI);
|
||||
headstage_neu_state_spi();
|
||||
// headstage_neu_state_spi();
|
||||
headstage_neu_spi();
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_NEU_LED)) {
|
||||
flag_disable(EVT_NEU_LED); /** reserved to set led power and set color manually */
|
||||
}
|
||||
|
||||
if (EVENT_MASK == 0) {
|
||||
// fast return
|
||||
}
|
||||
|
||||
if (flag_mask(EVT_DISCONNECTED)) {
|
||||
ConnectState = false;
|
||||
headstage_update_vis_instruction(VIS_INT);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_spi_callback
|
||||
*
|
||||
* description: callback function to deal with data transmission between DBS and CC2650
|
||||
*/
|
||||
|
||||
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
|
||||
switch(SPICallBack){
|
||||
case CONTINUOUS_TRANS:{
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER:{
|
||||
SPICallBack = FLUSH_BUFFER2;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER2:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
// headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case ONE_SHOT_SPI:{
|
||||
SPICallBack = FLUSH_BUFFER;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_MOSI:{
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_REG:{
|
||||
check_reg_counter ++;
|
||||
break;
|
||||
}
|
||||
|
||||
case CLOSE_SPI:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
SPI_close(headstage_spi_handle);
|
||||
break;
|
||||
}
|
||||
|
||||
case END_TRANSMIT:{
|
||||
tx_put_u24(0, 0);
|
||||
SPICallBack = CONTINUOUS_TRANS;
|
||||
break;
|
||||
}
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_update_ris_instruction
|
||||
*
|
||||
@@ -638,6 +507,37 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
|
||||
break;
|
||||
}
|
||||
|
||||
case RIS_REC_ON_CHANGE:{
|
||||
uint16_t reg_value = instruction[2] << 8 | instruction[3];
|
||||
switch(instruction[1]){
|
||||
case REC_CHANNEL_INDEX:{
|
||||
rec_register[REC_CHANNEL_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_CHANNEL_INDEX] = reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case REC_GAIN_INDEX:{
|
||||
rec_register[REC_GAIN_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_GAIN_INDEX] = reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case REC_ADC_CLOCK_INDEX:{
|
||||
rec_register[REC_ADC_CLOCK_INDEX].WriteRegister = true;
|
||||
rec_register_value[REC_ADC_CLOCK_INDEX] = reg_value;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default: {
|
||||
break;
|
||||
}
|
||||
@@ -791,7 +691,7 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
|
||||
|
||||
case VIS_STOP_REC:{
|
||||
rec_sti_command &= ~ENABLE_REC;
|
||||
headstage_pin_output(Board_CLP, 0);
|
||||
|
||||
// is neu wording now?
|
||||
if( (rec_sti_command & STATUS_STI) || (rec_sti_command & STATUS_REC) ){
|
||||
// nothing to do
|
||||
@@ -1059,7 +959,7 @@ static void headstage_neu_state_spi() {
|
||||
}
|
||||
case NEU_READ_DATA: {
|
||||
|
||||
// recv sti enable command
|
||||
// sti enable command
|
||||
if( (rec_sti_command & ENABLE_STI) && !(rec_sti_command & STATUS_STI) ){
|
||||
// go to send sti instruction
|
||||
NEULIVE_STATE.state = NEU_WRITE_STI_INS;
|
||||
@@ -1071,7 +971,7 @@ static void headstage_neu_state_spi() {
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
// recv disable stimulation
|
||||
// disable stimulation
|
||||
else if( !(rec_sti_command & ENABLE_STI) && (rec_sti_command & STATUS_STI) ){
|
||||
NEULIVE_STATE.state = NEU_STI_INT;
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
@@ -1083,7 +983,6 @@ static void headstage_neu_state_spi() {
|
||||
// recv disable recording
|
||||
else if( !(rec_sti_command & ENABLE_REC) ){
|
||||
rec_sti_command &= ~STATUS_REC;
|
||||
headstage_led_color(COLOR_WHITE);
|
||||
headstage_led_control();
|
||||
|
||||
if(rec_sti_command & STATUS_STI){
|
||||
@@ -1298,251 +1197,142 @@ static void headstage_neu_state_spi() {
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit);
|
||||
static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write);
|
||||
|
||||
typedef enum{
|
||||
dbs_idle = 0x00,
|
||||
dbs_prepare = 0x01,
|
||||
dbs_recording = 0x02,
|
||||
dbs_stimulate = 0x04
|
||||
}dbs_status;
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FFT
|
||||
*
|
||||
* @brief TI Cortex M3 doesn't have floating-point ALU, we have to do
|
||||
* fixed-point FFT. And in-place FFT because lack of RAM.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void FFT(int* pred_LFP, int* imag_LFP, int numFFT){
|
||||
// testing_sig = !testing_sig;
|
||||
// uint8_t stageFFT = 6; // static global log2(numFFT)
|
||||
int l;
|
||||
int product_real, product_imag;
|
||||
int upfly_real, upfly_imag;
|
||||
int downfly_real, downfly_imag;
|
||||
static void headstage_neu_spi(){
|
||||
static dbs_status status;
|
||||
|
||||
for (int i=0; i<stageFFT; i++){
|
||||
l = 1<<i;
|
||||
for (int j=0; j<numFFT; j+=2*l){
|
||||
for (int k=0; k<l; k++){
|
||||
//printf("stage = %d , butterfly_top = %d , butterfly_down = %d , twiddle[%d] \n", i, j+k, j+k+l, NFFT*(k)/2/l);
|
||||
product_real = pred_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l] \
|
||||
- imag_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l];
|
||||
product_imag = pred_LFP[j+k+l] * twiddle_imag[numFFT*(k)/2/l] \
|
||||
+ imag_LFP[j+k+l] * twiddle_real[numFFT*(k)/2/l];
|
||||
// check system register if we have written it before
|
||||
if( check_register_value(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value) ){
|
||||
return;
|
||||
}
|
||||
// write system register
|
||||
if (write_register(sys_register, sizeof(sys_register)/sizeof(DBSRegister), sys_register_default_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
product_real = product_real/10000; // left shift number =10 which is up to Int_twiddle-factor
|
||||
product_imag = product_imag/10000;
|
||||
if(check_register_value(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
|
||||
return;
|
||||
}
|
||||
if(write_register(rec_register, sizeof(rec_register)/sizeof(DBSRegister), rec_register_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
upfly_real = pred_LFP[j+k] + product_real;
|
||||
upfly_imag = imag_LFP[j+k] + product_imag;
|
||||
if(check_register_value(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
|
||||
return;
|
||||
}
|
||||
if(write_register(sti_register, sizeof(sti_register)/sizeof(DBSRegister), sti_register_value)){
|
||||
return;
|
||||
}
|
||||
|
||||
downfly_real = pred_LFP[j+k] - product_real;
|
||||
downfly_imag = imag_LFP[j+k] - product_imag;
|
||||
// enable recording channel
|
||||
if(rec_register[REC_CHANNEL_INDEX].WriteRegister){
|
||||
status |= dbs_prepare;
|
||||
rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
|
||||
rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
|
||||
rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, rec_register_value[REC_CHANNEL_INDEX]);
|
||||
return;
|
||||
}
|
||||
|
||||
pred_LFP[j+k] = upfly_real;
|
||||
imag_LFP[j+k] = upfly_imag;
|
||||
if(status & dbs_prepare){
|
||||
status &= ~dbs_prepare;
|
||||
|
||||
pred_LFP[j+k+l] = downfly_real;
|
||||
imag_LFP[j+k+l] = downfly_imag;
|
||||
}
|
||||
if(rec_sti_command & ENABLE_REC){
|
||||
status |= dbs_recording;
|
||||
rec_sti_command |= STATUS_REC; // neu is recording now
|
||||
}
|
||||
|
||||
// change LED base on working status
|
||||
headstage_led_control();
|
||||
|
||||
AppendSPITX(0, 0);
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
return;
|
||||
}
|
||||
|
||||
if(rec_sti_command & STATUS_REC){
|
||||
if(!(rec_sti_command & ENABLE_REC)){
|
||||
// terminate record
|
||||
}
|
||||
else{
|
||||
headstage_neu_append_notify_data();
|
||||
AppendSPITX(0, 0);
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ADC_U2S
|
||||
*
|
||||
* @brief ADC sample data in 12-bit which is FFF~000, but for FFT
|
||||
* it needs to be pulled back to +7FF to -7FF. These is based
|
||||
* on simulation result, which is like the function ADC_ISR()
|
||||
* in Ramesh or Remy's code. [ ADC_unsigned_2_signed ]
|
||||
*
|
||||
* @param unsigned 16-bit input
|
||||
*
|
||||
* @return signed 16-bit output ----_0000_0000_0000 ~ ----_1000_0000_0000
|
||||
*/
|
||||
static int ADC_U2S( uint16_t unsigned_buff){
|
||||
|
||||
// 0x0F_FF ~ 0x00_00
|
||||
int output; // 0x07_FF-0x0000 ~ 0x0FFF-0x08_00
|
||||
|
||||
if ( unsigned_buff >= 0x00000800)
|
||||
output = unsigned_buff - 0x00000800;
|
||||
else
|
||||
output = unsigned_buff | 0xFFFFF800;
|
||||
|
||||
return output;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn BitReverse
|
||||
*
|
||||
* @brief Do array Bit-Reverse before perform FFT
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void BitReverse(int* BR_Array, int numFFT){
|
||||
|
||||
// This BIR aims for 4-bit (0000~1111)
|
||||
// uint8_t n=0;
|
||||
// int tmp;
|
||||
// for (uint8_t i=0; i<numFFT; i++){
|
||||
// n = i; // printf ("%d %d\n",i,n);
|
||||
// n = (n&0x03)<<2 |(n&0x0C)>>2 ; // printf ("%d %d\n",i,n);
|
||||
// n = (n&0x05)<<1 | (n&0x0A)>>1; // printf ("%d %d\n",i,n);
|
||||
// if (n>i){
|
||||
// tmp = BR_Array[n];
|
||||
// BR_Array[n] = BR_Array[i];
|
||||
// BR_Array[i] = tmp;
|
||||
//
|
||||
// // it's recording
|
||||
// if(rec_sti_command & STATUS_REC){
|
||||
// if(!(rec_sti_command & ENABLE_REC)){
|
||||
// // stop recording
|
||||
// rec_register[REC_CHANNEL_INDEX].WriteRegister = false;
|
||||
// rec_register[REC_CHANNEL_INDEX].CheckRegister = true;
|
||||
// rec_register[REC_CHANNEL_INDEX].write_reg(rec_register+REC_CHANNEL_INDEX, value_to_write[REC_CHANNEL_INDEX]);
|
||||
// }
|
||||
// else{
|
||||
// // keep recording
|
||||
// headstage_neu_append_notify_data();
|
||||
// AppendSPITX(0, 0);
|
||||
// headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
// }
|
||||
// }
|
||||
}
|
||||
|
||||
// This BIR aims for 8-bit (0000_0000~1111_1111)
|
||||
// uint8_t n=0;
|
||||
// int tmp;
|
||||
//
|
||||
// for (uint8_t i=0; i<numFFT; i++){
|
||||
// n = i; // printf ("%d %d\n",i,n);
|
||||
// n = (n&0x0f)<<4 | (n&0xf0)>>4; // 1234_5678 -> 5678_1234
|
||||
// n = (n&0x33)<<2 | (n&0xcc)>>2; // 5678_1234 -> 7856_3412
|
||||
// n = (n&0xaa)<<2 | (n&0x55)>>1 ; // 7856_3412 -> 8765_4321
|
||||
//
|
||||
// if (n>i){
|
||||
// tmp = BR_Array[n];
|
||||
// BR_Array[n] = BR_Array[i];
|
||||
// BR_Array[i] = tmp;
|
||||
// }
|
||||
// }
|
||||
|
||||
// This BIR aims for 7-bit (0000_0000~0111_1111)
|
||||
uint8_t n=0;
|
||||
int tmp;
|
||||
|
||||
for (uint8_t i=0; i<numFFT; i++){
|
||||
n = i; // printf ("%d %d\n",i,n);
|
||||
n = (n&0x0f)<<4 | (n&0xf0)>>4; // 0123_4567 -> 4567_0123
|
||||
n = (n&0x33)<<2 | (n&0xcc)>>2; // 4567_0123 -> 6745_2301
|
||||
n = (n&0xaa)<<2 | (n&0x55)>>1; // 7856_3412 -> 7654_3210
|
||||
n = n >> 1; // 7654_3210 -> 0765_4321
|
||||
if (n>i){
|
||||
tmp = BR_Array[n];
|
||||
BR_Array[n] = BR_Array[i];
|
||||
BR_Array[i] = tmp;
|
||||
}
|
||||
}
|
||||
return;
|
||||
} // END Bit Reverse Order Sort
|
||||
|
||||
/*********************************************************************
|
||||
* @fn CLP ( Closed LooP )
|
||||
*
|
||||
* @brief
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
static void CLP(uint8_t buf1, uint8_t buf2){
|
||||
|
||||
uint16_t unsign_buff;
|
||||
int signed_buff;
|
||||
static int accumu_sum;
|
||||
static int x_in[16];
|
||||
static int real[16];
|
||||
static int imag[16];
|
||||
static int count_sample;
|
||||
static int count_data;
|
||||
int abs_tmp;
|
||||
static int present, past1, past2, hvs;
|
||||
static int w[6] = {1597,-1909,1856,-1190,630,23};
|
||||
|
||||
count_sample++; // count+1 every 1-ms
|
||||
if (count_sample>=24){ // ensure sample LFP data every 24-ms(41.6667Hz)
|
||||
unsign_buff = buf1<<8 | buf2; //
|
||||
signed_buff = ADC_U2S(unsign_buff); // FFF ~ 000 to +7FF ~ -7FF
|
||||
x_in[count_data] = signed_buff;
|
||||
real[count_data] = signed_buff;
|
||||
imag[count_data] = 0;
|
||||
count_sample = 0; // re-calculate count
|
||||
count_data++;
|
||||
if (count_data>=6){
|
||||
accumu_sum = 0;
|
||||
for (int i=6;i<numFFT;i++){
|
||||
real[i] = ( w[0] * real[i-1] \
|
||||
+ w[1] * real[i-2] \
|
||||
+ w[2] * real[i-3] \
|
||||
+ w[3] * real[i-4] \
|
||||
+ w[4] * real[i-5] \
|
||||
+ w[5] * real[i-6] )>>10;
|
||||
imag[i] = 0;
|
||||
#define RESEND_SPI_READ_NUMBER 3
|
||||
static uint8_t check_register_value(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_fit){
|
||||
for(int i=0 ; i<reg_size ; i++){
|
||||
if(dbs_register[i].CheckRegister){
|
||||
if(check_reg_counter < RESEND_SPI_READ_NUMBER){
|
||||
dbs_register[i].read_reg(dbs_register+i);
|
||||
}
|
||||
BitReverse( real, numFFT);
|
||||
FFT( real, imag, numFFT);
|
||||
for (int i=1;i<6;i++){
|
||||
if (i>=2&&i<=4){
|
||||
accumu_sum += real[i]*real[i]+imag[i]*imag[i];
|
||||
else{
|
||||
// check register value
|
||||
check_reg_counter = 0;
|
||||
dbs_register[i].CheckRegister = false;
|
||||
|
||||
uint16_t ins_to_fit = value_to_fit[i];
|
||||
uint16_t ins_recv = spi_rxbuf[1] << 8 | spi_rxbuf[2];
|
||||
|
||||
if(ins_recv != ins_to_fit){
|
||||
SPI_close(headstage_spi_handle);
|
||||
dbs_register[i].WriteRegister = true;
|
||||
ReopenSPI();
|
||||
dbs_register[i].write_reg(dbs_register+i, value_to_fit[i]);
|
||||
}
|
||||
else{
|
||||
AppendSPITX(0, 0);
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
}
|
||||
real[i-1] = x_in[i];
|
||||
imag[i-1] = 0;
|
||||
x_in[i-1] = x_in[i];
|
||||
}
|
||||
present = ( (accumu_sum>>12) > 500 )?1:0;
|
||||
hvs = (present&past1)&past2;
|
||||
past2 = past1;
|
||||
past1 = present;
|
||||
if (hvs==1)
|
||||
headstage_pin_output(Board_CLP, 1);
|
||||
else
|
||||
headstage_pin_output(Board_CLP, 0);
|
||||
count_data--;
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
|
||||
//static int real_LFP[16]; // Real re-sample value buffer use for off-line prediction [Resample_ADC]
|
||||
//static int imag_LFP[16]; // imag part FFT [SimpleBLEPeripheral_performPeriodicTask]
|
||||
//static int x_in[16]; // real part FFT [SimpleBLEPeripheral_performPeriodicTask]
|
||||
//static int accumu_sum;
|
||||
//static int count;
|
||||
//
|
||||
// unsign_buff = buf1<<8 | buf2;
|
||||
// signed_buff = ADC_U2S(unsign_buff);
|
||||
//
|
||||
//// if (signed_buff > -325){
|
||||
//// headstage_pin_output(Board_CLP, 1);
|
||||
//// }
|
||||
//// else {
|
||||
//// headstage_pin_output(Board_CLP, 0);
|
||||
//// }
|
||||
//
|
||||
// x_in[count] = signed_buff;
|
||||
// real[count] = signed_buff;
|
||||
// imag[count] = 0;
|
||||
// count++;
|
||||
//
|
||||
// if (count >= numFFT){
|
||||
// BitReverse( real, numFFT);
|
||||
// FFT( real, imag, numFFT);
|
||||
// abs_tmp=0;
|
||||
// for ( int i=0; i<numFFT; i++){
|
||||
// if (i>0){
|
||||
// if (i==1){
|
||||
// abs_tmp = real[i]*real[i]+imag[i]*imag[i];
|
||||
// }
|
||||
// real[i-1] = x_in[i];
|
||||
// imag[i-1] = 0;
|
||||
// x_in[i-1] = x_in[i];
|
||||
// }
|
||||
// }
|
||||
// if (abs_tmp > 55000000){
|
||||
// headstage_pin_output(Board_CLP, 1);
|
||||
// }
|
||||
// else {
|
||||
// headstage_pin_output(Board_CLP, 0);
|
||||
// }
|
||||
// count--;
|
||||
// }
|
||||
static uint8_t write_register(DBSRegister *dbs_register, uint8_t reg_size, uint16_t *value_to_write){
|
||||
|
||||
// start from index 1, since 0 is rec/sti enable
|
||||
for(int i=1 ; i<reg_size ; i++){
|
||||
if(dbs_register[i].WriteRegister){
|
||||
dbs_register[i].WriteRegister = false;
|
||||
dbs_register[i].CheckRegister = true;
|
||||
dbs_register[i].write_reg(dbs_register+i, value_to_write[i]);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+6
-6
@@ -3,15 +3,15 @@
|
||||
#define VERSION_DATE
|
||||
|
||||
#define VERSION_DATE_YEAR 20
|
||||
#define VERSION_DATE_MONTH 10
|
||||
#define VERSION_DATE_DAY 26
|
||||
#define VERSION_DATE_HOUR 17
|
||||
#define VERSION_DATE_MINUTE 47
|
||||
#define VERSION_DATE_MONTH 9
|
||||
#define VERSION_DATE_DAY 9
|
||||
#define VERSION_DATE_HOUR 10
|
||||
#define VERSION_DATE_MINUTE 26
|
||||
|
||||
// this is NOT the version hash !!
|
||||
// it's the last version hash
|
||||
#define VERSION_HASH 6e9acfda78f14e9c532360e9267b053392f53659
|
||||
#define VERSION_GIT_BRANCH neulive20_stable_non_central
|
||||
#define VERSION_HASH b9c9cc0bbcdb1ad375f9f5966577ca34ef3fd6d1
|
||||
#define VERSION_GIT_BRANCH neulive20_development_without_central
|
||||
|
||||
static void get_board_name(char *board_name_ch, uint8 *board_name_int, uint8 name_size){
|
||||
uint8 name_offset = 18;
|
||||
|
||||
+51
@@ -13,6 +13,57 @@
|
||||
static uint8_t not_buf_offset = NOT_BUF_OFFSET_INIT;
|
||||
static uint32_t not_time_stamp = 0;
|
||||
|
||||
static void headstage_notify_set_timestamp();
|
||||
static void headstage_notify_flip_buffer();
|
||||
static uint8_t headstage_notify_append_data(uint8_t *data_value);
|
||||
|
||||
/**
|
||||
* @fn headstage_neu_append_notify_data
|
||||
*/
|
||||
#define CHANNEL_VALID (INSTRUCTION.recording_channel & (0x0001 << channel))
|
||||
static void headstage_neu_append_notify_data() {
|
||||
|
||||
uint8_t channel = spi_rxbuf[0];
|
||||
|
||||
// close-reopen SPI, if the first channel received is invalid
|
||||
if(IsFirstData){
|
||||
// start record
|
||||
if((INSTRUCTION.recording_channel & (0x0001 << channel)) && (channel < 16)){
|
||||
IsFirstData = false;
|
||||
}
|
||||
// restart SPI
|
||||
else{
|
||||
SPI_close(headstage_spi_handle);
|
||||
ReopenSPI();
|
||||
IsFirstData = true;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// discard illegal channel
|
||||
// uint16_t valid_channel = INSTRUCTION.recording_channel & (0x0001 << channel);
|
||||
if(!(INSTRUCTION.recording_channel & (0x0001 << channel)) || (channel > 15)){
|
||||
// illegal channel
|
||||
return;
|
||||
}
|
||||
|
||||
uint8_t not_buf[3];
|
||||
not_buf[0] = channel; // ch
|
||||
not_buf[1] = spi_rxbuf[1];
|
||||
not_buf[2] = spi_rxbuf[2];
|
||||
|
||||
// not_buf[1] = (INSTRUCTION.recording_channel | 0xFF00) >> 8;
|
||||
// not_buf[2] = (INSTRUCTION.recording_channel | 0x00FF);
|
||||
|
||||
uint8_t data_size = headstage_notify_append_data(not_buf);
|
||||
|
||||
if (data_size >= BLE_NOT_BUFF_SIZE) {
|
||||
headstage_notify_flip_buffer();
|
||||
headstage_notify_send();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void headstage_notify_set_timestamp() {
|
||||
not_time_stamp = headstage_time_stamp_us();
|
||||
|
||||
|
||||
-5
@@ -39,10 +39,6 @@
|
||||
#define PIN_AMP_VCK IOID_13 //
|
||||
#define PIN_STI_CLK IOID_14 //
|
||||
|
||||
// Borshin define handle
|
||||
#define Board_CLP IOID_4 //
|
||||
|
||||
|
||||
// clang-format on
|
||||
#endif
|
||||
/*
|
||||
@@ -83,7 +79,6 @@ static PIN_Config headstage_pin_configuration[] = { //
|
||||
PIN_DC_DC | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_BATT_HALF | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
PIN_STI_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
Board_CLP | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
|
||||
// TODO : add PIN_IRQ for STI clock to detect STI status (update LED & resend STI command if failed before)
|
||||
PIN_TERMINATE};
|
||||
|
||||
|
||||
+68
@@ -120,4 +120,72 @@ static void AppendSPITX(uint8_t index, uint32_t value){
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn headstage_spi_callback
|
||||
*
|
||||
* description: callback function to deal with data transmission between DBS and CC2650
|
||||
*/
|
||||
static void headstage_spi_callback(SPI_Handle handle, SPI_Transaction* transaction) {
|
||||
switch(SPICallBack){
|
||||
case CONTINUOUS_TRANS:{
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER:{
|
||||
SPICallBack = FLUSH_BUFFER2;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case FLUSH_BUFFER2:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
// headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
case ONE_SHOT_SPI:{
|
||||
SPICallBack = FLUSH_BUFFER;
|
||||
for(int i=0 ; i<SPI_BUFFER_SIZE ; i++){
|
||||
spi_txbuf[i] = 0x00;
|
||||
}
|
||||
headstage_spi_transaction(SPI_BUFFER_SIZE);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_MOSI:{
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case READ_REG:{
|
||||
check_reg_counter ++;
|
||||
flag_notify(EVT_NEU_SPI);
|
||||
break;
|
||||
}
|
||||
|
||||
case CLOSE_SPI:{
|
||||
SPICallBack = ONE_SHOT_SPI;
|
||||
SPI_close(headstage_spi_handle);
|
||||
break;
|
||||
}
|
||||
|
||||
case END_TRANSMIT:{
|
||||
tx_put_u24(0, 0);
|
||||
SPICallBack = CONTINUOUS_TRANS;
|
||||
break;
|
||||
}
|
||||
default:{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+1
@@ -561,6 +561,7 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) {
|
||||
headstage_init_device_info();
|
||||
|
||||
headstage_init();
|
||||
InitDBSRegister();
|
||||
|
||||
for (;;) {
|
||||
// Waits for a signal to the semaphore associated with the calling thread.
|
||||
|
||||
+3
-5
@@ -2,21 +2,19 @@
|
||||
|
||||
folder=$(basename "$(pwd)")
|
||||
|
||||
if [ "$folder" == "ti" ]; then
|
||||
if [ "$folder" == "bioprocc2650" ]; then
|
||||
|
||||
input="./Neulive_sti_cali.txt"
|
||||
output="./simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_cali_sti.h"
|
||||
|
||||
#variable
|
||||
declare -i current_line=232
|
||||
declare -i current_line=96
|
||||
declare -i col_index=0
|
||||
declare -i row_index=0
|
||||
|
||||
#constant
|
||||
declare -i COL_MAX=8
|
||||
|
||||
#this is number of Neulive_sti_cali.txt
|
||||
declare -i START_ROW=29
|
||||
declare -i START_ROW=27
|
||||
declare -i UN_USED_ROW=$START_ROW-1
|
||||
|
||||
MAC="MAC"
|
||||
|
||||
Reference in New Issue
Block a user