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stimulation begin to test

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This commit is contained in:
YiChin2018
2019-07-25 18:57:06 +08:00
parent 2d566a420d
commit b5d76a99b2
2 changed files with 22 additions and 23 deletions
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python_test_code/devlib/main.py
+6 -6
View File
@@ -17,7 +17,7 @@ STI_PARAMETER = {
}
NEULIVE_INSTRUCTION = {
'RIS': '3b101#header#;2b0;3b>LB;4b0;1bCH;1bFS;3b>WF;5b>TV;4b>PM;4b>NM;4b>SR',
'RIS': '3b101#header#;2b0;3b>LB;2b0;1bCH;1bFS;3b>WF;5b>TV;4b>PM;4b>NM;4b>SR',
'UMC': '3b001#umc_parameter;3b>AG;4b>PW;6b>TT;2b>SB;6b>TF;1bCA;1bCB;1bCC;1bCD;4b>CHA;4b>CHB;4b>CHC;4b>CHD'
}
@@ -25,15 +25,15 @@ NEULIVE_PARAMETER = {
'LB': 0,
'CH': 0,
'FS': 0,
'WF': 0,
'TV': 0,
'PM': 15,
'NM': 0,
'WF': 1,
'TV': 10,
'PM': 0,
'NM': 1,
'SR': 0,
'AG': 5,
'PW': 0,
'TT': 0,
'SB': 1,
'SB': 3,
'TF': 3,
'CA': 1,
'CB': 0,
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_uni.h
+16 -17
View File
@@ -205,9 +205,9 @@ static uint16_t sti_waveform_table[6] = {
// TODO when we choose trigger mode , but we can't transmit any trigger instruction.
static uint16_t sti_mode_table[4] = {
{0b001100}, // disable stimulation, it would there will be no trigger to be set
{0b110000}, // continuous mode
{0b001100}, // trigger mode
{0b000011} // limited mode
{0b000011}, // limited mode
{0b110000} // continuous mode
};
static uint16_t amp_band_table[8] = { //
@@ -227,9 +227,9 @@ static uint16_t fast_settle_table[2] = { //
// XXX not used
static uint16_t sti_channel_table[4] = {
{0b000010}, // 3
{0b001000}, // 4
{0b001100}, // 5
{0b010000} // 6
{0b000011}, // 4
{0b000100}, // 5
{0b000101} // 6
};
/*
@@ -608,7 +608,6 @@ static void headstage_reset() {
headstage_cpu_delay_ms(1);
headstage_pin_output(PIN_RESET, 1);
flag_disable(EVT_UMC_LSK);
}
/*===========================
@@ -622,9 +621,6 @@ static void headstage_init() {
headstage_pin_open();
headstage_spi_open();
headstage_pwm_open();
// headstage_i2c_open();
// headstage_watchdog_open();
// if(headstage_watchdog_handle == NULL)
// {
@@ -632,7 +628,7 @@ static void headstage_init() {
// }
headstage_pin_output(PIN_RESET, 1); // initialize DBS chip
headstage_pin_output(PIN_STI_SEL, 0); // chip select is ok
headstage_pin_output(PIN_STI_SEL, 1); // chip select is ok
headstage_pin_output(PIN_VGRP, 1); //
headstage_pin_output(PIN_FASTSET, 0); //
}
@@ -657,8 +653,8 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.chopper = chopper;
INSTRUCTION.fast_settle = fast_settle;
INSTRUCTION.sti_volt = sti_volt;
INSTRUCTION.sti_channel_pmos = sti_chp;
INSTRUCTION.sti_channel_nmos = sti_chn;
INSTRUCTION.sti_channel_pmos = sti_channel_table[sti_chp];
INSTRUCTION.sti_channel_nmos = sti_channel_table[sti_chn];
break;
}
case RIS_SET_PARA: {
@@ -823,7 +819,7 @@ static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) {
channel = reverse_channel[INSTRUCTION.channel_mux[channel_pointer]];
}
// uint16_t data_value = (uint16_t)(((dat_buf[1] & 0x0F) << 6) | ((dat_buf[2] & 0xFC) >> 2));
uint8_t data_size = headstage_notify_append_data(channel, dat_buf);
uint8_t data_size = headstage_notify_append_data(channel, dat_buf);
if (data_size >= BLE_NOT_BUFF_SIZE) {
headstage_notify_send();
@@ -834,9 +830,6 @@ static void headstage_uni_umc_data_append_notify_buffer(uint8_t* dat_buf) {
}
headstage_spi_lsk_transaction(3);
/*
spi_lsk_transaction(3, NULL, spi_rxbuf);
*/
}
/*=====================
@@ -967,6 +960,8 @@ static void headstage_umc_state_transfer_ask() {
static void headstage_umc_state_transfer_lsk() {
headstage_debug_buffer[0] = headstage_state;
headstage_debug_buffer[10] = INSTRUCTION.mode;
headstage_set_debug_information();
switch (headstage_state) {
case UMC_STATE_IDLE:
@@ -1020,6 +1015,10 @@ static void headstage_umc_state_transfer_lsk() {
uint32_t value;
uint8_t new_config_type = build_umn_ins_config(UMC_STATE.config_type, &value);
headstage_debug_buffer[18] = INSTRUCTION.sti_channel_pmos;
headstage_debug_buffer[19] = INSTRUCTION.sti_channel_nmos;
headstage_set_debug_information();
if (new_config_type == CONFIG_ERROR) {
// XXX
} else {
@@ -1054,7 +1053,7 @@ static void headstage_umc_state_transfer_lsk() {
default:
break;
case 0:
case 3:
// continuous mode
headstage_state = UMC_STATE_CONTINUOUS;
UMC_STATE.trigger_times = 0;