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neulive2.0 debug

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This commit is contained in:
yichin
2019-09-17 11:22:50 +08:00
parent 5851dc9707
commit 20d5804a87
4 changed files with 150 additions and 60 deletions
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simplelink/ble_sdk_2_02_02_25/src/boards/BOOSTXL_CC2650MA/BOOSTXL_CC2650MA.c
+6 -2
View File
@@ -82,6 +82,10 @@ const PIN_Config BoardGpioInitTable[] = {
Board_UART_TX | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_PUSHPULL, /* UART TX */
Board_SRDY | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_PUSHPULL, /* SRDY */
Board_MRDY | PIN_INPUT_EN | PIN_PULLDOWN, /* MRDY */
Board_SPI0_MISO | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
Board_SPI0_MOSI | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PULLDOWN,
Board_SPI0_CLK | PIN_INPUT_EN | PIN_GPIO_LOW | PIN_PULLDOWN,
Board_SPI0_CSN | PIN_INPUT_EN | PIN_GPIO_HIGH | PIN_PULLDOWN,
PIN_TERMINATE};
const PINCC26XX_HWAttrs PINCC26XX_hwAttrs = {
@@ -233,7 +237,7 @@ const SPICC26XXDMA_HWAttrsV1 spiCC26XXDMAHWAttrs[BOOSTXL_CC2650MA_SPICOUNT] = {
.mosiPin = Board_SPI0_MOSI,
.misoPin = Board_SPI0_MISO,
.clkPin = Board_SPI0_CLK,
.csnPin = Board_SPI0_CS
.csnPin = Board_SPI0_CSN
//
},
#ifdef HEADSTAGE_MA_USE_SPI2
@@ -250,7 +254,7 @@ const SPICC26XXDMA_HWAttrsV1 spiCC26XXDMAHWAttrs[BOOSTXL_CC2650MA_SPICOUNT] = {
.mosiPin = Board_SPI1_MOSI,
.misoPin = Board_SPI1_MISO,
.clkPin = Board_SPI1_CLK,
.csnPin = Board_SPI1_CS //
.csnPin = Board_SPI1_CSN //
},
#endif
};
simplelink/ble_sdk_2_02_02_25/src/boards/CC2650_LAUNCHXL/CC2650_LAUNCHXL.h
+27 -25
View File
@@ -51,6 +51,8 @@ extern "C" {
#include <ti/drivers/PIN.h>
#include <driverlib/ioc.h>
#include "neu/headstage_pin.h"
/** ============================================================================
* Externs
* ==========================================================================*/
@@ -68,34 +70,34 @@ extern const PIN_Config BoardGpioInitTable[];
*/
/* Discrete outputs */
#define Board_RLED IOID_6
#define Board_GLED IOID_7
#define Board_RLED PIN_UNASSIGNED
#define Board_GLED PIN_UNASSIGNED
#define Board_LED_ON 1
#define Board_LED_OFF 0
/* Discrete inputs */
#define Board_BTN1 IOID_13
#define Board_BTN2 IOID_14
#define Board_BTN1 PIN_UNASSIGNED
#define Board_BTN2 PIN_UNASSIGNED
/* UART Board */
#define Board_UART_RX IOID_1 /* RXD */
#define Board_UART_TX IOID_2 /* TXD */
#define Board_UART_RX PIN_UNASSIGNED /* RXD */
#define Board_UART_TX PIN_UNASSIGNED /* TXD */
#define Board_UART_CTS PIN_UNASSIGNED /* CTS */
#define Board_UART_RTS PIN_UNASSIGNED /* RTS */
/* SPI Board */
#define Board_SPI0_MISO PIN_UNASSIGNED /* RF1.20 */
#define Board_SPI0_MOSI IOID_12 /* RF1.18 */
#define Board_SPI0_CLK PIN_UNASSIGNED /* RF1.16 */
#define Board_SPI0_CSN IOID_4
#define Board_SPI1_MISO PIN_UNASSIGNED
#define Board_SPI1_MOSI IOID_10
#define Board_SPI1_CLK IOID_9
#define Board_SPI1_CSN IOID_3
//#define Board_SPI0_MISO PIN_UNASSIGNED /* RF1.20 */
//#define Board_SPI0_MOSI PIN_UNASSIGNED /* RF1.18 */
//#define Board_SPI0_CLK PIN_UNASSIGNED /* RF1.16 */
//#define Board_SPI0_CSN PIN_UNASSIGNED
//#define Board_SPI1_MISO PIN_UNASSIGNED
//#define Board_SPI1_MOSI PIN_UNASSIGNED
//#define Board_SPI1_CLK PIN_UNASSIGNED
//#define Board_SPI1_CSN PIN_UNASSIGNED
/* I2C */
#define Board_I2C0_SCL0 IOID_4
#define Board_I2C0_SDA0 IOID_5
#define Board_I2C0_SCL0 PIN_UNASSIGNED
#define Board_I2C0_SDA0 PIN_UNASSIGNED
/* SPI */
#define Board_SPI_FLASH_CS IOID_20
@@ -123,21 +125,21 @@ extern const PIN_Config BoardGpioInitTable[];
/* Booster pack LCD (430BOOST - Sharp96 Rev 1.1) */
#define Board_LCD_CS IOID_24 // SPI chip select
#define Board_LCD_EXTCOMIN IOID_12 // External COM inversion
#define Board_LCD_EXTCOMIN PIN_UNASSIGNED // External COM inversion
#define Board_LCD_ENABLE IOID_22 // LCD enable
#define Board_LCD_POWER IOID_23 // LCD power control
#define Board_LCD_CS_ON 1
#define Board_LCD_CS_OFF 0
/* PWM outputs */
#define Board_PWMPIN0 Board_RLED
#define Board_PWMPIN1 Board_GLED
#define Board_PWMPIN2 IOID_5
#define Board_PWMPIN3 IOID_11
#define Board_PWMPIN4 PIN_UNASSIGNED
#define Board_PWMPIN5 PIN_UNASSIGNED
#define Board_PWMPIN6 PIN_UNASSIGNED
#define Board_PWMPIN7 PIN_UNASSIGNED
//#define Board_PWMPIN0 PIN_UNASSIGNED
//#define Board_PWMPIN1 PIN_UNASSIGNED
//#define Board_PWMPIN2 PIN_UNASSIGNED
//#define Board_PWMPIN3 PIN_UNASSIGNED
//#define Board_PWMPIN4 PIN_UNASSIGNED
//#define Board_PWMPIN5 PIN_UNASSIGNED
//#define Board_PWMPIN6 PIN_UNASSIGNED
//#define Board_PWMPIN7 PIN_UNASSIGNED
/** ============================================================================
* Instance identifiers
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h
+98 -13
View File
@@ -102,6 +102,19 @@
spi_txbuf[__i++] = (__v)&0xff; \
} while (0)
/**
@fn rx_get_u24
*/
#define rx_get_u24(index) \
({ \
uint32_t __i = index; \
uint8_t __a = spi_rxbuf[__i++]; \
uint8_t __b = spi_rxbuf[__i++]; \
uint8_t __c = spi_rxbuf[__i++]; \
(__a << 16) | (__b << 8) | __c; \
})
/*==============
==== MACRO ====
=============*/
@@ -116,13 +129,15 @@
#define NEU_REC_PARAM 0x20
#define NEU_ARB_PARAM 0x40
#define NEU_READ_PARAM 0x60
#define NEU_TEST_INS 0x80
/** event */
#define EVT_NEU_SPI 0x0001 /** spi transaction event */
#define EVT_NEU_LED 0x0002 /** set led event */
#define EVT_NEU_CHECK 0x0003 /** check neulive single instruction */
/** clock setting */
#define NEU_SYS_CLK 2000000 /** 10Mhz */
#define NEU_SYS_CLK 10000000 /** 10Mhz */
#define NEU_POLY_R_CLK 1000 /** 1khz */
#define NEU_SPI_FREQ 1000000 /** 1Mhz */
#define NEU_LED_FREQ 1000000 /** 4Mhx */
@@ -134,7 +149,9 @@
/** state for CC2650 to control DBS */
#define NEU_WRITE_INSTRUCTION 0
#define NEU_READ_DATA 1
#define NEU_SINGLE_INSTRUCTION 2
#define NEU_SINGLE_INS_WRITE 2
#define NEU_SINGLE_INS_READ 3
#define NEU_CHECK_REGISTER 4
/** macros for build up DBS instruction */
#define NEU_LNA_BIAS_ONE 0x0210 /** vgrp(1_0000) left shift 5bits | vgrn(1_0000) */
@@ -342,8 +359,9 @@ static bool build_sti_cur_instruction(uint8_t sti_channel, uint32_t* value) {
return false;
}
case STI_CYCLE: {
op_neu = (sti_channel / 2) + 42;
uint8_t odd_even = sti_channel % 2;
op_neu = (sti_channel / 2) + 42;
uint8_t odd_even = sti_channel % 2;
INSTRUCTION.ins_opcode = HIGH_SIDE;
if (NEULIVE_STATE.config_type == NEU_SET_STI_VOLT) INSTRUCTION.ins_opcode = HIGH_SIDE;
if (odd_even)
*value = (0x01 << 23) | (op_neu << 16) | (INSTRUCTION.current_sti_cycle[sti_channel] << 8) | (INSTRUCTION.current_sti_cycle[sti_channel - 1]);
@@ -435,7 +453,11 @@ static void headstage_init() {
headstage_pwm_start(headstage_poly_r_pwm_handle);
headstage_pin_output(PIN_RESET, 1);
headstage_pin_output(PIN_DC_DC, 1);
headstage_cpu_delay_ms(1);
headstage_pin_output(PIN_RESET, 0);
headstage_cpu_delay_ms(1);
headstage_pin_output(PIN_EN_ADC_SPI_CLK, 1);
headstage_pin_output(PIN_RESET, 1);
}
static void headstage_neu_state_spi();
@@ -531,7 +553,8 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.sti_channel = (0x01 << 8);
}
INSTRUCTION.sti_clock_ratio = sti_clock_ratio;
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
INSTRUCTION.ins_opcode = T_FT;
break;
}
case NEU_REC_PARAM: {
@@ -556,11 +579,49 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
INSTRUCTION.sys_clk_ratio = sys_clk_ratio;
INSTRUCTION.amplifier_gain = amplifier_gain;
INSTRUCTION.chopper_ratio = chopper_ratio;
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
INSTRUCTION.ins_opcode = T_FT;
break;
}
case NEU_ARB_PARAM:
// to be implemented
break;
case NEU_TEST_INS:
INSTRUCTION.vgrp = 16;
INSTRUCTION.vgrn = 16;
INSTRUCTION.vgr_intp = 16;
INSTRUCTION.vgr_intn = 16;
INSTRUCTION.vgr_int_old = 16;
INSTRUCTION.recording_channel = 1;
INSTRUCTION.adc_clock_ratio = 100;
INSTRUCTION.sys_clk_ratio = 2;
INSTRUCTION.sti_clock_ratio = 10;
INSTRUCTION.amplifier_gain = 0;
INSTRUCTION.chopper_ratio = 2;
INSTRUCTION.sti_t1[1] = 1;
INSTRUCTION.sti_t2[1] = 0;
INSTRUCTION.sti_t3[1] = 0;
INSTRUCTION.sti_t4[1] = 0;
INSTRUCTION.sti_t5[1] = 0;
INSTRUCTION.current_sti_cycle[1] = 1;
INSTRUCTION.sti_channel = 2;
INSTRUCTION.arbitrary_en = 0;
INSTRUCTION.arbitrary_index = 0;
INSTRUCTION.sti_h_bridge = 0;
INSTRUCTION.sti_mode = 0;
INSTRUCTION.sti_ref = 0;
INSTRUCTION.current_sti_polarity = 2;
INSTRUCTION.sti_amplitude_h = 0;
INSTRUCTION.sti_amplitude_l = 0;
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
INSTRUCTION.ins_opcode = T_FT;
break;
case NEU_READ_PARAM:
uint8_t config_type;
config_type = instruction[1];
NEULIVE_STATE.config_type = config_type;
NEULIVE_STATE.state = NEU_SINGLE_INS_WRITE;
break;
default:
break;
}
@@ -578,8 +639,6 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
break; /** reset all the parameter */
case VIS_STI: {
flag_notify(EVT_NEU_SPI);
NEULIVE_STATE.state = NEU_WRITE_INSTRUCTION;
INSTRUCTION.ins_opcode = T_FT;
break; /** start to operate */
}
case VIS_INT:
@@ -597,6 +656,13 @@ static void headstage_update_vis_instruction(uint8_t vis_oper) {
static void headstage_data_append_notify_buffer(uint8_t* dat_buf) {}
/**
@fn read_neu_ins_config
*/
static void read_neu_ins_config(uint8_t config_type, uint32_t* value) {
*value = (0x00 << 23) | (config_type << 16);
}
/**
@fn build_neu_ins_config
@@ -672,7 +738,7 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
}
case NEU_SET_STI_CLK: {
*value = (0x01 << 23) | (0x34 << 16) | INSTRUCTION.sti_clock_ratio;
return NEU_SET_ARBITRARY;
return NEU_SET_STI_MODE;
}
case NEU_SET_ARBITRARY: {
*value = (0x01 << 23) | (0x36 << 16) | INSTRUCTION.arbitrary_en;
@@ -683,7 +749,7 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
return NEU_SET_STI_MODE;
}
case NEU_SET_STI_MODE: {
*value = (0x01 << 23) | (0x38 << 16) | (INSTRUCTION.sti_mode << 2) | (INSTRUCTION.sti_h_bridge) | (INSTRUCTION.sti_ref);
*value = (0x01 << 23) | (0x38 << 16) | (INSTRUCTION.sti_mode << 2) | (INSTRUCTION.sti_h_bridge << 1) | (INSTRUCTION.sti_ref);
return NEU_SET_AMP_BIAS;
}
case NEU_SET_AMP_BIAS: {
@@ -710,12 +776,12 @@ static uint8_t build_neu_ins_config(uint8_t config_type, uint32_t* value) {
*/
static void headstage_neu_state_spi() {
uint32_t value;
uint8_t nxt_ins;
switch (NEULIVE_STATE.state) {
case NEU_WRITE_INSTRUCTION: {
uint32_t value;
uint8_t nxt_ins = build_neu_ins_config(NEULIVE_STATE.config_type, &value);
nxt_ins = build_neu_ins_config(NEULIVE_STATE.config_type, &value);
tx_put_u24(0, value);
headstage_debug_buffer[1]++; //
headstage_set_debug_information();
NEULIVE_STATE.config_type = nxt_ins;
headstage_spi_transaction(3);
@@ -731,7 +797,26 @@ static void headstage_neu_state_spi() {
headstage_neu_append_notify_data();
break;
}
case NEU_SINGLE_INSTRUCTION: {
case NEU_SINGLE_INS_WRITE: {
nxt_ins = build_neu_ins_config(NEULIVE_STATE.config_type, &value);
tx_put_u24(0, value);
NEULIVE_STATE.state = NEU_SINGLE_INS_READ;
headstage_spi_transaction(3);
break;
}
case NEU_SINGLE_INS_READ: {
read_neu_ins_config(NEULIVE_STATE.config_type, &value);
tx_put_u24(0, value);
NEULIVE_STATE.state = NEU_CHECK_REGISTER;
headstage_spi_transaction(3);
break;
}
case NEU_CHECK_REGISTER: {
headstage_spi_transaction(3);
headstage_debug_buffer[1] = spi_rxbuf[0];
headstage_debug_buffer[2] = spi_rxbuf[1];
headstage_debug_buffer[3] = spi_rxbuf[2];
headstage_set_debug_information();
break;
}
default:
simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/neu/headstage_pin.h
+19 -20
View File
@@ -40,38 +40,37 @@
#define PIN_SYS_CLK IOID_14 //
// clang-format on
#endif
/*
* SPI0 interface with DBS chip 2.0
*/
#define Board_SPI0_MISO PIN_SPI_MISO
#define Board_SPI0_MOSI PIN_SPI_MOSI
#define Board_SPI0_CLK PIN_SPI_CLK
#define Board_SPI0_CS PIN_SPI_CS
#define Board_SPI0_MISO PIN_SPI_MISO
#define Board_SPI0_MOSI PIN_SPI_MOSI
#define Board_SPI0_CLK PIN_SPI_CLK
#define Board_SPI0_CSN PIN_SPI_CS
/*
* SPI1 interface work with LED
*/
#define Board_SPI1_MISO PIN_UNASSIGNED
#define Board_SPI1_MOSI PIN_LED_SDI
#define Board_SPI1_CLK PIN_LED_CLK
#define Board_SPI1_CS PIN_UNASSIGNED
#define Board_SPI1_MISO PIN_UNASSIGNED
#define Board_SPI1_MOSI PIN_LED_SDI
#define Board_SPI1_CLK PIN_LED_CLK
#define Board_SPI1_CSN PIN_UNASSIGNED
/* Power Management Board */
#define Board_SRDY Board_BP_Pin_J2_19
#define Board_MRDY Board_BP_Pin_J1_2
#define Board_SRDY Board_BP_Pin_J2_19
#define Board_MRDY Board_BP_Pin_J1_2
/* PWM outputs */
#define Board_PWMPIN0 PIN_AMP_VCK
#define Board_PWMPIN1 PIN_UNASSIGNED
#define Board_PWMPIN2 PIN_SYS_CLK
#define Board_PWMPIN3 PIN_UNASSIGNED
#define Board_PWMPIN4 PIN_UNASSIGNED
#define Board_PWMPIN5 PIN_UNASSIGNED
#define Board_PWMPIN6 PIN_UNASSIGNED
#define Board_PWMPIN7 PIN_UNASSIGNED
#endif
#define Board_PWMPIN0 PIN_AMP_VCK
#define Board_PWMPIN1 PIN_UNASSIGNED
#define Board_PWMPIN2 PIN_SYS_CLK
#define Board_PWMPIN3 PIN_UNASSIGNED
#define Board_PWMPIN4 PIN_UNASSIGNED
#define Board_PWMPIN5 PIN_UNASSIGNED
#define Board_PWMPIN6 PIN_UNASSIGNED
#define Board_PWMPIN7 PIN_UNASSIGNED
static PIN_Config headstage_pin_configuration[] = { //
PIN_RESET | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,