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/**
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* Copyright (c) 2026 Wisetop. All Rights Reserved.
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*/
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/** @file main.c
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*
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* @version 0.0.1
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* @date 2026/04/22
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* @license
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* @description
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*/
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#include "main.h"
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#include "hal_gpio.h"
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#include "hal_tim.h"
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#include "uart_cmd_srv.h"
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//=============================================================================
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// Constant Definition
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//=============================================================================
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#define EPWM_TARGET_FREQ_HZ (24000U)
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#define EPWM_TIM_CLOCK_HZ (60000000U)
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#define PWM_TABLE_SIZE (64U)
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// Example: 50Hz electrical frequency in Q0.32 phase accumulator domain.
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#define PHASE_TARGET_FREQ_HZ (50U)
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#define PHASE_OFFSET_120_DEG_Q32 (0x55555555UL)
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#define PHASE_OFFSET_240_DEG_Q32 (0xAAAAAAAAUL)
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//=============================================================================
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// Macro Definition
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//=============================================================================
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//=============================================================================
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// Structure Definition
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//=============================================================================
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//=============================================================================
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// Global Data Definition
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//=============================================================================
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static const uint16_t pwm_table[PWM_TABLE_SIZE]
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= { 1250, 1372, 1493, 1612, 1728, 1839, 1944, 2042, 2133, 2216, 2289,
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2352, 2404, 2446, 2475, 2493, 2499, 2493, 2475, 2446, 2404, 2352,
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2289, 2216, 2133, 2042, 1944, 1839, 1728, 1612, 1493, 1372, 1250,
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1127, 1006, 887, 771, 660, 555, 457, 366, 283, 210, 147,
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95, 53, 24, 6, 0, 6, 24, 53, 95, 147, 210,
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283, 366, 457, 555, 660, 771, 887, 1006, 1127 };
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static volatile uint32_t phase_acc_base = 0U;
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static uint32_t phase_acc_step = 0U;
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//=============================================================================
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// Private Function Definition
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//=============================================================================
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static void epwm_set_3phase_duty_from_phase(uint32_t phase_q32)
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{
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const uint16_t idx_a = (uint16_t)(phase_q32 >> 26U);
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const uint16_t idx_b = (uint16_t)((phase_q32 + PHASE_OFFSET_120_DEG_Q32) >> 26U);
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const uint16_t idx_c = (uint16_t)((phase_q32 + PHASE_OFFSET_240_DEG_Q32) >> 26U);
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EPWM->CCR1 = pwm_table[idx_a & (PWM_TABLE_SIZE - 1U)];
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EPWM->CCR2 = pwm_table[idx_b & (PWM_TABLE_SIZE - 1U)];
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EPWM->CCR3 = pwm_table[idx_c & (PWM_TABLE_SIZE - 1U)];
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}
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__INTERRUPT static void epwm_irq_handler(void)
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{
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if ((EPWM->SR & 0x10000U) == 0x10000U)
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{
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phase_acc_base += phase_acc_step;
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epwm_set_3phase_duty_from_phase(phase_acc_base);
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TIM_ClearITPendingBit(EPWM, 0x10000U); // clear EPWM OVIF
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}
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}
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static uint16_t epwm_calc_prescaler(uint32_t tim_clk_hz, uint32_t pwm_freq_hz,
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uint16_t period)
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{
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const uint32_t denom = pwm_freq_hz * ((uint32_t)period + 1U);
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uint32_t psc = (tim_clk_hz + (denom / 2U)) / denom;
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if (psc == 0U)
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{
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psc = 1U;
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}
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return (uint16_t)(psc - 1U);
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}
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static uint16_t epwm_calc_max_period(uint32_t tim_clk_hz, uint32_t pwm_freq_hz)
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{
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uint32_t period = (tim_clk_hz / pwm_freq_hz);
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if (period == 0U)
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{
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return 0U;
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}
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period -= 1U;
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if (period > 0xFFFFU)
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{
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period = 0xFFFFU;
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}
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return (uint16_t)period;
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}
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static uint32_t phase_acc_calc_step(uint32_t target_freq_hz,
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uint32_t update_freq_hz)
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{
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return (uint32_t)(((uint64_t)target_freq_hz << 32) / update_freq_hz);
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}
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static void epwm_init(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct = { 0 };
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TIM_OCInitTypeDef TIM_OCInitStruct = { 0 };
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TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStr = { 0 };
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sys_irq_attr_t irq_attr = { 0 };
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const uint16_t period = epwm_calc_max_period(EPWM_TIM_CLOCK_HZ,
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EPWM_TARGET_FREQ_HZ);
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const uint16_t prescaler = epwm_calc_prescaler(EPWM_TIM_CLOCK_HZ,
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EPWM_TARGET_FREQ_HZ, period);
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_00 | GPIO_Pin_01 | GPIO_Pin_02
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| GPIO_Pin_03 | GPIO_Pin_04 | GPIO_Pin_05;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStruct.GPIO_AF_Mode = GPIO_AF_6;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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irq_attr.disable_vector = false;
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irq_attr.trig_mode = SYS_IRQ_TRIGGER_LEVEL;
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irq_attr.level = SYS_IRQ_LEVEL_H;
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irq_attr.priority = SYS_IRQ_PRIORITY_MIDDEN;
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sys_register_IRQ(EPWM_IRQn, epwm_irq_handler, &irq_attr);
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TIM_DeInit(EPWM);
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TIM_TimeBaseStructInit(&TIM_TimeBaseInitStr);
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TIM_TimeBaseInitStr.TIM_Prescaler = prescaler;
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TIM_TimeBaseInitStr.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInitStr.TIM_Period = period;
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TIM_TimeBaseInitStr.TIM_ClockDivision = TIM_CKD_Div1;
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TIM_TimeBaseInitStr.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(EPWM, &TIM_TimeBaseInitStr);
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TIM_ARRPreloadConfig(EPWM, ENABLE);
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TIM_OCStructInit(&TIM_OCInitStruct);
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TIM_OCInitStruct.TIM_OCMode = TIM_OCMode_PWM1;
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TIM_OCInitStruct.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStruct.TIM_OutputNState = TIM_OutputNState_Enable;
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TIM_OCInitStruct.TIM_Pulse = pwm_table[0];
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TIM_OCInitStruct.TIM_OCPolarity = TIM_OCPolarity_High;
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TIM_OCInitStruct.TIM_OCNPolarity = TIM_OCNPolarity_High;
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TIM_OCInitStruct.TIM_OCIdleState = TIM_OCIdleState_Reset;
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TIM_OCInitStruct.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
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TIM_OC1Init(EPWM, &TIM_OCInitStruct);
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TIM_OC2Init(EPWM, &TIM_OCInitStruct);
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TIM_OC3Init(EPWM, &TIM_OCInitStruct);
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EPWM->CCMR1_OUTPUT_b.OC1PE = 1U;
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EPWM->CCMR1_OUTPUT_b.OC2PE = 1U;
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EPWM->CCMR2_OUTPUT_b.OC3PE = 1U;
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EPWM->DIER |= 0x0800U; // overflow interrupt enable
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TIM_ClearITPendingBit(EPWM, 0x10000U);
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TIM_Cmd(EPWM, ENABLE);
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TIM_CtrlPWMOutputs(EPWM, ENABLE);
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epwm_set_3phase_duty_from_phase(phase_acc_base);
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__enable_irq();
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}
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static void sysclk_init(void)
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{
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SYSCFG_ClkInitTypeDef SysClkInit = { 0 };
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SysClkInit.ClkSource = SYSCFG_ClkSrc_HSI;
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SYSCFG_SysClkConfig(&SysClkInit);
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sys_config_systick(SYS_TICK_1_MS);
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}
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//=============================================================================
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// Public Function Definition
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//=============================================================================
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int main(void)
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{
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sysclk_init();
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phase_acc_step = phase_acc_calc_step(PHASE_TARGET_FREQ_HZ, EPWM_TARGET_FREQ_HZ);
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epwm_init();
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uart_init();
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uart_send_msg("%s\r\n", "uart ok");
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while (1)
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{
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uart_cmd_process();
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}
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return 0;
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}
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@@ -0,0 +1,145 @@
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#include "uart_cmd_srv.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "epwm_drv.h"
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static bool cmd_match_with_arg(const volatile char *buf, const char *prefix, const char **arg_out)
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{
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size_t len = strlen(prefix);
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for (size_t i = 0; i < len; i++)
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{
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if (buf[i] != prefix[i])
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return false;
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}
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if (buf[len] == ' ')
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{
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*arg_out = (const char *)&buf[len + 1];
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return true;
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}
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return false;
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}
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static int32_t cmd_parse_int_list(const char *arg, int32_t *out, int32_t max_count)
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{
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int32_t count = 0;
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char *end = NULL;
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const char *p = arg;
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while (*p != '\0' && count < max_count)
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{
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while (*p == ' ')
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p++;
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if (*p == '\0')
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break;
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out[count] = strtol(p, &end, 10);
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if (end == p)
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return -1;
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count++;
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p = end;
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}
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while (*p == ' ')
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p++;
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if (*p != '\0')
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return -1;
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return count;
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}
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static bool cmd_parse_int_args(const char *arg, int32_t *out, int32_t expect_count,
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const char *usage_msg)
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{
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int32_t parsed = cmd_parse_int_list(arg, out, expect_count);
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if (parsed != expect_count)
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{
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uart_send_msg("%s", usage_msg);
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return false;
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}
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return true;
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}
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static void cmd_handle_val(const char *arg)
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{
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int32_t values[8] = { 0 };
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int32_t parsed = cmd_parse_int_list(arg, values, 8);
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if (parsed <= 0)
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{
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uart_send_msg("ERR usage: val n1 n2 ...\r\n");
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return;
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}
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for (int32_t i = 0; i < parsed; i++)
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{
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uart_send_msg("%d\r\n", values[i]);
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}
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}
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void uart_cmd_process(void)
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{
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if (!uart_is_frame_ready())
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return;
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const char *arg = NULL;
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char *cmd = (char *)g_uart_rx_buf;
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if (strcmp(cmd, "help") == 0)
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{
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uart_send_msg("Commands:\r\n");
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uart_send_msg(" help - show this help\r\n");
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uart_send_msg(" fw_ver - show firmware version\r\n");
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uart_send_msg(" pwm_en 1/0 - enable/disable PWM output\r\n");
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uart_send_msg(" epwm_set_duty d1 d2 d3 - set duty for 3 channels\r\n");
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uart_send_msg(" val n1 n2 ... - parse integer values\r\n");
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}
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else if (strcmp(cmd, "fw_ver") == 0)
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{
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uart_send_msg("FW: " FW_VERSION "\r\n");
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}
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else if (cmd_match_with_arg(cmd, "pwm_en", &arg))
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{
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if (arg[0] == '1')
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{
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epwm_en(1);
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uart_send_msg("OK pwm on\r\n");
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}
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else if (arg[0] == '0')
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{
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epwm_en(0);
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uart_send_msg("OK pwm off\r\n");
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}
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else
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{
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uart_send_msg("ERR usage: pwm_en 1/0\r\n");
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}
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}
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else if (cmd_match_with_arg(cmd, "epwm_set_duty", &arg))
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{
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int32_t values[3] = { 0 };
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if (cmd_parse_int_args(arg, values, 3,
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"ERR usage: epwm_set_duty duty1 duty2 duty3\r\n"))
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{
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epwm_set_duty(values[0], values[1], values[2]);
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uart_send_msg("OK epwm_set_duty: %d %d %d\r\n", values[0], values[1], values[2]);
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}
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}
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else if (cmd_match_with_arg(cmd, "val", &arg))
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{
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cmd_handle_val(arg);
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}
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else
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{
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uart_send_msg("ERR unknown cmd\r\n");
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}
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/* Reset for next command */
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uart_clear_rx_frame();
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}
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