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[update] DAC ok

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ROY
2022-05-25 17:43:26 +08:00
parent 7ea34044c8
commit be044cccb3
1 changed files with 20 additions and 25 deletions
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simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h
+20 -25
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@@ -21,25 +21,19 @@ static int32_t DAC_outputV(int32_t voltLVraw) { // LPDAC output, voltLV = Vbia
int32_t ret;
int32_t vscan;
int64_t v_z;
static int64_t v_zero;
int64_t v_zero;
int64_t v_bias;
static uint8_t n_zero;//6btit
uint8_t n_zero;//6btit
uint16_t n_bias;//12bit
uint32_t DACOutCode;
vscan = voltLVraw;
static bool n_zero_temp = true;
v_z = (V_5nV(2200) - (int64_t)vscan) * 200000 / 431579 + V_5nV(200); // v_z = (V_5nV(2200) - vscan)/2.157895 + V_5nV(200);
if (n_zero_temp) {
n_zero_temp = false;
n_zero = v_z * 100 / V_5nV(3438);
v_zero = (int64_t)n_zero * V_5nV(3438) / 100;
}
// n_zero = v_z / V_5nV(34.38);
// v_zero = n_zero * V_5nV(34.38);
//
n_zero = v_z * 100 / V_5nV(3438); // n_zero = v_z / V_5nV(34.38);
v_zero = (int64_t)n_zero * V_5nV(3438) / 100; // v_zero = n_zero * V_5nV(34.38);
//
if (vscan < 0) { //
v_zero -= V_5nV(5372) / 10000; // v_zero -= V_5nV(0.5372);
} //
@@ -47,22 +41,23 @@ static int32_t DAC_outputV(int32_t voltLVraw) { // LPDAC output, voltLV = Vbia
v_bias = vscan + v_zero; // v_bias = vscan + v_zero;
n_bias = v_bias * 10000 / V_5nV(5372); // n_bias = v_bias / V_5nV(0.5372);
// while (n_bias >= 4096) {
// n_zero--;
// v_zero = (int64_t)n_zero * V_5nV(3438) / 100;
while (n_bias > 4095) {
n_zero--;
v_zero = (int64_t)n_zero * V_5nV(3438) / 100;
// if (vscan < 0) {
// v_zero -= V_5nV(5372) / 10000;
// }
// v_bias = vscan + v_zero;
// n_bias = v_bias * 10000 / V_5nV(5372);
// if (n_bias < 4096)
// break;
// }
if (vscan < 0) {
v_zero -= V_5nV(5372) / 10000;
}
v_bias = vscan + v_zero;
n_bias = v_bias * 10000 / V_5nV(5372);
if ((n_bias <= 4095) || ( n_bias > 4095 && n_zero > 63))
break;
}
if(n_bias > 4095) n_bias = 4095;
if(n_zero > 63) n_zero = 63;
DACOutCode = (0x0003FFFF & ((n_zero << 12) + n_bias));