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16 Commits

Author SHA1 Message Date
peterlu14 e535e3d2b1 Merge remote-tracking branch 'origin/EIS_10test' into release/v1.7.0/fix_EIS_freq-RT 2022-11-08 09:38:19 +08:00
10 06c36aa737 Merge remote-tracking branch 'origin/dev/RT_mode' into EIS_10test 2022-11-07 16:54:28 +08:00
10 402022c451 cutoff freq 2022-11-07 16:44:54 +08:00
Roy 4daff72d39 [update] update RT mode 2022-10-27 17:43:16 +08:00
Roy f99719832a [update] short instruction for RT mode 2022-10-27 17:13:38 +08:00
Roy 58e09bfcda [update] hide mem board message 2022-10-26 10:23:50 +08:00
Roy 55780514b9 [update] new RT mode 2022-10-26 10:23:12 +08:00
peterlu14 936514871f [update] timeout 3 -> 5 2022-10-18 11:23:53 +08:00
peterlu14 f25d9221c6 Merge branch 'release/v1.6.9/fix_phase_90ToN90' into release/v1.6.7/scheduler_debug 2022-10-14 10:53:40 +08:00
peterlu14 2ee9fa6b19 [update] project device change 2022-10-14 10:52:41 +08:00
10 fcc39dbfed Merge branch 'release/v1.6.9/fix_phase_90ToN90' into EIS_10test 2022-10-13 15:28:39 +08:00
10 e2f7bba961 fix phase in PEIS mode 2022-10-13 15:27:27 +08:00
10 1174d54bc0 fix phase in PEIS mode 2022-10-13 15:13:00 +08:00
peterlu14 bff75dc49e Merge commit '35912f614e7283bb4b8df5355952162fea9a9395' into release/v1.6.9/fix_phase_90ToN90 2022-10-12 17:18:49 +08:00
10 cfc4e39c8a force raw phase and raw phase - ideal phase stay in [90, -90) in PEIS mode 2022-10-12 16:41:55 +08:00
10 8c4916d1e8 fix phase calibration 2022-10-11 17:19:40 +08:00
7 changed files with 78 additions and 31 deletions
+25 -20
View File
@@ -1429,25 +1429,25 @@ class EISZeroOneDataDecoder(RecDataDecoder):
index = 60
hsrtia_a.append(struct.unpack('>i', cali_coeff[index+1:index+5])[0]/1e8)
hsrtia_b.append(struct.unpack('>i', cali_coeff[index+5:index+9])[0]/1e8)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0]/1e4)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0])
#Lv[1] 20k
index = 80
hsrtia_a.append(struct.unpack('>i', cali_coeff[index+1:index+5])[0]/1e8)
hsrtia_b.append(struct.unpack('>i', cali_coeff[index+5:index+9])[0]/1e8)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0]/1e4)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0])
#Lv[2] 5k
index = 100
hsrtia_a.append(struct.unpack('>i', cali_coeff[index+1:index+5])[0]/1e8)
hsrtia_b.append(struct.unpack('>i', cali_coeff[index+5:index+9])[0]/1e8)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0]/1e4)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0])
#Lv[3] 200R
index = 120
hsrtia_a.append(struct.unpack('>i', cali_coeff[index+1:index+5])[0]/1e8)
hsrtia_b.append(struct.unpack('>i', cali_coeff[index+5:index+9])[0]/1e8)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0]/1e4)
hsrtia_c.append(struct.unpack('>i', cali_coeff[index+9:index+13])[0])
index = 140
g = 1
@@ -1568,12 +1568,17 @@ class EISZeroOneDataDecoder(RecDataDecoder):
freq = ch3
fre_idx = 0
voltage_mag = math.sqrt(img ** 2 + real ** 2) * (1 + freq ** 2 / cutoff_freq ** 2)
rolloff_cali = cutoff_freq/1e5
voltage_mag = math.sqrt(img ** 2 + real ** 2) * (1 + freq ** 2 / rolloff_cali ** 2 / 1e4)
# if (gain == 3):
# current = hsrtia_a[gain] * math.exp(hsrtia_b[gain] * voltage_mag) + hsrtia_c[gain] * math.exp(hsrtia_d[gain] * voltage_mag)
# else:
current = voltage_mag ** 2 * hsrtia_a[gain] + voltage_mag * hsrtia_b[gain] + hsrtia_c[gain]
current = voltage_mag ** 2 * hsrtia_a[gain] + voltage_mag * hsrtia_b[gain]
# current = voltage_mag ** 2 * hsrtia_a[gain] + voltage_mag * hsrtia_b[gain] + hsrtia_c[gain]
# print(current)
# print(voltage_mag)
# print(hsrtia_a[gain])
@@ -1586,12 +1591,7 @@ class EISZeroOneDataDecoder(RecDataDecoder):
else:
impedance = 0
if (real > 0):
raw_phase = math.atan(img / real) * 180 / math.pi
elif (real == 0):
raw_phase = 90
else:
raw_phase = math.atan(img / real) * 180 / math.pi + 180
raw_phase = math.atan2(img , real) * 180 / math.pi
if (freq >= 1000000): # 10000 Hz
fre_idx = 0
@@ -1602,16 +1602,21 @@ class EISZeroOneDataDecoder(RecDataDecoder):
elif (freq >= 1): # 0.01 Hz
fre_idx = 3
ideal_raw_phase = phase_coeff[fre_idx][gain] /1e10 * freq + phase_offset[fre_idx][gain] / 1e6
ideal_raw_phase = phase_coeff[gain][fre_idx] /1e10 * freq + phase_offset[gain][fre_idx] / 1e6
phase = raw_phase - ideal_raw_phase
phase = phase % 180 if phase % 180<=90 else phase % 180-180
if (self._first_phase_flag):
self._last_phase = phase
self._first_phase_flag = 0
elif (abs(phase - self._last_phase) >= 90):
phase -= 360
self._last_phase = phase
# last_phase_to90 = self._last_phase % 180 if self._last_phase % 180<=90 else self._last_phase % 180-180
# diff = phase - last_phase_to90
# if (self._first_phase_flag):
# # self._last_phase = phase
# self._first_phase_flag = 0
# elif (abs(diff) >= 90):
# phase = self._last_phase + diff + (180 if diff<0 else-180)
# else:
# phase = self._last_phase + diff
# self._last_phase = phase
imag_after_cal = impedance * math.sin(round(phase) * math.pi / 180)
real_after_cal = impedance * math.cos(round(phase) * math.pi / 180)
+1 -1
View File
@@ -1032,7 +1032,7 @@ class CompletedDevice(Device):
@property
def mac_address_in_str(self) -> str:
return ':'.join('{:02x}'.format(b) for b in self._device.mac_address)
return ':'.join('{:02x}'.format(b) for b in self._device.mac_address).upper()
@property
def device(self) -> Device:
+2 -2
View File
@@ -227,7 +227,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
def recv_memory(self, device: int) -> Optional[bytes]:
# self.pin_busy.output(False)
print('mem_req==ram_sel,[', self._pin_mem_req_value[device], ',', self._pin_ram_sel_value[device], ']')
# print('mem_req==ram_sel,[', self._pin_mem_req_value[device], ',', self._pin_ram_sel_value[device], ']')
rx = []
@@ -312,7 +312,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
return None
# print('data=', list(data))
print('Ram:', data[62])
# print('Ram:', data[62])
if (length >= 4000):
flag_print = True
+6 -3
View File
@@ -33,7 +33,7 @@ class Project(threading.Thread):
self._name = None
self._desc = None
self._device = None
self._complete_device = []
self._complete_device = {}
self._status = 0
self._instruction_set = Instruction()
@@ -64,8 +64,9 @@ class Project(threading.Thread):
def setup_device(self, device_list):
for device in device_list:
complete_device = self._device_manager.get_device(device['connectDevice']['device_address'])
self._complete_device.append(complete_device)
mac_address = device_list[device]['pair']
complete_device = self._device_manager.get_device(mac_address)
self._complete_device[device] = complete_device
@property
def id(self) -> int:
@@ -226,8 +227,10 @@ class Project(threading.Thread):
if action.type == 'start':
self._count += 1
for instruction in instruction_set:
print('instruction 1', device, instruction, datetime.now())
args = list(map(lambda arg: task_info[arg], instruction['arguments']))
target=getattr(device, instruction['method'])(*args)
print('instruction 2', device, instruction, datetime.now())
delay_time += (time() - now)
+1 -1
View File
@@ -656,7 +656,7 @@ class DataServer(SocketServer, DataAPI):
sync = self.get_spi_obj()
busy = sync.get_pin_busy()
print('pin_busy=', busy, device, datetime.now())
# print('pin_busy=', busy, device, datetime.now())
if sync.get_pin_mem_req() == sync.get_pin_ram_sel():
spi_data = sync.recv_memory(device)
+1 -1
View File
@@ -93,7 +93,7 @@ class SocketClient(metaclass=abc.ABCMeta):
if self._socket is None:
try:
self._socket = Socket(AF_UNIX, SOCK_STREAM)
self._socket.settimeout(3)
self._socket.settimeout(5)
self._socket.connect(self._socket_file)
except Exception as e:
print('open_socket error:', e)
@@ -64,6 +64,7 @@
"Cyclic Voltammetry",
"Chronoamperometric",
"V-T Graph",
"R-T Graph",
"Dev Mode"
]
},
@@ -289,6 +290,18 @@
"auto"
]
},
"RT_VOLT_SET": {
"description": "DAC output Voltage",
"record_meta": true,
"initial": 37500,
"domain": [
65536
],
"value": {
"expression": "VALUE"
},
"on_change": "set_para_RT_VOLT_SET"
},
"BLE_WRITE": {
"description": "send msg to elite",
"domain": {
@@ -321,7 +334,8 @@
"when": {
"1": "set_adc_gain_I",
"2": "set_adc_gain_I",
"3": "set_adc_gain_I"
"3": "set_adc_gain_I",
"4": "set_adc_gain_I"
}
},
{
@@ -329,7 +343,8 @@
"when": {
"1": "set_adc_gain_Vin",
"2": "set_adc_gain_Vin",
"3": "set_adc_gain_Vin"
"3": "set_adc_gain_Vin",
"4": "set_adc_gain_Vin"
}
},
{
@@ -338,7 +353,8 @@
"0": "curve_eis",
"1": "curve_cv3",
"2": "curve_const_vscan",
"3": "curve_vt"
"3": "curve_vt",
"4": "curve_rt"
}
},
{
@@ -471,6 +487,23 @@
"2B>pe"
]
},
"curve_rt": {
"type": "RIS",
"parameter": {
"va": "RT_VOLT_SET",
"pa": "ADC_LEVEL_I_15",
"pb": "ADC_LEVEL_V_IN_15",
"pd": "CTRL_HIGH_Z_15",
"pe": "SAMPLE_RATE"
},
"data": [
"X04;",
"2B>va;",
"4b>pa;4b>pb;",
"4b>0;4b>pd;",
"2B>pe"
]
},
"curve_vt": {
"type": "RIS",
"parameter": {
@@ -488,6 +521,12 @@
"1B>va"
]
},
"set_para_RT_VOLT_SET": {
"type": "RIS",
"data": [
"XE2;X01;2B>RT_VOLT_SET"
]
},
"ble_instru_send": [
"ble_write",
"_cdr('20X>ADC_VALUE_I')"