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4 changed files with 107 additions and 57 deletions
+21 -27
View File
@@ -882,20 +882,14 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
if len(data) < 18:
return None
current = struct.unpack('>i', data[1:5])[0] # unit: 1/1000 nA
voltage = struct.unpack('>i', data[5:9])[0] # unit: mV
impedance = struct.unpack('>i', data[9:13])[0] # unit: kOm
time_stamp: float = struct.unpack('<I', data[13:17])[0] # unit: ms
cycle_number = struct.unpack('>H', data[17:19])[0]
time_stamp: float = struct.unpack('<I', data[1:5])[0] # unit: ms 0x18030000
current = struct.unpack('<i', data[5:9])[0] # unit: nA
voltage = struct.unpack('<i', data[9:13])[0] # unit: uV
impedance = struct.unpack('<i', data[13:17])[0] # unit: mOm
cycle_number = struct.unpack('<H', data[17:19])[0]
finish_mode_falg = data[19]
mem_wrong_information = struct.unpack('>i', data[40:40+4])[0]
# print('decode', list(data[20:]))
mem_wrong = data[40]
mem_retry_cnt = data[41]
mem_green_wrong = data[42]
mem_green_retry_cnt = data[43]
mem_wrong_information = struct.unpack('<i', data[40:40+4])[0] # mem_wrong_information = green retry, green wrong, red retry, red wrong
ram_num = data[44]
broken_flag = data[-1]
@@ -917,10 +911,13 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
print("error timeStamp full data:", list(data), datetime.now(), '\n')
return None
else:
# print('|', time_stamp, '|', delta, '|', current, '|', voltage, '|', impedance,
# print('|', time_stamp, '|', delta, '|', int(time_stamp * 1000 / 2),
# '|', current, '|', voltage, '|', impedance,
# '|', cycle_number, '|', finishMode, '@', str(self.device))
# print('|', '{:10}'.format(time_stamp),
# '|', '{:10}'.format(delta),
# '|', '{:4}'.format(delta),
# '|', '{:10}'.format(int(time_stamp * 1000 / 2)),
# '|', '{:10}'.format(current),
# '|', '{:10}'.format(voltage),
# '|', '{:10}'.format(impedance),
@@ -928,13 +925,9 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
# '|', '{:1}'.format(finishMode),
# '@', str(self.device), '|')
# print('|', '{:5}'.format(mem_wrong),
# '|', '{:5}'.format(mem_retry_cnt),
# '|', '{:5}'.format(mem_green_wrong),
# '|', '{:5}'.format(mem_green_retry_cnt),
# '|', '{:5}'.format(mem_wrong_information),
# '|', '{:5}'.format(ram_num),
# '|', '{:5}'.format(broken_flag),
# print('|', '{:5}'.format(mem_wrong_information),
# '|', '{:2}'.format(ram_num),
# '|', '{:2}'.format(broken_flag),
# '@', str(self.device), '|')
pass
@@ -951,14 +944,15 @@ class I4V4Z4T4DataDecoder(RecDataDecoder):
ret.append_data(3, cycle_number)
# memoryboard information
# ret.append_data(4, mem_wrong)
# ret.append_data(5, mem_retry_cnt)
# ret.append_data(6, mem_green_wrong)
# ret.append_data(7, mem_green_retry_cnt)
ret.append_data(4, ram_num)
ret.append_data(5, broken_flag)
ret.append_data(6, mem_wrong_information)
# ret.append_data(4, ram_num)
try:
ret.append_data(6, mem_wrong_information)
# print('append_data success, mem_wrong_information:', mem_wrong_information, hex(mem_wrong_information))
except:
print('append_data fail, mem_wrong_information:', mem_wrong_information, hex(mem_wrong_information))
if cycle_number != self._cycle_number:
# notify cycle_number change
+74 -17
View File
@@ -24,8 +24,10 @@ def zero_buffer(size: int) -> List[int]:
return [0] * size
class MultiExtMemSpiInterface(LowLevelHardwareInterface):
MEM_INS_MARKED = [MEM_INS_WRITE, 0, 2, 1, 1]
MEM_INS_RESET = [MEM_INS_WRITE, 0, 2, 1, 1, 0, 0xFF]
MEM_INS_MARKED1 = [MEM_INS_WRITE, 0, 2, 0x5A, 0xA5]
MEM_INS_MARKED2 = [MEM_INS_WRITE, 0, 6, 0x5A, 0xA5]
MEM_INS_MARKED3 = [MEM_INS_WRITE, 0, 10, 0x5A, 0xA5]
# MEM_INS_RESET = [MEM_INS_WRITE, 0, 2, 1, 1, 0, 0xFF]
__slots__ = ('_selector', '_wait_for_first_data', '_spi', '_tx_buffer_header', '_tx_buffer_data',
'pin_busy', 'pin_mem_req', 'pin_mem_sel', 'pin_ram_sel',
@@ -48,7 +50,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
self._single_data_len = self._elite_data_len + self._mem_header_len + self._mem_tailer_len
# buffer
self._tx_buffer_header = [0] * 11
self._tx_buffer_header = [0] * 19
self._tx_buffer_data = [0] * (self._single_data_len * 10 + 3)
# memory control pin
@@ -165,6 +167,29 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
print("read red data times", self._read_red_times)
return data
def _print_ram_all_data(self):
addr = 0
red_length = int(7000 / 2)
tx_temp = [0] * red_length
while True:
tx_temp[0] = MEM_INS_READ
tx_temp[1] = ((addr >> 8) & 0xFF)
tx_temp[2] = (addr & 0xFF)
ram_data = []
ram_data = self._spi.send_byte(tx_temp)
ram_data[0:3] = [255, 255, 255]
print(list(ram_data), len(ram_data), addr)
addr += len(ram_data) - 3
if (7000 < addr + len(ram_data)):
del ram_data
break
print()
return
def recv_memory(self, device: int) -> Optional[bytes]:
self.pin_busy.output(False)
@@ -191,7 +216,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
self._head_wrong_cnt[device] = self._head_wrong_cnt[device] + 1
if (self._head_wrong_cnt[device] <= 5): # print 5 times
print('data_first[0:3] != [255, 255, 255], device:', device, ',', self._head_wrong_cnt[device], 'times')
print(list(data[0:7]))
print(list(data[0:15]))
data[0:3] = [255, 255, 255]
# ----------------------------------------------------------------------------------------------
@@ -233,29 +258,51 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
# green_data = data
# print("_[Debug] @ spi green data = ", green_data)
length = (data[3] << 8) | data[4]
header = data[7]
elite_data_len = data[9]
green_data_section1 = data[3:7]
green_data_section2 = data[7:11]
green_data_section3 = data[11:15]
if green_data_section1 == green_data_section2:
green_data_section = green_data_section1
elif(green_data_section2 == green_data_section3 or green_data_section1 == green_data_section3):
print("green data not equal: = ", data[3:15])
print("green data print:", data, device, datetime.now())
green_data_section = green_data_section3
else:
print("green data not equal: = ", data[3:15])
print("green data print:", data, device, datetime.now())
green_data_section = green_data_section3 # use last data
length = (green_data_section[0] << 8) | green_data_section[1]
header = data[15]
elite_data_len = data[17]
if length <= 12:
if length < 12:
print("length < 12")
print("green data print:", data, device, datetime.now())
if length == 0:
self._print_ram_all_data()
if length <= 4:
# print("length <= 4")
# print("green data print:", data, device, datetime.now())
return None
if data[5] != 0 or data[6] != 0:
if green_data_section[2] != 0xA5 or green_data_section[3] != 0x5A:
# give a default length if the data header did not update
length = 7000
print("green data: is not [0,0], = ", data[5:7])
print("green data print:", data, device, datetime.now())
return None
if (length >= 7000):
if (length >= 4000):
flag_print = True
print("green data: big length:", length)
if (header != 255):
flag_print = True
print("green data: header is not 255: ", header)
self._print_ram_all_data()
if (elite_data_len != self._elite_data_len):
flag_print = True
@@ -263,6 +310,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
if (flag_print):
print("green data print:", data, device, datetime.now())
print()
# neulive
# address += len(data) - 11
@@ -274,7 +322,7 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
# red_length = length - 1
# tx_d = [0] * red_length
address = 4
address = 12
red_length = int(length / 2)
tx_d = [0] * red_length
@@ -319,9 +367,16 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
address += len(data) - 3
del data
# print("_[Debug] @ spi recv data rx = ")
# last_index = 0
# print("_[Debug] @ spi recv data rx, ram_select:", self._pin_ram_sel_value[device], ",", datetime.now())
# for i in range(0, len(rx), self._single_data_len):
# print(rx[i:i+self._single_data_len])
# last_index = i
# # print(rx[i:i+self._single_data_len])
# if i == 0:
# print(rx[0:8], 'ram:', rx[47])
# if last_index != 0:
# print(rx[last_index:last_index+8], 'ram:', rx[last_index+47])
# print()
# /*
@@ -334,7 +389,9 @@ class MultiExtMemSpiInterface(LowLevelHardwareInterface):
# * */
# mark read
self._spi.send_byte(self.MEM_INS_MARKED)
self._spi.send_byte(self.MEM_INS_MARKED1)
self._spi.send_byte(self.MEM_INS_MARKED2)
self._spi.send_byte(self.MEM_INS_MARKED3)
except BaseException as e:
print(e)
+10 -11
View File
@@ -1180,19 +1180,18 @@ class SpiRuntimeThread(ServerThread):
run_time = time() - self._timer
if run_time > 0.045:
print('time, recv_data_form_spi_routine_time', time(), run_time)
# print('time, recv_data_form_spi_routine_time', time(), run_time)
real_run_time = run_time
run_time = 0.045
if server.sync_started:
event.wait(self._interval - run_time)
sync.set_pin_mem_sel(True)
sleep(0.005)
return
else:
event.wait(self._interval - run_time)
sync.set_pin_mem_sel(True)
self.close()
return
if run_time >= 0.030:
print('time, recv_data_form_spi_routine_time >= 0.030', 'device:', c, datetime.now(), time(), real_run_time)
event.wait(self._interval - run_time)
sync.set_pin_mem_sel(True)
sleep(0.005)
return
class RecRuntimeThread(ServerThread):
def __init__(self, server: DataServer):
+2 -2
View File
@@ -363,7 +363,7 @@ class RecordingProcess(Process):
if (device == 7):
print('self._last_cnt[7]:', self._last_cnt[7], ', last_data_cnt:', last_data_cnt)
print('skip RAM, but data is right, solve data', list(raw_data[i][0:3]), 'skip Ram', self._skip_ram_cnt, 'times')
print('skip RAM, but data is right, solve data', list(raw_data[i][0:3]),'|', list(raw_data[colum_total-1][0:3]), 'skip Ram', self._skip_ram_cnt, 'times')
# print('data:')
# print('|', list(raw_data[0]))
# print('|', list(raw_data[1]))
@@ -540,7 +540,7 @@ class RecordingProcess(Process):
else:
print_flag = True
print('delete data:', list(raw_data[i]))
print('delete data:', list(raw_data[i][0:3]))
# if print_flag:
# print('delete data context:')