murphy
699 lines
24 KiB
C++
699 lines
24 KiB
C++
/****************************************************************************
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* @file main.c
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* @version V3.0err
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* $Revision: 4 $
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* $Date: 17/05/04 12:57p $
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* @brief Perform A/D Conversion with ADC continuous scan mode.
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* @note
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* Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include "M0564.h"
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#include "define.h"
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const unsigned char segmentMap[] = {
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0x00,//B000 0000, // 032 SPACE
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0x30,//B011 0000, // 033 !
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0x22,//B010 0010, // 034 "
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0x41,//B100 0001, // 035 #
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0x6d,//B110 1101, // 036 $
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0x52,//B101 0010, // 037 %
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0x7c,//B111 1100, // 038 &
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0x20,//B010 0000, // 039 '
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0x39,//B011 1001, // 040 (
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0x0f,//B000 1111, // 041 )
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0x21,//B010 0001, // 042 *
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0x70,//B111 0000, // 043 +
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0x08,//B000 1000, // 044 ,
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0x40,//B100 0000, // 045 -
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0x80,//B000 0000, // 046 .
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0x52,//B101 0010, // 047 /
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0x3f,//B011 1111, // 048 0
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0x06,//B000 0110, // 049 1
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0x5b,//B101 1011, // 050 2
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0x4f,//B100 1111, // 051 3
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0x66,//B110 0110, // 052 4
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0x6d,//B110 1101, // 053 5
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0x7d,//B111 1101, // 054 6
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0x07,//B000 0111, // 055 7
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0x7f,//B111 1111, // 056 8
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0x6f,//B110 1111, // 057 9
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0x48,//B100 1000, // 058 :
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0x48,//B100 1000, // 059 ;
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0x39,//B011 1001, // 060 <
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0x48,//B100 1000, // 061 =
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0x0f,//B000 1111, // 062 >
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0x53,//B101 0011, // 063 ?
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0x5f,//B101 1111, // 064 @
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0x77,//B111 0111, // 065 A
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0x7c,//B111 1100, // 066 B
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0x39,//B011 1001, // 067 C
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0x5e,//B101 1110, // 068 D
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0x79,//B111 1001, // 069 E
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0x71,//B111 0001, // 070 F
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0x3d,//B011 1101, // 071 G
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0x76,//B111 0110, // 072 H
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0x06,//B000 0110, // 073 I
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0x1e,//B001 1110, // 074 J
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0x76,//B111 0110, // 075 K
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0x38,//B011 1000, // 076 L
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0x15,//B001 0101, // 077 M
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0x37,//B011 0111, // 078 N
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0x3f,//B011 1111, // 079 O
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0x73,//B111 0011, // 080 P
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0x67,//B110 0111, // 081 Q
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0x31,//B011 0001, // 082 R
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0x6d,//B110 1101, // 083 S
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0x78,//B111 1000, // 084 T
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0x6e,//B011 1110, // 085 U
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0x1c,//B001 1100, // 086 V
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0x2a,//B010 1010, // 087 W
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0x76,//B111 0110, // 088 X
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0x6e,//B110 1110, // 089 Y
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0x5b,//B101 1011, // 090 Z
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0x39,//B011 1001, // 091 [
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0x64,//B110 0100, // 092 BACKSLASH
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0x0f,//B000 1111, // 093 ]
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0x23,//B010 0011, // 094 ^
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0x08,//B000 1000, // 095 _
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0x20,//B010 0000, // 096 `
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0x77,//B111 0111, // 097 a
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0x7c,//B111 1100, // 098 b
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0x58,//B101 1000, // 099 c
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0x5e,//B101 1110, // 100 d
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0x79,//B111 1001, // 101 e
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0x71,//B111 0001, // 102 f
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0x6f,//B110 1111, // 103 g
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0x74,//B111 0100, // 104 h
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0x04,//B000 0100, // 105 i
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0x1e,//B001 1110, // 106 j
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0x76,//B111 0110, // 107 k
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0x18,//B001 1000, // 108 l
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0x15,//B001 0101, // 109 m
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0x54,//B101 0100, // 110 n
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0x5c,//B101 1100, // 111 o
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0x76,//B111 0011, // 112 p
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0x67,//B110 0111, // 113 q
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0x50,//B101 0000, // 114 r
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0x6d,//B110 1101, // 115 s
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0x78,//B111 1000, // 116 t
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0x3e,//B011 1110, // 117 u
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0x1c,//B001 1100, // 118 v
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0x2a,//B010 1010, // 119 w
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0x76,//B111 0110, // 120 x
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0x67,//B110 1110, // 121 y
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0x5b,//B101 1011, // 122 z
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};
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/*---------------------------------------------------------------------------------------------------------*/
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/* Initial SYS */
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/*---------------------------------------------------------------------------------------------------------*/
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void SYS_Init(void)
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{
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init System Clock */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Enable HIRC clock (Internal RC 22.1184MHz) */
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CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
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/* Waiting for HIRC clock ready */
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CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
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/* Select HCLK clock source as HIRC and and HCLK clock divider as 1 */
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CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
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/* Enable HXT clock (external XTAL 12MHz) */
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CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
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/* Waiting for HXT clock ready */
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CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
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/* Set core clock as PLL_CLOCK from PLL */
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CLK_SetCoreClock(PLL_CLOCK);
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/* Waiting for PLL clock ready */
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CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
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/* Enable UART module clock */
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CLK_EnableModuleClock(UART1_MODULE);
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/* Select UART module clock source as HXT and UART module clock divider as 1 */
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CLK_SetModuleClock(UART1_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
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/* Enable ADC module clock */
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CLK_EnableModuleClock(ADC_MODULE);
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/* ADC clock source is 22.1184MHz, set divider to 7, ADC clock is 22.1184/7 MHz */
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CLK_SetModuleClock(ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(7));
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/* Enable PWM0 module clock */
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CLK_EnableModuleClock(PWM0_MODULE);
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/* Enable PWM1 module clock */
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CLK_EnableModuleClock(PWM1_MODULE);
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// Timer0
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CLK_EnableModuleClock(TMR0_MODULE);
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CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0);
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// Timer1
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CLK_EnableModuleClock(TMR1_MODULE);
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CLK_SetModuleClock(TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0);
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// Timer2
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CLK_EnableModuleClock(TMR2_MODULE);
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CLK_SetModuleClock(TMR2_MODULE, CLK_CLKSEL1_TMR2SEL_PCLK1, 0);
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// Timer3
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//CLK_EnableModuleClock(TMR3_MODULE);
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//CLK_SetModuleClock(TMR3_MODULE, CLK_CLKSEL1_TMR3SEL_PCLK1, 0);
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/* Enable ACMP01 peripheral clock */
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CLK_EnableModuleClock(ACMP01_MODULE);
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/* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */
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/* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */
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CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL1_PWM0SEL_PCLK0, NULL);
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CLK_SetModuleClock(PWM1_MODULE, CLK_CLKSEL1_PWM1SEL_PCLK1, NULL);
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/* Reset PWM0 module */
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SYS_ResetModule(PWM0_RST);
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/* Reset PWM1 module */
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SYS_ResetModule(PWM1_RST);
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init I/O Multi-function */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Set PA multi-function pins for UART1 RXD and TXD */
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SYS->GPA_MFPH &= ~(SYS_GPA_MFPH_PA8MFP_Msk | SYS_GPA_MFPH_PA9MFP_Msk);
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SYS->GPA_MFPH |= (SYS_GPA_MFPH_PA8MFP_UART1_TXD | SYS_GPA_MFPH_PA9MFP_UART1_RXD);
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/* Configure the GPB0 - GPB5 ADC analog input pins */
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SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB0MFP_Msk | SYS_GPB_MFPL_PB1MFP_Msk | SYS_GPB_MFPL_PB2MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk |
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SYS_GPB_MFPL_PB4MFP_Msk | SYS_GPB_MFPL_PB5MFP_Msk);
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SYS->GPB_MFPL |= SYS_GPB_MFPL_PB0MFP_ADC0_CH0 | SYS_GPB_MFPL_PB1MFP_ADC0_CH1 | SYS_GPB_MFPL_PB2MFP_ADC0_CH2 |
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SYS_GPB_MFPL_PB3MFP_ADC0_CH3 | SYS_GPB_MFPL_PB4MFP_ADC0_CH4 | SYS_GPB_MFPL_PB5MFP_ADC0_CH13;
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// Configure ACMP
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SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD0MFP_Msk;
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SYS->GPD_MFPL |= SYS_GPD_MFPL_PD0MFP_ACMP1_N;
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SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD3MFP_Msk;
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SYS->GPD_MFPL |= SYS_GPD_MFPL_PD3MFP_ACMP1_P0;
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// ADNsen, fix bug
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GPIO_SetMode(PB, BIT6, GPIO_MODE_INPUT);
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/* Set PC multi-function pins for PWM0 Channel0~5 */
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC0MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_PWM0_CH0;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC1MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC1MFP_PWM0_CH1;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC2MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC2MFP_PWM0_CH2;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC3MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC3MFP_PWM0_CH3;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC4MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC4MFP_PWM0_CH4;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC5MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC5MFP_PWM0_CH5;
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/* Set multi-function pins for PWM1 Channel0~5 */
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC6MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC6MFP_PWM1_CH0;
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SYS->GPB_MFPH = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB12MFP_Msk));
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SYS->GPB_MFPH |= SYS_GPB_MFPH_PB12MFP_PWM1_CH1;
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SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA3MFP_Msk));
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SYS->GPA_MFPL |= SYS_GPA_MFPL_PA3MFP_PWM1_CH2;
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SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA2MFP_Msk));
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SYS->GPA_MFPL |= SYS_GPA_MFPL_PA2MFP_PWM1_CH3;
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SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA1MFP_Msk));
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SYS->GPA_MFPL |= SYS_GPA_MFPL_PA1MFP_PWM1_CH4;
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SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk));
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SYS->GPA_MFPL |= SYS_GPA_MFPL_PA0MFP_PWM1_CH5;
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// Initial button pin
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GPIO_SetMode(PD, BIT4, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT5, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT6, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT7, GPIO_MODE_QUASI);
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// Initial Fan pin
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GPIO_SetMode(PD, BIT2, GPIO_MODE_QUASI);
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// Initial SS pin
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GPIO_SetMode(PB, BIT11, GPIO_MODE_QUASI);
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// Initial 7-seg LCD pin
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GPIO_SetMode(PD, BIT8, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT9, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT10, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT11, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT12, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT13, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT14, GPIO_MODE_QUASI);
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GPIO_SetMode(PD, BIT15, GPIO_MODE_QUASI);
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// Initial LED pin
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GPIO_SetMode(PC, BIT9, GPIO_MODE_QUASI);
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#ifdef DEBUG_OP_OUTPUT_PC2
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SYS->GPC_MFPL &= ~SYS_GPC_MFPL_PC2MFP_Msk;
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC2MFP_ACMP1_O;
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#ifdef DEBUG_IO
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SYS->GPC_MFPL &= ~SYS_GPC_MFPL_PC0MFP_Msk;
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#endif
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#endif
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* Initial ADC */
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/*---------------------------------------------------------------------------------------------------------*/
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void ADC_Init() {
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/* Power on ADC module */
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ADC_POWER_ON(ADC);
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/* Set the ADC operation mode as continuous scan, input mode as single-end and
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enable the analog input channel 14 */
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ADC_Open(ADC, ADC_ADCR_DIFFEN_SINGLE_END, ADC_ADCR_ADMD_CONTINUOUS, 0x403F);
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/* Clear the A/D interrupt flag for safe */
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ADC_CLR_INT_FLAG(ADC, ADC_ADF_INT);
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/* Start A/D conversion */
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ADC_START_CONV(ADC);
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* PWM */
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/*---------------------------------------------------------------------------------------------------------*/
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void PWM(unsigned int m, unsigned int dt, unsigned int us) {
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if(m < 6) {
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PWM_SET_CNR(PWM0, m, us);
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PWM_SET_CMR(PWM0, m, dt);
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} else if(m < 12) {
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m -= 6;
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PWM_SET_CNR(PWM1, m, us);
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PWM_SET_CMR(PWM1, m, dt);
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}
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* Complementary PWM */
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/*---------------------------------------------------------------------------------------------------------*/
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void ComplementaryPWM0(unsigned int m, unsigned int us) {
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if(m < 6) {
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m &= ~1;
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PWM_SET_CNR(PWM0, m, us);
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PWM_SET_CNR(PWM0, m+1, us);
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us >>= 1;
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PWM_SET_CMR(PWM0, m, us);
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PWM_SET_CMR(PWM0, m+1, us);
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}
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}
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void ComplementaryPWM1(unsigned int m, unsigned int us) {
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if(m < 6) {
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m &= ~1;
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PWM_SET_CNR(PWM1, m, us);
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PWM_SET_CNR(PWM1, m+1, us);
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us >>= 1;
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PWM_SET_CMR(PWM1, m, us);
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PWM_SET_CMR(PWM1, m+1, us);
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}
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* PWM Configuration */
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/*---------------------------------------------------------------------------------------------------------*/
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void PWM_Config(PWM_T *pwm, uint32_t n) {
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// set prescaler
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PWM_SET_PRESCALER(pwm, n, PLL_CLOCK/BASE_CLOCK-1);
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// set PWM to up counter type(edge aligned) and auto-reload mode
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(pwm)->CTL1 = ((pwm)->CTL1 & ~((PWM_CTL1_CNTTYPE0_Msk << (n << 1)) | (PWM_CTL1_CNTMODE0_Msk << n)));
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PWM_SET_CNR(pwm, n, BASE_CLOCK);
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PWM_SET_CMR(pwm, n, 0);
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(pwm)->WGCTL0 = ((pwm)->WGCTL0 & ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (n << 1))) | \
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(PWM_OUTPUT_HIGH << (n << 1 << PWM_WGCTL0_ZPCTL0_Pos));
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(pwm)->WGCTL1 = ((pwm)->WGCTL1 & ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (n << 1))) | \
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(PWM_OUTPUT_LOW << (n << 1 << PWM_WGCTL1_CMPUCTL0_Pos));
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* Initial PWM */
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/*---------------------------------------------------------------------------------------------------------*/
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void PWM_Init() {
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/* PWM Configuration */
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PWM_Config(PWM0, 0);
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PWM_Config(PWM0, 1);
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PWM_Config(PWM0, 2);
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PWM_Config(PWM0, 3);
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PWM_Config(PWM0, 4);
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PWM_Config(PWM0, 5);
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/* Enable output of PWM0 channel 0~5 */
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PWM_EnableOutput(PWM0, 0x3F);
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/* Start PWM0 counter */
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PWM_Start(PWM0, 0x3F);
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/* PWM Configuration */
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PWM_Config(PWM1, 0);
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PWM_Config(PWM1, 1);
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PWM_Config(PWM1, 2);
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PWM_Config(PWM1, 3);
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PWM_Config(PWM1, 4);
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PWM_Config(PWM1, 5);
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/* Enable output of PWM1 channel 0~5 */
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PWM_EnableOutput(PWM1, 0x3F);
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/* Start PWM1 counter */
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PWM_Start(PWM1, 0x3F);
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* Set Dead Zone */
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/*---------------------------------------------------------------------------------------------------------*/
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void SetPWM0DeadZone(int m, unsigned int deadzone) {
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/* Registers is protected, Unlock to modify */
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SYS_UnlockReg();
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if(deadzone > 0xFFF) deadzone = 0xFFF;
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switch(m) {
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case 0:
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case 1:
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PWM_SET_DEADZONE_CLK_SRC(PWM0, 0, AFT_PRESCALER);
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PWM_EnableDeadZone(PWM0, 0, deadzone);
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break;
|
|
case 2:
|
|
case 3:
|
|
PWM_SET_DEADZONE_CLK_SRC(PWM0, 2, AFT_PRESCALER);
|
|
PWM_EnableDeadZone(PWM0, 2, deadzone);
|
|
break;
|
|
case 4:
|
|
case 5:
|
|
PWM_SET_DEADZONE_CLK_SRC(PWM0, 4, AFT_PRESCALER);
|
|
PWM_EnableDeadZone(PWM0, 4, deadzone);
|
|
break;
|
|
}
|
|
/* Lock registers */
|
|
SYS_LockReg();
|
|
}
|
|
void SetPWM1DeadZone(int m, unsigned int deadzone) {
|
|
|
|
/* Registers is protected, Unlock to modify */
|
|
SYS_UnlockReg();
|
|
if(deadzone > 0xFFF) deadzone = 0xFFF;
|
|
switch(m) {
|
|
case 0:
|
|
case 1:
|
|
PWM_SET_DEADZONE_CLK_SRC(PWM1, 0, AFT_PRESCALER);
|
|
PWM_EnableDeadZone(PWM1, 0, deadzone);
|
|
break;
|
|
case 2:
|
|
case 3:
|
|
PWM_SET_DEADZONE_CLK_SRC(PWM1, 2, AFT_PRESCALER);
|
|
PWM_EnableDeadZone(PWM1, 2, deadzone);
|
|
break;
|
|
case 4:
|
|
case 5:
|
|
PWM_SET_DEADZONE_CLK_SRC(PWM1, 4, AFT_PRESCALER);
|
|
PWM_EnableDeadZone(PWM1, 4, deadzone);
|
|
break;
|
|
}
|
|
/* Lock registers */
|
|
SYS_LockReg();
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Initial TIMER0 */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void TIMER0_Init() {
|
|
/* Open Timer0 in periodic mode, enable interrupt and 1 interrupt tick per second */
|
|
|
|
|
|
#if 0
|
|
TIMER_Open(TIMER0, TIMER_PERIODIC_MODE, 1000);
|
|
TIMER_SET_PRESCALE_VALUE(TIMER0, 120-1);
|
|
TIMER_SET_CMP_VALUE(TIMER0, 0xFFFFFF);
|
|
//TIMER_EnableInt(TIMER0);
|
|
TIMER_Start(TIMER0);
|
|
#else
|
|
TIMER_Open(TIMER0, TIMER_ONESHOT_MODE, 100);
|
|
TIMER_SET_PRESCALE_VALUE(TIMER0, 71);
|
|
TIMER_SET_CMP_VALUE(TIMER0, HZ_50U+100);
|
|
#endif
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Initial TIMER1 */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void TIMER1_Init() {
|
|
/* Open Timer1 in periodic mode, enable interrupt and 1 interrupt tick per second */
|
|
TIMER_Open(TIMER1, TIMER_PERIODIC_MODE, 1000000/TIMER1_PERIOD);
|
|
//TIMER_EnableInt(TIMER1);
|
|
TIMER_Start(TIMER1);
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Initial TIMER2 */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void TIMER2_Init() {
|
|
|
|
/* Open Timer2 in periodic mode, enable interrupt and 1 interrupt tick per second */
|
|
TIMER_Open(TIMER2, TIMER_PERIODIC_MODE, 1000000/TIMER2_PERIOD);
|
|
TIMER_EnableInt(TIMER2);
|
|
TIMER_Start(TIMER2);
|
|
|
|
// Set Priority for ACMP01
|
|
NVIC_SetPriority(ACMP01_IRQn, 0);
|
|
|
|
/* Enable TIMER2 interrupt */
|
|
NVIC_EnableIRQ(TMR2_IRQn);
|
|
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Initial TIMER3 */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void TIMER3_Init() {
|
|
|
|
/* Open Timer3 in periodic mode, enable interrupt and 1 interrupt tick per second */
|
|
TIMER_Open(TIMER3, TIMER_PERIODIC_MODE, 1000000);
|
|
TIMER_SET_PRESCALE_VALUE(TIMER3, (PLL_CLOCK/1000000)-1);
|
|
TIMER_SET_CMP_VALUE(TIMER3, 0xFFFFFF);
|
|
TIMER_Start(TIMER3);
|
|
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* TIMER1_Delay */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void TIMER1_Delay(int T) {
|
|
|
|
for(int t = 0 ; t < T/TIMER1_PERIOD ;) {
|
|
if(TIMER_GetIntFlag(TIMER1)) {
|
|
TIMER_ClearIntFlag(TIMER1);
|
|
t++;
|
|
}
|
|
}
|
|
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Init UART */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void UART1_Init()
|
|
{
|
|
/* Reset IP */
|
|
SYS_ResetModule(UART1_RST);
|
|
|
|
/* Configure UART1 and set UART1 Baudrate */
|
|
UART_Open(UART1, 115200);
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Display */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void Display(unsigned char c) {
|
|
c = segmentMap[c - 0x20];
|
|
if(c & 0x01) SEG_A = 0;
|
|
else SEG_A = 1;
|
|
if(c & 0x02) SEG_B = 0;
|
|
else SEG_B = 1;
|
|
if(c & 0x04) SEG_C = 0;
|
|
else SEG_C = 1;
|
|
if(c & 0x08) SEG_D = 0;
|
|
else SEG_D = 1;
|
|
if(c & 0x10) SEG_E = 0;
|
|
else SEG_E = 1;
|
|
if(c & 0x20) SEG_F = 0;
|
|
else SEG_F = 1;
|
|
if(c & 0x40) SEG_G = 0;
|
|
else SEG_G = 1;
|
|
//if(c & 0x80) SEG_DP = 0;
|
|
//else SEG_DP = 1;
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* UART print */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void print(const char* format, ...) {
|
|
|
|
char str[128];
|
|
va_list argList;
|
|
va_start(argList, format);
|
|
int l = vsnprintf(str, sizeof(str), format, argList);
|
|
va_end(argList);
|
|
for(int i = 0 ; i < l ; i++) {
|
|
while(UART_IS_TX_FULL(UART1)) // Check TX FIFO
|
|
;
|
|
UART_WRITE(UART1, str[i]); // Send data to UART
|
|
}
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* UART_Command */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
int UART_Command(int &P1, int &P2) {
|
|
|
|
static int V;
|
|
static unsigned char data[8];
|
|
static const unsigned char CMD[] = {"Fn=mnn"};
|
|
static int keyi = 0;
|
|
while(!UART_GET_RX_EMPTY(UART1)) {
|
|
unsigned char c = UART_READ(UART1);
|
|
if(c == '\r' || c == '\n') {
|
|
if(keyi >= 4) {
|
|
keyi = 0;
|
|
P1 = data[1] - '0';
|
|
P2 = V;
|
|
return data[0];
|
|
}
|
|
keyi = 0;
|
|
} else if(c == ' ') { //space
|
|
keyi = 0;
|
|
return ' ';
|
|
} else if(c == 'a' || c == 'A') {//left
|
|
keyi = 0;
|
|
return 'a';
|
|
} else if(c == 'w' || c == 'W') {//up
|
|
keyi = 0;
|
|
return 'w';
|
|
} else if(c == 'd' || c == 'D') {//right
|
|
keyi = 0;
|
|
return 'd';
|
|
} else if(c == 'x' || c == 'X') {//Left
|
|
keyi = 0;
|
|
return 'x';
|
|
} else if(c == 'F' || c == 'T' || c == 'V') {
|
|
data[0] = c;
|
|
keyi = 1;
|
|
} else if(keyi >= 1) {
|
|
if(CMD[keyi] == 'n') {
|
|
if(c < '0' || c > '9') {
|
|
keyi = 0;
|
|
} else {
|
|
V = V*10 + c - '0';
|
|
data[keyi] = c;
|
|
if(++keyi >= sizeof(CMD)-1) {
|
|
keyi = 0;
|
|
P1 = data[1] - '0';
|
|
P2 = V;
|
|
return data[0];
|
|
}
|
|
}
|
|
} else if(CMD[keyi] == 'm') {
|
|
if(c == '?') { // read
|
|
keyi = 0;
|
|
P1 = data[1] - '0';
|
|
return data[0] | 0x20; // to lower case
|
|
} else if(c < '0' || c > '9') {
|
|
keyi = 0;
|
|
} else {
|
|
V = c - '0';
|
|
data[keyi] = c;
|
|
if(++keyi >= sizeof(CMD)-1) {
|
|
keyi = 0;
|
|
P1 = data[1] - '0';
|
|
P2 = V;
|
|
return data[0];
|
|
}
|
|
}
|
|
} else if(CMD[keyi] == c) {
|
|
if(++keyi >= sizeof(CMD)-1) {
|
|
keyi = 0;
|
|
P1 = data[1] - '0';
|
|
P2 = V;
|
|
return data[0];
|
|
}
|
|
} else {
|
|
keyi = 0;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Init ACMP */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
void ACMP_Init() {
|
|
|
|
/* Configure ACMP1. Enable ACMP1 and select band-gap voltage as the source of ACMP negative input. */
|
|
ACMP_Open(ACMP01, 1, ACMP_CTL_NEGSEL_PIN, ACMP_CTL_HYSTERESIS_DISABLE); //
|
|
|
|
/* select ACMP positive input pin */
|
|
ACMP_SELECT_P(ACMP01, 1, ACMP_CTL_POSSEL_P0);
|
|
|
|
/* set ACMP filter function */
|
|
ACMP_SET_FILTER(ACMP01, 1, ACMP_FILTER);
|
|
|
|
/* enable ACMP filter function*/
|
|
ACMP_ENABLE_FILTER(ACMP01, 1);
|
|
|
|
/* enable output inverse function */
|
|
#ifdef INVERSE
|
|
ACMP_ENABLE_OUTPUT_INVERSE(ACMP01, 1);
|
|
#endif
|
|
|
|
/* select ACMP interrupt condition */
|
|
ACMP_SELECT_INT_COND(ACMP01, 1, ACMP_CTL_INTPOL_RF);
|
|
|
|
/* Enable interrupt */
|
|
ACMP_ENABLE_INT(ACMP01, 1);
|
|
|
|
}
|
|
|
|
int ShutdownCnt, pShutdown=-1, Shutdown = 0;
|
|
int SHUTDOWN_MODE_CHANGED() {
|
|
|
|
int V = ADC_GET_CONVERSION_DATA(ADC, 0);
|
|
if(V >= SHUTDOWN_VOLT) {
|
|
if(pShutdown != 1) {
|
|
pShutdown = 1;
|
|
ShutdownCnt = 0;
|
|
}
|
|
} else {
|
|
if(pShutdown != 0) {
|
|
pShutdown = 0;
|
|
ShutdownCnt = 0;
|
|
}
|
|
}
|
|
if(ShutdownCnt < SHUTDOWN_TIME) {
|
|
if(++ShutdownCnt == SHUTDOWN_TIME) {
|
|
if(Shutdown != pShutdown) {
|
|
Shutdown = pShutdown;
|
|
return 1;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
|
|
|