From 520e0939f609e5bebef7f2f55904e06c1ac3ec2c Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Mon, 12 Jul 2021 17:39:29 +0800 Subject: [PATCH 1/8] add HSDAC gain control function --- .../cc26xx/app/headstage/EliteDAC.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h index b4ca55d00..4bdec802a 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h @@ -129,4 +129,24 @@ static void AutoGainChangeVout(int32_t userCode){ } } +static void AD_HSDAC_GainControl(uint8_t G_EXA, uint8_t G_PGA) { +/* Set the Gain value of PGA and Excitation amp, fix update rate at 7 */ + uint32_t reg = 0; + + if (G_EXA == 0 && G_PGA == 0) { + reg = 0x0000000E; + } else if (G_EXA == 0 && G_PGA == 1) { + reg = 0x0000000F; + } else if (G_EXA == 1 && G_PGA == 0) { + reg = 0x0000100E; + } else if (G_EXA == 1 && G_PGA == 1) { + reg = 0x0000100F; + } else { + reg = 0x0000000E; + } + + select_REG(0x2010); // HSDACCON address + w32_REG(reg); +} + #endif From 2bf8a1781ba4f98ba3ecd526b24fb2eb2d6d928d Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Wed, 14 Jul 2021 12:07:57 +0800 Subject: [PATCH 2/8] HSDAC calibration mode. --- .../cc26xx/app/headstage/EliteDAC.h | 51 ++++++++++++++----- .../cc26xx/app/headstage/EliteInstruction.h | 8 ++- .../cc26xx/app/headstage/headstage.h | 14 +++++ 3 files changed, 58 insertions(+), 15 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h index 4bdec802a..f593176d2 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h @@ -129,24 +129,47 @@ static void AutoGainChangeVout(int32_t userCode){ } } -static void AD_HSDAC_GainControl(uint8_t G_EXA, uint8_t G_PGA) { -/* Set the Gain value of PGA and Excitation amp, fix update rate at 7 */ - uint32_t reg = 0; +static void AD_HSDAC_GainControl(uint8_t G_EXA_PGA, uint8_t DACRate) { +/* Set the Gain value of PGA and Excitation amp */ + uint32_t reg = 0; +// uint8_t DACUpdateRate = DACRate; + uint8_t DACUpdateRate = 0x07; - if (G_EXA == 0 && G_PGA == 0) { - reg = 0x0000000E; - } else if (G_EXA == 0 && G_PGA == 1) { - reg = 0x0000000F; - } else if (G_EXA == 1 && G_PGA == 0) { - reg = 0x0000100E; - } else if (G_EXA == 1 && G_PGA == 1) { - reg = 0x0000100F; - } else { - reg = 0x0000000E; + switch (G_EXA_PGA) { + case 0x00:{ + reg = 0x00000000; + break; + } + case 0x01:{ + reg = 0x00000001; + break; + } + case 0x10:{ + reg = 0x00001000; + break; + } + case 0x11:{ + reg = 0x00001001; + break; + } + default:{ + reg = 0; + break; + } } - select_REG(0x2010); // HSDACCON address + reg = reg | ((uint32_t)(DACUpdateRate) << 1); + select_REG(HSDACCON); // HSDACCON address w32_REG(reg); } +static void HSDAC_output(uint16_t amp) { +/* Set and write the amplitude of HSDAC. Full scale: 0x0200 ~ 0x0E00 */ + uint32_t amplitude = 0; + amplitude = (uint32_t) (amp & 0x0FFF); + + select_REG(HSDACDAT); // HSDACDAT address + w32_REG(amplitude); +} + #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h index bea69d676..a95a5536b 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h @@ -67,6 +67,12 @@ struct HEADSTAGE_INSTRUCTION { uint8_t AdcChannel; + /* EIS HSDAC parameter */ + uint8_t EXA_gain; // Excitation Amplifier + uint8_t PGA_gain; // Programmable Gain Amplifier + uint16_t VAmpSet; // DAC Voltage Amplitude + uint8_t HSDAC_UpRate; // DAC Update Rate + } instru = {0}; /** Iin, Vin, Vout **/ @@ -74,7 +80,7 @@ struct HEADSTAGE_INSTRUCTION { #define VIN_ADC 0x01 #define VOUT_DAC 0x02 #define HIGH_Z 0x03 -#define VOUT_VIN_ADC 0x04 +#define EIS_HSDAC 0x04 /** ADC Iin gain level **/ #define I_GAIN_3M 0x00 // largest gain diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h index e2b98bfed..56b8c80a0 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h @@ -949,6 +949,14 @@ static void update_ZM_instruction(uint8 *ins) { } break; } + case EIS_HSDAC : { + instru.EXA_gain = ((ins[4] & 0xF0) >> 4); + instru.PGA_gain = (ins[4] & 0x0F); + instru.HSDAC_UpRate = ins[5]; + + AD_HSDAC_GainControl((instru.EXA_gain | instru.PGA_gain), instru.HSDAC_UpRate); + break; + } default :{ break; } @@ -997,6 +1005,12 @@ static void update_ZM_instruction(uint8 *ins) { ModeLED(WORKING); break; } + case EIS_HSDAC :{ + instru.eliteFxn = CURVE_CALI_ADC; + instru.VAmpSet = ((uint16_t)(ins[4]) << 8) | (uint16_t)(ins[5]); + HSDAC_output(instru.VAmpSet); + break; + } default : { break; } From 209fd3239e15c533ab7a9001105438ab7cd16105 Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Fri, 16 Jul 2021 14:21:56 +0800 Subject: [PATCH 3/8] Power Mode control function. --- .../cc26xx/app/headstage/EliteDAC.h | 48 ++++++++++++++++++- .../cc26xx/app/headstage/EliteInstruction.h | 9 +++- .../cc26xx/app/headstage/EliteSPI.h | 4 +- .../cc26xx/app/headstage/Elite_def.h | 10 ++++ .../cc26xx/app/headstage/headstage.h | 4 +- 5 files changed, 67 insertions(+), 8 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h index f593176d2..f26120640 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h @@ -153,7 +153,7 @@ static void AD_HSDAC_GainControl(uint8_t G_EXA_PGA, uint8_t DACRate) { break; } default:{ - reg = 0; + reg = 0x0000000E; // Default update rate = 7 break; } } @@ -164,7 +164,7 @@ static void AD_HSDAC_GainControl(uint8_t G_EXA_PGA, uint8_t DACRate) { } static void HSDAC_output(uint16_t amp) { -/* Set and write the amplitude of HSDAC. Full scale: 0x0200 ~ 0x0E00 */ +/* Set and write the amplitude of HSDAC. Full scale: 0x0200 ~ 0x0E00, 0x0800 = 0V */ uint32_t amplitude = 0; amplitude = (uint32_t) (amp & 0x0FFF); @@ -172,4 +172,48 @@ static void HSDAC_output(uint16_t amp) { w32_REG(amplitude); } +static void PowerMode_CutoffFrequencyControl (uint8_t bandwidth, uint8_t PowerMode) { + uint32_t reg = 0; + + switch (bandwidth) { + case cutoff_auto :{ + reg = (((uint32_t)(cutoff_auto)) & 0x0000000F) << 2; + break; + } + case cutoff_50k :{ + reg = (((uint32_t)(cutoff_50k)) & 0x0000000F) << 2; + break; + } + case cutoff_100k :{ + reg = (((uint32_t)(cutoff_100k)) & 0x0000000F) << 2; + break; + } + case cutoff_250k :{ + reg = (((uint32_t)(cutoff_250k)) & 0x0000000F) << 2; + break; + } + default :{ + reg = (((uint32_t)(cutoff_auto)) & 0x0000000F) << 2; + break; + } + } + + switch (PowerMode) { + case LOW_PW_MODE :{ + reg = reg | ((uint32_t)(LOW_PW_MODE) & 0x00000000F); + break; + } + case HIGH_PW_MODE :{ + reg = reg | ((uint32_t)(HIGH_PW_MODE) & 0x00000000F); + break; + } + default :{ + break; + } + } + + select_REG(PMWB); + w32_REG(reg); +} + #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h index a95a5536b..52773ccdb 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h @@ -71,7 +71,7 @@ struct HEADSTAGE_INSTRUCTION { uint8_t EXA_gain; // Excitation Amplifier uint8_t PGA_gain; // Programmable Gain Amplifier uint16_t VAmpSet; // DAC Voltage Amplitude - uint8_t HSDAC_UpRate; // DAC Update Rate + uint8_t HSDAC_UpRate; // DAC Update Rate } instru = {0}; @@ -102,6 +102,7 @@ struct HEADSTAGE_INSTRUCTION { /* DAC reset parameter */ #define DAC_ZERO 25000 +#define EIS_HSDAC_ZERO 0x0800 // Step time macro #define STEPTIME_HALF_SEC 5000 @@ -165,6 +166,12 @@ static void InitEliteInstruction(){ instru.sti_v7 = DAC_ZERO; instru.sti_loop = 1; instru.sti_cy = 0; + + // EIS DAC & ADC + instru.EXA_gain = 0; + instru.PGA_gain = 0; + instru.VAmpSet = EIS_HSDAC_ZERO; + instru.HSDAC_UpRate = 0; } #ifdef __cpulsplus diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h index e6d5ab339..1c8ff3bdf 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h @@ -179,7 +179,7 @@ static void CAL_LED_SPI(uint8_t length, uint16_t *spi_txbuf, uint16_t *spi_rxbuf #define ADCCON 0x21A8 #define DFTCON 0x20D0 #define ADCFILTERCON 0x2044 -#define PWMB 0x22F0 +#define PMWB 0x22F0 #define CLKSEL 0x0414 #define CLKCON0 0x0408 #define HSOSCCON 0x20BC @@ -347,8 +347,6 @@ static void AD5940_init(){ w16_REG(0x4859); select_REG(0x22F0); w16_REG(0x0000); - - } #endif // ELITE_EIS diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h index 63b3a3ae1..81bf1dd99 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h @@ -111,5 +111,15 @@ enum all_mode_e { #define WORKING 0x04 #define POST_WORK 0x05 +/* EIS define */ +// cutoff frequency of the filter in AD5940 +#define cutoff_auto 0x00 +#define cutoff_50k 0x01 +#define cutoff_100k 0x02 +#define cutoff_250k 0x03 + +#define LOW_PW_MODE 0x00 +#define HIGH_PW_MODE 0x01 + #define VALUE_ZERO_TO_ONE(_v) (_v == 0) ? 1 : _v #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h index 56b8c80a0..71c864021 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h @@ -1205,7 +1205,7 @@ static void update_ZM_instruction(uint8 *ins) { w32_REG(0x0030CFC0); //HIGH POWER MODE - select_REG(0x22F0); //PWMB + select_REG(0x22F0); //PMWB w32_REG(0x0000000D); //switch to active high power mode select_REG(0x0414); //CLKSEL w32_REG(0x00000000); //ADC and system clock both internal high frequency oscillator clock @@ -1309,7 +1309,7 @@ static void update_ZM_instruction(uint8 *ins) { select_REG(0x2014); //WGCON w32_REG(0x00000006); - //AFE and PWMB + //AFE and PMWB select_REG(0x2000); //AFECON w32_REG(0x00004180); select_REG(0x22F0); //PWMB212000 From c9d1efa1f77898782d653780ff7d6e3895d3eeca Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Mon, 19 Jul 2021 14:04:07 +0800 Subject: [PATCH 4/8] HSTIA control function. --- .../cc26xx/app/headstage/EliteADC.h | 24 +++++++++++++++++++ .../cc26xx/app/headstage/EliteSPI.h | 1 + .../cc26xx/app/headstage/Elite_def.h | 11 +++++++++ 3 files changed, 36 insertions(+) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h index bc99596ca..248153b4f 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h @@ -162,6 +162,19 @@ static void VinADCGainCtrl(uint8_t VinADCLevel){ record_flag = false; } +static void HSTIAGainCtrl(uint8_t HSTIALevel) { +/* HSRTIACON[12:5] = CTIACON, fix at 16pF; + HSRTIACON[4] = TIASW6CON, diode in parallel with RTIA; + HSRTIACON[3:0] = RTIA */ + + uint32_t reg = 0; + reg = (uint32_t)(HSTIALevel) & 0x0000000F; + reg = reg & 0x0000011F; + + select_REG(HSRTIACON); + w32_REG(reg); +} + static void ADCChannelSelect(uint8_t ADCChannel){ // set ADC parameter // 0xC1~F1 = reading AIN0~AIN3. Using FSR+-6V, resolution = 187.5uV @@ -569,4 +582,15 @@ static void AutoGainChangeVin(int32_t RealVin){ } } +static void HSTIA_cali_config() { + select_REG(ADCCON); + w32_REG(0x00000101); + + select_REG(ADCFILTERCON); + w32_REG(0x000000D0); + + select_REG(DFTCON); + w32_REG(0x000000C1); +} + #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h index 1c8ff3bdf..1ebe5c648 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h @@ -184,6 +184,7 @@ static void CAL_LED_SPI(uint8_t length, uint16_t *spi_txbuf, uint16_t *spi_rxbuf #define CLKCON0 0x0408 #define HSOSCCON 0x20BC #define ADCBUFCON 0x238C +#define HSRTIACON 0x20F0 static void select_REG(uint16_t addr){ diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h index 81bf1dd99..7a4448cf7 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h @@ -121,5 +121,16 @@ enum all_mode_e { #define LOW_PW_MODE 0x00 #define HIGH_PW_MODE 0x01 +// HSTIA feedback R +#define RTIA0 0x00 // 200R +#define RTIA1 0x01 // 1k +#define RTIA2 0x02 // 5k +#define RTIA3 0x03 // 10k +#define RTIA4 0x04 // 20k +#define RTIA5 0x05 // 40k +#define RTIA6 0x06 // 80k +#define RTIA7 0x07 // 160k +#define RTIAopen 0x08 // RTIA is open + #define VALUE_ZERO_TO_ONE(_v) (_v == 0) ? 1 : _v #endif From 331fb14342f260ee1116a0050767e07e23bd7c86 Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Tue, 20 Jul 2021 12:05:08 +0800 Subject: [PATCH 5/8] calibration mode for HSTIA --- .../cc26xx/app/headstage/EliteADC.h | 21 +++++++++---- .../cc26xx/app/headstage/EliteInstruction.h | 30 +++++++++++++++---- .../cc26xx/app/headstage/EliteLED.h | 4 +++ .../cc26xx/app/headstage/EliteSPI.h | 3 ++ .../cc26xx/app/headstage/Elite_def.h | 10 ------- .../cc26xx/app/headstage/Elite_mode_ADC_DAC.h | 22 ++++++-------- .../cc26xx/app/headstage/headstage.h | 23 +++++++++++++- .../cc26xx/app/headstage/impedance_meter.h | 2 ++ 8 files changed, 81 insertions(+), 34 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h index 248153b4f..a3837ef4d 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h @@ -168,11 +168,17 @@ static void HSTIAGainCtrl(uint8_t HSTIALevel) { HSRTIACON[3:0] = RTIA */ uint32_t reg = 0; - reg = (uint32_t)(HSTIALevel) & 0x0000000F; - reg = reg & 0x0000011F; + + if (HSTIALevel <= RTIAopen) { + reg = (uint32_t)(HSTIALevel) & 0x0000000F; + reg = reg & 0x0000011F; + } else { + reg = 0x0000011F; + } select_REG(HSRTIACON); w32_REG(reg); + record_flag = false; } static void ADCChannelSelect(uint8_t ADCChannel){ @@ -249,20 +255,25 @@ static void ReadADCBat(uint8_t *buf){ ADC_read(buf); } +static int32_t ReadRawADC() { + select_REG(ADCDAT); + return r32_REG(); +} + static int32_t ReadRealZ() { - select_REG(0x2078); + select_REG(DFTREAL); return r32_REG(); } static int32_t ReadImagZ() { - select_REG(0x207c); + select_REG(DFTIMAG); return r32_REG(); } static uint32_t ReadFreq() { static uint64_t freqDAC; static uint32_t ret; - select_REG(0x2030); + select_REG(WGFCW); freqDAC = r32_REG(); ret = freqDAC * 16000000 / 1073741824; //freeDAC * 16M / 2^30 diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h index 52773ccdb..258e648cb 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteInstruction.h @@ -73,6 +73,10 @@ struct HEADSTAGE_INSTRUCTION { uint16_t VAmpSet; // DAC Voltage Amplitude uint8_t HSDAC_UpRate; // DAC Update Rate + /* EIS HSTIA parameter */ + uint8_t TIAGainLv; + uint8_t EISAutoGainEnable; + } instru = {0}; /** Iin, Vin, Vout **/ @@ -81,6 +85,7 @@ struct HEADSTAGE_INSTRUCTION { #define VOUT_DAC 0x02 #define HIGH_Z 0x03 #define EIS_HSDAC 0x04 +#define EIS_HSTIA 0x05 /** ADC Iin gain level **/ #define I_GAIN_3M 0x00 // largest gain @@ -109,6 +114,17 @@ struct HEADSTAGE_INSTRUCTION { #define STEPTIME_ONE_SEC 10000 #define STEPTIME_TWO_SEC 20000 +/* HSTIA gain level (feedback R value) */ +#define RTIA0 0x00 // 200R +#define RTIA1 0x01 // 1k +#define RTIA2 0x02 // 5k +#define RTIA3 0x03 // 10k +#define RTIA4 0x04 // 20k +#define RTIA5 0x05 // 40k +#define RTIA6 0x06 // 80k +#define RTIA7 0x07 // 160k +#define RTIAopen 0x08 // RTIA is open +#define RTIA_GAIN_AUTO 0xFF /********************************************************************* * @fn InitEliteInstruction * @@ -167,11 +183,15 @@ static void InitEliteInstruction(){ instru.sti_loop = 1; instru.sti_cy = 0; - // EIS DAC & ADC - instru.EXA_gain = 0; - instru.PGA_gain = 0; - instru.VAmpSet = EIS_HSDAC_ZERO; - instru.HSDAC_UpRate = 0; + // EIS DAC + instru.EXA_gain = 0; + instru.PGA_gain = 0; + instru.VAmpSet = EIS_HSDAC_ZERO; + instru.HSDAC_UpRate = 7; + + // EIS ADC + instru.TIAGainLv = 0; + instru.EISAutoGainEnable = 1; } #ifdef __cpulsplus diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteLED.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteLED.h index 86df4338c..d24303d6b 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteLED.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteLED.h @@ -178,6 +178,10 @@ static void WorkModeLED() Elite_led_color(COLOR_ORANGE); } else if (instru.AdcChannel == VOUT_DAC) { Elite_led_color(COLOR_BLUE); + }else if (instru.AdcChannel == EIS_HSDAC) { + Elite_led_color(COLOR_PURPLE_DARK); + } else if (instru.AdcChannel == EIS_HSTIA) { + Elite_led_color(COLOR_GREEN_DARK); } break; diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h index 1ebe5c648..26213dc06 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h @@ -185,6 +185,9 @@ static void CAL_LED_SPI(uint8_t length, uint16_t *spi_txbuf, uint16_t *spi_rxbuf #define HSOSCCON 0x20BC #define ADCBUFCON 0x238C #define HSRTIACON 0x20F0 +#define ADCDAT 0x2074 +#define DFTREAL 0x2078 +#define DFTIMAG 0x207C static void select_REG(uint16_t addr){ diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h index 7a4448cf7..cee6e6e9a 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h @@ -121,16 +121,6 @@ enum all_mode_e { #define LOW_PW_MODE 0x00 #define HIGH_PW_MODE 0x01 -// HSTIA feedback R -#define RTIA0 0x00 // 200R -#define RTIA1 0x01 // 1k -#define RTIA2 0x02 // 5k -#define RTIA3 0x03 // 10k -#define RTIA4 0x04 // 20k -#define RTIA5 0x05 // 40k -#define RTIA6 0x06 // 80k -#define RTIA7 0x07 // 160k -#define RTIAopen 0x08 // RTIA is open #define VALUE_ZERO_TO_ONE(_v) (_v == 0) ? 1 : _v #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_mode_ADC_DAC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_mode_ADC_DAC.h index 3f56a74f7..e73bd0741 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_mode_ADC_DAC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_mode_ADC_DAC.h @@ -653,21 +653,17 @@ static void cali_IT_plot(void) { * 2 - read Iin and reset ADC_cnt */ if (ADC_cnt == 0) { - if (instru.AutoGainEnable) { + if (instru.EISAutoGainEnable) { MEAS_CURR(wm) = 0xFFFF; } else { - ReadADCIin(spi_ADC_rxbuf); - MEAS_CURR(wm) = (int32_t) (spi_ADC_rxbuf[0] << 8) | (int32_t) (spi_ADC_rxbuf[1]); - if (lastIinADCGainLevel != instru.ADCGainLv) { - IinADCGainControl(instru.ADCGainLv); - } + MEAS_CURR(wm) = ReadRawADC(); } - if (instru.ADCGainLv == 0) { - cali_count_max = 5000; - } else { - cali_count_max = 1000; - } +// if (instru.TIAGainLv == 0) { +// cali_count_max = 5000; +// } else { +// cali_count_max = 1000; +// } if (record_flag == false) { rec_cnt++; @@ -709,14 +705,14 @@ static void cali_IT_plot(void) { } if (ADC_cnt == 1) { - ReadADCIin(spi_ADC_rxbuf); + ReadRawADC(); ADC_cnt++; return; } if (ADC_cnt == 2) { - ReadADCIin(spi_ADC_rxbuf); + ReadRawADC(); ADC_cnt = 0; return; diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h index 71c864021..f6171fd84 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h @@ -957,6 +957,17 @@ static void update_ZM_instruction(uint8 *ins) { AD_HSDAC_GainControl((instru.EXA_gain | instru.PGA_gain), instru.HSDAC_UpRate); break; } + case EIS_HSTIA : { + instru.TIAGainLv = ins[4]; + if (instru.TIAGainLv != RTIA_GAIN_AUTO) { + instru.EISAutoGainEnable = 0; + } else { + instru.EISAutoGainEnable = 1; + instru.TIAGainLv = RTIA0; + HSTIAGainCtrl(instru.TIAGainLv); + } + break; + } default :{ break; } @@ -1005,10 +1016,20 @@ static void update_ZM_instruction(uint8 *ins) { ModeLED(WORKING); break; } - case EIS_HSDAC :{ + case EIS_HSDAC :{ // 0x04 instru.eliteFxn = CURVE_CALI_ADC; + instru.AdcChannel = EIS_HSDAC; + instru.sampleRate = 15; instru.VAmpSet = ((uint16_t)(ins[4]) << 8) | (uint16_t)(ins[5]); HSDAC_output(instru.VAmpSet); + ModeLED(WORKING); + break; + } + case EIS_HSTIA :{ // 0x05 + instru.eliteFxn = CURVE_CALI_ADC; + instru.AdcChannel = EIS_HSTIA; + instru.notifyRate = 1000; + instru.sampleRate = 15; break; } default : { diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h index f41aa748e..4579b862f 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h @@ -466,6 +466,8 @@ static void EliteADCControl(void) //CURVE_IV => CC_Plot() cali_VT_plot(); } else if (instru.AdcChannel == VOUT_DAC) { cali_VT_plot(); + } else if (instru.AdcChannel == EIS_HSTIA) { + cali_IT_plot(); } break; From 8c31d345fc6a328796c3d54fe777cb70c14eb75c Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Mon, 26 Jul 2021 17:14:36 +0800 Subject: [PATCH 6/8] Modify AD5904 init function --- .../simple_peripheral_cc2650em_app.launch | 4 ++++ .../ccs/config/src/sysbios/rom_sysbios.aem3 | Bin 3342306 -> 3342306 bytes .../cc26xx/app/headstage/EliteADC.h | 19 ++++++++++++------ .../cc26xx/app/headstage/EliteReset.h | 2 ++ .../cc26xx/app/headstage/EliteSPI.h | 5 +++++ .../cc26xx/app/headstage/headstage.h | 15 +++++++++++--- .../cc26xx/app/headstage/impedance_meter.h | 5 ++++- 7 files changed, 40 insertions(+), 10 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch index dee25c049..88a276c3f 100755 --- a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch +++ b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch @@ -2,16 +2,20 @@ + + + + diff --git a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.aem3 b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.aem3 index 4ea6c1269d4df6037bb8684a6a409f38a81cd7a7..6339c9a3deffe6bcc0ac7bb5e811cd209dc0c123 100755 GIT binary patch delta 291 zcmX}lClbO?0EFS8_ufMby+a6n;0736P#gk@MdS!v0m)3ny8<&9j*vm3as&8P#3y!F z?C1A#eDHW1es!fN^TlR%lh0EAY8kp^IN*c}Zg}8@4}Js?LzOP(}q+$f%)?2AXK0 XjSjl#p^pKE7-5VF6ikJwsm}W!A5(-S delta 291 zcmYMtITFEO0LAgKZ?SLj*<#=M!b}w0K%=8_2&Gox2)TmNOp08=jK&d+Qk5IXxbnKZS%P>+svax53z@W2Zn{0Jb35W5>kw6kDq>(`u zIpm?*j#bzi-&@^YzY5pIKWc5UZ2h9inzIipu~UBC>9G+gqJ%Oks6s;xbu`dK3vG1J VMGt)pFvJLBOdz4#kImG5{s0MFgZ%&i diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h index a3837ef4d..10c3d6ce8 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h @@ -594,14 +594,21 @@ static void AutoGainChangeVin(int32_t RealVin){ } static void HSTIA_cali_config() { - select_REG(ADCCON); - w32_REG(0x00000101); +// if(init_EIS_CaliMode) { + select_REG(ADCCON); + w32_REG(0x00000101); - select_REG(ADCFILTERCON); - w32_REG(0x000000D0); + select_REG(ADCFILTERCON); + w32_REG(0x000000D0); - select_REG(DFTCON); - w32_REG(0x000000C1); + select_REG(DFTCON); + w32_REG(0x000000C1); + + select_REG(SWCON); + w32_REG(0x00008A11); + +// init_EIS_CaliMode = false; +// } } #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h index 4723a1f29..e16a6958a 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h @@ -13,6 +13,8 @@ static void reset() { initINSBuf(); initDATBuf(); + AD5940_init(); + // PIN_setOutputValue(pin_handle, HIGH_Z_MODE, 0); // HIGH Z MODE // 1: close; 0: open; // VinADCGainCtrl(VIN_GAIN_AUTO); diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h index 26213dc06..6b481b61d 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h @@ -351,6 +351,11 @@ static void AD5940_init(){ w16_REG(0x4859); select_REG(0x22F0); w16_REG(0x0000); + + select_REG(AFECON); + w32_REG(0x0031CFC0); + select_REG(PMWB); + w32_REG(0x00000001); } #endif // ELITE_EIS diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h index f6171fd84..94852d387 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h @@ -594,6 +594,7 @@ static void EliteADCBattery(); static void VinADCGainCtrl(uint8_t VinADCLevel); static void VoutGainControl(uint8_t VOUTLevel); static void PIN15_setOutputValue (uint32_t latch_num, uint32_t pin_num, bool highlow); +//static bool init_EIS_CaliMode = false; // Elite key detection & turn on/ shutdown function (peripheral hardware control) static void Elite_led_color(uint16_t color); @@ -952,9 +953,12 @@ static void update_ZM_instruction(uint8 *ins) { case EIS_HSDAC : { instru.EXA_gain = ((ins[4] & 0xF0) >> 4); instru.PGA_gain = (ins[4] & 0x0F); - instru.HSDAC_UpRate = ins[5]; +// instru.HSDAC_UpRate = ins[5]; + instru.HSDAC_UpRate = 0x07; - AD_HSDAC_GainControl((instru.EXA_gain | instru.PGA_gain), instru.HSDAC_UpRate); + static uint8_t E_P_gain = 0; + E_P_gain = (instru.EXA_gain << 4) | (instru.PGA_gain); + AD_HSDAC_GainControl(E_P_gain, instru.HSDAC_UpRate); break; } case EIS_HSTIA : { @@ -1019,8 +1023,13 @@ static void update_ZM_instruction(uint8 *ins) { case EIS_HSDAC :{ // 0x04 instru.eliteFxn = CURVE_CALI_ADC; instru.AdcChannel = EIS_HSDAC; - instru.sampleRate = 15; + instru.notifyRate = 1000; + instru.sampleRate = 15; instru.VAmpSet = ((uint16_t)(ins[4]) << 8) | (uint16_t)(ins[5]); + +// init_EIS_CaliMode = true; + select_REG(SWCON); + w32_REG(0x00008A11); HSDAC_output(instru.VAmpSet); ModeLED(WORKING); break; diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h index 4579b862f..9316283c2 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h @@ -364,7 +364,7 @@ static void SimpleBLEPeripheral_performPeriodicTask(void) { mode_done(); } else if (instru.eliteFxn == CURVE_CALI_DAC) { - DAC_outputV(instru.VoltConstant); //UserCode -> DAC code -> DAC out +// DAC_outputV(instru.VoltConstant); //UserCode -> DAC code -> DAC out wm_deinit(); PeriodicEvent = false; } else { @@ -466,7 +466,10 @@ static void EliteADCControl(void) //CURVE_IV => CC_Plot() cali_VT_plot(); } else if (instru.AdcChannel == VOUT_DAC) { cali_VT_plot(); + } else if (instru.AdcChannel == EIS_HSDAC) { +// HSTIA_cali_config(); } else if (instru.AdcChannel == EIS_HSTIA) { +// HSTIA_cali_config(); cali_IT_plot(); } break; From fb8fdd5d5badd25ba62757b603b510ccf1294986 Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Wed, 28 Jul 2021 14:46:43 +0800 Subject: [PATCH 7/8] Use Amber controller to test calibration function. No No. --- .../ccs/config/src/sysbios/rom_sysbios.aem3 | Bin 3342306 -> 3342306 bytes .../cc26xx/app/headstage/EliteADC.h | 20 ++++++++++++++---- .../cc26xx/app/headstage/EliteDAC.h | 10 ++++++++- .../cc26xx/app/headstage/EliteReset.h | 2 ++ .../cc26xx/app/headstage/EliteSPI.h | 4 ---- .../cc26xx/app/headstage/Elite_def.h | 9 +++++--- .../cc26xx/app/headstage/headstage.h | 17 +++++++-------- .../cc26xx/app/headstage/impedance_meter.h | 5 +++-- .../cc26xx/app/simple_peripheral.c | 1 + 9 files changed, 45 insertions(+), 23 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.aem3 b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/config/src/sysbios/rom_sysbios.aem3 index 6339c9a3deffe6bcc0ac7bb5e811cd209dc0c123..61cac3b9e128e626b10ae78a7a12933a273b96b6 100755 GIT binary patch delta 281 zcmXZVITFEO0LAgKZ?O{*TWqltyBRYspwXF8IfGKG$PrvYX(q*Y2RbJ(N>y&azew>b z-h0LS{GP54?k~$fn=Xvi{HmQ)Q0jSRAo zk%J;^D}Puxr(*ZbKh}hmFXs delta 281 zcmXZVCl1130LAgJ%HF%IvNsfH86n{U7#sf1YWiwsC?`30vCOMwI^cv0Zg?QU3m^OlAczpch#-m>;z%Hg6w=5b zi=42`{9$gNirqK=SWDC8Y@usHX~~OA diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h index 10c3d6ce8..e5e3f9b75 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h @@ -594,10 +594,23 @@ static void AutoGainChangeVin(int32_t RealVin){ } static void HSTIA_cali_config() { -// if(init_EIS_CaliMode) { + if(init_EIS_CaliMode) { + select_REG(AFECON); + w32_REG(0x0031CFC0); + PowerMode_CutoffFrequencyControl(cutoff_auto, HIGH_PW_MODE); + select_REG(0x0414); //CLKSEL + w32_REG(0x00000000); //ADC and system clock both internal high frequency oscillator clock + select_REG(0x0408); //16bit system clock divider + w16_REG(0x0442); //set divider = 2 + select_REG(0x20BC); //HSOSCCON + w32_REG(0x00000000); //switch to 32MHz output + select_REG(ADCCON); w32_REG(0x00000101); + select_REG(HSTIACON); + w32_REG(0x00000000); + select_REG(ADCFILTERCON); w32_REG(0x000000D0); @@ -606,9 +619,8 @@ static void HSTIA_cali_config() { select_REG(SWCON); w32_REG(0x00008A11); - -// init_EIS_CaliMode = false; -// } + init_EIS_CaliMode = false; + } } #endif diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h index f26120640..579d6160e 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteDAC.h @@ -165,8 +165,16 @@ static void AD_HSDAC_GainControl(uint8_t G_EXA_PGA, uint8_t DACRate) { static void HSDAC_output(uint16_t amp) { /* Set and write the amplitude of HSDAC. Full scale: 0x0200 ~ 0x0E00, 0x0800 = 0V */ +/* Set and write the amplitude of HSDAC. Full scale: 512 ~ 3584, 2048 = 0V */ uint32_t amplitude = 0; - amplitude = (uint32_t) (amp & 0x0FFF); + + if (amp > 0x0E00) { + amplitude = 0x00000E00; + } else if (amp < 0x0200) { + amplitude = 0x00000200; + } else { + amplitude = (uint32_t) (amp & 0x0FFF); + } select_REG(HSDACDAT); // HSDACDAT address w32_REG(amplitude); diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h index e16a6958a..eb8829977 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteReset.h @@ -23,6 +23,7 @@ static void reset() { // instru.VoutGainLevel = VOUT_GAIN_15K; // VoutGainControl(instru.VoutGainLevel); // DAC_outputV(Usercode_Correction_to_DAC(instru.VoutGainLevel, 25000)); + HSDAC_output(0x0800); for (int i = 0; i < SPI_LED_SIZE; i++) { spi_LEDtxbuf[i] = 0; @@ -60,6 +61,7 @@ static void Eliteinterrupt() { // instru.VoutGainLevel = VOUT_GAIN_15K; // VoutGainControl(instru.VoutGainLevel); // DAC_outputV(Usercode_Correction_to_DAC(instru.VoutGainLevel, 25000)); + HSDAC_output(0x0800); for (int i = 0; i < SPI_LED_SIZE; i++) { spi_LEDtxbuf[i] = 0; diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h index 6b481b61d..f4f8299d3 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteSPI.h @@ -352,10 +352,6 @@ static void AD5940_init(){ select_REG(0x22F0); w16_REG(0x0000); - select_REG(AFECON); - w32_REG(0x0031CFC0); - select_REG(PMWB); - w32_REG(0x00000001); } #endif // ELITE_EIS diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h index cee6e6e9a..097cf0c57 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/Elite_def.h @@ -36,11 +36,14 @@ enum all_mode_e { CURVE_CALI_DAC = 0xF0, //0x93, - CURVE_CALI_ADC = 0xF1, // Cali ADC - test //0x92, +// CURVE_CALI_ADC = 0xF1, // Cali ADC - test //0x92, + CURVE_CALI_ADC = 0x92, // Cali ADC - test //0x92, - SET_SAMPLE_RATE = 0xE0, //0x70, - SET_ADC_DAC_GAIN = 0xE1, //0x80, +// SET_SAMPLE_RATE = 0xE0, //0x70, + SET_SAMPLE_RATE = 0x70, //0x70, +// SET_ADC_DAC_GAIN = 0xE1, //0x80, + SET_ADC_DAC_GAIN = 0x80, //0x80, }; // CIS (control instruction) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h index 94852d387..72c59c9c1 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage.h @@ -594,7 +594,7 @@ static void EliteADCBattery(); static void VinADCGainCtrl(uint8_t VinADCLevel); static void VoutGainControl(uint8_t VOUTLevel); static void PIN15_setOutputValue (uint32_t latch_num, uint32_t pin_num, bool highlow); -//static bool init_EIS_CaliMode = false; +static bool init_EIS_CaliMode = false; // Elite key detection & turn on/ shutdown function (peripheral hardware control) static void Elite_led_color(uint16_t color); @@ -619,6 +619,7 @@ static void DACenable(uint8_t afterRead); static void volt_out(); static void vscan_volt_out(void); static void pulse_vscan(void); +static void PowerMode_CutoffFrequencyControl (uint8_t bandwidth, uint8_t PowerMode); //mode (notify) static void initDATBuf(); @@ -925,7 +926,7 @@ static void update_ZM_instruction(uint8 *ins) { } break; } - case VOUT_DAC : { + case EIS_HSDAC : { // instru.VoutGainLevel = ins[4]; // if(instru.VoutGainLevel == VOUT_GAIN_AUTO){ // instru.VoutGainLevel = VOUT_GAIN_15K; @@ -950,7 +951,7 @@ static void update_ZM_instruction(uint8 *ins) { } break; } - case EIS_HSDAC : { + case VOUT_DAC : { instru.EXA_gain = ((ins[4] & 0xF0) >> 4); instru.PGA_gain = (ins[4] & 0x0F); // instru.HSDAC_UpRate = ins[5]; @@ -1008,7 +1009,7 @@ static void update_ZM_instruction(uint8 *ins) { ModeLED(WORKING); break; } - case VOUT_DAC : { // 0x02 + case EIS_HSDAC : { // 0x02 instru.eliteFxn = CURVE_CALI_ADC; instru.AdcChannel = VOUT_DAC; instru.notifyRate = 1000; @@ -1020,17 +1021,15 @@ static void update_ZM_instruction(uint8 *ins) { ModeLED(WORKING); break; } - case EIS_HSDAC :{ // 0x04 + case VOUT_DAC :{ // 0x04 instru.eliteFxn = CURVE_CALI_ADC; instru.AdcChannel = EIS_HSDAC; instru.notifyRate = 1000; instru.sampleRate = 15; instru.VAmpSet = ((uint16_t)(ins[4]) << 8) | (uint16_t)(ins[5]); -// init_EIS_CaliMode = true; - select_REG(SWCON); - w32_REG(0x00008A11); - HSDAC_output(instru.VAmpSet); + init_EIS_CaliMode = true; +// HSDAC_output(instru.VAmpSet); ModeLED(WORKING); break; } diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h index 9316283c2..991ccd062 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/impedance_meter.h @@ -467,9 +467,10 @@ static void EliteADCControl(void) //CURVE_IV => CC_Plot() } else if (instru.AdcChannel == VOUT_DAC) { cali_VT_plot(); } else if (instru.AdcChannel == EIS_HSDAC) { -// HSTIA_cali_config(); + HSTIA_cali_config(); + HSDAC_output(instru.VAmpSet); } else if (instru.AdcChannel == EIS_HSTIA) { -// HSTIA_cali_config(); + HSTIA_cali_config(); cali_IT_plot(); } break; diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c index a236baf80..467346d4b 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/simple_peripheral.c @@ -631,6 +631,7 @@ static void SimpleBLEPeripheral_taskFxn(UArg a0, UArg a1) { // } } else { EliteOn = TurnOnElite(key); +// AD5940_init(); } } else { // if there is periodic event From 9130c9edc2f045f0f65bd11a73cb3c8e148f50b2 Mon Sep 17 00:00:00 2001 From: Benny Liu Date: Wed, 28 Jul 2021 16:11:52 +0800 Subject: [PATCH 8/8] Use 4 pin connector to test DAC function. --- .../cc26xx/app/headstage/EliteADC.h | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h index e5e3f9b75..3af3f7fef 100644 --- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h +++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/EliteADC.h @@ -609,7 +609,7 @@ static void HSTIA_cali_config() { w32_REG(0x00000101); select_REG(HSTIACON); - w32_REG(0x00000000); + w32_REG(0x00000001); select_REG(ADCFILTERCON); w32_REG(0x000000D0); @@ -617,8 +617,19 @@ static void HSTIA_cali_config() { select_REG(DFTCON); w32_REG(0x000000C1); - select_REG(SWCON); - w32_REG(0x00008A11); +// select_REG(SWCON); +// w32_REG(0x00008A11); + select_REG(0x200C); //SWCON + w32_REG(0x00010000); //Control individually + select_REG(0x2150); //DSWFULLCON + w32_REG(0x00000010); //D5: D to CE0 + select_REG(0x2143); //NSWFULLCON + w32_REG(0x00000010); //N5: N to Rload_SE0 + select_REG(0x2158); //PSWFULLCON + w32_REG(0x00002000); //P11: P to CE0 + select_REG(0x215C); //TSWFULLCON + w32_REG(0x00000110); //T9 | T5: HSTIA neg input to SE0 + init_EIS_CaliMode = false; } }