diff --git a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch
index b32bc3f29..3112caf05 100755
--- a/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch
+++ b/simplelink/ble_sdk_2_02_02_25/examples/cc2650em/simple_peripheral/ccs/app/.launches/simple_peripheral_cc2650em_app.launch
@@ -12,7 +12,7 @@
 <stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:simple_peripheral_cc2650em_app}"/>
 <stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS100v3 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
 <stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
-<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\ccsv8\ccs_base\emulation\gel\images\cc26xx\cc26x0_rtos_rom_syms.out"/>
+<stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.C:\ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\targetConfigs\CC2650F128.ccxml.Texas Instruments XDS110 USB Debug Probe_0/Cortex_M3_0" value="C:/ti\simplelink\ble_sdk_2_02_02_25\examples\cc2650em\simple_peripheral\ccs\app\FlashROM\simple_peripheral_cc2650em_app.out"/>
 <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 <listEntry value="/simple_peripheral_cc2650em_app"/>
 </listAttribute>
diff --git a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h
index 8c956683c..7fb2b1a6c 100644
--- a/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h
+++ b/simplelink/ble_sdk_2_02_02_25/src/examples/simple_peripheral/cc26xx/app/headstage/headstage_neu.h
@@ -721,18 +721,18 @@ static void headstage_update_ris_instruction(uint8_t ins_len, uint8_t* instructi
             }
             break;
         }
-        case NEU_STI_TIME:{
-//            4b>PMOS_CH;10b>STI_T1;10b>STI_T2;10b>STI_T3;17b>STI_T4;10b>STI_T5
-            uint8_t StiChPos = instruction[0] & 0x0F;
-            if(StiChPos < 9){
-                INSTRUCTION.sti_t1[StiChPos] = instruction[1] << 2 | (instruction[2] & 0xC0) >> 6;
-                INSTRUCTION.sti_t2[StiChPos] = (instruction[2] & 0x3F) << 4 | (instruction[3] & 0xF0) >> 4;
-                INSTRUCTION.sti_t3[StiChPos] = (instruction[3] & 0x0F) << 6 | (instruction[4] & 0xFC) >> 2;
-                INSTRUCTION.sti_t4[StiChPos] = (instruction[4] & 0x03) << 15 | (instruction[5] << 7) | (instruction[6] & 0x80) >> 15;
-                INSTRUCTION.sti_t5[StiChPos] = instruction[6];
-            }
-            break;
-        }
+//        case NEU_STI_TIME:{
+////            4b>PMOS_CH;10b>STI_T1;10b>STI_T2;10b>STI_T3;17b>STI_T4;10b>STI_T5
+//            uint8_t StiChPos = instruction[0] & 0x0F;
+//            if(StiChPos < 9){
+//                INSTRUCTION.sti_t1[StiChPos] = instruction[1] << 2 | (instruction[2] & 0xC0) >> 6;
+//                INSTRUCTION.sti_t2[StiChPos] = (instruction[2] & 0x3F) << 4 | (instruction[3] & 0xF0) >> 4;
+//                INSTRUCTION.sti_t3[StiChPos] = (instruction[3] & 0x0F) << 6 | (instruction[4] & 0xFC) >> 2;
+//                INSTRUCTION.sti_t4[StiChPos] = (instruction[4] & 0x03) << 15 | (instruction[5] << 7) | (instruction[6] & 0x80) >> 15;
+//                INSTRUCTION.sti_t5[StiChPos] = instruction[6];
+//            }
+//            break;
+//        }
         case NEU_ARB_PARAM: {
             // to be implemented
             break;
@@ -822,28 +822,28 @@ static void headstage_update_cis_instruction(uint8_t cis_oper) {
             SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, 2, cdr_buf);
             break;
         }
-#ifdef HEADSTAGE_CIS_VOLT_H
-        case CIS_VOLT: {
-            uint8_t status = headstage_update_vis_volt(ins_len, instruction + 2, cdr_buf + 2);
-
-            cdr_buf[0] = _B_4b4b(CIS_VOLT, CHIP_ID);
-            cdr_buf[1] = status;
-
-            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
-            break;
-        }
-#endif
-#ifdef HEADSTAGE_CIS_LED_H
-        case CIS_LED: {
-            uint8_t status = headstage_update_vis_led(ins_len, instruction + 2, cdr_buf + 2);
-
-            cdr_buf[0] = _B_4b4b(CIS_LED, CHIP_ID);
-            cdr_buf[1] = status;
-
-            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
-            break;
-        }
-#endif
+//#ifdef HEADSTAGE_CIS_VOLT_H
+//        case CIS_VOLT: {
+//            uint8_t status = headstage_update_vis_volt(ins_len, instruction + 2, cdr_buf + 2);
+//
+//            cdr_buf[0] = _B_4b4b(CIS_VOLT, CHIP_ID);
+//            cdr_buf[1] = status;
+//
+//            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
+//            break;
+//        }
+//#endif
+//#ifdef HEADSTAGE_CIS_LED_H
+//        case CIS_LED: {
+//            uint8_t status = headstage_update_vis_led(ins_len, instruction + 2, cdr_buf + 2);
+//
+//            cdr_buf[0] = _B_4b4b(CIS_LED, CHIP_ID);
+//            cdr_buf[1] = status;
+//
+//            SimpleProfile_SetParameter(BLE_CDR_BUFF_CHAR, BLE_CDR_BUFF_SIZE, cdr_buf);
+//            break;
+//        }
+//#endif
         case CIS_READ_PARAM: {
             NEULIVE_STATE.state = NEU_SINGLE_INS_READ;
             flag_notify(EVT_NEU_SPI);