Roy_01
287 lines
7.8 KiB
C
287 lines
7.8 KiB
C
/**
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* Copyright (c) 2024 Wei-Lun Hsu. All Rights Reserved.
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*/
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/** @file hal_uart.h
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*
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* @author Wei-Lun Hsu
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* @version 0.1
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* @date 2024/09/10
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* @license
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* @description
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*/
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#ifndef __hal_uart_H_wrM7moXg_lQUd_HTJv_sOBv_uu2tvbtzutNR__
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#define __hal_uart_H_wrM7moXg_lQUd_HTJv_sOBv_uu2tvbtzutNR__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "hal_def.h"
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//=============================================================================
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// Constant Definition
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//=============================================================================
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typedef enum
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{
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UART_ERR_OK = 0,
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UART_ERR_NULL_POINTER,
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} UART_ErrTypeDef;
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/**
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* UART Word Length
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*/
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typedef enum
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{
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UART_WordLength_8b = (UART_CR_MODE_8D << UART_CR_MODE_Pos),
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UART_WordLength_8b1P = (UART_CR_MODE_8D1P << UART_CR_MODE_Pos),
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UART_WordLength_9b = (UART_CR_MODE_9D << UART_CR_MODE_Pos),
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} UART_WordLengthTypeDef;
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/**
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* UART Stop Bits
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*/
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typedef enum
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{
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UART_StopBits_1 = (UART_CR_STOPB_1B << UART_CR_STOPB_Pos),
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UART_StopBits_2 = (UART_CR_STOPB_2B << UART_CR_STOPB_Pos),
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} UART_StopBitsTypeDef;
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/**
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* UART Parity
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*/
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typedef enum
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{
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UART_Parity_No = (UART_CR_PAR_EVEN << UART_CR_PAR_Pos),
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UART_Parity_Even = (UART_CR_PAR_EVEN << UART_CR_PAR_Pos),
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UART_Parity_Odd = (UART_CR_PAR_ODD << UART_CR_PAR_Pos),
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} UART_ParityTypeDef;
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/**
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* UART Mode
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*/
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typedef enum
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{
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UART_Mode_Tx = 0,
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UART_Mode_TxRx = UART_CR_RXEN_Msk,
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} UART_ModeTypeDef;
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typedef enum
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{
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/* tx type */
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UART_IT_TX_FIFO_EMPTY = UART_IE_TXEE_Msk,
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UART_IT_TX_FIFO_FULL = UART_IE_TXFE_Msk,
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UART_IT_TX_FIFO_HEMPTY = UART_IE_TXHEE_Msk, // Half-Empty
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UART_IT_TX_DONE = UART_IE_TXENDE_Msk,
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/* rx type */
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UART_IT_RX_FIFO_NO_EMPTY = UART_IE_RXNEE_Msk,
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UART_IT_RX_FIFO_FULL = UART_IE_RXFE_Msk,
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UART_IT_RX_FIFO_HFULL = UART_IE_RXHFE_Msk, // Half-Full
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/* error type */
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#if 1
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UART_IT_ERR = (UART_IE_PERRE_Msk | UART_IE_FERRE_Msk | UART_IE_OVERRE_Msk | \
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UART_IE_TONEE_Msk | UART_IE_TOIDLEE_Msk)
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#else
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UART_IT_ERR_PARITY = UART_IE_PERRE_Msk,
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UART_IT_ERR_FRAME = UART_IE_FERRE_Msk,
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UART_IT_ERR_OVERFLOW = UART_IE_OVERRE_Msk,
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UART_IT_ERR_CLR_FIFO_TIMEOUT = UART_IE_TONEE_Msk,
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UART_IT_ERR_IDLE_TIMEOUT = UART_IE_TOIDLEE_Msk,
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#endif
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} UART_ITTypeDef;
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/**
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* UART_Flags
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*/
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typedef enum
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{
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UART_FLAG_RXNE = UART_SR_RXNE_Msk, /*!< Read data register not empty */
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UART_FLAG_TXE = UART_SR_TXE_Msk, /*!< Transmit data register Empty */
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UART_FLAG_TXHE = UART_SR_TXHE_Msk, /*!< Transmit data register half Empty */
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UART_FLAG_PERR = UART_SR_PERR_Msk, /*!< Parity error */
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UART_FLAG_FERR = UART_SR_FERR_Msk, /*!< Framing error */
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UART_FLAG_OVERR = UART_SR_OVERR_Msk, /*!< Overrun error */
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UART_FLAG_TONE = UART_SR_TONE_Msk, /*!< TONE Interrupt enable */
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UART_FLAG_TOIDLE = UART_SR_TOIDLE_Msk, /*!< TOIDLE interrupt enable */
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UART_FLAG_RXHF = UART_SR_RXHF_Msk, /*!< Read data register half empty */
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UART_FLAG_RXF = UART_SR_RXF_Msk, /*!< Read data register empty */
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UART_FLAG_TXEND = UART_SR_TXEND_Msk, /*!< TXEND interrupt enable */
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UART_FLAG_TXF = UART_SR_TXF_Msk, /*!< TXF interrupt enable */
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} UART_FlagTypeDef;
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//=============================================================================
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// Macro Definition
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//=============================================================================
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/**
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* \brief Uart reset/clear reception FIFO
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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* None
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*/
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__STATIC_FORCEINLINE void UART_ResetRxFIFO(UART_Type *pHUart)
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{
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REG_WRITE(pHUart->RXFR, 0xe930);
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return;
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}
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/**
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* \brief Uart reset/clear transmission FIFO
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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* None
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*/
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__STATIC_FORCEINLINE void UART_ResetTxFIFO(UART_Type *pHUart)
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{
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REG_WRITE(pHUart->TXFR, 0xe930);
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return;
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}
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/**
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* \brief Start UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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* None
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*/
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__STATIC_FORCEINLINE void UART_Start(UART_Type *pHUart)
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{
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REG_SET_BITS(pHUart->CR, UART_CR_RUN_Msk);
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return;
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}
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/**
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* \brief Stop UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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*
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*/
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__STATIC_FORCEINLINE void UART_Stop(UART_Type *pHUart)
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{
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REG_CLR_BITS(pHUart->CR, UART_CR_RUN_Msk);
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return;
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}
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/**
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* \brief Wait UART module Tx FIFO empty
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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* None
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*/
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__STATIC_FORCEINLINE void UART_WaitTxFifoEmpty(UART_Type *pHUart)
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{
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while( !REG_READ_MASK(pHUart->SR, UART_SR_TXE_Msk) );
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return;
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}
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/**
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* \brief Get the interrupt status
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*
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* \param [in] pHUart Pointer to a UART handle
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* \param [in] flags The target interrupt types, @ref UART_ITTypeDef
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* \return
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* status, @ref UART_ITTypeDef
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*/
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__STATIC_FORCEINLINE uint32_t UART_GetITStatus(UART_Type *pHUart, uint32_t flags)
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{
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return REG_READ_MASK(pHUart->SR, flags);
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}
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/**
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* \brief Get the status of UART
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*
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* \param [in] pHUart Pointer to a UART handle
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* \param [in] flags The specifies flags to check, @ref UART_FlagTypeDef
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* \return
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* The new state of flags (SET or RESET)
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*/
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__STATIC_FORCEINLINE FlagStatus UART_GetFlagStatus(UART_Type *pHUart, UART_FlagTypeDef flags)
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{
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return (pHUart->SR & flags) ? SET : RESET;
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}
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//=============================================================================
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// Structure Definition
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//=============================================================================
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typedef struct
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{
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uint32_t BaudRate;
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UART_WordLengthTypeDef WordLength;
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UART_StopBitsTypeDef StopBits;
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UART_ParityTypeDef Parity;
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UART_ModeTypeDef Mode;
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} UART_InitTypeDef;
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//=============================================================================
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// Global Data Definition
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//=============================================================================
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//=============================================================================
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// Private Function Definition
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//=============================================================================
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//=============================================================================
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// Public Function Definition
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//=============================================================================
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/**
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* \brief Initialize UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \param [in] pInit Pointer to a init structure, @ref UART_InitTypeDef
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* \return
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* Error number, @ref UART_ErrTypeDef
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*/
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UART_ErrTypeDef UART_Init(UART_Type *pHUart, UART_InitTypeDef *pInit);
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/**
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* \brief Send data througn UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \param [in] value the sent data
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* \return
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* None
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*/
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void UART_SendData(UART_Type *pHUart, uint16_t value);
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/**
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* \brief Receive data through UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \return
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* received data
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*/
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uint16_t UART_ReceiveData(UART_Type *pHUart);
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/**
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* \brief Configure the interrupts of UART module
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*
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* \param [in] pHUart Pointer to a UART handle
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* \param [in] flags The target interrupt types, @ref UART_ITTypeDef
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* \param [in] is_enable enable or disable interrupts (0: disable, others: enable)
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* \return
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* Error number, @ref UART_ErrTypeDef
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*/
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UART_ErrTypeDef UART_ITConfig(UART_Type *pHUart, uint32_t flags, uint32_t is_enable);
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#ifdef __cplusplus
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}
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#endif
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#endif
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