chain40
5892bffd3c
1. 實作 Dev mode 2. 實作 cis_version 3. ADC_DRV 新增 adc_read_mutiple_channels()/adc_read_mutiple_channels_ex(), 連續轉換多個 ADC channel 備註: 目前設定使用 adc_read_mutiple_channels()/adc_read_mutiple_channels_ex() 每筆 ADC 需要 sample 40us
235 lines
6.1 KiB
C
235 lines
6.1 KiB
C
#include "pel.h"
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#include "pel10_io.h"
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#include "elite_def.h"
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#include "nrf_delay.h"
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#include "nrf_gpio.h"
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#include "nrf_log.h"
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#include "adc_drv.h"
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#if (DEF_ELITE_MODEL == DEF_PULSE_E_LOAD_01)
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typedef struct
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{
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float val;
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uint32_t pin;
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uint32_t mask;
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} input_pin_t;
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static pel_output_t output_data = { 0 };
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const input_pin_t input_pin_tab[] = {
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{ 0.5, INPUT_1_PIN, PEL_0P5R_MASK},
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{ 1.0, INPUT_2_PIN, PEL_1P0R_MASK},
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{ 2.0, INPUT_3_PIN, PEL_2P0R_MASK},
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{ 4.0, INPUT_4_PIN, PEL_4P0R_MASK},
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{ 8.0, INPUT_5_PIN, PEL_8P0R_MASK},
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{ 16.2, INPUT_6_PIN, PEL_16P2R_MASK},
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{ 32.4, INPUT_7_PIN, PEL_32P4R_MASK},
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{ 63.4, INPUT_8_PIN, PEL_63P4R_MASK},
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{ 127.0, INPUT_9_PIN, PEL_127R_MASK},
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{ 255.0, INPUT_10_PIN, PEL_255R_MASK},
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{ 511.0, INPUT_11_PIN, PEL_511R_MASK},
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{1000.0, INPUT_12_PIN, PEL_1000R_MASK},
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};
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static float _load_set(uint32_t mask)
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{
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float ohms = 0;
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for (uint32_t i = 0; i < COUNTOF(input_pin_tab); i++)
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{
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if (input_pin_tab[i].mask & mask)
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{
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nrf_gpio_pin_clear(input_pin_tab[i].pin);
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ohms += input_pin_tab[i].val;
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}
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else
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{
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nrf_gpio_pin_set(input_pin_tab[i].pin);
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}
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}
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return ohms;
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}
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static float _load_set_by_ohms(float ohms)
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{
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// TODO...
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return ohms;
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}
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static void _sample(void)
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{
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nrf_gpio_pin_set(ANODE_PIN);
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nrf_gpio_pin_clear(CATHODE_PIN);
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nrf_gpio_pin_clear(SAMPLE_R_PIN);
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nrf_gpio_pin_clear(SAMPLE_V_PIN);
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nrf_delay_us(10);
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nrf_gpio_pin_toggle(ANODE_PIN);
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nrf_gpio_pin_toggle(CATHODE_PIN);
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nrf_delay_us(5);
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nrf_gpio_pin_toggle(SAMPLE_R_PIN);
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nrf_gpio_pin_toggle(SAMPLE_V_PIN);
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nrf_delay_us(5);
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nrf_gpio_pin_toggle(CATHODE_PIN);
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nrf_gpio_pin_toggle(ANODE_PIN);
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nrf_gpio_pin_toggle(SAMPLE_R_PIN);
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nrf_gpio_pin_toggle(SAMPLE_V_PIN);
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}
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void pel_relays_set(uint32_t measure_out)
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{
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if (measure_out)
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{
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nrf_gpio_pin_set(RELAY1_PIN);
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nrf_gpio_pin_clear(RELAY2_PIN);
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}
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else
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{
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nrf_gpio_pin_clear(RELAY1_PIN);
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nrf_gpio_pin_set(RELAY2_PIN);
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}
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/* delay 30ms */
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vTaskDelay(pdMS_TO_TICKS(30));
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}
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pel_output_t pel_smaple_and_convt_all(uint32_t load_mask)
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{
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uint32_t ch_list[] = {
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OUTPUT_R1_CHANNEL,
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OUTPUT_R2_CHANNEL,
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OUTPUT_VO_CHANNEL,
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OUTPUT_VC_CHANNEL,
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OUTPUT_VE_CHANNEL
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};
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int32_t results[COUNTOF(ch_list)];
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/* config E-load */
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_load_set(load_mask);
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/* send a pulse to sample and then read ADC channels */
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adc_read_mutiple_channels_ex(ch_list, results, COUNTOF(ch_list), _sample);
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/* copy results */
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output_data.output_r1 = results[0];
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output_data.output_r2 = results[1];
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output_data.output_vo = results[2];
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output_data.output_vc = results[3];
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output_data.output_ve = results[4];
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NRF_LOG_INFO("output_r1: 0x%04X", output_data.output_r1);
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NRF_LOG_INFO("output_r2: 0x%04X", output_data.output_r2);
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NRF_LOG_INFO("output_vo: 0x%04X", output_data.output_vo);
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NRF_LOG_INFO("output_vc: 0x%04X", output_data.output_vc);
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NRF_LOG_INFO("output_ve: 0x%04X", output_data.output_ve);
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return output_data;
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}
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#define VERSION_DATE_YEAR 24
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#define VERSION_DATE_MONTH 5
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#define VERSION_DATE_DAY 21
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#define VERSION_DATE_HOUR 18
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#define VERSION_DATE_MINUTE 39
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static void cis_version(uint8_t *ins, uint16_t size)
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{
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NRF_LOG_INFO("%s", __FUNCTION__);
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uint8_t cis_ver[] = {
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CIS_VERSION,
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VERSION_DATE_YEAR,
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VERSION_DATE_MONTH,
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VERSION_DATE_DAY,
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VERSION_DATE_HOUR,
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VERSION_DATE_MINUTE,
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};
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)cis_ver, sizeof(cis_ver));
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}
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static void vis_rst(uint8_t *ins, uint16_t size)
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{
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NRF_LOG_INFO("%s", __FUNCTION__);
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}
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#define MAGIC_NUM 0xFF00
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static pel_output_t dev_mode_pel_output;
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static void dev_mode(uint8_t *ins, uint16_t size)
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{
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NRF_LOG_INFO("%s", __FUNCTION__);
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struct __PACKED
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{
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uint8_t id : 4;
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uint8_t : 4;
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uint16_t magic : 16;
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uint8_t opcode;
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uint8_t param[];
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} *p_ins = (void *)ins;
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if (p_ins->magic != MAGIC_NUM)
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{
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return;
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}
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struct
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{
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uint8_t status;
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uint16_t mask;
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} __PACKED *p_param = (void *)p_ins->param;
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switch (p_ins->opcode)
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{
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case 0x00: {
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pel_relays_set(p_param->status);
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dev_mode_pel_output = pel_smaple_and_convt_all(p_param->mask);
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break;
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}
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case 0x01: {
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)&dev_mode_pel_output.output_r1, sizeof(dev_mode_pel_output.output_r1));
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break;
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}
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case 0x02: {
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)&dev_mode_pel_output.output_r2, sizeof(dev_mode_pel_output.output_r2));
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break;
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}
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case 0x03: {
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)&dev_mode_pel_output.output_vo, sizeof(dev_mode_pel_output.output_vo));
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break;
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}
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case 0x04: {
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)&dev_mode_pel_output.output_vc, sizeof(dev_mode_pel_output.output_vc));
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break;
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}
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case 0x05: {
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extern ret_code_t le_data_upadate(uint8_t * p_value, uint16_t len);
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le_data_upadate((void *)&dev_mode_pel_output.output_ve, sizeof(dev_mode_pel_output.output_ve));
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break;
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}
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default: {
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break;
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}
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}
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}
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const elite_instance_t pel_elite_instance = {
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.cis_func = {
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[CIS_VERSION] = cis_version,
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},
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.vis_func = {
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[VIS_RST] = vis_rst,
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},
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.ris_func = {
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[DEV_MODE] = dev_mode,
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}
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};
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const elite_instance_t *pel_init(void)
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{
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return &pel_elite_instance;
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}
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#endif
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