Roy_01
98 lines
3.2 KiB
C
98 lines
3.2 KiB
C
#ifndef __CPG10_IO_H__
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#define __CPG10_IO_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "app_config.h"
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#include "elite_board.h"
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#include "nrf_gpio.h"
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#include "nrf_spim.h"
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#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
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#define UNDEF_GPIO 0xFFFFFFFF
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#define VA1H_PIN NRF_GPIO_PIN_MAP(0, 22)
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#define VA1L_PIN NRF_GPIO_PIN_MAP(0, 25)
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#define VB1H_PIN NRF_GPIO_PIN_MAP(0, 19)
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#define VB1L_PIN NRF_GPIO_PIN_MAP(0, 21)
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#define VA2H_PIN NRF_GPIO_PIN_MAP(0, 17)
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#define VA2L_PIN NRF_GPIO_PIN_MAP(0, 20)
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#define TW_SCKI_0_PIN NRF_GPIO_PIN_MAP(0, 14)
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#define TW_SCKI_1_PIN NRF_GPIO_PIN_MAP(0, 13)
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#define ADPT_CLK_PIN NRF_GPIO_PIN_MAP(0, 11)
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#define HV_EN_PIN NRF_GPIO_PIN_MAP(1, 8)
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#define SPIM_CLK_PIN NRF_GPIO_PIN_MAP(0, 12)
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#define SPIM_MISO_PIN NRF_GPIO_PIN_MAP(1, 9)
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#define VB2H_PIN NRF_GPIO_PIN_MAP(0, 8)
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#define VB2L_PIN NRF_GPIO_PIN_MAP(0, 6)
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#define VA3H_PIN NRF_GPIO_PIN_MAP(0, 5)
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#define VA3L_PIN NRF_GPIO_PIN_MAP(0, 27)
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#define VB3H_PIN NRF_GPIO_PIN_MAP(0, 26)
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#define VB3L_PIN NRF_GPIO_PIN_MAP(0, 4)
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#define VA4H_PIN NRF_GPIO_PIN_MAP(0, 1)
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#define VA4L_PIN NRF_GPIO_PIN_MAP(0, 0)
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#define ADPT_LE_PIN NRF_GPIO_PIN_MAP(0, 31)
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#define ADPT_CLR_PIN NRF_GPIO_PIN_MAP(1, 15)
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#define CS_MEM_PIN NRF_GPIO_PIN_MAP(0, 2)
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#define AIN0_PIN NRF_GPIO_PIN_MAP(0, 30)
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#define AIN1_PIN NRF_GPIO_PIN_MAP(0, 28)
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#define ADPT0_S4_PIN NRF_GPIO_PIN_MAP(1, 12)
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#define ADPT0_S3_PIN NRF_GPIO_PIN_MAP(1, 14)
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#define ADPT0_S2_PIN NRF_GPIO_PIN_MAP(0, 3)
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#define ADPT0_S1_PIN NRF_GPIO_PIN_MAP(1, 13)
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#define ADPT1_S4_PIN NRF_GPIO_PIN_MAP(1, 3)
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#define ADPT1_S3_PIN NRF_GPIO_PIN_MAP(1, 10)
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#define ADPT1_S2_PIN NRF_GPIO_PIN_MAP(1, 6)
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#define ADPT1_S1_PIN NRF_GPIO_PIN_MAP(1, 11)
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#define LED_R_PIN NRF_GPIO_PIN_MAP(0, 10)
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#define LED_G_PIN NRF_GPIO_PIN_MAP(0, 9)
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#define LED_B_PIN NRF_GPIO_PIN_MAP(1, 2)
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#define VB4H_PIN NRF_GPIO_PIN_MAP(0, 24)
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#define VB4L_PIN NRF_GPIO_PIN_MAP(0, 23)
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#define SPIM_MOSI_PIN NRF_GPIO_PIN_MAP(0, 7)
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#define TW_SDI_PIN NRF_GPIO_PIN_MAP(0, 7)
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#define ADPT_DIN_PIN NRF_GPIO_PIN_MAP(0, 7)
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#define PULSE_ID_NULL 0
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#define PULSE_ID_A 1
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#define PULSE_ID_B 2
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#define PULSE_ID_C 3
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#define PULSE_ID_D 4
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typedef struct
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{
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uint32_t VAxH;
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uint32_t VAxL;
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uint32_t VBxH;
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uint32_t VBxL;
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uint32_t idle_us; // min: 500us, max: 60sec
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uint32_t point_us[7]; // toggle point timestamp
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uint32_t pulse_cnt; // min: 1, max: 0xFFFFFFFF
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uint32_t pulse_id; // NO_USE_IRQ / USE_TIMER1_IRQ / USE_TIMER2_IRQ
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} pulse_gen_t;
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void spim_xfer(uint32_t cs_pin,
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nrf_spim_mode_t spi_mode,
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uint8_t *p_tx_buffer,
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uint16_t tx_buffer_length,
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uint8_t *p_rx_buf,
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uint16_t rx_buffer_length);
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void cpg11_io_init(void);
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void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len);
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void cpg11_pulse_start(uint32_t idx, pulse_gen_t *p_pulse_gen);
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void cpg11_pulse_stop(uint32_t hw_idx);
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void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id);
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void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id);
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#endif /* ! DEF_ELITE_MODEL */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ! __CPG10_IO_H__ */
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