569 lines
20 KiB
C
569 lines
20 KiB
C
#include "elite_board.h"
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#include "nrf_gpio.h"
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#include "nrf_gpiote.h"
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#include "nrf_log.h"
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#include "nrf_spim.h"
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#include "nrf_timer.h"
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#include "FreeRTOS.h"
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#include "semphr.h"
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#include "task.h"
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#pragma GCC optimize("O2")
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#if (DEF_ELITE_MODEL == DEF_ELITE_CPG_V1_1)
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typedef struct
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{
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const uint32_t gpiote_idx[4];
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NRF_TIMER_Type *TMR_A;
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NRF_TIMER_Type *TMR_B;
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uint32_t TMR_A_IRQn;
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uint32_t TMR_B_IRQn;
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pulse_gen_t *p_pulse_gen;
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struct
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{
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pulse_gen_t *p_pulse_gen;
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uint32_t len;
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uint32_t select;
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} private;
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} pulse_gen_hw_t;
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pulse_gen_hw_t pulse_gen_hw[] = {
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{.gpiote_idx = { 0, 1, 2, 3 },
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.TMR_A = NRF_TIMER1,
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.TMR_B = NRF_TIMER3,
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.TMR_A_IRQn = TIMER1_IRQn,
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.TMR_B_IRQn = TIMER3_IRQn,
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.p_pulse_gen = NULL,
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.private = { NULL, 0, 0 }},
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{.gpiote_idx = { 4, 5, 6, 7 },
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.TMR_A = NRF_TIMER2,
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.TMR_B = NRF_TIMER4,
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.TMR_A_IRQn = TIMER2_IRQn,
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.TMR_B_IRQn = TIMER4_IRQn,
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.p_pulse_gen = NULL,
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.private = { NULL, 0, 0 }},
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};
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__STATIC_INLINE void config_tmrB(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
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{
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[4] = pulse_gen_hw[hw_idx].TMR_B->CC[3] + p_pulse_gen->idle_us * 16;
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}
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__STATIC_INLINE void cpg11_tmrB_cb(uint32_t hw_idx)
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{
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if (pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4])
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{
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uint32_t sel = pulse_gen_hw[hw_idx].private.select;
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pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4] = 0;
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if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
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{
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pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt--;
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}
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for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
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{
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sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
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if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
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{
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pulse_gen_hw[hw_idx].private.select = sel;
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config_tmrB(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
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return;
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}
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}
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pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
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pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
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}
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}
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__STATIC_INLINE void config_tmrA(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
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{
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
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pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
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pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
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}
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__STATIC_INLINE void cpg11_tmrA_cb(uint32_t hw_idx)
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{
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if (pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3])
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{
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uint32_t sel = pulse_gen_hw[hw_idx].private.select;
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pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3] = 0;
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for (uint32_t i = 0; i < pulse_gen_hw[hw_idx].private.len; i++)
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{
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sel = (sel + 1) % pulse_gen_hw[hw_idx].private.len;
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if (pulse_gen_hw[hw_idx].private.p_pulse_gen[sel].pulse_cnt > 0)
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{
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config_tmrA(hw_idx, &pulse_gen_hw[hw_idx].private.p_pulse_gen[sel]);
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return;
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}
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}
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}
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}
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void TIMER1_IRQHandler(void)
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{
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cpg11_tmrA_cb(0);
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}
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void TIMER3_IRQHandler(void)
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{
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cpg11_tmrB_cb(0);
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}
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void TIMER2_IRQHandler(void)
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{
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cpg11_tmrA_cb(1);
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}
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void TIMER4_IRQHandler(void)
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{
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cpg11_tmrB_cb(1);
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}
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void cpg11_pulse_suspend_by_pulse_id(uint32_t pulse_id)
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{
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for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
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{
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for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
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{
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if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
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{
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taskENTER_CRITICAL();
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pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = 0xFFFFFFFF;
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pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = 0xFFFFFFFF;
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pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = 0xFFFFFFFF;
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pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = 0xFFFFFFFF;
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taskEXIT_CRITICAL();
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}
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}
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}
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}
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void cpg11_pulse_resume_by_pulse_id(uint32_t pulse_id)
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{
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for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
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{
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for (uint32_t j = 0; j < pulse_gen_hw[i].private.len; j++)
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{
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if (pulse_gen_hw[i].private.p_pulse_gen[j].pulse_id == pulse_id)
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{
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taskENTER_CRITICAL();
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pulse_gen_hw[i].private.p_pulse_gen[j].VAxH = pulse_gen_hw[i].p_pulse_gen[j].VAxH;
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pulse_gen_hw[i].private.p_pulse_gen[j].VBxH = pulse_gen_hw[i].p_pulse_gen[j].VBxH;
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pulse_gen_hw[i].private.p_pulse_gen[j].VAxL = pulse_gen_hw[i].p_pulse_gen[j].VAxL;
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pulse_gen_hw[i].private.p_pulse_gen[j].VBxL = pulse_gen_hw[i].p_pulse_gen[j].VBxL;
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taskEXIT_CRITICAL();
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}
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}
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}
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}
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void cpg11_pulse_stop(uint32_t hw_idx)
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{
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pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
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pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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}
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void cpg11_pulse_start(uint32_t hw_idx, pulse_gen_t *p_pulse_gen)
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{
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pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
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pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[0], p_pulse_gen->VBxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[1], p_pulse_gen->VBxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[2], p_pulse_gen->VAxH, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_HIGH);
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nrf_gpiote_task_configure(pulse_gen_hw[hw_idx].gpiote_idx[3], p_pulse_gen->VAxL, NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_enable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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uint32_t offs = 8 * hw_idx;
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NRF_PPI->CH[offs + 0].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[0];
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NRF_PPI->CH[offs + 0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
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NRF_PPI->CHENSET = (1 << (offs + 0));
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NRF_PPI->CH[offs + 1].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[1];
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NRF_PPI->CH[offs + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
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NRF_PPI->CHENSET = (1 << (offs + 1));
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NRF_PPI->CH[offs + 2].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[2];
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NRF_PPI->CH[offs + 2].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[1]];
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NRF_PPI->CHENSET = (1 << (offs + 2));
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NRF_PPI->CH[offs + 3].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->EVENTS_COMPARE[3];
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NRF_PPI->CH[offs + 3].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[0]];
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NRF_PPI->FORK[offs + 3].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->TASKS_START;
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NRF_PPI->CHENSET = (1 << (offs + 3));
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NRF_PPI->CH[offs + 4].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[0];
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NRF_PPI->CH[offs + 4].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
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NRF_PPI->CHENSET = (1 << (offs + 4));
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NRF_PPI->CH[offs + 5].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[1];
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NRF_PPI->CH[offs + 5].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
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NRF_PPI->CHENSET = (1 << (offs + 5));
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NRF_PPI->CH[offs + 6].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[2];
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NRF_PPI->CH[offs + 6].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[3]];
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NRF_PPI->CHENSET = (1 << (offs + 6));
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NRF_PPI->CH[offs + 7].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[3];
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NRF_PPI->CH[offs + 7].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pulse_gen_hw[hw_idx].gpiote_idx[2]];
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NRF_PPI->CHENSET = (1 << (offs + 7));
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NRF_PPI->CH[offs + 8].EEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_B->EVENTS_COMPARE[4];
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NRF_PPI->CH[offs + 8].TEP = (uint32_t)&pulse_gen_hw[hw_idx].TMR_A->TASKS_START;
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NRF_PPI->CHENSET = (1 << (offs + 8));
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pulse_gen_hw[hw_idx].TMR_B->TASKS_CLEAR = 1;
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pulse_gen_hw[hw_idx].TMR_A->TASKS_CLEAR = 1;
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pulse_gen_hw[hw_idx].TMR_B->CC[0] = 1 + p_pulse_gen->point_us[3] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[1] = pulse_gen_hw[hw_idx].TMR_B->CC[0] + p_pulse_gen->point_us[4] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[2] = pulse_gen_hw[hw_idx].TMR_B->CC[1] + p_pulse_gen->point_us[5] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[3] = pulse_gen_hw[hw_idx].TMR_B->CC[2] + p_pulse_gen->point_us[6] * 16;
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pulse_gen_hw[hw_idx].TMR_B->CC[4] = pulse_gen_hw[hw_idx].TMR_B->CC[3] + p_pulse_gen->idle_us * 16;
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pulse_gen_hw[hw_idx].TMR_B->SHORTS = NRF_TIMER_SHORT_COMPARE4_STOP_MASK | NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK;
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pulse_gen_hw[hw_idx].TMR_B->INTENSET = NRF_TIMER_INT_COMPARE4_MASK;
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pulse_gen_hw[hw_idx].TMR_A->CC[0] = 1;
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pulse_gen_hw[hw_idx].TMR_A->CC[1] = pulse_gen_hw[hw_idx].TMR_A->CC[0] + p_pulse_gen->point_us[0] * 16;
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pulse_gen_hw[hw_idx].TMR_A->CC[2] = pulse_gen_hw[hw_idx].TMR_A->CC[1] + p_pulse_gen->point_us[1] * 16;
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pulse_gen_hw[hw_idx].TMR_A->CC[3] = pulse_gen_hw[hw_idx].TMR_A->CC[2] + p_pulse_gen->point_us[2] * 16;
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pulse_gen_hw[hw_idx].TMR_A->SHORTS = NRF_TIMER_SHORT_COMPARE3_STOP_MASK | NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK;
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pulse_gen_hw[hw_idx].TMR_A->INTENSET = NRF_TIMER_INT_COMPARE3_MASK;
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sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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sd_nvic_EnableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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pulse_gen_hw[hw_idx].TMR_A->TASKS_START = 1;
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}
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void cpg11_pulse_init(uint32_t hw_idx, pulse_gen_t *p_pulse_gen, uint32_t len)
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{
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taskENTER_CRITICAL();
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if (pulse_gen_hw[hw_idx].private.p_pulse_gen != NULL)
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{
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pulse_gen_hw[hw_idx].TMR_B->TASKS_STOP = 1;
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pulse_gen_hw[hw_idx].TMR_A->TASKS_STOP = 1;
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_B_IRQn);
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sd_nvic_DisableIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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sd_nvic_ClearPendingIRQ(pulse_gen_hw[hw_idx].TMR_A_IRQn);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[0]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[1]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[2]);
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nrf_gpiote_task_disable(pulse_gen_hw[hw_idx].gpiote_idx[3]);
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vPortFree(pulse_gen_hw[hw_idx].private.p_pulse_gen);
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}
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pulse_gen_hw[hw_idx].p_pulse_gen = p_pulse_gen;
|
|
pulse_gen_hw[hw_idx].private.len = len;
|
|
pulse_gen_hw[hw_idx].private.select = 0;
|
|
|
|
pulse_gen_hw[hw_idx].private.p_pulse_gen = pvPortMalloc(sizeof(pulse_gen_t) * len);
|
|
memcpy(pulse_gen_hw[hw_idx].private.p_pulse_gen, pulse_gen_hw[hw_idx].p_pulse_gen, sizeof(*p_pulse_gen) * len);
|
|
|
|
taskEXIT_CRITICAL();
|
|
};
|
|
|
|
void cpg_pulse_default_demo_ext(void)
|
|
{
|
|
uint32_t pulse_gen_numb = 2;
|
|
|
|
pulse_gen_t *p_pulse_genA = pvPortMalloc(sizeof(pulse_gen_t) * pulse_gen_numb);
|
|
pulse_gen_t *p_pulse_genB = pvPortMalloc(sizeof(pulse_gen_t) * pulse_gen_numb);
|
|
|
|
memset(p_pulse_genA, 0x00, sizeof(pulse_gen_t) * pulse_gen_numb);
|
|
memset(p_pulse_genB, 0x00, sizeof(pulse_gen_t) * pulse_gen_numb);
|
|
|
|
if (pulse_gen_numb > 0)
|
|
{
|
|
p_pulse_genA[0] = (pulse_gen_t) {
|
|
.VBxH = VB1H_PIN,
|
|
.VBxL = VB1L_PIN,
|
|
.VAxH = VA1H_PIN,
|
|
.VAxL = VA1L_PIN,
|
|
.point_us[0] = 1,
|
|
.point_us[1] = 50,
|
|
.point_us[2] = 1,
|
|
.point_us[3] = 0,
|
|
.point_us[4] = 1,
|
|
.point_us[5] = 50,
|
|
.point_us[6] = 1,
|
|
.idle_us = 1000,
|
|
.pulse_cnt = UINT32_MAX,
|
|
.pulse_id = 0,
|
|
};
|
|
}
|
|
|
|
if (pulse_gen_numb > 1)
|
|
{
|
|
p_pulse_genA[1] = (pulse_gen_t) {
|
|
.VBxH = VB2H_PIN,
|
|
.VBxL = VB2L_PIN,
|
|
.VAxH = VA2H_PIN,
|
|
.VAxL = VA2L_PIN,
|
|
.point_us[0] = 1,
|
|
.point_us[1] = 50,
|
|
.point_us[2] = 1,
|
|
.point_us[3] = 0,
|
|
.point_us[4] = 1,
|
|
.point_us[5] = 50,
|
|
.point_us[6] = 1,
|
|
.idle_us = 1000,
|
|
.pulse_cnt = UINT32_MAX,
|
|
.pulse_id = 1,
|
|
};
|
|
}
|
|
|
|
if (pulse_gen_numb > 0)
|
|
{
|
|
p_pulse_genB[0] = (pulse_gen_t) {
|
|
.VBxH = VB3H_PIN,
|
|
.VBxL = VB3L_PIN,
|
|
.VAxH = VA3H_PIN,
|
|
.VAxL = VA3L_PIN,
|
|
.point_us[0] = 1,
|
|
.point_us[1] = 50,
|
|
.point_us[2] = 1,
|
|
.point_us[3] = 0,
|
|
.point_us[4] = 1,
|
|
.point_us[5] = 50,
|
|
.point_us[6] = 1,
|
|
.idle_us = 1000,
|
|
.pulse_cnt = UINT32_MAX,
|
|
.pulse_id = 2,
|
|
};
|
|
}
|
|
|
|
if (pulse_gen_numb > 1)
|
|
{
|
|
p_pulse_genB[1] = (pulse_gen_t) {
|
|
.VBxH = VB4H_PIN,
|
|
.VBxL = VB4L_PIN,
|
|
.VAxH = VA4H_PIN,
|
|
.VAxL = VA4L_PIN,
|
|
.point_us[0] = 1,
|
|
.point_us[1] = 50,
|
|
.point_us[2] = 1,
|
|
.point_us[3] = 0,
|
|
.point_us[4] = 1,
|
|
.point_us[5] = 50,
|
|
.point_us[6] = 1,
|
|
.idle_us = 1000,
|
|
.pulse_cnt = UINT32_MAX,
|
|
.pulse_id = 3,
|
|
};
|
|
}
|
|
|
|
for (uint32_t i = 0; i < pulse_gen_numb; i++)
|
|
{
|
|
nrf_gpio_pin_clear(p_pulse_genA[i].VBxL);
|
|
nrf_gpio_pin_set(p_pulse_genA[i].VBxH);
|
|
nrf_gpio_pin_clear(p_pulse_genA[i].VAxL);
|
|
nrf_gpio_pin_set(p_pulse_genA[i].VAxH);
|
|
}
|
|
|
|
/*
|
|
for (uint32_t i = 0; i < pulse_gen_numb; i++)
|
|
{
|
|
nrf_gpio_pin_clear(p_pulse_genB[i].VBxL);
|
|
nrf_gpio_pin_set(p_pulse_genB[i].VBxH);
|
|
nrf_gpio_pin_clear(p_pulse_genB[i].VAxL);
|
|
nrf_gpio_pin_set(p_pulse_genB[i].VAxH);
|
|
}
|
|
*/
|
|
|
|
cpg11_pulse_init(0, p_pulse_genA, pulse_gen_numb);
|
|
|
|
// cpg11_pulse_init(1, p_pulse_genB, pulse_gen_numb);
|
|
|
|
cpg11_pulse_start(0, p_pulse_genA);
|
|
|
|
// cpg11_pulse_start(1, p_pulse_genB);
|
|
|
|
for (;;)
|
|
{
|
|
vTaskDelay(10);
|
|
cpg11_pulse_suspend_by_pulse_id(p_pulse_genA[0].pulse_id);
|
|
vTaskDelay(10);
|
|
cpg11_pulse_resume_by_pulse_id(p_pulse_genA[0].pulse_id);
|
|
}
|
|
// cpg11_pulse_suspend_by_pulse_id(p_pulse_gen[0].pulse_id);
|
|
// cpg11_pulse_suspend_by_pulse_id(p_pulse_gen[1].pulse_id);
|
|
// cpg11_pulse_suspend_by_pulse_id(p_pulse_gen[2].pulse_id);
|
|
// cpg11_pulse_suspend_by_pulse_id(p_pulse_gen[3].pulse_id);
|
|
// cpg11_pulse_suspend_by_pulse_id(p_pulse_gen[4].pulse_id);
|
|
|
|
vPortFree(p_pulse_genA);
|
|
vPortFree(p_pulse_genB);
|
|
|
|
for (;;)
|
|
{
|
|
}
|
|
}
|
|
|
|
void cpg11_io_init(void)
|
|
{
|
|
const uint32_t pel_pins_default_high[] = {
|
|
LED_R_PIN,
|
|
LED_G_PIN,
|
|
CS_MEM_PIN,
|
|
ADPT_CLR_PIN
|
|
};
|
|
|
|
const uint32_t pel_pins_default_low[] = {
|
|
LED_B_PIN,
|
|
TW_SCKI_0_PIN,
|
|
TW_SCKI_1_PIN,
|
|
ADPT_CLK_PIN,
|
|
HV_EN_PIN,
|
|
SPIM_CLK_PIN,
|
|
SPIM_MOSI_PIN,
|
|
SPIM_MISO_PIN,
|
|
ADPT_LE_PIN,
|
|
ADPT0_S4_PIN,
|
|
ADPT0_S3_PIN,
|
|
ADPT0_S2_PIN,
|
|
ADPT0_S1_PIN,
|
|
ADPT1_S4_PIN,
|
|
ADPT1_S3_PIN,
|
|
ADPT1_S2_PIN,
|
|
ADPT1_S1_PIN,
|
|
|
|
VB1L_PIN,
|
|
VB1H_PIN,
|
|
VA1L_PIN,
|
|
VA1H_PIN,
|
|
|
|
VB2L_PIN,
|
|
VB2H_PIN,
|
|
VA2L_PIN,
|
|
VA2H_PIN,
|
|
|
|
VB3L_PIN,
|
|
VB3H_PIN,
|
|
VA3L_PIN,
|
|
VA3H_PIN,
|
|
|
|
VB4L_PIN,
|
|
VB4H_PIN,
|
|
VA4L_PIN,
|
|
VA4H_PIN,
|
|
};
|
|
|
|
for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)
|
|
{
|
|
nrf_gpio_cfg_output(pel_pins_default_high[i]);
|
|
nrf_gpio_pin_set(pel_pins_default_high[i]);
|
|
}
|
|
|
|
for (int i = 0; i < COUNTOF(pel_pins_default_low); i++)
|
|
{
|
|
nrf_gpio_cfg_output(pel_pins_default_low[i]);
|
|
nrf_gpio_pin_clear(pel_pins_default_low[i]);
|
|
}
|
|
|
|
nrf_gpio_cfg_input(AIN0_PIN, NRF_GPIO_PIN_NOPULL);
|
|
nrf_gpio_cfg_input(AIN1_PIN, NRF_GPIO_PIN_NOPULL);
|
|
|
|
for (uint32_t i = 0; i < COUNTOF(pulse_gen_hw); i++)
|
|
{
|
|
pulse_gen_hw[i].TMR_B->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
|
pulse_gen_hw[i].TMR_B->MODE = NRF_TIMER_MODE_TIMER;
|
|
pulse_gen_hw[i].TMR_B->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
|
|
|
pulse_gen_hw[i].TMR_A->PRESCALER = NRF_TIMER_FREQ_16MHz;
|
|
pulse_gen_hw[i].TMR_A->MODE = NRF_TIMER_MODE_TIMER;
|
|
pulse_gen_hw[i].TMR_A->BITMODE = NRF_TIMER_BIT_WIDTH_32;
|
|
|
|
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_B_IRQn, _PRIO_APP_HIGH);
|
|
sd_nvic_SetPriority(pulse_gen_hw[i].TMR_A_IRQn, _PRIO_APP_HIGH);
|
|
}
|
|
|
|
for (int i = 0; i < 2; i++)
|
|
{
|
|
pulse_gen_hw[i].p_pulse_gen[0].VAxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[0].VBxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[0].VAxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[0].VBxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[1].VAxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[1].VBxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[1].VAxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].p_pulse_gen[1].VBxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[0].VAxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[0].VBxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[0].VAxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[0].VBxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[1].VAxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[1].VBxH = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[1].VAxL = 0xFFFFFFFF;
|
|
pulse_gen_hw[i].private.p_pulse_gen[1].VBxL = 0xFFFFFFFF;
|
|
}
|
|
|
|
// cpg_pulse_default_demo_ext();
|
|
}
|
|
|
|
#endif
|