chain40
134 lines
3.9 KiB
C
134 lines
3.9 KiB
C
#include "max5136.h"
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#include "dac_drv_if.h"
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#include "nrf_log.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#if (DEF_MAX5136_ENABLED)
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#define MAX5136_NOP_MODE (0x00 << 0)
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#define MAX5136_LDAC_MODE (0x01 << 0)
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#define MAX5136_CLR_MODE (0x02 << 0)
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#define MAX5136_PWR_CTRL_MODE (0x03 << 0)
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#define MAX5136_LINEARITY_MODE (0x05 << 0)
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#define MAX5136_WRITE_MODE (0x01 << 4)
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#define MAX5136_WRITE_THROUGH_MODE (0x03 << 4)
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#define MAX5136_LINEARITY_SET (0b1000000000)
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#define MAX5136_LINEARITY_CLR (0b0000000000)
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typedef struct __PACKED
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{
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uint8_t ctrl_bits;
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uint16_t data_bits;
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} max5136_opcode_t;
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static int max5136_ldac_mode(uint32_t channel_mask)
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{
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/*
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Move contents of input to DAC registers indicated by 1's.
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No effect on registers indicated by 0's.
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*/
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max5136_opcode_t op_code = {
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.ctrl_bits = MAX5136_LDAC_MODE,
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.data_bits = __REVSH((channel_mask & 0b1111) << 8),
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};
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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return 0;
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}
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static int max5136_power_control_mode(uint32_t channel_mask, uint32_t ready_enable)
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{
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/*
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Power down DACs indicated by 1's.
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Set READY_EN = 1 to enable READY.
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*/
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max5136_opcode_t op_code = {
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.ctrl_bits = MAX5136_PWR_CTRL_MODE | (channel_mask & 0b1111),
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.data_bits = __REVSH(((channel_mask & 0b1111) << 8) | (ready_enable == 0 ? 0 : 1)),
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};
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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return 0;
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}
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static int max5136_write_mode(uint32_t channel_mask, int32_t dac_val)
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{
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/*
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Write to selected input registers (DAC output not affected).
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*/
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max5136_opcode_t op_code = {
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.ctrl_bits = MAX5136_WRITE_MODE | (channel_mask & 0b1111),
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.data_bits = __REVSH(dac_val),
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};
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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return 0;
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}
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static int max5136_write_through_mode(uint32_t channel_mask, int32_t dac_val)
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{
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/*
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Write to selected input and DAC registers, DAC outputs updated (writethrough).
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*/
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max5136_opcode_t op_code = {
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.ctrl_bits = MAX5136_WRITE_THROUGH_MODE | (channel_mask & 0b1111),
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.data_bits = __REVSH(dac_val),
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};
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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return 0;
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}
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static void max5136_linearity(void)
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{
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/*
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To guarantee DAC linearity, wait until the supplies have
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settled. Set the LIN bit in the DAC linearity register; wait
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10ms, and clear the LIN bit.
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*/
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max5136_opcode_t op_code = { .ctrl_bits = MAX5136_LINEARITY_MODE };
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op_code.data_bits = __REVSH(MAX5136_LINEARITY_SET);
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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vTaskDelay(pdMS_TO_TICKS(10));
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op_code.data_bits = __REVSH(MAX5136_LINEARITY_CLR);
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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}
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static int max5136_soft_reset(void)
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{
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/*
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The software clear command acts as a software POR,
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erasing the contents of all registers. All outputs
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return to the state determined by the M/Z input.
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*/
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max5136_opcode_t op_code = {
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.ctrl_bits = MAX5136_CLR_MODE,
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.data_bits = 0,
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};
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spim_xfer(CS_DAC_PIN, NRF_SPIM_MODE_2, (uint8_t *)&op_code, sizeof(op_code), NULL, 0);
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return 0;
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}
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static int max5136_init(void)
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{
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max5136_soft_reset();
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max5136_linearity();
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return 0;
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}
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dac_drv_if_t max5316_drv = {
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.init = max5136_init,
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.ldac_mode = max5136_ldac_mode,
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.reset = max5136_soft_reset,
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.power_control_mode = max5136_power_control_mode,
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.write_mode = max5136_write_mode,
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.write_through_mode = max5136_write_through_mode,
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};
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#endif /* !DEF_MAX5136_ENABLED */
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