#include "cpg10_dev_mode.h" #include "tw1508.h" #include "nrf_gpio.h" #include "nrf_log.h" #if (DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_10 || \ DEF_ELITE_MODEL == DEF_CURRENT_PULSE_GANERATOR_11) // The GPIO corresponding to the pin const uint32_t pin_to_gpio_table[] = { [6] = NRF_GPIO_PIN_MAP(0, 22), [8] = NRF_GPIO_PIN_MAP(0, 25), [9] = NRF_GPIO_PIN_MAP(0, 19), [10] = NRF_GPIO_PIN_MAP(0, 21), [11] = NRF_GPIO_PIN_MAP(1, 0), [12] = NRF_GPIO_PIN_MAP(0, 18), [13] = NRF_GPIO_PIN_MAP(0, 17), [14] = NRF_GPIO_PIN_MAP(0, 20), [16] = NRF_GPIO_PIN_MAP(0, 14), [17] = NRF_GPIO_PIN_MAP(0, 13), [18] = NRF_GPIO_PIN_MAP(0, 11), [20] = NRF_GPIO_PIN_MAP(0, 15), [25] = NRF_GPIO_PIN_MAP(1, 8), [26] = NRF_GPIO_PIN_MAP(0, 12), [27] = NRF_GPIO_PIN_MAP(0, 7), [28] = NRF_GPIO_PIN_MAP(1, 9), [29] = NRF_GPIO_PIN_MAP(0, 8), [30] = NRF_GPIO_PIN_MAP(0, 6), [31] = NRF_GPIO_PIN_MAP(0, 5), [32] = NRF_GPIO_PIN_MAP(0, 27), [33] = NRF_GPIO_PIN_MAP(0, 26), [34] = NRF_GPIO_PIN_MAP(0, 4), [36] = NRF_GPIO_PIN_MAP(0, 1), [37] = NRF_GPIO_PIN_MAP(0, 29), [38] = NRF_GPIO_PIN_MAP(0, 0), [39] = NRF_GPIO_PIN_MAP(0, 31), [40] = NRF_GPIO_PIN_MAP(1, 15), [41] = NRF_GPIO_PIN_MAP(0, 2), [42] = NRF_GPIO_PIN_MAP(0, 30), [43] = NRF_GPIO_PIN_MAP(0, 28), [44] = NRF_GPIO_PIN_MAP(1, 12), [45] = NRF_GPIO_PIN_MAP(1, 14), [46] = NRF_GPIO_PIN_MAP(0, 3), [47] = NRF_GPIO_PIN_MAP(1, 13), [48] = NRF_GPIO_PIN_MAP(1, 3), [49] = NRF_GPIO_PIN_MAP(1, 10), [50] = NRF_GPIO_PIN_MAP(1, 6), [51] = NRF_GPIO_PIN_MAP(1, 11), [52] = NRF_GPIO_PIN_MAP(0, 10), [53] = NRF_GPIO_PIN_MAP(0, 9), [59] = NRF_GPIO_PIN_MAP(1, 2), [60] = NRF_GPIO_PIN_MAP(0, 24), [61] = NRF_GPIO_PIN_MAP(0, 23), [62] = NRF_GPIO_PIN_MAP(0, 16), }; static pusle_gen_t dev_mode_pusle_gen[2] = { { .VBxH = VB1H_PIN, .VBxL = VB1L_PIN, .VAxH = VA1H_PIN, .VAxL = VA1L_PIN, .idle_us = 1000, .point_us[0] = 1, .point_us[1] = 250, .point_us[2] = 1, .point_us[3] = 0, .point_us[4] = 1, .point_us[5] = 250, .point_us[6] = 1, .pulse_cnt = 0, .op_mode = 0, }, { .VBxH = VB2H_PIN, .VBxL = VB2L_PIN, .VAxH = VA2H_PIN, .VAxL = VA2L_PIN, .idle_us = 1000, .point_us[0] = 1, .point_us[1] = 250, .point_us[2] = 1, .point_us[3] = 0, .point_us[4] = 1, .point_us[5] = 250, .point_us[6] = 1, .pulse_cnt = 0xFFFFFFFF, .op_mode = 1, } }; static uint32_t bmd380pins_convert_to_gpio(uint32_t pin) { uint32_t gpio; switch (pin) { case 6: case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 16: case 17: case 18: case 20: case 25: case 26: case 27: case 28: case 29: case 30: case 31: case 32: case 33: case 34: case 36: case 37: case 38: case 39: case 40: case 41: case 42: case 43: case 44: case 45: case 46: case 47: case 48: case 49: case 50: case 51: case 52: case 53: case 59: case 60: case 61: case 62: gpio = pin_to_gpio_table[pin]; break; default: gpio = UNDEF_GPIO; NRF_LOG_INFO("UNDEF_GPIO: pin number %02d can't convert to gpio number", pin); break; } return gpio; } static void set_bmd380_pin_signal(uint32_t pin, uint32_t high_low) { uint32_t gpio = bmd380pins_convert_to_gpio(pin); if (gpio != UNDEF_GPIO) { nrf_gpio_pin_write(gpio, high_low); NRF_LOG_INFO("set pin number %02d (gpio %02d) = %d", pin, gpio, high_low); } } #define ELECTRODE_A1B1_IDLE 0x09 #define ELECTRODE_A2B2_IDLE 0x0A #define ELECTRODE_A3B3_IDLE 0x0B #define ELECTRODE_A4B4_IDLE 0x0C #define ELECTRODE_ALL_HIGHZ 0x0D #define ELECTRODE_E1P_ENABLE 0x0E #define ELECTRODE_E1P_DISABLE 0x0F #define ELECTRODE_E1N_ENABLE 0x10 #define ELECTRODE_E1N_DISABLE 0x11 #define ELECTRODE_E2P_ENABLE 0x12 #define ELECTRODE_E2P_DISABLE 0x13 #define ELECTRODE_E2N_ENABLE 0x14 #define ELECTRODE_E2N_DISABLE 0x15 #define ELECTRODE_E3P_ENABLE 0x16 #define ELECTRODE_E3P_DISABLE 0x17 #define ELECTRODE_E3N_ENABLE 0x18 #define ELECTRODE_E3N_DISABLE 0x19 #define ELECTRODE_E4P_ENABLE 0x1A #define ELECTRODE_E4P_DISABLE 0x1B #define ELECTRODE_E4N_ENABLE 0x1C #define ELECTRODE_E4N_DISABLE 0x1D static void cpg10_electrodes(uint32_t electrodes_mode) { switch (electrodes_mode) { case ELECTRODE_A1B1_IDLE: NRF_LOG_INFO("ELECTRODE_A1B1_IDLE()"); nrf_gpio_pin_write(VA1H_PIN, 1); nrf_gpio_pin_write(VB1L_PIN, 0); nrf_gpio_pin_write(VB1H_PIN, 1); nrf_gpio_pin_write(VA1L_PIN, 0); break; case ELECTRODE_A2B2_IDLE: NRF_LOG_INFO("ELECTRODE_A2B2_IDLE()"); nrf_gpio_pin_write(VA2H_PIN, 1); nrf_gpio_pin_write(VB2L_PIN, 0); nrf_gpio_pin_write(VB2H_PIN, 1); nrf_gpio_pin_write(VA2L_PIN, 0); break; case ELECTRODE_A3B3_IDLE: NRF_LOG_INFO("ELECTRODE_A3B3_IDLE()"); nrf_gpio_pin_write(VA3H_PIN, 1); nrf_gpio_pin_write(VB3L_PIN, 0); nrf_gpio_pin_write(VB3H_PIN, 1); nrf_gpio_pin_write(VA3L_PIN, 0); break; case ELECTRODE_A4B4_IDLE: NRF_LOG_INFO("ELECTRODE_A4B4_IDLE()"); nrf_gpio_pin_write(VA4H_PIN, 1); nrf_gpio_pin_write(VB4L_PIN, 0); nrf_gpio_pin_write(VB4H_PIN, 1); nrf_gpio_pin_write(VA4L_PIN, 0); break; case ELECTRODE_ALL_HIGHZ: NRF_LOG_INFO("ELECTRODE_ALL_HIGHZ()"); nrf_gpio_pin_write(VA1H_PIN, 0); nrf_gpio_pin_write(VB1L_PIN, 0); nrf_gpio_pin_write(VB1H_PIN, 0); nrf_gpio_pin_write(VA1L_PIN, 0); nrf_gpio_pin_write(VA2H_PIN, 0); nrf_gpio_pin_write(VB2L_PIN, 0); nrf_gpio_pin_write(VB2H_PIN, 0); nrf_gpio_pin_write(VA2L_PIN, 0); nrf_gpio_pin_write(VA3H_PIN, 0); nrf_gpio_pin_write(VB3L_PIN, 0); nrf_gpio_pin_write(VB3H_PIN, 0); nrf_gpio_pin_write(VA3L_PIN, 0); nrf_gpio_pin_write(VA4H_PIN, 0); nrf_gpio_pin_write(VB4L_PIN, 0); nrf_gpio_pin_write(VB4H_PIN, 0); nrf_gpio_pin_write(VA4L_PIN, 0); break; case ELECTRODE_E1P_ENABLE: NRF_LOG_INFO("ELECTRODE_E1P_ENABLE()"); nrf_gpio_pin_write(VB1H_PIN, 0); nrf_gpio_pin_write(VB1L_PIN, 1); break; case ELECTRODE_E1P_DISABLE: NRF_LOG_INFO("ELECTRODE_E1P_DISABLE()"); nrf_gpio_pin_write(VB1L_PIN, 0); nrf_gpio_pin_write(VB1H_PIN, 1); break; case ELECTRODE_E1N_ENABLE: NRF_LOG_INFO("ELECTRODE_E1N_ENABLE()"); nrf_gpio_pin_write(VA1H_PIN, 0); nrf_gpio_pin_write(VA1L_PIN, 1); break; case ELECTRODE_E1N_DISABLE: NRF_LOG_INFO("ELECTRODE_E1N_DISABLE()"); nrf_gpio_pin_write(VA1L_PIN, 0); nrf_gpio_pin_write(VA1H_PIN, 1); break; case ELECTRODE_E2P_ENABLE: NRF_LOG_INFO("ELECTRODE_E2P_ENABLE()"); nrf_gpio_pin_write(VB2H_PIN, 0); nrf_gpio_pin_write(VB2L_PIN, 1); break; case ELECTRODE_E2P_DISABLE: NRF_LOG_INFO("ELECTRODE_E2P_DISABLE()"); nrf_gpio_pin_write(VB2L_PIN, 0); nrf_gpio_pin_write(VB2H_PIN, 1); break; case ELECTRODE_E2N_ENABLE: NRF_LOG_INFO("ELECTRODE_E2N_ENABLE()"); nrf_gpio_pin_write(VA2H_PIN, 0); nrf_gpio_pin_write(VA2L_PIN, 1); break; case ELECTRODE_E2N_DISABLE: NRF_LOG_INFO("ELECTRODE_E2N_DISABLE()"); nrf_gpio_pin_write(VA2L_PIN, 0); nrf_gpio_pin_write(VA2H_PIN, 1); break; case ELECTRODE_E3P_ENABLE: NRF_LOG_INFO("ELECTRODE_E3P_ENABLE()"); nrf_gpio_pin_write(VB3H_PIN, 0); nrf_gpio_pin_write(VB3L_PIN, 1); break; case ELECTRODE_E3P_DISABLE: NRF_LOG_INFO("ELECTRODE_E3P_DISABLE()"); nrf_gpio_pin_write(VB3L_PIN, 0); nrf_gpio_pin_write(VB3H_PIN, 1); break; case ELECTRODE_E3N_ENABLE: NRF_LOG_INFO("ELECTRODE_E3N_ENABLE()"); nrf_gpio_pin_write(VA3H_PIN, 0); nrf_gpio_pin_write(VA3L_PIN, 1); break; case ELECTRODE_E3N_DISABLE: NRF_LOG_INFO("ELECTRODE_E3N_DISABLE()"); nrf_gpio_pin_write(VA3L_PIN, 0); nrf_gpio_pin_write(VA3H_PIN, 1); break; case ELECTRODE_E4P_ENABLE: NRF_LOG_INFO("ELECTRODE_E4P_ENABLE()"); nrf_gpio_pin_write(VB4H_PIN, 0); nrf_gpio_pin_write(VB4L_PIN, 1); break; case ELECTRODE_E4P_DISABLE: NRF_LOG_INFO("ELECTRODE_E4P_DISABLE()"); nrf_gpio_pin_write(VB4L_PIN, 0); nrf_gpio_pin_write(VB4H_PIN, 1); break; case ELECTRODE_E4N_ENABLE: NRF_LOG_INFO("ELECTRODE_E4N_ENABLE()"); nrf_gpio_pin_write(VA4H_PIN, 0); nrf_gpio_pin_write(VA4L_PIN, 1); break; case ELECTRODE_E4N_DISABLE: NRF_LOG_INFO("ELECTRODE_E4N_DISABLE()"); nrf_gpio_pin_write(VA4L_PIN, 0); nrf_gpio_pin_write(VA4H_PIN, 1); break; } } void set_cpg_pulse_parameter(uint8_t *ins) { NRF_LOG_INFO("%s", __FUNCTION__); uint8_t electrodes_num = ins[5]; uint32_t pulse_width_us = (uint32_t)ins[6] << 24 | (uint32_t)ins[7] << 16 | (uint32_t)ins[8] << 8 | (uint32_t)ins[9]; uint32_t freq_hz = (uint32_t)ins[10] << 24 | (uint32_t)ins[11] << 16 | (uint32_t)ins[12] << 8 | (uint32_t)ins[13]; if (electrodes_num == 1) { dev_mode_pusle_gen[0].point_us[1] = pulse_width_us; dev_mode_pusle_gen[0].point_us[5] = pulse_width_us; dev_mode_pusle_gen[0].idle_us = (1000000 / freq_hz) - (dev_mode_pusle_gen[0].point_us[0] + dev_mode_pusle_gen[0].point_us[1] + dev_mode_pusle_gen[0].point_us[2] + dev_mode_pusle_gen[0].point_us[3] + dev_mode_pusle_gen[0].point_us[4] + dev_mode_pusle_gen[0].point_us[5] + dev_mode_pusle_gen[0].point_us[6]); NRF_LOG_INFO("[1]a = %d us", dev_mode_pusle_gen[0].point_us[0]); NRF_LOG_INFO("[1]b = %d us", dev_mode_pusle_gen[0].point_us[1]); NRF_LOG_INFO("[1]c = %d us", dev_mode_pusle_gen[0].point_us[2]); NRF_LOG_INFO("[1]d = %d us", dev_mode_pusle_gen[0].point_us[3]); NRF_LOG_INFO("[1]e = %d us", dev_mode_pusle_gen[0].point_us[4]); NRF_LOG_INFO("[1]f = %d us", dev_mode_pusle_gen[0].point_us[5]); NRF_LOG_INFO("[1]g = %d us", dev_mode_pusle_gen[0].point_us[6]); NRF_LOG_INFO("[1]idle = %d us", dev_mode_pusle_gen[0].idle_us); } else if (electrodes_num == 2) { dev_mode_pusle_gen[1].point_us[1] = pulse_width_us; dev_mode_pusle_gen[1].point_us[5] = pulse_width_us; dev_mode_pusle_gen[1].idle_us = (1000000 / freq_hz) - (dev_mode_pusle_gen[1].point_us[0] + dev_mode_pusle_gen[1].point_us[1] + dev_mode_pusle_gen[1].point_us[2] + dev_mode_pusle_gen[1].point_us[3] + dev_mode_pusle_gen[1].point_us[4] + dev_mode_pusle_gen[1].point_us[5] + dev_mode_pusle_gen[1].point_us[6]); NRF_LOG_INFO("[2]a = %d us", dev_mode_pusle_gen[1].point_us[0]); NRF_LOG_INFO("[2]b = %d us", dev_mode_pusle_gen[1].point_us[1]); NRF_LOG_INFO("[2]c = %d us", dev_mode_pusle_gen[1].point_us[2]); NRF_LOG_INFO("[2]d = %d us", dev_mode_pusle_gen[1].point_us[3]); NRF_LOG_INFO("[2]e = %d us", dev_mode_pusle_gen[1].point_us[4]); NRF_LOG_INFO("[2]f = %d us", dev_mode_pusle_gen[1].point_us[5]); NRF_LOG_INFO("[2]g = %d us", dev_mode_pusle_gen[1].point_us[6]); NRF_LOG_INFO("[2]idle = %d us", dev_mode_pusle_gen[1].idle_us); } } void start_which_electrodes(uint8_t *ins) { NRF_LOG_INFO("%s", __FUNCTION__); uint8_t electrodes1_pulse_gen_en = (ins[5] & 0b10000000) >> 7; uint8_t electrodes2_pulse_gen_en = (ins[5] & 0b01000000) >> 6; uint8_t electrodes3_pulse_gen_en = (ins[5] & 0b00100000) >> 5; uint8_t electrodes4_pulse_gen_en = (ins[5] & 0b00010000) >> 4; if (electrodes1_pulse_gen_en) { NRF_LOG_INFO("start electrodes1_pulse_gen"); extern bool cpg10_pulse_start(uint32_t idx, pusle_gen_t * p_pusle_gen); cpg10_pulse_start(0, &dev_mode_pusle_gen[0]); } if (electrodes2_pulse_gen_en) { NRF_LOG_INFO("start electrodes2_pulse_gen"); extern bool cpg10_pulse_start(uint32_t idx, pusle_gen_t * p_pusle_gen); cpg10_pulse_start(1, &dev_mode_pusle_gen[1]); } } void stop_which_electrodes(uint8_t *ins) { NRF_LOG_INFO("%s", __FUNCTION__); uint8_t electrodes1_pulse_gen_dis = (ins[5] & 0b10000000) >> 7; uint8_t electrodes2_pulse_gen_dis = (ins[5] & 0b01000000) >> 6; uint8_t electrodes3_pulse_gen_dis = (ins[5] & 0b00100000) >> 5; uint8_t electrodes4_pulse_gen_dis = (ins[5] & 0b00010000) >> 4; if (electrodes1_pulse_gen_dis) { NRF_LOG_INFO("stop electrodes1_pulse_gen"); extern bool cpg10_pulse_stop(uint32_t idx); cpg10_pulse_stop(0); } if (electrodes2_pulse_gen_dis) { NRF_LOG_INFO("stop electrodes2_pulse_gen"); extern bool cpg10_pulse_stop(uint32_t idx); cpg10_pulse_stop(1); } } void set_cpg_pulse_cnt(uint8_t *ins) { NRF_LOG_INFO("%s", __FUNCTION__); uint8_t electrodes_num = ins[5]; uint32_t pulse_cnt = (uint32_t)ins[6] << 24 | (uint32_t)ins[7] << 16 | (uint32_t)ins[8] << 8 | (uint32_t)ins[9]; if (electrodes_num == 1) { dev_mode_pusle_gen[0].pulse_cnt = pulse_cnt; NRF_LOG_INFO("[1]pulse_cnt = %d cnt", dev_mode_pusle_gen[0].pulse_cnt); } else if (electrodes_num == 2) { dev_mode_pusle_gen[1].pulse_cnt = pulse_cnt; NRF_LOG_INFO("[2]pulse_cnt = %d cnt", dev_mode_pusle_gen[1].pulse_cnt); } } /* dev_mode_set_cpg10_electrodes (1) 0x3000FF0009 - func: ELECTRODE_A1B1_IDLE (2) 0x3000FF000A - func: ELECTRODE_A2B2_IDLE (3) 0x3000FF000B - func: ELECTRODE_A3B3_IDLE (4) 0x3000FF000C - func: ELECTRODE_A4B4_IDLE (5) 0x3000FF000D - func: ELECTRODE_ALL_HIGHZ (6) 0x3000FF000E - func: ELECTRODE_E1P_ENABLE (electrode 1 positive) (7) 0x3000FF000F - func: ELECTRODE_E1P_DISABLE (electrode 1 positive) (8) 0x3000FF0010 - func: ELECTRODE_E1N_ENABLE (electrode 1 negative) (9) 0x3000FF0011 - func: ELECTRODE_E1N_DISABLE (electrode 1 negative) (10) 0x3000FF0012 - func: ELECTRODE_E2P_ENABLE (electrode 2 positive) (11) 0x3000FF0013 - func: ELECTRODE_E2P_DISABLE (electrode 2 positive) (12) 0x3000FF0014 - func: ELECTRODE_E2N_ENABLE (electrode 2 negative) (13) 0x3000FF0015 - func: ELECTRODE_E2N_DISABLE (electrode 2 negative) (14) 0x3000FF0016 - func: ELECTRODE_E3P_ENABLE (electrode 3 positive) (15) 0x3000FF0017 - func: ELECTRODE_E3P_DISABLE (electrode 3 positive) (16) 0x3000FF0018 - func: ELECTRODE_E3N_ENABLE (electrode 3 negative) (17) 0x3000FF0019 - func: ELECTRODE_E3N_DISABLE (electrode 3 negative) (18) 0x3000FF001A - func: ELECTRODE_E4P_ENABLE (electrode 4 positive) (19) 0x3000FF001B - func: ELECTRODE_E4P_DISABLE (electrode 4 positive) (20) 0x3000FF001C - func: ELECTRODE_E4N_ENABLE (electrode 4 negative) (21) 0x3000FF001D - func: ELECTRODE_E4N_DISABLE (electrode 4 negative) */ void dev_mode_set_cpg10_electrodes(uint8_t *ins) { struct __PACKED { uint8_t id : 4; uint8_t : 4; uint16_t magic : 16; uint8_t dev_opcode; uint8_t electrodes_opcode; } *p_ins = (void *)ins; cpg10_electrodes(p_ins->electrodes_opcode); } /* dev_mode_set_cpg10_tw1508 (1) 0x3000FF0100 - func: tw1508_init() out_0 = 0, out_1 = 0 (2) 0x3000FF0101aaaabbbb - func: tw1508_set() - aaaa: out_0 value (0x0000 to 0x03FF [LSB]) - bbbb: out_1 value (0x0000 to 0x03FF [LSB]) */ void dev_mode_set_cpg10_tw1508(uint8_t *ins) { struct __PACKED { uint8_t id : 4; uint8_t : 4; uint16_t magic : 16; uint8_t dev_opcode; uint8_t tw1508_opcode; uint8_t param[]; } *p_ins = (void *)ins; switch (p_ins->tw1508_opcode) { case 0x00: { tw1508_init(); NRF_LOG_INFO("tw1508_init()"); break; } case 0x01: { uint16_t out_0; uint16_t out_1; memcpy(&out_0, &p_ins->param[0], sizeof(out_0)); memcpy(&out_1, &p_ins->param[2], sizeof(out_1)); NRF_LOG_INFO("tw1508_set(%d, %d)", out_0, out_1); tw1508_set(out_0, out_1); break; } } } /* dev_mode_ctrl_cpg10_electrodes_task (1) 0x3000FF0205 - func: start the cpg_pulse_default_demo() - electrode 1: pulse_width_us: 250 us freq_hz: 665 Hz idle: 1000 us - electrode 2: pulse_width_us: 250 us freq_hz: 665 Hz idle: 1000 us (2) 0x3000FF0206nnwwwwwwwwffffffff - func: set cpg_pulse parameter values - nn: set which group of electrodes (0x00 to 0x04) 0x01: electrode 1 0x02: electrode 2 0x03: electrode 3 0x04: electrode 4 - wwwwwwww: pulse_width_us (0x00000000 to 0xFFFFFFFF) - ffffffff: freq_hz (0x00000000 to 0xFFFFFFFF) (3) 0x3000FF0207nn - func: select which electrode's pulse to enable - nn: which electrodes (0x00 to 0xF0) 0x80 = 0b10000000: electrode 1 enable pulse 0x40 = 0b01000000: electrode 2 enable pulse 0x20 = 0b00100000: electrode 3 enable pulse 0x10 = 0b00010000: electrode 4 enable pulse ...... 0xF0 = 0b11110000: electrode 1~4 enable pulse (4) 0x3000FF0208nn - func: select which electrode's pulse to stop - nn: which electrodes (0x00 to 0xF0) 0x80 = 0b10000000: electrode 1 stops pulsing 0x40 = 0b01000000: electrode 2 stops pulsing 0x20 = 0b00100000: electrode 3 stops pulsing 0x10 = 0b00010000: electrode 4 stops pulsing ...... 0xF0 = 0b11110000: electrode 1~4 stops pulsing (5) 0x3000FF0209nncccccccc - func: set_cpg_pulse_cnt - nn: set which group of electrodes (0x00 to 0x04) 0x01: electrode 1 0x02: electrode 2 0x03: electrode 3 0x04: electrode 4 - cccccccc: pulse_cnt (0x00000001 to 0xFFFFFFFF) */ void dev_mode_ctrl_cpg10_electrodes_task(uint8_t *ins) { struct __PACKED { uint8_t id : 4; uint8_t : 4; uint16_t magic : 16; uint8_t dev_opcode; uint8_t electrodes_task_opcode; uint8_t param[]; } *p_ins = (void *)ins; switch (p_ins->electrodes_task_opcode) { case 0x05: { NRF_LOG_INFO("cpg_pulse_default_demo()"); extern void cpg_pulse_default_demo(void); cpg_pulse_default_demo(); break; } case 0x06: { set_cpg_pulse_parameter(ins); break; } case 0x07: { start_which_electrodes(ins); break; } case 0x08: { stop_which_electrodes(ins); break; } case 0x09: { set_cpg_pulse_cnt(ins); break; } } } /* dev_mode_gpio_function (1) 0x3000FFA000ppss - func: set_bmd380_pin_signal - pp: pin number (0x06 to 0x3E) 0x06: P0.22_GPIO 0x08: P0.25_GPIO ...... 0x3E: P0.16_GPIO - ss: signal (0x00 or 0x01) 0x00: low 0x01: high (2) 0x3000FFA001ss - func: set all BMD380 PINs to high or low (except for HV_EN, SPI, and input GPIOs) - pin_number[] = { 6, 8, 9, 10, 13, 14, 29, 30, 31, 32, 33, 34, 36, 38, 39, 40, 41, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61 } - ss: signal (0x00 or 0x01) 0x00: low 0x01: high */ void dev_mode_gpio_function(uint8_t *ins) { struct __PACKED { uint8_t id : 4; uint8_t : 4; uint16_t magic : 16; uint8_t dev_opcode; uint8_t gpio_function_opcode; uint8_t param[]; } *p_ins = (void *)ins; switch (p_ins->gpio_function_opcode) { case 0x00: { uint32_t pin = p_ins->param[0]; uint32_t high_low = p_ins->param[1]; set_bmd380_pin_signal(pin, high_low); break; } case 0x01: { uint32_t high_low = p_ins->param[0]; uint32_t pin_number[] = { 6, 8, 9, 10, 13, 14, 29, 30, 31, 32, 33, 34, 36, 38, 39, 40, 41, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 59, 60, 61 }; for (int i = 0; i < sizeof(pin_number) / sizeof(pin_number[0]); i++) { set_bmd380_pin_signal(pin_number[i], high_low); } break; } } } #endif