From d9a2a7b4e2b97baa6c7b43a0660c267a449fb838 Mon Sep 17 00:00:00 2001 From: chain40 Date: Fri, 29 Mar 2024 00:26:06 +0800 Subject: [PATCH] =?UTF-8?q?feat:=20=E5=AF=A6=E4=BD=9C=20sw=5Fdrv,=20sw=5Fd?= =?UTF-8?q?rv=5Fif,=20adgs1412=20driver?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 1. sw_t 是一個 64位元的資料結構, 最大可支援 64 pin sw (adgs1412 最多支援 16 顆) --- adgs1412.c | 80 ++++++++++++++++++++++++++++ adgs1412.h | 8 +++ bmd380_peripheral.vcxproj | 5 ++ bmd380_peripheral.vcxproj.filters | 15 ++++++ main.c | 16 ++++-- sw_drv.c | 54 +++++++++++++++++++ sw_drv.h | 17 ++++++ sw_drv_if.h | 88 +++++++++++++++++++++++++++++++ 8 files changed, 279 insertions(+), 4 deletions(-) create mode 100644 adgs1412.c create mode 100644 adgs1412.h create mode 100644 sw_drv.c create mode 100644 sw_drv.h create mode 100644 sw_drv_if.h diff --git a/adgs1412.c b/adgs1412.c new file mode 100644 index 0000000..4e9017b --- /dev/null +++ b/adgs1412.c @@ -0,0 +1,80 @@ +#include "adgs1412.h" +#include "sw_drv_if.h" + +#include "edc20_pin_ctrl.h" +#include "nrf_delay.h" + +#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20) +#define ASGS1412_COUNT 2 +#else +#error "unsupport" +#endif + +#define SW_PER_ASGS1412 4 +#define SW_TOTAL_COUNT (SW_PER_ASGS1412 * ASGS1412_COUNT) +#define SW_PER_BYTE SW_PER_ASGS1412 + +#if (SW_TOTAL_COUNT > 64) +#error "unsupport" +#endif + +#define DAISY_CHAIN_MODE 0x2500 + +static sw_t m_sw; + +static int adgs1412_reset(void) +{ + nrf_gpio_pin_clear(RST_SW_PIN); + nrf_delay_ms(1); + nrf_gpio_pin_set(RST_SW_PIN); + return 0; +} + +static int adgs1412_write(sw_t sw_mask) +{ + uint8_t cmd[sizeof(uint64_t) / SW_PER_BYTE]; + uint64_t val = m_sw.val = sw_mask.val; + for (int i = 1; i <= sizeof(cmd); i++) + { + cmd[sizeof(cmd) - i] = val & ((0x01 << SW_PER_BYTE) - 1); + val = val >> 4; + } + spi2_write(CS_SW_PIN, (uint8_t *)cmd, sizeof(cmd), NULL, 0); + return 0; +} + +static int adgs1412_read(sw_t *p_sw_mask) +{ + *p_sw_mask = m_sw; + return 0; +} + +static int adgs1412_get_sw_count(uint32_t *p_sw_cnt) +{ + *p_sw_cnt = SW_TOTAL_COUNT; + return 0; +} + +static int adgs1412_init(void) +{ + /* reset */ + adgs1412_reset(); + + /* enter daisy chain mode */ + uint16_t cmd = __REV16(DAISY_CHAIN_MODE); + spi2_write(CS_SW_PIN, (uint8_t *)&cmd, sizeof(cmd), NULL, 0); + + /* sw status initialize */ + m_sw.val = 0; + adgs1412_write(m_sw); + + return 0; +} + +const sw_drv_if_t adgs1412 = { + .init = adgs1412_init, + .reset = adgs1412_reset, + .write = adgs1412_write, + .read = adgs1412_read, + .get_sw_count = adgs1412_get_sw_count, +}; diff --git a/adgs1412.h b/adgs1412.h new file mode 100644 index 0000000..70e7b3c --- /dev/null +++ b/adgs1412.h @@ -0,0 +1,8 @@ +#pragma once +#ifndef __ADGS1412_H__ +#define __ADGS1412_H__ + +#include "sw_drv_if.h" +extern const sw_drv_if_t adgs1412; + +#endif // !__ADGS1412_H__ diff --git a/bmd380_peripheral.vcxproj b/bmd380_peripheral.vcxproj index 69199fa..2242d15 100644 --- a/bmd380_peripheral.vcxproj +++ b/bmd380_peripheral.vcxproj @@ -181,6 +181,7 @@ true + @@ -200,6 +201,7 @@ + @@ -345,6 +347,7 @@ + @@ -363,6 +366,8 @@ + + diff --git a/bmd380_peripheral.vcxproj.filters b/bmd380_peripheral.vcxproj.filters index f4da372..a560326 100644 --- a/bmd380_peripheral.vcxproj.filters +++ b/bmd380_peripheral.vcxproj.filters @@ -1392,6 +1392,12 @@ Source files + + Source files + + + Source files + @@ -1711,6 +1717,15 @@ Header files + + Header files + + + Header files + + + Header files + diff --git a/main.c b/main.c index 93b7656..95e7526 100644 --- a/main.c +++ b/main.c @@ -29,6 +29,7 @@ extern "C" #include "dac_drv.h" #include "elite_pin_ctrl.h" #include "led_drv.h" +#include "sw_drv.h" #ifdef __cplusplus } @@ -117,14 +118,21 @@ static void nrf_sdh_freertos_task_hook(void *p_context) twi_init(); spi_init(); led_init(); + sw_init(); adc_init(); dac_init(); - int32_t val; - adc_gain(NP_GAIN_1P500); - for (int i = 0; i < 8; i++) + if (1) { - adc_read(i, &val); + sw_t sw; + uint32_t sw_cnt; + sw_count(&sw_cnt); + sw_read(&sw); + sw.sw0 = 1; + sw.sw2 = 1; + sw.sw4 = 1; + sw.sw5 = 1; + sw_write(sw); } led_set(LED_IDEL_DISCONNECT); diff --git a/sw_drv.c b/sw_drv.c new file mode 100644 index 0000000..52fe5a6 --- /dev/null +++ b/sw_drv.c @@ -0,0 +1,54 @@ +#include "sw_drv.h" +#include "adgs1412.h" + +#if (DEF_ELITE_MODEL == DEF_ELITE_EDC_20) +const sw_drv_if_t *p_inst = &adgs1412; +#else +static mux_drv_if_t *p_inst = NULL; +#endif + +int sw_init(void) +{ + if (p_inst == NULL) + { + return SW_DRV_ERROR; + } + return p_inst->init(); +} + +int sw_reset(void) +{ + if (p_inst == NULL) + { + return SW_DRV_ERROR; + } + return p_inst->reset(); +} + +int sw_write(sw_t sw_mask) +{ + if (p_inst == NULL) + { + return SW_DRV_ERROR; + } + return p_inst->write(sw_mask); +} + +int sw_read(sw_t *p_sw_mask) +{ + if (p_inst == NULL) + { + return SW_DRV_ERROR; + } + return p_inst->read(p_sw_mask); +} + + +int sw_count(uint32_t *p_sw_count) +{ + if (p_inst == NULL) + { + return SW_DRV_ERROR; + } + return p_inst->get_sw_count(p_sw_count); +} diff --git a/sw_drv.h b/sw_drv.h new file mode 100644 index 0000000..77721e0 --- /dev/null +++ b/sw_drv.h @@ -0,0 +1,17 @@ +#pragma once +#ifndef __SW_DRV_H__ +#define __SW_DRV_H__ + +#include "sw_drv_if.h" +#include + +#define SW_DRV_ERROR (-1) +#define SW_DRV_SUCCESS (0) + +int sw_init(void); +int sw_reset(void); +int sw_write(sw_t sw_mask); +int sw_read(sw_t *p_sw_mask); +int sw_count(uint32_t *p_sw_count); + +#endif // !__MUX_DRV_H__ diff --git a/sw_drv_if.h b/sw_drv_if.h new file mode 100644 index 0000000..9473bc5 --- /dev/null +++ b/sw_drv_if.h @@ -0,0 +1,88 @@ +#pragma once +#ifndef __MUX_DRV_IF_H__ +#define __MUX_DRV_IF_H__ + +#include + +typedef union +{ + uint64_t val; + struct + { + uint64_t sw0 : 1; + uint64_t sw1 : 1; + uint64_t sw2 : 1; + uint64_t sw3 : 1; + uint64_t sw4 : 1; + uint64_t sw5 : 1; + uint64_t sw6 : 1; + uint64_t sw7 : 1; + uint64_t sw8 : 1; + uint64_t sw9 : 1; + uint64_t sw10 : 1; + uint64_t sw11 : 1; + uint64_t sw12 : 1; + uint64_t sw13 : 1; + uint64_t sw14 : 1; + uint64_t sw15 : 1; + uint64_t sw16 : 1; + uint64_t sw17 : 1; + uint64_t sw18 : 1; + uint64_t sw19 : 1; + uint64_t sw20 : 1; + uint64_t sw21 : 1; + uint64_t sw22 : 1; + uint64_t sw23 : 1; + uint64_t sw24 : 1; + uint64_t sw25 : 1; + uint64_t sw26 : 1; + uint64_t sw27 : 1; + uint64_t sw28 : 1; + uint64_t sw29 : 1; + uint64_t sw30 : 1; + uint64_t sw31 : 1; + uint64_t sw32 : 1; + uint64_t sw33 : 1; + uint64_t sw34 : 1; + uint64_t sw35 : 1; + uint64_t sw36 : 1; + uint64_t sw37 : 1; + uint64_t sw38 : 1; + uint64_t sw39 : 1; + uint64_t sw40 : 1; + uint64_t sw41 : 1; + uint64_t sw42 : 1; + uint64_t sw43 : 1; + uint64_t sw44 : 1; + uint64_t sw45 : 1; + uint64_t sw46 : 1; + uint64_t sw47 : 1; + uint64_t sw48 : 1; + uint64_t sw49 : 1; + uint64_t sw50 : 1; + uint64_t sw51 : 1; + uint64_t sw52 : 1; + uint64_t sw53 : 1; + uint64_t sw54 : 1; + uint64_t sw55 : 1; + uint64_t sw56 : 1; + uint64_t sw57 : 1; + uint64_t sw58 : 1; + uint64_t sw59 : 1; + uint64_t sw60 : 1; + uint64_t sw61 : 1; + uint64_t sw62 : 1; + uint64_t sw63 : 1; + }; +} sw_t; + +typedef struct +{ + int (*init)(void); + int (*reset)(void); + int (*write)(sw_t sw_mask); + int (*read)(sw_t *p_sw_mask); + int (*get_sw_count)(uint32_t *p_sw_count); +} sw_drv_if_t; + +#endif // !__MUX_DRV_IF_H__