From 8db81a445cdc57494cc681966c99367b3bc2bfce Mon Sep 17 00:00:00 2001
From: Roy_01 <flyu0033136@gmail.com>
Date: Thu, 29 Aug 2024 09:56:08 +0800
Subject: [PATCH] fix: 1. upon startup, the state of all electrodes is highZ
 (the control of GPIOs follows a specific order) 2. the state is idle before
 starting and after finishing the pulse generation

---
 cpg.c      |  6 +++---
 cpg11_io.c | 38 +++++++++++++++++++++++++-------------
 2 files changed, 28 insertions(+), 16 deletions(-)

diff --git a/cpg.c b/cpg.c
index 7fdb39a..136e604 100644
--- a/cpg.c
+++ b/cpg.c
@@ -14,9 +14,9 @@
 
 #define VERSION_DATE_YEAR   24
 #define VERSION_DATE_MONTH  8
-#define VERSION_DATE_DAY    22
-#define VERSION_DATE_HOUR   10
-#define VERSION_DATE_MINUTE 54
+#define VERSION_DATE_DAY    29
+#define VERSION_DATE_HOUR   9
+#define VERSION_DATE_MINUTE 56
 static void cis_version(uint8_t *ins, uint16_t size)
 {
     NRF_LOG_INFO("%s", __FUNCTION__);
diff --git a/cpg11_io.c b/cpg11_io.c
index f30b750..02cfb35 100644
--- a/cpg11_io.c
+++ b/cpg11_io.c
@@ -199,6 +199,14 @@ void cpg11_pulse_init(uint32_t hw_idx, pusle_gen_t *p_pusle_gen, uint32_t len)
     pusle_gen_hw[hw_idx].pusle_gen_len = len;
     pusle_gen_hw[hw_idx].pusle_gen_sel = 0;
 
+    for (uint32_t i = 0; i < len; i++)
+    {
+        nrf_gpio_pin_clear(p_pusle_gen[i].VBxL);
+        nrf_gpio_pin_set(p_pusle_gen[i].VBxH);
+        nrf_gpio_pin_clear(p_pusle_gen[i].VAxL);
+        nrf_gpio_pin_set(p_pusle_gen[i].VAxH);
+    }
+
     taskEXIT_CRITICAL();
 };
 
@@ -323,15 +331,7 @@ void cpg11_io_init(void)
         LED_R_PIN,
         LED_G_PIN,
         LED_B_PIN,
-        CS_MEM_PIN,
-        VA1H_PIN,
-        VB1H_PIN,
-        VA2H_PIN,
-        VB2H_PIN,
-        VA3H_PIN,
-        VB3H_PIN,
-        VA4H_PIN,
-        VB4H_PIN,
+        CS_MEM_PIN
     };
 
     const uint32_t pel_pins_default_low[] = {
@@ -352,14 +352,26 @@ void cpg11_io_init(void)
         ADPT1_S3_PIN,
         ADPT1_S2_PIN,
         ADPT1_S1_PIN,
-        VA1L_PIN,
+
         VB1L_PIN,
-        VA2L_PIN,
+        VB1H_PIN,
+        VA1L_PIN,
+        VA1H_PIN,
+
         VB2L_PIN,
-        VA3L_PIN,
+        VB2H_PIN,
+        VA2L_PIN,
+        VA2H_PIN,
+
         VB3L_PIN,
+        VB3H_PIN,
+        VA3L_PIN,
+        VA3H_PIN,
+
+        VB4L_PIN,
+        VB4H_PIN,
         VA4L_PIN,
-        VB4L_PIN
+        VA4H_PIN,
     };
 
     for (int i = 0; i < COUNTOF(pel_pins_default_high); i++)