From 3741c79e970ff31f5531246c3f7fcd9e8a3bbb5d Mon Sep 17 00:00:00 2001 From: Roy_01 Date: Fri, 29 Mar 2024 18:06:52 +0800 Subject: [PATCH] update testing functionality for dev_mode(switch) --- adgs1412.c | 2 + edc20.c | 187 ++++++++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 188 insertions(+), 1 deletion(-) diff --git a/adgs1412.c b/adgs1412.c index 117457a..4e6ccfd 100644 --- a/adgs1412.c +++ b/adgs1412.c @@ -24,9 +24,11 @@ static sw_t m_sw; static int adgs1412_reset(void) { + // the datasheet lacks clarity, RST_SW_PIN needs to be delayed after the motion signal nrf_gpio_pin_clear(RST_SW_PIN); nrf_delay_ms(1); nrf_gpio_pin_set(RST_SW_PIN); + nrf_delay_ms(1); return 0; } diff --git a/edc20.c b/edc20.c index 93d7254..3039743 100644 --- a/edc20.c +++ b/edc20.c @@ -9,6 +9,7 @@ #include "dac_drv.h" #include "edc20_pin_ctrl.h" #include "led_drv.h" +#include "sw_drv.h" #include "nrf_log.h" @@ -260,6 +261,190 @@ static void dev_mode_set_adc(uint8_t *ins, uint16_t size) } } +void gpio_set_to_vo_mode_config(void) +{ + nrf_gpio_pin_set(Vout_FB_PIN); + nrf_gpio_pin_clear(Vout_IN_PIN); +} + +void gpio_set_to_cv_or_cc_mode_config(void) +{ + nrf_gpio_pin_clear(Vout_FB_PIN); + nrf_gpio_pin_set(Vout_IN_PIN); +} + +void switch_set_to_vo_mode_config(void) +{ + sw_t sw; + uint32_t sw_cnt; + + sw_count(&sw_cnt); + sw_read(&sw); + sw.sw4 = 0; + sw.sw5 = 0; + sw.sw6 = 0; + sw.sw7 = 1; + NRF_LOG_INFO("sw.val= %08X", sw.val); + NRF_LOG_INFO("sw.sw7~sw4=%X %X %X %X", sw.sw7, sw.sw6, sw.sw5, sw.sw4); + NRF_LOG_INFO("sw.sw3~sw0=%X %X %X %X", sw.sw3, sw.sw2, sw.sw1, sw.sw0); + sw_write(sw); +} + +void switch_set_to_cv_or_cc_mode_config(uint8_t vout_resistance_idx) +{ + sw_t sw; + uint32_t sw_cnt; + + sw_count(&sw_cnt); + sw_read(&sw); + + if (vout_resistance_idx == 0x00) + { + sw.sw4 = 0; + sw.sw5 = 0; + sw.sw6 = 1; + sw.sw7 = 0; + } + if (vout_resistance_idx == 0x01) + { + sw.sw4 = 0; + sw.sw5 = 1; + sw.sw6 = 0; + sw.sw7 = 0; + } + if (vout_resistance_idx == 0x02) + { + sw.sw4 = 1; + sw.sw5 = 0; + sw.sw6 = 0; + sw.sw7 = 0; + } + + NRF_LOG_INFO("sw.val= %08X", sw.val); + NRF_LOG_INFO("sw.sw7~sw4=%X %X %X %X", sw.sw7, sw.sw6, sw.sw5, sw.sw4); + NRF_LOG_INFO("sw.sw3~sw0=%X %X %X %X", sw.sw3, sw.sw2, sw.sw1, sw.sw0); + sw_write(sw); +} + +/* + dev_mode_set_switch + (1)0x3000FF9200 + -func: switch initialization + + (2)0x3000FF9201oott + -func: set two switch + -oo: one switch(U12) config 00h-0Fh + 00000000b = all open + 00000001b = U12 S1 close(conductivity) + 00000011b = U12 S2&S1 close(conductivity) + 00000111b = U12 S3&S2&S1 close(conductivity) + 00001111b = U12 S4&S3&S2&S1 close(conductivity) + -tt: two switch(U13) config 00h-0Fh + 00000000b = all open + 00000001b = U13 S1 close(conductivity) + 00000011b = U13 S2&S1 close(conductivity) + 00000111b = U13 S3&S2&S1 close(conductivity) + 00001111b = U13 S4&S3&S2&S1 close(conductivity) + + (3)0x3000FF9202 + -func: vout mode config + + (4)0x3000FF9203rr + -func: cv/cc mode config + -rr: Vout resistance idx 00h-02h + 00h = the smallest Vout resistance (100R) + 01h = the middle Vout resistance (10K) + 02h = the largest Vout resistance (1M) + + (3)0x3000FF9204gg + -func: out_1 gain config + -gg: out_1 resistance idx 00h-02h + 00h = gain0, the smallest voltage output (15K) + 01h = gain1 (39K) + 02h = gain0, the largest voltage output (100K) +*/ +static void dev_mode_set_switch(uint8_t *ins, uint16_t size) +{ +#define SW_ITEM_INIT_SW 0x00 +#define SW_ITEM_WRITE_SW 0x01 +#define SW_ITEM_VOUT_MODE_CFG 0x02 +#define SW_ITEM_CV_CC_MODE_CFG 0x03 +#define SW_ITEM_SET_OUT_1_GAIN 0x04 + + uint8_t sw_item = ins[4]; + + switch (sw_item) + { + case SW_ITEM_INIT_SW: + sw_init(); + break; + + case SW_ITEM_WRITE_SW: { + sw_t sw; + uint32_t sw_cnt; + + sw_count(&sw_cnt); + sw_read(&sw); + sw.val = (uint64_t)ins[6] << 4 | (uint64_t)ins[5]; + NRF_LOG_INFO("sw.val= %08X", sw.val); + NRF_LOG_INFO("sw.sw7~sw4=%X %X %X %X", sw.sw7, sw.sw6, sw.sw5, sw.sw4); + NRF_LOG_INFO("sw.sw3~sw0=%X %X %X %X", sw.sw3, sw.sw2, sw.sw1, sw.sw0); + sw_write(sw); + break; + } + + case SW_ITEM_VOUT_MODE_CFG: { + switch_set_to_vo_mode_config(); + gpio_set_to_vo_mode_config(); + break; + } + + case SW_ITEM_CV_CC_MODE_CFG: { + uint8_t vout_resistance_idx = ins[5]; + switch_set_to_cv_or_cc_mode_config(vout_resistance_idx); + gpio_set_to_vo_mode_config(); + break; + } + + case SW_ITEM_SET_OUT_1_GAIN: { + uint8_t out_1_gain = ins[5]; + sw_t sw; + uint32_t sw_cnt; + + sw_count(&sw_cnt); + sw_read(&sw); + + if (out_1_gain == 0x00) + { + sw.sw0 = 0; + sw.sw1 = 0; + sw.sw2 = 1; + sw.sw3 = 0; + } + if (out_1_gain == 0x01) + { + sw.sw0 = 0; + sw.sw1 = 0; + sw.sw2 = 0; + sw.sw3 = 1; + } + if (out_1_gain == 0x02) + { + sw.sw0 = 0; + sw.sw1 = 0; + sw.sw2 = 0; + sw.sw3 = 0; + } + + NRF_LOG_INFO("sw.val= %08X", sw.val); + NRF_LOG_INFO("sw.sw7~sw4=%X %X %X %X", sw.sw7, sw.sw6, sw.sw5, sw.sw4); + NRF_LOG_INFO("sw.sw3~sw0=%X %X %X %X", sw.sw3, sw.sw2, sw.sw1, sw.sw0); + sw_write(sw); + break; + } + } +} + static void dev_mode_read_output_pin(void) { struct pin_out_t @@ -620,7 +805,7 @@ static void dev_mode(uint8_t *ins, uint16_t size) break; case 0x3000FF92: - // multiplexer + dev_mode_set_switch(ins, size); break; case 0x3000FF9E: