diff --git a/pel.c b/pel.c
index c1d492d..eec7bb2 100644
--- a/pel.c
+++ b/pel.c
@@ -168,10 +168,10 @@ pel_output_t pel_smaple_and_convt_all(uint32_t measure_out, uint32_t load_mask)
 }
 
 #define VERSION_DATE_YEAR   24
-#define VERSION_DATE_MONTH  5
-#define VERSION_DATE_DAY    21
-#define VERSION_DATE_HOUR   18
-#define VERSION_DATE_MINUTE 39
+#define VERSION_DATE_MONTH  7
+#define VERSION_DATE_DAY    9
+#define VERSION_DATE_HOUR   11
+#define VERSION_DATE_MINUTE 8
 static void cis_version(uint8_t *ins, uint16_t size)
 {
     NRF_LOG_INFO("%s", __FUNCTION__);
@@ -346,6 +346,79 @@ static void dev_mode(uint8_t *ins, uint16_t size)
             break;
         }
 
+        case 0xF2: {
+            struct
+            {
+                uint8_t input_n;
+                uint8_t status;
+            } __PACKED *p_param = (void *)p_ins->param;
+
+            uint32_t high_low = p_param->status;
+
+            switch (p_param->input_n) {
+                case 0x01:
+                    nrf_gpio_pin_write(INPUT_1_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_1_PIN = %d", high_low);
+                    break;
+                
+                case 0x02:
+                    nrf_gpio_pin_write(INPUT_2_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_2_PIN = %d", high_low);
+                    break;
+                
+                case 0x03:
+                    nrf_gpio_pin_write(INPUT_3_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_3_PIN = %d", high_low);
+                    break;
+                
+                case 0x04:
+                    nrf_gpio_pin_write(INPUT_4_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_4_PIN = %d", high_low);
+                    break;
+                
+                case 0x05:
+                    nrf_gpio_pin_write(INPUT_5_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_5_PIN = %d", high_low);
+                    break;
+                
+                case 0x06:
+                    nrf_gpio_pin_write(INPUT_6_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_6_PIN = %d", high_low);
+                    break;
+                
+                case 0x07:
+                    nrf_gpio_pin_write(INPUT_7_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_7_PIN = %d", high_low);
+                    break;
+                
+                case 0x08:
+                    nrf_gpio_pin_write(INPUT_8_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_8_PIN = %d", high_low);
+                    break;
+                
+                case 0x09:
+                    nrf_gpio_pin_write(INPUT_9_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_9_PIN = %d", high_low);
+                    break;
+                
+                case 0x0A:
+                    nrf_gpio_pin_write(INPUT_10_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_10_PIN = %d", high_low);
+                    break;
+                
+                case 0x0B:
+                    nrf_gpio_pin_write(INPUT_11_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_11_PIN = %d", high_low);
+                    break;
+                
+                case 0x0C:
+                    nrf_gpio_pin_write(INPUT_12_PIN, high_low);
+                    NRF_LOG_INFO("set INPUT_12_PIN = %d", high_low);
+                    break;
+            }
+            break;
+        }
+
         default: {
             break;
         }